drivers/infiniband/hw/ipath/ipath_common.h

   1 /*
   2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #ifndef _IPATH_COMMON_H
  35 #define _IPATH_COMMON_H
  36
  37 /*
  38  * This file contains defines, structures, etc. that are used
  39  * to communicate between kernel and user code.
  40  */
  41
  42
  43 /* This is the IEEE-assigned OUI for QLogic Inc. InfiniPath */
  44 #define IPATH_SRC_OUI_1 0x00
  45 #define IPATH_SRC_OUI_2 0x11
  46 #define IPATH_SRC_OUI_3 0x75
  47
  48 /* version of protocol header (known to chip also). In the long run,
  49  * we should be able to generate and accept a range of version numbers;
  50  * for now we only accept one, and it's compiled in.
  51  */
  52 #define IPS_PROTO_VERSION 2
  53
  54 /*
  55  * These are compile time constants that you may want to enable or disable
  56  * if you are trying to debug problems with code or performance.
  57  * IPATH_VERBOSE_TRACING define as 1 if you want additional tracing in
  58  * fastpath code
  59  * IPATH_TRACE_REGWRITES define as 1 if you want register writes to be
  60  * traced in faspath code
  61  * _IPATH_TRACING define as 0 if you want to remove all tracing in a
  62  * compilation unit
  63  * _IPATH_DEBUGGING define as 0 if you want to remove debug prints
  64  */
  65
  66 /*
  67  * The value in the BTH QP field that InfiniPath uses to differentiate
  68  * an infinipath protocol IB packet vs standard IB transport
  69  */
  70 #define IPATH_KD_QP 0x656b79
  71
  72 /*
  73  * valid states passed to ipath_set_linkstate() user call
  74  */
  75 #define IPATH_IB_LINKDOWN               0
  76 #define IPATH_IB_LINKARM                1
  77 #define IPATH_IB_LINKACTIVE             2
  78 #define IPATH_IB_LINKINIT               3
  79 #define IPATH_IB_LINKDOWN_SLEEP         4
  80 #define IPATH_IB_LINKDOWN_DISABLE       5
  81
  82 /*
  83  * stats maintained by the driver.  For now, at least, this is global
  84  * to all minor devices.
  85  */
  86 struct infinipath_stats {
  87         /* number of interrupts taken */
  88         __u64 sps_ints;
  89         /* number of interrupts for errors */
  90         __u64 sps_errints;
  91         /* number of errors from chip (not incl. packet errors or CRC) */
  92         __u64 sps_errs;
  93         /* number of packet errors from chip other than CRC */
  94         __u64 sps_pkterrs;
  95         /* number of packets with CRC errors (ICRC and VCRC) */
  96         __u64 sps_crcerrs;
  97         /* number of hardware errors reported (parity, etc.) */
  98         __u64 sps_hwerrs;
  99         /* number of times IB link changed state unexpectedly */
 100         __u64 sps_iblink;
 101         /* kernel receive interrupts that didn't read intstat */
 102         __u64 sps_fastrcvint;
 103         /* number of kernel (port0) packets received */
 104         __u64 sps_port0pkts;
 105         /* number of "ethernet" packets sent by driver */
 106         __u64 sps_ether_spkts;
 107         /* number of "ethernet" packets received by driver */
 108         __u64 sps_ether_rpkts;
 109         /* number of SMA packets sent by driver. Obsolete. */
 110         __u64 sps_sma_spkts;
 111         /* number of SMA packets received by driver. Obsolete. */
 112         __u64 sps_sma_rpkts;
 113         /* number of times all ports rcvhdrq was full and packet dropped */
 114         __u64 sps_hdrqfull;
 115         /* number of times all ports egrtid was full and packet dropped */
 116         __u64 sps_etidfull;
 117         /*
 118          * number of times we tried to send from driver, but no pio buffers
 119          * avail
 120          */
 121         __u64 sps_nopiobufs;
 122         /* number of ports currently open */
 123         __u64 sps_ports;
 124         /* list of pkeys (other than default) accepted (0 means not set) */
 125         __u16 sps_pkeys[4];
 126         __u16 sps_unused16[4]; /* available; maintaining compatible layout */
 127         /* number of user ports per chip (not IB ports) */
 128         __u32 sps_nports;
 129         /* not our interrupt, or already handled */
 130         __u32 sps_nullintr;
 131         /* max number of packets handled per receive call */
 132         __u32 sps_maxpkts_call;
 133         /* avg number of packets handled per receive call */
 134         __u32 sps_avgpkts_call;
 135         /* total number of pages locked */
 136         __u64 sps_pagelocks;
 137         /* total number of pages unlocked */
 138         __u64 sps_pageunlocks;
 139         /*
 140          * Number of packets dropped in kernel other than errors (ether
 141          * packets if ipath not configured, etc.)
 142          */
 143         __u64 sps_krdrops;
 144         /* pad for future growth */
 145         __u64 __sps_pad[46];
 146 };
 147
 148 /*
 149  * These are the status bits readable (in ascii form, 64bit value)
 150  * from the "status" sysfs file.
 151  */
 152 #define IPATH_STATUS_INITTED       0x1  /* basic initialization done */
 153 #define IPATH_STATUS_DISABLED      0x2  /* hardware disabled */
 154 /* Device has been disabled via admin request */
 155 #define IPATH_STATUS_ADMIN_DISABLED    0x4
 156 /* Chip has been found and initted */
 157 #define IPATH_STATUS_CHIP_PRESENT 0x20
 158 /* IB link is at ACTIVE, usable for data traffic */
 159 #define IPATH_STATUS_IB_READY     0x40
 160 /* link is configured, LID, MTU, etc. have been set */
 161 #define IPATH_STATUS_IB_CONF      0x80
 162 /* no link established, probably no cable */
 163 #define IPATH_STATUS_IB_NOCABLE  0x100
 164 /* A Fatal hardware error has occurred. */
 165 #define IPATH_STATUS_HWERROR     0x200
 166
 167 /*
 168  * The list of usermode accessible registers.  Also see Reg_* later in file.
 169  */
 170 typedef enum _ipath_ureg {
 171         /* (RO)  DMA RcvHdr to be used next. */
 172         ur_rcvhdrtail = 0,
 173         /* (RW)  RcvHdr entry to be processed next by host. */
 174         ur_rcvhdrhead = 1,
 175         /* (RO)  Index of next Eager index to use. */
 176         ur_rcvegrindextail = 2,
 177         /* (RW)  Eager TID to be processed next */
 178         ur_rcvegrindexhead = 3,
 179         /* For internal use only; max register number. */
 180         _IPATH_UregMax
 181 } ipath_ureg;
 182
 183 /* bit values for spi_runtime_flags */
 184 #define IPATH_RUNTIME_HT        0x1
 185 #define IPATH_RUNTIME_PCIE      0x2
 186 #define IPATH_RUNTIME_FORCE_WC_ORDER    0x4
 187 #define IPATH_RUNTIME_RCVHDR_COPY       0x8
 188
 189 /*
 190  * This structure is returned by ipath_userinit() immediately after
 191  * open to get implementation-specific info, and info specific to this
 192  * instance.
 193  *
 194  * This struct must have explict pad fields where type sizes
 195  * may result in different alignments between 32 and 64 bit
 196  * programs, since the 64 bit * bit kernel requires the user code
 197  * to have matching offsets
 198  */
 199 struct ipath_base_info {
 200         /* version of hardware, for feature checking. */
 201         __u32 spi_hw_version;
 202         /* version of software, for feature checking. */
 203         __u32 spi_sw_version;
 204         /* InfiniPath port assigned, goes into sent packets */
 205         __u32 spi_port;
 206         /*
 207          * IB MTU, packets IB data must be less than this.
 208          * The MTU is in bytes, and will be a multiple of 4 bytes.
 209          */
 210         __u32 spi_mtu;
 211         /*
 212          * Size of a PIO buffer.  Any given packet's total size must be less
 213          * than this (in words).  Included is the starting control word, so
 214          * if 513 is returned, then total pkt size is 512 words or less.
 215          */
 216         __u32 spi_piosize;
 217         /* size of the TID cache in infinipath, in entries */
 218         __u32 spi_tidcnt;
 219         /* size of the TID Eager list in infinipath, in entries */
 220         __u32 spi_tidegrcnt;
 221         /* size of a single receive header queue entry. */
 222         __u32 spi_rcvhdrent_size;
 223         /*
 224          * Count of receive header queue entries allocated.
 225          * This may be less than the spu_rcvhdrcnt passed in!.
 226          */
 227         __u32 spi_rcvhdr_cnt;
 228
 229         /* per-chip and other runtime features bitmap (IPATH_RUNTIME_*) */
 230         __u32 spi_runtime_flags;
 231
 232         /* address where receive buffer queue is mapped into */
 233         __u64 spi_rcvhdr_base;
 234
 235         /* user program. */
 236
 237         /* base address of eager TID receive buffers. */
 238         __u64 spi_rcv_egrbufs;
 239
 240         /* Allocated by initialization code, not by protocol. */
 241
 242         /*
 243          * Size of each TID buffer in host memory, starting at
 244          * spi_rcv_egrbufs.  The buffers are virtually contiguous.
 245          */
 246         __u32 spi_rcv_egrbufsize;
 247         /*
 248          * The special QP (queue pair) value that identifies an infinipath
 249          * protocol packet from standard IB packets.  More, probably much
 250          * more, to be added.
 251          */
 252         __u32 spi_qpair;
 253
 254         /*
 255          * User register base for init code, not to be used directly by
 256          * protocol or applications.
 257          */
 258         __u64 __spi_uregbase;
 259         /*
 260          * Maximum buffer size in bytes that can be used in a single TID
 261          * entry (assuming the buffer is aligned to this boundary).  This is
 262          * the minimum of what the hardware and software support Guaranteed
 263          * to be a power of 2.
 264          */
 265         __u32 spi_tid_maxsize;
 266         /*
 267          * alignment of each pio send buffer (byte count
 268          * to add to spi_piobufbase to get to second buffer)
 269          */
 270         __u32 spi_pioalign;
 271         /*
 272          * The index of the first pio buffer available to this process;
 273          * needed to do lookup in spi_pioavailaddr; not added to
 274          * spi_piobufbase.
 275          */
 276         __u32 spi_pioindex;
 277          /* number of buffers mapped for this process */
 278         __u32 spi_piocnt;
 279
 280         /*
 281          * Base address of writeonly pio buffers for this process.
 282          * Each buffer has spi_piosize words, and is aligned on spi_pioalign
 283          * boundaries.  spi_piocnt buffers are mapped from this address
 284          */
 285         __u64 spi_piobufbase;
 286
 287         /*
 288          * Base address of readonly memory copy of the pioavail registers.
 289          * There are 2 bits for each buffer.
 290          */
 291         __u64 spi_pioavailaddr;
 292
 293         /*
 294          * Address where driver updates a copy of the interface and driver
 295          * status (IPATH_STATUS_*) as a 64 bit value.  It's followed by a
 296          * string indicating hardware error, if there was one.
 297          */
 298         __u64 spi_status;
 299
 300         /* number of chip ports available to user processes */
 301         __u32 spi_nports;
 302         /* unit number of chip we are using */
 303         __u32 spi_unit;
 304         /* num bufs in each contiguous set */
 305         __u32 spi_rcv_egrperchunk;
 306         /* size in bytes of each contiguous set */
 307         __u32 spi_rcv_egrchunksize;
 308         /* total size of mmap to cover full rcvegrbuffers */
 309         __u32 spi_rcv_egrbuftotlen;
 310         __u32 spi_filler_for_align;
 311         /* address of readonly memory copy of the rcvhdrq tail register. */
 312         __u64 spi_rcvhdr_tailaddr;
 313 } __attribute__ ((aligned(8)));
 314
 315
 316 /*
 317  * This version number is given to the driver by the user code during
 318  * initialization in the spu_userversion field of ipath_user_info, so
 319  * the driver can check for compatibility with user code.
 320  *
 321  * The major version changes when data structures
 322  * change in an incompatible way.  The driver must be the same or higher
 323  * for initialization to succeed.  In some cases, a higher version
 324  * driver will not interoperate with older software, and initialization
 325  * will return an error.
 326  */
 327 #define IPATH_USER_SWMAJOR 1
 328
 329 /*
 330  * Minor version differences are always compatible
 331  * a within a major version, however if if user software is larger
 332  * than driver software, some new features and/or structure fields
 333  * may not be implemented; the user code must deal with this if it
 334  * cares, or it must abort after initialization reports the difference
 335  */
 336 #define IPATH_USER_SWMINOR 2
 337
 338 #define IPATH_USER_SWVERSION ((IPATH_USER_SWMAJOR<<16) | IPATH_USER_SWMINOR)
 339
 340 #define IPATH_KERN_TYPE 0
 341
 342 /*
 343  * Similarly, this is the kernel version going back to the user.  It's
 344  * slightly different, in that we want to tell if the driver was built as
 345  * part of a QLogic release, or from the driver from openfabrics.org,
 346  * kernel.org, or a standard distribution, for support reasons.
 347  * The high bit is 0 for non-QLogic and 1 for QLogic-built/supplied.
 348  *
 349  * It's returned by the driver to the user code during initialization in the
 350  * spi_sw_version field of ipath_base_info, so the user code can in turn
 351  * check for compatibility with the kernel.
 352 */
 353 #define IPATH_KERN_SWVERSION ((IPATH_KERN_TYPE<<31) | IPATH_USER_SWVERSION)
 354
 355 /*
 356  * This structure is passed to ipath_userinit() to tell the driver where
 357  * user code buffers are, sizes, etc.   The offsets and sizes of the
 358  * fields must remain unchanged, for binary compatibility.  It can
 359  * be extended, if userversion is changed so user code can tell, if needed
 360  */
 361 struct ipath_user_info {
 362         /*
 363          * version of user software, to detect compatibility issues.
 364          * Should be set to IPATH_USER_SWVERSION.
 365          */
 366         __u32 spu_userversion;
 367
 368         /* desired number of receive header queue entries */
 369         __u32 spu_rcvhdrcnt;
 370
 371         /* size of struct base_info to write to */
 372         __u32 spu_base_info_size;
 373
 374         /*
 375          * number of words in KD protocol header
 376          * This tells InfiniPath how many words to copy to rcvhdrq.  If 0,
 377          * kernel uses a default.  Once set, attempts to set any other value
 378          * are an error (EAGAIN) until driver is reloaded.
 379          */
 380         __u32 spu_rcvhdrsize;
 381
 382         __u64 spu_unused; /* kept for compatible layout */
 383
 384         /*
 385          * address of struct base_info to write to
 386          */
 387         __u64 spu_base_info;
 388
 389 } __attribute__ ((aligned(8)));
 390
 391 /* User commands. */
 392
 393 #define IPATH_CMD_MIN           16
 394
 395 #define IPATH_CMD_USER_INIT     16      /* set up userspace */
 396 #define IPATH_CMD_PORT_INFO     17      /* find out what resources we got */
 397 #define IPATH_CMD_RECV_CTRL     18      /* control receipt of packets */
 398 #define IPATH_CMD_TID_UPDATE    19      /* update expected TID entries */
 399 #define IPATH_CMD_TID_FREE      20      /* free expected TID entries */
 400 #define IPATH_CMD_SET_PART_KEY  21      /* add partition key */
 401
 402 #define IPATH_CMD_MAX           21
 403
 404 struct ipath_port_info {
 405         __u32 num_active;       /* number of active units */
 406         __u32 unit;             /* unit (chip) assigned to caller */
 407         __u32 port;             /* port on unit assigned to caller */
 408 };
 409
 410 struct ipath_tid_info {
 411         __u32 tidcnt;
 412         /* make structure same size in 32 and 64 bit */
 413         __u32 tid__unused;
 414         /* virtual address of first page in transfer */
 415         __u64 tidvaddr;
 416         /* pointer (same size 32/64 bit) to __u16 tid array */
 417         __u64 tidlist;
 418
 419         /*
 420          * pointer (same size 32/64 bit) to bitmap of TIDs used
 421          * for this call; checked for being large enough at open
 422          */
 423         __u64 tidmap;
 424 };
 425
 426 struct ipath_cmd {
 427         __u32 type;                     /* command type */
 428         union {
 429                 struct ipath_tid_info tid_info;
 430                 struct ipath_user_info user_info;
 431                 /* address in userspace of struct ipath_port_info to
 432                    write result to */
 433                 __u64 port_info;
 434                 /* enable/disable receipt of packets */
 435                 __u32 recv_ctrl;
 436                 /* partition key to set */
 437                 __u16 part_key;
 438         } cmd;
 439 };
 440
 441 struct ipath_iovec {
 442         /* Pointer to data, but same size 32 and 64 bit */
 443         __u64 iov_base;
 444
 445         /*
 446          * Length of data; don't need 64 bits, but want
 447          * ipath_sendpkt to remain same size as before 32 bit changes, so...
 448          */
 449         __u64 iov_len;
 450 };
 451
 452 /*
 453  * Describes a single packet for send.  Each packet can have one or more
 454  * buffers, but the total length (exclusive of IB headers) must be less
 455  * than the MTU, and if using the PIO method, entire packet length,
 456  * including IB headers, must be less than the ipath_piosize value (words).
 457  * Use of this necessitates including sys/uio.h
 458  */
 459 struct __ipath_sendpkt {
 460         __u32 sps_flags;        /* flags for packet (TBD) */
 461         __u32 sps_cnt;          /* number of entries to use in sps_iov */
 462         /* array of iov's describing packet. TEMPORARY */
 463         struct ipath_iovec sps_iov[4];
 464 };
 465
 466 /* Passed into diag data special file's ->write method. */
 467 struct ipath_diag_pkt {
 468         __u32 unit;
 469         __u64 data;
 470         __u32 len;
 471 };
 472
 473 /*
 474  * Data layout in I2C flash (for GUID, etc.)
 475  * All fields are little-endian binary unless otherwise stated
 476  */
 477 #define IPATH_FLASH_VERSION 2
 478 struct ipath_flash {
 479         /* flash layout version (IPATH_FLASH_VERSION) */
 480         __u8 if_fversion;
 481         /* checksum protecting if_length bytes */
 482         __u8 if_csum;
 483         /*
 484          * valid length (in use, protected by if_csum), including
 485          * if_fversion and if_csum themselves)
 486          */
 487         __u8 if_length;
 488         /* the GUID, in network order */
 489         __u8 if_guid[8];
 490         /* number of GUIDs to use, starting from if_guid */
 491         __u8 if_numguid;
 492         /* the (last 10 characters of) board serial number, in ASCII */
 493         char if_serial[12];
 494         /* board mfg date (YYYYMMDD ASCII) */
 495         char if_mfgdate[8];
 496         /* last board rework/test date (YYYYMMDD ASCII) */
 497         char if_testdate[8];
 498         /* logging of error counts, TBD */
 499         __u8 if_errcntp[4];
 500         /* powered on hours, updated at driver unload */
 501         __u8 if_powerhour[2];
 502         /* ASCII free-form comment field */
 503         char if_comment[32];
 504         /* Backwards compatible prefix for longer QLogic Serial Numbers */
 505         char if_sprefix[4];
 506         /* 82 bytes used, min flash size is 128 bytes */
 507         __u8 if_future[46];
 508 };
 509
 510 /*
 511  * These are the counters implemented in the chip, and are listed in order.
 512  * The InterCaps naming is taken straight from the chip spec.
 513  */
 514 struct infinipath_counters {
 515         __u64 LBIntCnt;
 516         __u64 LBFlowStallCnt;
 517         __u64 Reserved1;
 518         __u64 TxUnsupVLErrCnt;
 519         __u64 TxDataPktCnt;
 520         __u64 TxFlowPktCnt;
 521         __u64 TxDwordCnt;
 522         __u64 TxLenErrCnt;
 523         __u64 TxMaxMinLenErrCnt;
 524         __u64 TxUnderrunCnt;
 525         __u64 TxFlowStallCnt;
 526         __u64 TxDroppedPktCnt;
 527         __u64 RxDroppedPktCnt;
 528         __u64 RxDataPktCnt;
 529         __u64 RxFlowPktCnt;
 530         __u64 RxDwordCnt;
 531         __u64 RxLenErrCnt;
 532         __u64 RxMaxMinLenErrCnt;
 533         __u64 RxICRCErrCnt;
 534         __u64 RxVCRCErrCnt;
 535         __u64 RxFlowCtrlErrCnt;
 536         __u64 RxBadFormatCnt;
 537         __u64 RxLinkProblemCnt;
 538         __u64 RxEBPCnt;
 539         __u64 RxLPCRCErrCnt;
 540         __u64 RxBufOvflCnt;
 541         __u64 RxTIDFullErrCnt;
 542         __u64 RxTIDValidErrCnt;
 543         __u64 RxPKeyMismatchCnt;
 544         __u64 RxP0HdrEgrOvflCnt;
 545         __u64 RxP1HdrEgrOvflCnt;
 546         __u64 RxP2HdrEgrOvflCnt;
 547         __u64 RxP3HdrEgrOvflCnt;
 548         __u64 RxP4HdrEgrOvflCnt;
 549         __u64 RxP5HdrEgrOvflCnt;
 550         __u64 RxP6HdrEgrOvflCnt;
 551         __u64 RxP7HdrEgrOvflCnt;
 552         __u64 RxP8HdrEgrOvflCnt;
 553         __u64 Reserved6;
 554         __u64 Reserved7;
 555         __u64 IBStatusChangeCnt;
 556         __u64 IBLinkErrRecoveryCnt;
 557         __u64 IBLinkDownedCnt;
 558         __u64 IBSymbolErrCnt;
 559 };
 560
 561 /*
 562  * The next set of defines are for packet headers, and chip register
 563  * and memory bits that are visible to and/or used by user-mode software
 564  * The other bits that are used only by the driver or diags are in
 565  * ipath_registers.h
 566  */
 567
 568 /* RcvHdrFlags bits */
 569 #define INFINIPATH_RHF_LENGTH_MASK 0x7FF
 570 #define INFINIPATH_RHF_LENGTH_SHIFT 0
 571 #define INFINIPATH_RHF_RCVTYPE_MASK 0x7
 572 #define INFINIPATH_RHF_RCVTYPE_SHIFT 11
 573 #define INFINIPATH_RHF_EGRINDEX_MASK 0x7FF
 574 #define INFINIPATH_RHF_EGRINDEX_SHIFT 16
 575 #define INFINIPATH_RHF_H_ICRCERR   0x80000000
 576 #define INFINIPATH_RHF_H_VCRCERR   0x40000000
 577 #define INFINIPATH_RHF_H_PARITYERR 0x20000000
 578 #define INFINIPATH_RHF_H_LENERR    0x10000000
 579 #define INFINIPATH_RHF_H_MTUERR    0x08000000
 580 #define INFINIPATH_RHF_H_IHDRERR   0x04000000
 581 #define INFINIPATH_RHF_H_TIDERR    0x02000000
 582 #define INFINIPATH_RHF_H_MKERR     0x01000000
 583 #define INFINIPATH_RHF_H_IBERR     0x00800000
 584 #define INFINIPATH_RHF_L_SWA       0x00008000
 585 #define INFINIPATH_RHF_L_SWB       0x00004000
 586
 587 /* infinipath header fields */
 588 #define INFINIPATH_I_VERS_MASK 0xF
 589 #define INFINIPATH_I_VERS_SHIFT 28
 590 #define INFINIPATH_I_PORT_MASK 0xF
 591 #define INFINIPATH_I_PORT_SHIFT 24
 592 #define INFINIPATH_I_TID_MASK 0x7FF
 593 #define INFINIPATH_I_TID_SHIFT 13
 594 #define INFINIPATH_I_OFFSET_MASK 0x1FFF
 595 #define INFINIPATH_I_OFFSET_SHIFT 0
 596
 597 /* K_PktFlags bits */
 598 #define INFINIPATH_KPF_INTR 0x1
 599
 600 /* SendPIO per-buffer control */
 601 #define INFINIPATH_SP_TEST    0x40
 602 #define INFINIPATH_SP_TESTEBP 0x20
 603
 604 /* SendPIOAvail bits */
 605 #define INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT 1
 606 #define INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT 0
 607
 608 /* infinipath header format */
 609 struct ipath_header {
 610         /*
 611          * Version - 4 bits, Port - 4 bits, TID - 10 bits and Offset -
 612          * 14 bits before ECO change ~28 Dec 03.  After that, Vers 4,
 613          * Port 3, TID 11, offset 14.
 614          */
 615         __le32 ver_port_tid_offset;
 616         __le16 chksum;
 617         __le16 pkt_flags;
 618 };
 619
 620 /* infinipath user message header format.
 621  * This structure contains the first 4 fields common to all protocols
 622  * that employ infinipath.
 623  */
 624 struct ipath_message_header {
 625         __be16 lrh[4];
 626         __be32 bth[3];
 627         /* fields below this point are in host byte order */
 628         struct ipath_header iph;
 629         __u8 sub_opcode;
 630 };
 631
 632 /* infinipath ethernet header format */
 633 struct ether_header {
 634         __be16 lrh[4];
 635         __be32 bth[3];
 636         struct ipath_header iph;
 637         __u8 sub_opcode;
 638         __u8 cmd;
 639         __be16 lid;
 640         __u16 mac[3];
 641         __u8 frag_num;
 642         __u8 seq_num;
 643         __le32 len;
 644         /* MUST be of word size due to PIO write requirements */
 645         __le32 csum;
 646         __le16 csum_offset;
 647         __le16 flags;
 648         __u16 first_2_bytes;
 649         __u8 unused[2];         /* currently unused */
 650 };
 651
 652
 653 /* IB - LRH header consts */
 654 #define IPATH_LRH_GRH 0x0003    /* 1. word of IB LRH - next header: GRH */
 655 #define IPATH_LRH_BTH 0x0002    /* 1. word of IB LRH - next header: BTH */
 656
 657 /* misc. */
 658 #define SIZE_OF_CRC 1
 659
 660 #define IPATH_DEFAULT_P_KEY 0xFFFF
 661 #define IPATH_PERMISSIVE_LID 0xFFFF
 662 #define IPATH_AETH_CREDIT_SHIFT 24
 663 #define IPATH_AETH_CREDIT_MASK 0x1F
 664 #define IPATH_AETH_CREDIT_INVAL 0x1F
 665 #define IPATH_PSN_MASK 0xFFFFFF
 666 #define IPATH_MSN_MASK 0xFFFFFF
 667 #define IPATH_QPN_MASK 0xFFFFFF
 668 #define IPATH_MULTICAST_LID_BASE 0xC000
 669 #define IPATH_MULTICAST_QPN 0xFFFFFF
 670
 671 /* Receive Header Queue: receive type (from infinipath) */
 672 #define RCVHQ_RCV_TYPE_EXPECTED  0
 673 #define RCVHQ_RCV_TYPE_EAGER     1
 674 #define RCVHQ_RCV_TYPE_NON_KD    2
 675 #define RCVHQ_RCV_TYPE_ERROR     3
 676
 677
 678 /* sub OpCodes - ith4x  */
 679 #define IPATH_ITH4X_OPCODE_ENCAP 0x81
 680 #define IPATH_ITH4X_OPCODE_LID_ARP 0x82
 681
 682 #define IPATH_HEADER_QUEUE_WORDS 9
 683
 684 /* functions for extracting fields from rcvhdrq entries for the driver.
 685  */
 686 static inline __u32 ipath_hdrget_err_flags(const __le32 * rbuf)
 687 {
 688         return __le32_to_cpu(rbuf[1]);
 689 }
 690
 691 static inline __u32 ipath_hdrget_rcv_type(const __le32 * rbuf)
 692 {
 693         return (__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_RCVTYPE_SHIFT)
 694             & INFINIPATH_RHF_RCVTYPE_MASK;
 695 }
 696
 697 static inline __u32 ipath_hdrget_length_in_bytes(const __le32 * rbuf)
 698 {
 699         return ((__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_LENGTH_SHIFT)
 700                 & INFINIPATH_RHF_LENGTH_MASK) << 2;
 701 }
 702
 703 static inline __u32 ipath_hdrget_index(const __le32 * rbuf)
 704 {
 705         return (__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_EGRINDEX_SHIFT)
 706             & INFINIPATH_RHF_EGRINDEX_MASK;
 707 }
 708
 709 static inline __u32 ipath_hdrget_ipath_ver(__le32 hdrword)
 710 {
 711         return (__le32_to_cpu(hdrword) >> INFINIPATH_I_VERS_SHIFT)
 712             & INFINIPATH_I_VERS_MASK;
 713 }
 714
 715 #endif                          /* _IPATH_COMMON_H */