Merge branch 'master' into for-next
[linux-2.6/libata-dev.git] / drivers / media / rc / ite-cir.c
blobd20168fe4c40a673301af4ea985c9c1f18e4ce72
1 /*
2 * Driver for ITE Tech Inc. IT8712F/IT8512 CIR
4 * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
19 * USA.
21 * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the
22 * skeleton provided by the nuvoton-cir driver.
24 * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
25 * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus
26 * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards
27 * <jimbo-lirc@edwardsclan.net>.
29 * The lirc_ite8709 driver was written by Grégory Lardière
30 * <spmf2004-lirc@yahoo.fr> in 2008.
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/pnp.h>
36 #include <linux/io.h>
37 #include <linux/interrupt.h>
38 #include <linux/sched.h>
39 #include <linux/delay.h>
40 #include <linux/slab.h>
41 #include <linux/input.h>
42 #include <linux/bitops.h>
43 #include <media/rc-core.h>
44 #include <linux/pci_ids.h>
46 #include "ite-cir.h"
48 /* module parameters */
50 /* debug level */
51 static int debug;
52 module_param(debug, int, S_IRUGO | S_IWUSR);
53 MODULE_PARM_DESC(debug, "Enable debugging output");
55 /* low limit for RX carrier freq, Hz, 0 for no RX demodulation */
56 static int rx_low_carrier_freq;
57 module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR);
58 MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, "
59 "0 for no RX demodulation");
61 /* high limit for RX carrier freq, Hz, 0 for no RX demodulation */
62 static int rx_high_carrier_freq;
63 module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR);
64 MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, "
65 "Hz, 0 for no RX demodulation");
67 /* override tx carrier frequency */
68 static int tx_carrier_freq;
69 module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR);
70 MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz");
72 /* override tx duty cycle */
73 static int tx_duty_cycle;
74 module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR);
75 MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
77 /* override default sample period */
78 static long sample_period;
79 module_param(sample_period, long, S_IRUGO | S_IWUSR);
80 MODULE_PARM_DESC(sample_period, "Override carrier sample period, us");
82 /* override detected model id */
83 static int model_number = -1;
84 module_param(model_number, int, S_IRUGO | S_IWUSR);
85 MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect");
88 /* HW-independent code functions */
90 /* check whether carrier frequency is high frequency */
91 static inline bool ite_is_high_carrier_freq(unsigned int freq)
93 return freq >= ITE_HCF_MIN_CARRIER_FREQ;
96 /* get the bits required to program the carrier frequency in CFQ bits,
97 * unshifted */
98 static u8 ite_get_carrier_freq_bits(unsigned int freq)
100 if (ite_is_high_carrier_freq(freq)) {
101 if (freq < 425000)
102 return ITE_CFQ_400;
104 else if (freq < 465000)
105 return ITE_CFQ_450;
107 else if (freq < 490000)
108 return ITE_CFQ_480;
110 else
111 return ITE_CFQ_500;
112 } else {
113 /* trim to limits */
114 if (freq < ITE_LCF_MIN_CARRIER_FREQ)
115 freq = ITE_LCF_MIN_CARRIER_FREQ;
116 if (freq > ITE_LCF_MAX_CARRIER_FREQ)
117 freq = ITE_LCF_MAX_CARRIER_FREQ;
119 /* convert to kHz and subtract the base freq */
120 freq =
121 DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ,
122 1000);
124 return (u8) freq;
128 /* get the bits required to program the pulse with in TXMPW */
129 static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle)
131 unsigned long period_ns, on_ns;
133 /* sanitize freq into range */
134 if (freq < ITE_LCF_MIN_CARRIER_FREQ)
135 freq = ITE_LCF_MIN_CARRIER_FREQ;
136 if (freq > ITE_HCF_MAX_CARRIER_FREQ)
137 freq = ITE_HCF_MAX_CARRIER_FREQ;
139 period_ns = 1000000000UL / freq;
140 on_ns = period_ns * duty_cycle / 100;
142 if (ite_is_high_carrier_freq(freq)) {
143 if (on_ns < 750)
144 return ITE_TXMPW_A;
146 else if (on_ns < 850)
147 return ITE_TXMPW_B;
149 else if (on_ns < 950)
150 return ITE_TXMPW_C;
152 else if (on_ns < 1080)
153 return ITE_TXMPW_D;
155 else
156 return ITE_TXMPW_E;
157 } else {
158 if (on_ns < 6500)
159 return ITE_TXMPW_A;
161 else if (on_ns < 7850)
162 return ITE_TXMPW_B;
164 else if (on_ns < 9650)
165 return ITE_TXMPW_C;
167 else if (on_ns < 11950)
168 return ITE_TXMPW_D;
170 else
171 return ITE_TXMPW_E;
175 /* decode raw bytes as received by the hardware, and push them to the ir-core
176 * layer */
177 static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
178 length)
180 u32 sample_period;
181 unsigned long *ldata;
182 unsigned int next_one, next_zero, size;
183 DEFINE_IR_RAW_EVENT(ev);
185 if (length == 0)
186 return;
188 sample_period = dev->params.sample_period;
189 ldata = (unsigned long *)data;
190 size = length << 3;
191 next_one = find_next_bit_le(ldata, size, 0);
192 if (next_one > 0) {
193 ev.pulse = true;
194 ev.duration =
195 ITE_BITS_TO_NS(next_one, sample_period);
196 ir_raw_event_store_with_filter(dev->rdev, &ev);
199 while (next_one < size) {
200 next_zero = find_next_zero_bit_le(ldata, size, next_one + 1);
201 ev.pulse = false;
202 ev.duration = ITE_BITS_TO_NS(next_zero - next_one, sample_period);
203 ir_raw_event_store_with_filter(dev->rdev, &ev);
205 if (next_zero < size) {
206 next_one =
207 find_next_bit_le(ldata,
208 size,
209 next_zero + 1);
210 ev.pulse = true;
211 ev.duration =
212 ITE_BITS_TO_NS(next_one - next_zero,
213 sample_period);
214 ir_raw_event_store_with_filter
215 (dev->rdev, &ev);
216 } else
217 next_one = size;
220 ir_raw_event_handle(dev->rdev);
222 ite_dbg_verbose("decoded %d bytes.", length);
225 /* set all the rx/tx carrier parameters; this must be called with the device
226 * spinlock held */
227 static void ite_set_carrier_params(struct ite_dev *dev)
229 unsigned int freq, low_freq, high_freq;
230 int allowance;
231 bool use_demodulator;
232 bool for_tx = dev->transmitting;
234 ite_dbg("%s called", __func__);
236 if (for_tx) {
237 /* we don't need no stinking calculations */
238 freq = dev->params.tx_carrier_freq;
239 allowance = ITE_RXDCR_DEFAULT;
240 use_demodulator = false;
241 } else {
242 low_freq = dev->params.rx_low_carrier_freq;
243 high_freq = dev->params.rx_high_carrier_freq;
245 if (low_freq == 0) {
246 /* don't demodulate */
247 freq =
248 ITE_DEFAULT_CARRIER_FREQ;
249 allowance = ITE_RXDCR_DEFAULT;
250 use_demodulator = false;
251 } else {
252 /* calculate the middle freq */
253 freq = (low_freq + high_freq) / 2;
255 /* calculate the allowance */
256 allowance =
257 DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq),
258 ITE_RXDCR_PER_10000_STEP
259 * (high_freq + low_freq));
261 if (allowance < 1)
262 allowance = 1;
264 if (allowance > ITE_RXDCR_MAX)
265 allowance = ITE_RXDCR_MAX;
269 /* set the carrier parameters in a device-dependent way */
270 dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq),
271 use_demodulator, ite_get_carrier_freq_bits(freq), allowance,
272 ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle));
275 /* interrupt service routine for incoming and outgoing CIR data */
276 static irqreturn_t ite_cir_isr(int irq, void *data)
278 struct ite_dev *dev = data;
279 unsigned long flags;
280 irqreturn_t ret = IRQ_RETVAL(IRQ_NONE);
281 u8 rx_buf[ITE_RX_FIFO_LEN];
282 int rx_bytes;
283 int iflags;
285 ite_dbg_verbose("%s firing", __func__);
287 /* grab the spinlock */
288 spin_lock_irqsave(&dev->lock, flags);
290 /* read the interrupt flags */
291 iflags = dev->params.get_irq_causes(dev);
293 /* check for the receive interrupt */
294 if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) {
295 /* read the FIFO bytes */
296 rx_bytes =
297 dev->params.get_rx_bytes(dev, rx_buf,
298 ITE_RX_FIFO_LEN);
300 if (rx_bytes > 0) {
301 /* drop the spinlock, since the ir-core layer
302 * may call us back again through
303 * ite_s_idle() */
304 spin_unlock_irqrestore(&dev->
305 lock,
306 flags);
308 /* decode the data we've just received */
309 ite_decode_bytes(dev, rx_buf,
310 rx_bytes);
312 /* reacquire the spinlock */
313 spin_lock_irqsave(&dev->lock,
314 flags);
316 /* mark the interrupt as serviced */
317 ret = IRQ_RETVAL(IRQ_HANDLED);
319 } else if (iflags & ITE_IRQ_TX_FIFO) {
320 /* FIFO space available interrupt */
321 ite_dbg_verbose("got interrupt for TX FIFO");
323 /* wake any sleeping transmitter */
324 wake_up_interruptible(&dev->tx_queue);
326 /* mark the interrupt as serviced */
327 ret = IRQ_RETVAL(IRQ_HANDLED);
330 /* drop the spinlock */
331 spin_unlock_irqrestore(&dev->lock, flags);
333 ite_dbg_verbose("%s done returning %d", __func__, (int)ret);
335 return ret;
338 /* set the rx carrier freq range, guess it's in Hz... */
339 static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32
340 carrier_high)
342 unsigned long flags;
343 struct ite_dev *dev = rcdev->priv;
345 spin_lock_irqsave(&dev->lock, flags);
346 dev->params.rx_low_carrier_freq = carrier_low;
347 dev->params.rx_high_carrier_freq = carrier_high;
348 ite_set_carrier_params(dev);
349 spin_unlock_irqrestore(&dev->lock, flags);
351 return 0;
354 /* set the tx carrier freq, guess it's in Hz... */
355 static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
357 unsigned long flags;
358 struct ite_dev *dev = rcdev->priv;
360 spin_lock_irqsave(&dev->lock, flags);
361 dev->params.tx_carrier_freq = carrier;
362 ite_set_carrier_params(dev);
363 spin_unlock_irqrestore(&dev->lock, flags);
365 return 0;
368 /* set the tx duty cycle by controlling the pulse width */
369 static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
371 unsigned long flags;
372 struct ite_dev *dev = rcdev->priv;
374 spin_lock_irqsave(&dev->lock, flags);
375 dev->params.tx_duty_cycle = duty_cycle;
376 ite_set_carrier_params(dev);
377 spin_unlock_irqrestore(&dev->lock, flags);
379 return 0;
382 /* transmit out IR pulses; what you get here is a batch of alternating
383 * pulse/space/pulse/space lengths that we should write out completely through
384 * the FIFO, blocking on a full FIFO */
385 static int ite_tx_ir(struct rc_dev *rcdev, int *txbuf, u32 n)
387 unsigned long flags;
388 struct ite_dev *dev = rcdev->priv;
389 bool is_pulse = false;
390 int remaining_us, fifo_avail, fifo_remaining, last_idx = 0;
391 int max_rle_us, next_rle_us;
392 int ret = n;
393 u8 last_sent[ITE_TX_FIFO_LEN];
394 u8 val;
396 ite_dbg("%s called", __func__);
398 /* clear the array just in case */
399 memset(last_sent, 0, ARRAY_SIZE(last_sent));
401 /* n comes in bytes; convert to ints */
402 n /= sizeof(int);
404 spin_lock_irqsave(&dev->lock, flags);
406 /* let everybody know we're now transmitting */
407 dev->transmitting = true;
409 /* and set the carrier values for transmission */
410 ite_set_carrier_params(dev);
412 /* calculate how much time we can send in one byte */
413 max_rle_us =
414 (ITE_BAUDRATE_DIVISOR * dev->params.sample_period *
415 ITE_TX_MAX_RLE) / 1000;
417 /* disable the receiver */
418 dev->params.disable_rx(dev);
420 /* this is where we'll begin filling in the FIFO, until it's full.
421 * then we'll just activate the interrupt, wait for it to wake us up
422 * again, disable it, continue filling the FIFO... until everything
423 * has been pushed out */
424 fifo_avail =
425 ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
427 while (n > 0 && dev->in_use) {
428 /* transmit the next sample */
429 is_pulse = !is_pulse;
430 remaining_us = *(txbuf++);
431 n--;
433 ite_dbg("%s: %ld",
434 ((is_pulse) ? "pulse" : "space"),
435 (long int)
436 remaining_us);
438 /* repeat while the pulse is non-zero length */
439 while (remaining_us > 0 && dev->in_use) {
440 if (remaining_us > max_rle_us)
441 next_rle_us = max_rle_us;
443 else
444 next_rle_us = remaining_us;
446 remaining_us -= next_rle_us;
448 /* check what's the length we have to pump out */
449 val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us;
451 /* put it into the sent buffer */
452 last_sent[last_idx++] = val;
453 last_idx &= (ITE_TX_FIFO_LEN);
455 /* encode it for 7 bits */
456 val = (val - 1) & ITE_TX_RLE_MASK;
458 /* take into account pulse/space prefix */
459 if (is_pulse)
460 val |= ITE_TX_PULSE;
462 else
463 val |= ITE_TX_SPACE;
466 * if we get to 0 available, read again, just in case
467 * some other slot got freed
469 if (fifo_avail <= 0)
470 fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
472 /* if it's still full */
473 if (fifo_avail <= 0) {
474 /* enable the tx interrupt */
475 dev->params.
476 enable_tx_interrupt(dev);
478 /* drop the spinlock */
479 spin_unlock_irqrestore(&dev->lock, flags);
481 /* wait for the FIFO to empty enough */
482 wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8);
484 /* get the spinlock again */
485 spin_lock_irqsave(&dev->lock, flags);
487 /* disable the tx interrupt again. */
488 dev->params.
489 disable_tx_interrupt(dev);
492 /* now send the byte through the FIFO */
493 dev->params.put_tx_byte(dev, val);
494 fifo_avail--;
498 /* wait and don't return until the whole FIFO has been sent out;
499 * otherwise we could configure the RX carrier params instead of the
500 * TX ones while the transmission is still being performed! */
501 fifo_remaining = dev->params.get_tx_used_slots(dev);
502 remaining_us = 0;
503 while (fifo_remaining > 0) {
504 fifo_remaining--;
505 last_idx--;
506 last_idx &= (ITE_TX_FIFO_LEN - 1);
507 remaining_us += last_sent[last_idx];
509 remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE);
511 /* drop the spinlock while we sleep */
512 spin_unlock_irqrestore(&dev->lock, flags);
514 /* sleep remaining_us microseconds */
515 mdelay(DIV_ROUND_UP(remaining_us, 1000));
517 /* reacquire the spinlock */
518 spin_lock_irqsave(&dev->lock, flags);
520 /* now we're not transmitting anymore */
521 dev->transmitting = false;
523 /* and set the carrier values for reception */
524 ite_set_carrier_params(dev);
526 /* reenable the receiver */
527 if (dev->in_use)
528 dev->params.enable_rx(dev);
530 /* notify transmission end */
531 wake_up_interruptible(&dev->tx_ended);
533 spin_unlock_irqrestore(&dev->lock, flags);
535 return ret;
538 /* idle the receiver if needed */
539 static void ite_s_idle(struct rc_dev *rcdev, bool enable)
541 unsigned long flags;
542 struct ite_dev *dev = rcdev->priv;
544 ite_dbg("%s called", __func__);
546 if (enable) {
547 spin_lock_irqsave(&dev->lock, flags);
548 dev->params.idle_rx(dev);
549 spin_unlock_irqrestore(&dev->lock, flags);
554 /* IT8712F HW-specific functions */
556 /* retrieve a bitmask of the current causes for a pending interrupt; this may
557 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
558 * */
559 static int it87_get_irq_causes(struct ite_dev *dev)
561 u8 iflags;
562 int ret = 0;
564 ite_dbg("%s called", __func__);
566 /* read the interrupt flags */
567 iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
569 switch (iflags) {
570 case IT87_II_RXDS:
571 ret = ITE_IRQ_RX_FIFO;
572 break;
573 case IT87_II_RXFO:
574 ret = ITE_IRQ_RX_FIFO_OVERRUN;
575 break;
576 case IT87_II_TXLDL:
577 ret = ITE_IRQ_TX_FIFO;
578 break;
581 return ret;
584 /* set the carrier parameters; to be called with the spinlock held */
585 static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
586 bool use_demodulator,
587 u8 carrier_freq_bits, u8 allowance_bits,
588 u8 pulse_width_bits)
590 u8 val;
592 ite_dbg("%s called", __func__);
594 /* program the RCR register */
595 val = inb(dev->cir_addr + IT87_RCR)
596 & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR);
598 if (high_freq)
599 val |= IT87_HCFS;
601 if (use_demodulator)
602 val |= IT87_RXEND;
604 val |= allowance_bits;
606 outb(val, dev->cir_addr + IT87_RCR);
608 /* program the TCR2 register */
609 outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,
610 dev->cir_addr + IT87_TCR2);
613 /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
614 * held */
615 static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
617 int fifo, read = 0;
619 ite_dbg("%s called", __func__);
621 /* read how many bytes are still in the FIFO */
622 fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
624 while (fifo > 0 && buf_size > 0) {
625 *(buf++) = inb(dev->cir_addr + IT87_DR);
626 fifo--;
627 read++;
628 buf_size--;
631 return read;
634 /* return how many bytes are still in the FIFO; this will be called
635 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
636 * empty; let's expect this won't be a problem */
637 static int it87_get_tx_used_slots(struct ite_dev *dev)
639 ite_dbg("%s called", __func__);
641 return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
644 /* put a byte to the TX fifo; this should be called with the spinlock held */
645 static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
647 outb(value, dev->cir_addr + IT87_DR);
650 /* idle the receiver so that we won't receive samples until another
651 pulse is detected; this must be called with the device spinlock held */
652 static void it87_idle_rx(struct ite_dev *dev)
654 ite_dbg("%s called", __func__);
656 /* disable streaming by clearing RXACT writing it as 1 */
657 outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
658 dev->cir_addr + IT87_RCR);
660 /* clear the FIFO */
661 outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
662 dev->cir_addr + IT87_TCR1);
665 /* disable the receiver; this must be called with the device spinlock held */
666 static void it87_disable_rx(struct ite_dev *dev)
668 ite_dbg("%s called", __func__);
670 /* disable the receiver interrupts */
671 outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
672 dev->cir_addr + IT87_IER);
674 /* disable the receiver */
675 outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
676 dev->cir_addr + IT87_RCR);
678 /* clear the FIFO and RXACT (actually RXACT should have been cleared
679 * in the previous outb() call) */
680 it87_idle_rx(dev);
683 /* enable the receiver; this must be called with the device spinlock held */
684 static void it87_enable_rx(struct ite_dev *dev)
686 ite_dbg("%s called", __func__);
688 /* enable the receiver by setting RXEN */
689 outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
690 dev->cir_addr + IT87_RCR);
692 /* just prepare it to idle for the next reception */
693 it87_idle_rx(dev);
695 /* enable the receiver interrupts and master enable flag */
696 outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
697 dev->cir_addr + IT87_IER);
700 /* disable the transmitter interrupt; this must be called with the device
701 * spinlock held */
702 static void it87_disable_tx_interrupt(struct ite_dev *dev)
704 ite_dbg("%s called", __func__);
706 /* disable the transmitter interrupts */
707 outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
708 dev->cir_addr + IT87_IER);
711 /* enable the transmitter interrupt; this must be called with the device
712 * spinlock held */
713 static void it87_enable_tx_interrupt(struct ite_dev *dev)
715 ite_dbg("%s called", __func__);
717 /* enable the transmitter interrupts and master enable flag */
718 outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
719 dev->cir_addr + IT87_IER);
722 /* disable the device; this must be called with the device spinlock held */
723 static void it87_disable(struct ite_dev *dev)
725 ite_dbg("%s called", __func__);
727 /* clear out all interrupt enable flags */
728 outb(inb(dev->cir_addr + IT87_IER) &
729 ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE),
730 dev->cir_addr + IT87_IER);
732 /* disable the receiver */
733 it87_disable_rx(dev);
735 /* erase the FIFO */
736 outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
737 dev->cir_addr + IT87_TCR1);
740 /* initialize the hardware */
741 static void it87_init_hardware(struct ite_dev *dev)
743 ite_dbg("%s called", __func__);
745 /* enable just the baud rate divisor register,
746 disabling all the interrupts at the same time */
747 outb((inb(dev->cir_addr + IT87_IER) &
748 ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR,
749 dev->cir_addr + IT87_IER);
751 /* write out the baud rate divisor */
752 outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
753 outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
755 /* disable the baud rate divisor register again */
756 outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
757 dev->cir_addr + IT87_IER);
759 /* program the RCR register defaults */
760 outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
762 /* program the TCR1 register */
763 outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE
764 | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR,
765 dev->cir_addr + IT87_TCR1);
767 /* program the carrier parameters */
768 ite_set_carrier_params(dev);
771 /* IT8512F on ITE8708 HW-specific functions */
773 /* retrieve a bitmask of the current causes for a pending interrupt; this may
774 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
775 * */
776 static int it8708_get_irq_causes(struct ite_dev *dev)
778 u8 iflags;
779 int ret = 0;
781 ite_dbg("%s called", __func__);
783 /* read the interrupt flags */
784 iflags = inb(dev->cir_addr + IT8708_C0IIR);
786 if (iflags & IT85_TLDLI)
787 ret |= ITE_IRQ_TX_FIFO;
788 if (iflags & IT85_RDAI)
789 ret |= ITE_IRQ_RX_FIFO;
790 if (iflags & IT85_RFOI)
791 ret |= ITE_IRQ_RX_FIFO_OVERRUN;
793 return ret;
796 /* set the carrier parameters; to be called with the spinlock held */
797 static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
798 bool use_demodulator,
799 u8 carrier_freq_bits, u8 allowance_bits,
800 u8 pulse_width_bits)
802 u8 val;
804 ite_dbg("%s called", __func__);
806 /* program the C0CFR register, with HRAE=1 */
807 outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
808 dev->cir_addr + IT8708_BANKSEL);
810 val = (inb(dev->cir_addr + IT8708_C0CFR)
811 & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits;
813 if (high_freq)
814 val |= IT85_HCFS;
816 outb(val, dev->cir_addr + IT8708_C0CFR);
818 outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
819 dev->cir_addr + IT8708_BANKSEL);
821 /* program the C0RCR register */
822 val = inb(dev->cir_addr + IT8708_C0RCR)
823 & ~(IT85_RXEND | IT85_RXDCR);
825 if (use_demodulator)
826 val |= IT85_RXEND;
828 val |= allowance_bits;
830 outb(val, dev->cir_addr + IT8708_C0RCR);
832 /* program the C0TCR register */
833 val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
834 val |= pulse_width_bits;
835 outb(val, dev->cir_addr + IT8708_C0TCR);
838 /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
839 * held */
840 static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
842 int fifo, read = 0;
844 ite_dbg("%s called", __func__);
846 /* read how many bytes are still in the FIFO */
847 fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
849 while (fifo > 0 && buf_size > 0) {
850 *(buf++) = inb(dev->cir_addr + IT8708_C0DR);
851 fifo--;
852 read++;
853 buf_size--;
856 return read;
859 /* return how many bytes are still in the FIFO; this will be called
860 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
861 * empty; let's expect this won't be a problem */
862 static int it8708_get_tx_used_slots(struct ite_dev *dev)
864 ite_dbg("%s called", __func__);
866 return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
869 /* put a byte to the TX fifo; this should be called with the spinlock held */
870 static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
872 outb(value, dev->cir_addr + IT8708_C0DR);
875 /* idle the receiver so that we won't receive samples until another
876 pulse is detected; this must be called with the device spinlock held */
877 static void it8708_idle_rx(struct ite_dev *dev)
879 ite_dbg("%s called", __func__);
881 /* disable streaming by clearing RXACT writing it as 1 */
882 outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
883 dev->cir_addr + IT8708_C0RCR);
885 /* clear the FIFO */
886 outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
887 dev->cir_addr + IT8708_C0MSTCR);
890 /* disable the receiver; this must be called with the device spinlock held */
891 static void it8708_disable_rx(struct ite_dev *dev)
893 ite_dbg("%s called", __func__);
895 /* disable the receiver interrupts */
896 outb(inb(dev->cir_addr + IT8708_C0IER) &
897 ~(IT85_RDAIE | IT85_RFOIE),
898 dev->cir_addr + IT8708_C0IER);
900 /* disable the receiver */
901 outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
902 dev->cir_addr + IT8708_C0RCR);
904 /* clear the FIFO and RXACT (actually RXACT should have been cleared
905 * in the previous outb() call) */
906 it8708_idle_rx(dev);
909 /* enable the receiver; this must be called with the device spinlock held */
910 static void it8708_enable_rx(struct ite_dev *dev)
912 ite_dbg("%s called", __func__);
914 /* enable the receiver by setting RXEN */
915 outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
916 dev->cir_addr + IT8708_C0RCR);
918 /* just prepare it to idle for the next reception */
919 it8708_idle_rx(dev);
921 /* enable the receiver interrupts and master enable flag */
922 outb(inb(dev->cir_addr + IT8708_C0IER)
923 |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
924 dev->cir_addr + IT8708_C0IER);
927 /* disable the transmitter interrupt; this must be called with the device
928 * spinlock held */
929 static void it8708_disable_tx_interrupt(struct ite_dev *dev)
931 ite_dbg("%s called", __func__);
933 /* disable the transmitter interrupts */
934 outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
935 dev->cir_addr + IT8708_C0IER);
938 /* enable the transmitter interrupt; this must be called with the device
939 * spinlock held */
940 static void it8708_enable_tx_interrupt(struct ite_dev *dev)
942 ite_dbg("%s called", __func__);
944 /* enable the transmitter interrupts and master enable flag */
945 outb(inb(dev->cir_addr + IT8708_C0IER)
946 |IT85_TLDLIE | IT85_IEC,
947 dev->cir_addr + IT8708_C0IER);
950 /* disable the device; this must be called with the device spinlock held */
951 static void it8708_disable(struct ite_dev *dev)
953 ite_dbg("%s called", __func__);
955 /* clear out all interrupt enable flags */
956 outb(inb(dev->cir_addr + IT8708_C0IER) &
957 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
958 dev->cir_addr + IT8708_C0IER);
960 /* disable the receiver */
961 it8708_disable_rx(dev);
963 /* erase the FIFO */
964 outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
965 dev->cir_addr + IT8708_C0MSTCR);
968 /* initialize the hardware */
969 static void it8708_init_hardware(struct ite_dev *dev)
971 ite_dbg("%s called", __func__);
973 /* disable all the interrupts */
974 outb(inb(dev->cir_addr + IT8708_C0IER) &
975 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
976 dev->cir_addr + IT8708_C0IER);
978 /* program the baud rate divisor */
979 outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
980 dev->cir_addr + IT8708_BANKSEL);
982 outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
983 outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
984 dev->cir_addr + IT8708_C0BDHR);
986 outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
987 dev->cir_addr + IT8708_BANKSEL);
989 /* program the C0MSTCR register defaults */
990 outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
991 ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
992 IT85_FIFOCLR | IT85_RESET)) |
993 IT85_FIFOTL_DEFAULT,
994 dev->cir_addr + IT8708_C0MSTCR);
996 /* program the C0RCR register defaults */
997 outb((inb(dev->cir_addr + IT8708_C0RCR) &
998 ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND |
999 IT85_RXACT | IT85_RXDCR)) |
1000 ITE_RXDCR_DEFAULT,
1001 dev->cir_addr + IT8708_C0RCR);
1003 /* program the C0TCR register defaults */
1004 outb((inb(dev->cir_addr + IT8708_C0TCR) &
1005 ~(IT85_TXMPM | IT85_TXMPW))
1006 |IT85_TXRLE | IT85_TXENDF |
1007 IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT,
1008 dev->cir_addr + IT8708_C0TCR);
1010 /* program the carrier parameters */
1011 ite_set_carrier_params(dev);
1014 /* IT8512F on ITE8709 HW-specific functions */
1016 /* read a byte from the SRAM module */
1017 static inline u8 it8709_rm(struct ite_dev *dev, int index)
1019 outb(index, dev->cir_addr + IT8709_RAM_IDX);
1020 return inb(dev->cir_addr + IT8709_RAM_VAL);
1023 /* write a byte to the SRAM module */
1024 static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
1026 outb(index, dev->cir_addr + IT8709_RAM_IDX);
1027 outb(val, dev->cir_addr + IT8709_RAM_VAL);
1030 static void it8709_wait(struct ite_dev *dev)
1032 int i = 0;
1034 * loop until device tells it's ready to continue
1035 * iterations count is usually ~750 but can sometimes achieve 13000
1037 for (i = 0; i < 15000; i++) {
1038 udelay(2);
1039 if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
1040 break;
1044 /* read the value of a CIR register */
1045 static u8 it8709_rr(struct ite_dev *dev, int index)
1047 /* just wait in case the previous access was a write */
1048 it8709_wait(dev);
1049 it8709_wm(dev, index, IT8709_REG_IDX);
1050 it8709_wm(dev, IT8709_READ, IT8709_MODE);
1052 /* wait for the read data to be available */
1053 it8709_wait(dev);
1055 /* return the read value */
1056 return it8709_rm(dev, IT8709_REG_VAL);
1059 /* write the value of a CIR register */
1060 static void it8709_wr(struct ite_dev *dev, u8 val, int index)
1062 /* we wait before writing, and not afterwards, since this allows us to
1063 * pipeline the host CPU with the microcontroller */
1064 it8709_wait(dev);
1065 it8709_wm(dev, val, IT8709_REG_VAL);
1066 it8709_wm(dev, index, IT8709_REG_IDX);
1067 it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
1070 /* retrieve a bitmask of the current causes for a pending interrupt; this may
1071 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
1072 * */
1073 static int it8709_get_irq_causes(struct ite_dev *dev)
1075 u8 iflags;
1076 int ret = 0;
1078 ite_dbg("%s called", __func__);
1080 /* read the interrupt flags */
1081 iflags = it8709_rm(dev, IT8709_IIR);
1083 if (iflags & IT85_TLDLI)
1084 ret |= ITE_IRQ_TX_FIFO;
1085 if (iflags & IT85_RDAI)
1086 ret |= ITE_IRQ_RX_FIFO;
1087 if (iflags & IT85_RFOI)
1088 ret |= ITE_IRQ_RX_FIFO_OVERRUN;
1090 return ret;
1093 /* set the carrier parameters; to be called with the spinlock held */
1094 static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
1095 bool use_demodulator,
1096 u8 carrier_freq_bits, u8 allowance_bits,
1097 u8 pulse_width_bits)
1099 u8 val;
1101 ite_dbg("%s called", __func__);
1103 val = (it8709_rr(dev, IT85_C0CFR)
1104 &~(IT85_HCFS | IT85_CFQ)) |
1105 carrier_freq_bits;
1107 if (high_freq)
1108 val |= IT85_HCFS;
1110 it8709_wr(dev, val, IT85_C0CFR);
1112 /* program the C0RCR register */
1113 val = it8709_rr(dev, IT85_C0RCR)
1114 & ~(IT85_RXEND | IT85_RXDCR);
1116 if (use_demodulator)
1117 val |= IT85_RXEND;
1119 val |= allowance_bits;
1121 it8709_wr(dev, val, IT85_C0RCR);
1123 /* program the C0TCR register */
1124 val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
1125 val |= pulse_width_bits;
1126 it8709_wr(dev, val, IT85_C0TCR);
1129 /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
1130 * held */
1131 static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
1133 int fifo, read = 0;
1135 ite_dbg("%s called", __func__);
1137 /* read how many bytes are still in the FIFO */
1138 fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
1140 while (fifo > 0 && buf_size > 0) {
1141 *(buf++) = it8709_rm(dev, IT8709_FIFO + read);
1142 fifo--;
1143 read++;
1144 buf_size--;
1147 /* 'clear' the FIFO by setting the writing index to 0; this is
1148 * completely bound to be racy, but we can't help it, since it's a
1149 * limitation of the protocol */
1150 it8709_wm(dev, 0, IT8709_RFSR);
1152 return read;
1155 /* return how many bytes are still in the FIFO; this will be called
1156 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
1157 * empty; let's expect this won't be a problem */
1158 static int it8709_get_tx_used_slots(struct ite_dev *dev)
1160 ite_dbg("%s called", __func__);
1162 return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
1165 /* put a byte to the TX fifo; this should be called with the spinlock held */
1166 static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
1168 it8709_wr(dev, value, IT85_C0DR);
1171 /* idle the receiver so that we won't receive samples until another
1172 pulse is detected; this must be called with the device spinlock held */
1173 static void it8709_idle_rx(struct ite_dev *dev)
1175 ite_dbg("%s called", __func__);
1177 /* disable streaming by clearing RXACT writing it as 1 */
1178 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
1179 IT85_C0RCR);
1181 /* clear the FIFO */
1182 it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
1183 IT85_C0MSTCR);
1186 /* disable the receiver; this must be called with the device spinlock held */
1187 static void it8709_disable_rx(struct ite_dev *dev)
1189 ite_dbg("%s called", __func__);
1191 /* disable the receiver interrupts */
1192 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1193 ~(IT85_RDAIE | IT85_RFOIE),
1194 IT85_C0IER);
1196 /* disable the receiver */
1197 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
1198 IT85_C0RCR);
1200 /* clear the FIFO and RXACT (actually RXACT should have been cleared
1201 * in the previous it8709_wr(dev, ) call) */
1202 it8709_idle_rx(dev);
1205 /* enable the receiver; this must be called with the device spinlock held */
1206 static void it8709_enable_rx(struct ite_dev *dev)
1208 ite_dbg("%s called", __func__);
1210 /* enable the receiver by setting RXEN */
1211 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
1212 IT85_C0RCR);
1214 /* just prepare it to idle for the next reception */
1215 it8709_idle_rx(dev);
1217 /* enable the receiver interrupts and master enable flag */
1218 it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1219 |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
1220 IT85_C0IER);
1223 /* disable the transmitter interrupt; this must be called with the device
1224 * spinlock held */
1225 static void it8709_disable_tx_interrupt(struct ite_dev *dev)
1227 ite_dbg("%s called", __func__);
1229 /* disable the transmitter interrupts */
1230 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
1231 IT85_C0IER);
1234 /* enable the transmitter interrupt; this must be called with the device
1235 * spinlock held */
1236 static void it8709_enable_tx_interrupt(struct ite_dev *dev)
1238 ite_dbg("%s called", __func__);
1240 /* enable the transmitter interrupts and master enable flag */
1241 it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1242 |IT85_TLDLIE | IT85_IEC,
1243 IT85_C0IER);
1246 /* disable the device; this must be called with the device spinlock held */
1247 static void it8709_disable(struct ite_dev *dev)
1249 ite_dbg("%s called", __func__);
1251 /* clear out all interrupt enable flags */
1252 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1253 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
1254 IT85_C0IER);
1256 /* disable the receiver */
1257 it8709_disable_rx(dev);
1259 /* erase the FIFO */
1260 it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
1261 IT85_C0MSTCR);
1264 /* initialize the hardware */
1265 static void it8709_init_hardware(struct ite_dev *dev)
1267 ite_dbg("%s called", __func__);
1269 /* disable all the interrupts */
1270 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1271 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
1272 IT85_C0IER);
1274 /* program the baud rate divisor */
1275 it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
1276 it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
1277 IT85_C0BDHR);
1279 /* program the C0MSTCR register defaults */
1280 it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
1281 ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL
1282 | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT,
1283 IT85_C0MSTCR);
1285 /* program the C0RCR register defaults */
1286 it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
1287 ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT
1288 | IT85_RXDCR)) | ITE_RXDCR_DEFAULT,
1289 IT85_C0RCR);
1291 /* program the C0TCR register defaults */
1292 it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
1293 | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT
1294 | IT85_TXMPW_DEFAULT,
1295 IT85_C0TCR);
1297 /* program the carrier parameters */
1298 ite_set_carrier_params(dev);
1302 /* generic hardware setup/teardown code */
1304 /* activate the device for use */
1305 static int ite_open(struct rc_dev *rcdev)
1307 struct ite_dev *dev = rcdev->priv;
1308 unsigned long flags;
1310 ite_dbg("%s called", __func__);
1312 spin_lock_irqsave(&dev->lock, flags);
1313 dev->in_use = true;
1315 /* enable the receiver */
1316 dev->params.enable_rx(dev);
1318 spin_unlock_irqrestore(&dev->lock, flags);
1320 return 0;
1323 /* deactivate the device for use */
1324 static void ite_close(struct rc_dev *rcdev)
1326 struct ite_dev *dev = rcdev->priv;
1327 unsigned long flags;
1329 ite_dbg("%s called", __func__);
1331 spin_lock_irqsave(&dev->lock, flags);
1332 dev->in_use = false;
1334 /* wait for any transmission to end */
1335 spin_unlock_irqrestore(&dev->lock, flags);
1336 wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1337 spin_lock_irqsave(&dev->lock, flags);
1339 dev->params.disable(dev);
1341 spin_unlock_irqrestore(&dev->lock, flags);
1344 /* supported models and their parameters */
1345 static const struct ite_dev_params ite_dev_descs[] = {
1346 { /* 0: ITE8704 */
1347 .model = "ITE8704 CIR transceiver",
1348 .io_region_size = IT87_IOREG_LENGTH,
1349 .io_rsrc_no = 0,
1350 .hw_tx_capable = true,
1351 .sample_period = (u32) (1000000000ULL / 115200),
1352 .tx_carrier_freq = 38000,
1353 .tx_duty_cycle = 33,
1354 .rx_low_carrier_freq = 0,
1355 .rx_high_carrier_freq = 0,
1357 /* operations */
1358 .get_irq_causes = it87_get_irq_causes,
1359 .enable_rx = it87_enable_rx,
1360 .idle_rx = it87_idle_rx,
1361 .disable_rx = it87_idle_rx,
1362 .get_rx_bytes = it87_get_rx_bytes,
1363 .enable_tx_interrupt = it87_enable_tx_interrupt,
1364 .disable_tx_interrupt = it87_disable_tx_interrupt,
1365 .get_tx_used_slots = it87_get_tx_used_slots,
1366 .put_tx_byte = it87_put_tx_byte,
1367 .disable = it87_disable,
1368 .init_hardware = it87_init_hardware,
1369 .set_carrier_params = it87_set_carrier_params,
1371 { /* 1: ITE8713 */
1372 .model = "ITE8713 CIR transceiver",
1373 .io_region_size = IT87_IOREG_LENGTH,
1374 .io_rsrc_no = 0,
1375 .hw_tx_capable = true,
1376 .sample_period = (u32) (1000000000ULL / 115200),
1377 .tx_carrier_freq = 38000,
1378 .tx_duty_cycle = 33,
1379 .rx_low_carrier_freq = 0,
1380 .rx_high_carrier_freq = 0,
1382 /* operations */
1383 .get_irq_causes = it87_get_irq_causes,
1384 .enable_rx = it87_enable_rx,
1385 .idle_rx = it87_idle_rx,
1386 .disable_rx = it87_idle_rx,
1387 .get_rx_bytes = it87_get_rx_bytes,
1388 .enable_tx_interrupt = it87_enable_tx_interrupt,
1389 .disable_tx_interrupt = it87_disable_tx_interrupt,
1390 .get_tx_used_slots = it87_get_tx_used_slots,
1391 .put_tx_byte = it87_put_tx_byte,
1392 .disable = it87_disable,
1393 .init_hardware = it87_init_hardware,
1394 .set_carrier_params = it87_set_carrier_params,
1396 { /* 2: ITE8708 */
1397 .model = "ITE8708 CIR transceiver",
1398 .io_region_size = IT8708_IOREG_LENGTH,
1399 .io_rsrc_no = 0,
1400 .hw_tx_capable = true,
1401 .sample_period = (u32) (1000000000ULL / 115200),
1402 .tx_carrier_freq = 38000,
1403 .tx_duty_cycle = 33,
1404 .rx_low_carrier_freq = 0,
1405 .rx_high_carrier_freq = 0,
1407 /* operations */
1408 .get_irq_causes = it8708_get_irq_causes,
1409 .enable_rx = it8708_enable_rx,
1410 .idle_rx = it8708_idle_rx,
1411 .disable_rx = it8708_idle_rx,
1412 .get_rx_bytes = it8708_get_rx_bytes,
1413 .enable_tx_interrupt = it8708_enable_tx_interrupt,
1414 .disable_tx_interrupt =
1415 it8708_disable_tx_interrupt,
1416 .get_tx_used_slots = it8708_get_tx_used_slots,
1417 .put_tx_byte = it8708_put_tx_byte,
1418 .disable = it8708_disable,
1419 .init_hardware = it8708_init_hardware,
1420 .set_carrier_params = it8708_set_carrier_params,
1422 { /* 3: ITE8709 */
1423 .model = "ITE8709 CIR transceiver",
1424 .io_region_size = IT8709_IOREG_LENGTH,
1425 .io_rsrc_no = 2,
1426 .hw_tx_capable = true,
1427 .sample_period = (u32) (1000000000ULL / 115200),
1428 .tx_carrier_freq = 38000,
1429 .tx_duty_cycle = 33,
1430 .rx_low_carrier_freq = 0,
1431 .rx_high_carrier_freq = 0,
1433 /* operations */
1434 .get_irq_causes = it8709_get_irq_causes,
1435 .enable_rx = it8709_enable_rx,
1436 .idle_rx = it8709_idle_rx,
1437 .disable_rx = it8709_idle_rx,
1438 .get_rx_bytes = it8709_get_rx_bytes,
1439 .enable_tx_interrupt = it8709_enable_tx_interrupt,
1440 .disable_tx_interrupt =
1441 it8709_disable_tx_interrupt,
1442 .get_tx_used_slots = it8709_get_tx_used_slots,
1443 .put_tx_byte = it8709_put_tx_byte,
1444 .disable = it8709_disable,
1445 .init_hardware = it8709_init_hardware,
1446 .set_carrier_params = it8709_set_carrier_params,
1450 static const struct pnp_device_id ite_ids[] = {
1451 {"ITE8704", 0}, /* Default model */
1452 {"ITE8713", 1}, /* CIR found in EEEBox 1501U */
1453 {"ITE8708", 2}, /* Bridged IT8512 */
1454 {"ITE8709", 3}, /* SRAM-Bridged IT8512 */
1455 {"", 0},
1458 /* allocate memory, probe hardware, and initialize everything */
1459 static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
1460 *dev_id)
1462 const struct ite_dev_params *dev_desc = NULL;
1463 struct ite_dev *itdev = NULL;
1464 struct rc_dev *rdev = NULL;
1465 int ret = -ENOMEM;
1466 int model_no;
1467 int io_rsrc_no;
1469 ite_dbg("%s called", __func__);
1471 itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL);
1472 if (!itdev)
1473 return ret;
1475 /* input device for IR remote (and tx) */
1476 rdev = rc_allocate_device();
1477 if (!rdev)
1478 goto failure;
1480 ret = -ENODEV;
1482 /* get the model number */
1483 model_no = (int)dev_id->driver_data;
1484 ite_pr(KERN_NOTICE, "Auto-detected model: %s\n",
1485 ite_dev_descs[model_no].model);
1487 if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) {
1488 model_no = model_number;
1489 ite_pr(KERN_NOTICE, "The model has been fixed by a module "
1490 "parameter.");
1493 ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model);
1495 /* get the description for the device */
1496 dev_desc = &ite_dev_descs[model_no];
1497 io_rsrc_no = dev_desc->io_rsrc_no;
1499 /* validate pnp resources */
1500 if (!pnp_port_valid(pdev, io_rsrc_no) ||
1501 pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
1502 dev_err(&pdev->dev, "IR PNP Port not valid!\n");
1503 goto failure;
1506 if (!pnp_irq_valid(pdev, 0)) {
1507 dev_err(&pdev->dev, "PNP IRQ not valid!\n");
1508 goto failure;
1511 /* store resource values */
1512 itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
1513 itdev->cir_irq = pnp_irq(pdev, 0);
1515 /* initialize spinlocks */
1516 spin_lock_init(&itdev->lock);
1518 /* initialize raw event */
1519 init_ir_raw_event(&itdev->rawir);
1521 ret = -EBUSY;
1522 /* now claim resources */
1523 if (!request_region(itdev->cir_addr,
1524 dev_desc->io_region_size, ITE_DRIVER_NAME))
1525 goto failure;
1527 if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED,
1528 ITE_DRIVER_NAME, (void *)itdev))
1529 goto failure;
1531 /* set driver data into the pnp device */
1532 pnp_set_drvdata(pdev, itdev);
1533 itdev->pdev = pdev;
1535 /* initialize waitqueues for transmission */
1536 init_waitqueue_head(&itdev->tx_queue);
1537 init_waitqueue_head(&itdev->tx_ended);
1539 /* copy model-specific parameters */
1540 itdev->params = *dev_desc;
1542 /* apply any overrides */
1543 if (sample_period > 0)
1544 itdev->params.sample_period = sample_period;
1546 if (tx_carrier_freq > 0)
1547 itdev->params.tx_carrier_freq = tx_carrier_freq;
1549 if (tx_duty_cycle > 0 && tx_duty_cycle <= 100)
1550 itdev->params.tx_duty_cycle = tx_duty_cycle;
1552 if (rx_low_carrier_freq > 0)
1553 itdev->params.rx_low_carrier_freq = rx_low_carrier_freq;
1555 if (rx_high_carrier_freq > 0)
1556 itdev->params.rx_high_carrier_freq = rx_high_carrier_freq;
1558 /* print out parameters */
1559 ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int)
1560 itdev->params.hw_tx_capable);
1561 ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long)
1562 itdev->params.sample_period);
1563 ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int)
1564 itdev->params.tx_carrier_freq);
1565 ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int)
1566 itdev->params.tx_duty_cycle);
1567 ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int)
1568 itdev->params.rx_low_carrier_freq);
1569 ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int)
1570 itdev->params.rx_high_carrier_freq);
1572 /* set up hardware initial state */
1573 itdev->params.init_hardware(itdev);
1575 /* set up ir-core props */
1576 rdev->priv = itdev;
1577 rdev->driver_type = RC_DRIVER_IR_RAW;
1578 rdev->allowed_protos = RC_TYPE_ALL;
1579 rdev->open = ite_open;
1580 rdev->close = ite_close;
1581 rdev->s_idle = ite_s_idle;
1582 rdev->s_rx_carrier_range = ite_set_rx_carrier_range;
1583 rdev->min_timeout = ITE_MIN_IDLE_TIMEOUT;
1584 rdev->max_timeout = ITE_MAX_IDLE_TIMEOUT;
1585 rdev->timeout = ITE_IDLE_TIMEOUT;
1586 rdev->rx_resolution = ITE_BAUDRATE_DIVISOR *
1587 itdev->params.sample_period;
1588 rdev->tx_resolution = ITE_BAUDRATE_DIVISOR *
1589 itdev->params.sample_period;
1591 /* set up transmitter related values if needed */
1592 if (itdev->params.hw_tx_capable) {
1593 rdev->tx_ir = ite_tx_ir;
1594 rdev->s_tx_carrier = ite_set_tx_carrier;
1595 rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle;
1598 rdev->input_name = dev_desc->model;
1599 rdev->input_id.bustype = BUS_HOST;
1600 rdev->input_id.vendor = PCI_VENDOR_ID_ITE;
1601 rdev->input_id.product = 0;
1602 rdev->input_id.version = 0;
1603 rdev->driver_name = ITE_DRIVER_NAME;
1604 rdev->map_name = RC_MAP_RC6_MCE;
1606 ret = rc_register_device(rdev);
1607 if (ret)
1608 goto failure;
1610 itdev->rdev = rdev;
1611 ite_pr(KERN_NOTICE, "driver has been successfully loaded\n");
1613 return 0;
1615 failure:
1616 if (itdev->cir_irq)
1617 free_irq(itdev->cir_irq, itdev);
1619 if (itdev->cir_addr)
1620 release_region(itdev->cir_addr, itdev->params.io_region_size);
1622 rc_free_device(rdev);
1623 kfree(itdev);
1625 return ret;
1628 static void __devexit ite_remove(struct pnp_dev *pdev)
1630 struct ite_dev *dev = pnp_get_drvdata(pdev);
1631 unsigned long flags;
1633 ite_dbg("%s called", __func__);
1635 spin_lock_irqsave(&dev->lock, flags);
1637 /* disable hardware */
1638 dev->params.disable(dev);
1640 spin_unlock_irqrestore(&dev->lock, flags);
1642 /* free resources */
1643 free_irq(dev->cir_irq, dev);
1644 release_region(dev->cir_addr, dev->params.io_region_size);
1646 rc_unregister_device(dev->rdev);
1648 kfree(dev);
1651 static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
1653 struct ite_dev *dev = pnp_get_drvdata(pdev);
1654 unsigned long flags;
1656 ite_dbg("%s called", __func__);
1658 /* wait for any transmission to end */
1659 wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1661 spin_lock_irqsave(&dev->lock, flags);
1663 /* disable all interrupts */
1664 dev->params.disable(dev);
1666 spin_unlock_irqrestore(&dev->lock, flags);
1668 return 0;
1671 static int ite_resume(struct pnp_dev *pdev)
1673 int ret = 0;
1674 struct ite_dev *dev = pnp_get_drvdata(pdev);
1675 unsigned long flags;
1677 ite_dbg("%s called", __func__);
1679 spin_lock_irqsave(&dev->lock, flags);
1681 /* reinitialize hardware config registers */
1682 dev->params.init_hardware(dev);
1683 /* enable the receiver */
1684 dev->params.enable_rx(dev);
1686 spin_unlock_irqrestore(&dev->lock, flags);
1688 return ret;
1691 static void ite_shutdown(struct pnp_dev *pdev)
1693 struct ite_dev *dev = pnp_get_drvdata(pdev);
1694 unsigned long flags;
1696 ite_dbg("%s called", __func__);
1698 spin_lock_irqsave(&dev->lock, flags);
1700 /* disable all interrupts */
1701 dev->params.disable(dev);
1703 spin_unlock_irqrestore(&dev->lock, flags);
1706 static struct pnp_driver ite_driver = {
1707 .name = ITE_DRIVER_NAME,
1708 .id_table = ite_ids,
1709 .probe = ite_probe,
1710 .remove = __devexit_p(ite_remove),
1711 .suspend = ite_suspend,
1712 .resume = ite_resume,
1713 .shutdown = ite_shutdown,
1716 int ite_init(void)
1718 return pnp_register_driver(&ite_driver);
1721 void ite_exit(void)
1723 pnp_unregister_driver(&ite_driver);
1726 MODULE_DEVICE_TABLE(pnp, ite_ids);
1727 MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver");
1729 MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>");
1730 MODULE_LICENSE("GPL");
1732 module_init(ite_init);
1733 module_exit(ite_exit);