drivers/staging/tidspbridge/core/mmu_fault.c

   1 /*
   2  * mmu_fault.c
   3  *
   4  * DSP-BIOS Bridge driver support functions for TI OMAP processors.
   5  *
   6  * Implements DSP MMU fault handling functions.
   7  *
   8  * Copyright (C) 2005-2006 Texas Instruments, Inc.
   9  *
  10  * This package is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
  15  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
  16  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  17  */
  18
  19 /*  ----------------------------------- DSP/BIOS Bridge */
  20 #include <dspbridge/std.h>
  21 #include <dspbridge/dbdefs.h>
  22
  23 /*  ----------------------------------- Trace & Debug */
  24 #include <dspbridge/host_os.h>
  25 #include <dspbridge/dbc.h>
  26
  27 /*  ----------------------------------- OS Adaptation Layer */
  28 #include <dspbridge/drv.h>
  29
  30 /*  ----------------------------------- Link Driver */
  31 #include <dspbridge/dspdeh.h>
  32
  33 /* ------------------------------------ Hardware Abstraction Layer */
  34 #include <hw_defs.h>
  35 #include <hw_mmu.h>
  36
  37 /*  ----------------------------------- This */
  38 #include "_deh.h"
  39 #include <dspbridge/cfg.h>
  40 #include "_tiomap.h"
  41 #include "mmu_fault.h"
  42
  43 /*
  44  *  ======== mmu_fault_dpc ========
  45  *      Deferred procedure call to handle DSP MMU fault.
  46  */
  47 void mmu_fault_dpc(IN unsigned long pRefData)
  48 {
  49         struct deh_mgr *hdeh_mgr = (struct deh_mgr *)pRefData;
  50
  51         if (!hdeh_mgr)
  52                 return;
  53
  54         bridge_deh_notify(hdeh_mgr, DSP_MMUFAULT, 0L);
  55 }
  56
  57 /*
  58  *  ======== mmu_fault_isr ========
  59  *      ISR to be triggered by a DSP MMU fault interrupt.
  60  */
  61 irqreturn_t mmu_fault_isr(int irq, IN void *pRefData)
  62 {
  63         struct deh_mgr *deh_mgr_obj = pRefData;
  64         struct cfg_hostres *resources;
  65         u32 dmmu_event_mask;
  66
  67         if (!deh_mgr_obj)
  68                 return IRQ_HANDLED;
  69
  70         resources = deh_mgr_obj->hbridge_context->resources;
  71         if (!resources) {
  72                 dev_dbg(bridge, "%s: Failed to get Host Resources\n",
  73                                 __func__);
  74                 return IRQ_HANDLED;
  75         }
  76
  77         hw_mmu_event_status(resources->dw_dmmu_base, &dmmu_event_mask);
  78         if (dmmu_event_mask == HW_MMU_TRANSLATION_FAULT) {
  79                 hw_mmu_fault_addr_read(resources->dw_dmmu_base, &deh_mgr_obj->fault_addr);
  80                 dev_info(bridge, "%s: status=0x%x, fault_addr=0x%x\n", __func__,
  81                                 dmmu_event_mask, deh_mgr_obj->fault_addr);
  82                 /*
  83                  * Schedule a DPC directly. In the future, it may be
  84                  * necessary to check if DSP MMU fault is intended for
  85                  * Bridge.
  86                  */
  87                 tasklet_schedule(&deh_mgr_obj->dpc_tasklet);
  88
  89                 /* Disable the MMU events, else once we clear it will
  90                  * start to raise INTs again */
  91                 hw_mmu_event_disable(resources->dw_dmmu_base,
  92                                 HW_MMU_TRANSLATION_FAULT);
  93         } else {
  94                 hw_mmu_event_disable(resources->dw_dmmu_base,
  95                                 HW_MMU_ALL_INTERRUPTS);
  96         }
  97         return IRQ_HANDLED;
  98 }