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bnx2x: Fix chip hanging due to TX pipe stall.
[linux-2.6/libata-dev.git] / drivers / net / via-velocity.c
blobdeb1eca13c9f4f8321facaced82e6740da5f5cb5
1 /*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
11 * rx_copybreak/alignment
12 * More testing
13 *
14 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
15 * Additional fixes and clean up: Francois Romieu
16 *
17 * This source has not been verified for use in safety critical systems.
18 *
19 * Please direct queries about the revamped driver to the linux-kernel
20 * list not VIA.
21 *
22 * Original code:
23 *
24 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
25 * All rights reserved.
26 *
27 * This software may be redistributed and/or modified under
28 * the terms of the GNU General Public License as published by the Free
29 * Software Foundation; either version 2 of the License, or
30 * any later version.
31 *
32 * This program is distributed in the hope that it will be useful, but
33 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
34 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
35 * for more details.
36 *
37 * Author: Chuang Liang-Shing, AJ Jiang
38 *
39 * Date: Jan 24, 2003
40 *
41 * MODULE_LICENSE("GPL");
42 *
43 */
44
45
46 #include <linux/module.h>
47 #include <linux/types.h>
48 #include <linux/bitops.h>
49 #include <linux/init.h>
50 #include <linux/mm.h>
51 #include <linux/errno.h>
52 #include <linux/ioport.h>
53 #include <linux/pci.h>
54 #include <linux/kernel.h>
55 #include <linux/netdevice.h>
56 #include <linux/etherdevice.h>
57 #include <linux/skbuff.h>
58 #include <linux/delay.h>
59 #include <linux/timer.h>
60 #include <linux/slab.h>
61 #include <linux/interrupt.h>
62 #include <linux/string.h>
63 #include <linux/wait.h>
64 #include <linux/io.h>
65 #include <linux/if.h>
66 #include <linux/uaccess.h>
67 #include <linux/proc_fs.h>
68 #include <linux/inetdevice.h>
69 #include <linux/reboot.h>
70 #include <linux/ethtool.h>
71 #include <linux/mii.h>
72 #include <linux/in.h>
73 #include <linux/if_arp.h>
74 #include <linux/if_vlan.h>
75 #include <linux/ip.h>
76 #include <linux/tcp.h>
77 #include <linux/udp.h>
78 #include <linux/crc-ccitt.h>
79 #include <linux/crc32.h>
80
81 #include "via-velocity.h"
82
83
84 static int velocity_nics;
85 static int msglevel = MSG_LEVEL_INFO;
86
87 /**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95 static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
96 {
97 int i;
98
99 /* Select CAM mask */
100 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
101
102 writeb(0, &regs->CAMADDR);
103
104 /* read mask */
105 for (i = 0; i < 8; i++)
106 *mask++ = readb(&(regs->MARCAM[i]));
107
108 /* disable CAMEN */
109 writeb(0, &regs->CAMADDR);
110
111 /* Select mar */
112 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
113 }
114
115
116 /**
117 * mac_set_cam_mask - Set a CAM mask
118 * @regs: register block for this velocity
119 * @mask: CAM mask to load
120 *
121 * Store a new mask into a CAM
122 */
123 static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
124 {
125 int i;
126 /* Select CAM mask */
127 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
128
129 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
130
131 for (i = 0; i < 8; i++)
132 writeb(*mask++, &(regs->MARCAM[i]));
133
134 /* disable CAMEN */
135 writeb(0, &regs->CAMADDR);
136
137 /* Select mar */
138 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
139 }
140
141 static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
142 {
143 int i;
144 /* Select CAM mask */
145 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
146
147 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
148
149 for (i = 0; i < 8; i++)
150 writeb(*mask++, &(regs->MARCAM[i]));
151
152 /* disable CAMEN */
153 writeb(0, &regs->CAMADDR);
154
155 /* Select mar */
156 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
157 }
158
159 /**
160 * mac_set_cam - set CAM data
161 * @regs: register block of this velocity
162 * @idx: Cam index
163 * @addr: 2 or 6 bytes of CAM data
164 *
165 * Load an address or vlan tag into a CAM
166 */
167 static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
168 {
169 int i;
170
171 /* Select CAM mask */
172 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
173
174 idx &= (64 - 1);
175
176 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
177
178 for (i = 0; i < 6; i++)
179 writeb(*addr++, &(regs->MARCAM[i]));
180
181 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
182
183 udelay(10);
184
185 writeb(0, &regs->CAMADDR);
186
187 /* Select mar */
188 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
189 }
190
191 static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
192 const u8 *addr)
193 {
194
195 /* Select CAM mask */
196 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
197
198 idx &= (64 - 1);
199
200 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
201 writew(*((u16 *) addr), &regs->MARCAM[0]);
202
203 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
204
205 udelay(10);
206
207 writeb(0, &regs->CAMADDR);
208
209 /* Select mar */
210 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
211 }
212
213
214 /**
215 * mac_wol_reset - reset WOL after exiting low power
216 * @regs: register block of this velocity
217 *
218 * Called after we drop out of wake on lan mode in order to
219 * reset the Wake on lan features. This function doesn't restore
220 * the rest of the logic from the result of sleep/wakeup
221 */
222 static void mac_wol_reset(struct mac_regs __iomem *regs)
223 {
224
225 /* Turn off SWPTAG right after leaving power mode */
226 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
227 /* clear sticky bits */
228 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
229
230 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
231 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
232 /* disable force PME-enable */
233 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
234 /* disable power-event config bit */
235 writew(0xFFFF, &regs->WOLCRClr);
236 /* clear power status */
237 writew(0xFFFF, &regs->WOLSRClr);
238 }
239
240 static const struct ethtool_ops velocity_ethtool_ops;
241
242 /*
243 Define module options
244 */
245
246 MODULE_AUTHOR("VIA Networking Technologies, Inc.");
247 MODULE_LICENSE("GPL");
248 MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
249
250 #define VELOCITY_PARAM(N, D) \
251 static int N[MAX_UNITS] = OPTION_DEFAULT;\
252 module_param_array(N, int, NULL, 0); \
253 MODULE_PARM_DESC(N, D);
254
255 #define RX_DESC_MIN 64
256 #define RX_DESC_MAX 255
257 #define RX_DESC_DEF 64
258 VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
259
260 #define TX_DESC_MIN 16
261 #define TX_DESC_MAX 256
262 #define TX_DESC_DEF 64
263 VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
264
265 #define RX_THRESH_MIN 0
266 #define RX_THRESH_MAX 3
267 #define RX_THRESH_DEF 0
268 /* rx_thresh[] is used for controlling the receive fifo threshold.
269 0: indicate the rxfifo threshold is 128 bytes.
270 1: indicate the rxfifo threshold is 512 bytes.
271 2: indicate the rxfifo threshold is 1024 bytes.
272 3: indicate the rxfifo threshold is store & forward.
273 */
274 VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
275
276 #define DMA_LENGTH_MIN 0
277 #define DMA_LENGTH_MAX 7
278 #define DMA_LENGTH_DEF 6
279
280 /* DMA_length[] is used for controlling the DMA length
281 0: 8 DWORDs
282 1: 16 DWORDs
283 2: 32 DWORDs
284 3: 64 DWORDs
285 4: 128 DWORDs
286 5: 256 DWORDs
287 6: SF(flush till emply)
288 7: SF(flush till emply)
289 */
290 VELOCITY_PARAM(DMA_length, "DMA length");
291
292 #define IP_ALIG_DEF 0
293 /* IP_byte_align[] is used for IP header DWORD byte aligned
294 0: indicate the IP header won't be DWORD byte aligned.(Default) .
295 1: indicate the IP header will be DWORD byte aligned.
296 In some environment, the IP header should be DWORD byte aligned,
297 or the packet will be droped when we receive it. (eg: IPVS)
298 */
299 VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
300
301 #define FLOW_CNTL_DEF 1
302 #define FLOW_CNTL_MIN 1
303 #define FLOW_CNTL_MAX 5
304
305 /* flow_control[] is used for setting the flow control ability of NIC.
306 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
307 2: enable TX flow control.
308 3: enable RX flow control.
309 4: enable RX/TX flow control.
310 5: disable
311 */
312 VELOCITY_PARAM(flow_control, "Enable flow control ability");
313
314 #define MED_LNK_DEF 0
315 #define MED_LNK_MIN 0
316 #define MED_LNK_MAX 5
317 /* speed_duplex[] is used for setting the speed and duplex mode of NIC.
318 0: indicate autonegotiation for both speed and duplex mode
319 1: indicate 100Mbps half duplex mode
320 2: indicate 100Mbps full duplex mode
321 3: indicate 10Mbps half duplex mode
322 4: indicate 10Mbps full duplex mode
323 5: indicate 1000Mbps full duplex mode
324
325 Note:
326 if EEPROM have been set to the force mode, this option is ignored
327 by driver.
328 */
329 VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
330
331 #define VAL_PKT_LEN_DEF 0
332 /* ValPktLen[] is used for setting the checksum offload ability of NIC.
333 0: Receive frame with invalid layer 2 length (Default)
334 1: Drop frame with invalid layer 2 length
335 */
336 VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
337
338 #define WOL_OPT_DEF 0
339 #define WOL_OPT_MIN 0
340 #define WOL_OPT_MAX 7
341 /* wol_opts[] is used for controlling wake on lan behavior.
342 0: Wake up if recevied a magic packet. (Default)
343 1: Wake up if link status is on/off.
344 2: Wake up if recevied an arp packet.
345 4: Wake up if recevied any unicast packet.
346 Those value can be sumed up to support more than one option.
347 */
348 VELOCITY_PARAM(wol_opts, "Wake On Lan options");
349
350 static int rx_copybreak = 200;
351 module_param(rx_copybreak, int, 0644);
352 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
353
354 /*
355 * Internal board variants. At the moment we have only one
356 */
357 static struct velocity_info_tbl chip_info_table[] = {
358 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
359 { }
360 };
361
362 /*
363 * Describe the PCI device identifiers that we support in this
364 * device driver. Used for hotplug autoloading.
365 */
366 static DEFINE_PCI_DEVICE_TABLE(velocity_id_table) = {
367 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
368 { }
369 };
370
371 MODULE_DEVICE_TABLE(pci, velocity_id_table);
372
373 /**
374 * get_chip_name - identifier to name
375 * @id: chip identifier
376 *
377 * Given a chip identifier return a suitable description. Returns
378 * a pointer a static string valid while the driver is loaded.
379 */
380 static const char __devinit *get_chip_name(enum chip_type chip_id)
381 {
382 int i;
383 for (i = 0; chip_info_table[i].name != NULL; i++)
384 if (chip_info_table[i].chip_id == chip_id)
385 break;
386 return chip_info_table[i].name;
387 }
388
389 /**
390 * velocity_remove1 - device unplug
391 * @pdev: PCI device being removed
392 *
393 * Device unload callback. Called on an unplug or on module
394 * unload for each active device that is present. Disconnects
395 * the device from the network layer and frees all the resources
396 */
397 static void __devexit velocity_remove1(struct pci_dev *pdev)
398 {
399 struct net_device *dev = pci_get_drvdata(pdev);
400 struct velocity_info *vptr = netdev_priv(dev);
401
402 unregister_netdev(dev);
403 iounmap(vptr->mac_regs);
404 pci_release_regions(pdev);
405 pci_disable_device(pdev);
406 pci_set_drvdata(pdev, NULL);
407 free_netdev(dev);
408
409 velocity_nics--;
410 }
411
412 /**
413 * velocity_set_int_opt - parser for integer options
414 * @opt: pointer to option value
415 * @val: value the user requested (or -1 for default)
416 * @min: lowest value allowed
417 * @max: highest value allowed
418 * @def: default value
419 * @name: property name
420 * @dev: device name
421 *
422 * Set an integer property in the module options. This function does
423 * all the verification and checking as well as reporting so that
424 * we don't duplicate code for each option.
425 */
426 static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
427 {
428 if (val == -1)
429 *opt = def;
430 else if (val < min || val > max) {
431 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
432 devname, name, min, max);
433 *opt = def;
434 } else {
435 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
436 devname, name, val);
437 *opt = val;
438 }
439 }
440
441 /**
442 * velocity_set_bool_opt - parser for boolean options
443 * @opt: pointer to option value
444 * @val: value the user requested (or -1 for default)
445 * @def: default value (yes/no)
446 * @flag: numeric value to set for true.
447 * @name: property name
448 * @dev: device name
449 *
450 * Set a boolean property in the module options. This function does
451 * all the verification and checking as well as reporting so that
452 * we don't duplicate code for each option.
453 */
454 static void __devinit velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag, char *name, const char *devname)
455 {
456 (*opt) &= (~flag);
457 if (val == -1)
458 *opt |= (def ? flag : 0);
459 else if (val < 0 || val > 1) {
460 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
461 devname, name);
462 *opt |= (def ? flag : 0);
463 } else {
464 printk(KERN_INFO "%s: set parameter %s to %s\n",
465 devname, name, val ? "TRUE" : "FALSE");
466 *opt |= (val ? flag : 0);
467 }
468 }
469
470 /**
471 * velocity_get_options - set options on device
472 * @opts: option structure for the device
473 * @index: index of option to use in module options array
474 * @devname: device name
475 *
476 * Turn the module and command options into a single structure
477 * for the current device
478 */
479 static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
480 {
481
482 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
483 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
484 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
485 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
486
487 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
488 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
489 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
490 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
491 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
492 opts->numrx = (opts->numrx & ~3);
493 }
494
495 /**
496 * velocity_init_cam_filter - initialise CAM
497 * @vptr: velocity to program
498 *
499 * Initialize the content addressable memory used for filters. Load
500 * appropriately according to the presence of VLAN
501 */
502 static void velocity_init_cam_filter(struct velocity_info *vptr)
503 {
504 struct mac_regs __iomem *regs = vptr->mac_regs;
505 unsigned int vid, i = 0;
506
507 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
508 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
509 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
510
511 /* Disable all CAMs */
512 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
513 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
514 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
515 mac_set_cam_mask(regs, vptr->mCAMmask);
516
517 /* Enable VCAMs */
518
519 if (test_bit(0, vptr->active_vlans))
520 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
521
522 for_each_set_bit(vid, vptr->active_vlans, VLAN_N_VID) {
523 mac_set_vlan_cam(regs, i, (u8 *) &vid);
524 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
525 if (++i >= VCAM_SIZE)
526 break;
527 }
528 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
529 }
530
531 static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
532 {
533 struct velocity_info *vptr = netdev_priv(dev);
534
535 spin_lock_irq(&vptr->lock);
536 set_bit(vid, vptr->active_vlans);
537 velocity_init_cam_filter(vptr);
538 spin_unlock_irq(&vptr->lock);
539 }
540
541 static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
542 {
543 struct velocity_info *vptr = netdev_priv(dev);
544
545 spin_lock_irq(&vptr->lock);
546 clear_bit(vid, vptr->active_vlans);
547 velocity_init_cam_filter(vptr);
548 spin_unlock_irq(&vptr->lock);
549 }
550
551 static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
552 {
553 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
554 }
555
556 /**
557 * velocity_rx_reset - handle a receive reset
558 * @vptr: velocity we are resetting
559 *
560 * Reset the ownership and status for the receive ring side.
561 * Hand all the receive queue to the NIC.
562 */
563 static void velocity_rx_reset(struct velocity_info *vptr)
564 {
565
566 struct mac_regs __iomem *regs = vptr->mac_regs;
567 int i;
568
569 velocity_init_rx_ring_indexes(vptr);
570
571 /*
572 * Init state, all RD entries belong to the NIC
573 */
574 for (i = 0; i < vptr->options.numrx; ++i)
575 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
576
577 writew(vptr->options.numrx, &regs->RBRDU);
578 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
579 writew(0, &regs->RDIdx);
580 writew(vptr->options.numrx - 1, &regs->RDCSize);
581 }
582
583 /**
584 * velocity_get_opt_media_mode - get media selection
585 * @vptr: velocity adapter
586 *
587 * Get the media mode stored in EEPROM or module options and load
588 * mii_status accordingly. The requested link state information
589 * is also returned.
590 */
591 static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
592 {
593 u32 status = 0;
594
595 switch (vptr->options.spd_dpx) {
596 case SPD_DPX_AUTO:
597 status = VELOCITY_AUTONEG_ENABLE;
598 break;
599 case SPD_DPX_100_FULL:
600 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
601 break;
602 case SPD_DPX_10_FULL:
603 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
604 break;
605 case SPD_DPX_100_HALF:
606 status = VELOCITY_SPEED_100;
607 break;
608 case SPD_DPX_10_HALF:
609 status = VELOCITY_SPEED_10;
610 break;
611 case SPD_DPX_1000_FULL:
612 status = VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
613 break;
614 }
615 vptr->mii_status = status;
616 return status;
617 }
618
619 /**
620 * safe_disable_mii_autopoll - autopoll off
621 * @regs: velocity registers
622 *
623 * Turn off the autopoll and wait for it to disable on the chip
624 */
625 static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
626 {
627 u16 ww;
628
629 /* turn off MAUTO */
630 writeb(0, &regs->MIICR);
631 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
632 udelay(1);
633 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
634 break;
635 }
636 }
637
638 /**
639 * enable_mii_autopoll - turn on autopolling
640 * @regs: velocity registers
641 *
642 * Enable the MII link status autopoll feature on the Velocity
643 * hardware. Wait for it to enable.
644 */
645 static void enable_mii_autopoll(struct mac_regs __iomem *regs)
646 {
647 int ii;
648
649 writeb(0, &(regs->MIICR));
650 writeb(MIIADR_SWMPL, &regs->MIIADR);
651
652 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
653 udelay(1);
654 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
655 break;
656 }
657
658 writeb(MIICR_MAUTO, &regs->MIICR);
659
660 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
661 udelay(1);
662 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
663 break;
664 }
665
666 }
667
668 /**
669 * velocity_mii_read - read MII data
670 * @regs: velocity registers
671 * @index: MII register index
672 * @data: buffer for received data
673 *
674 * Perform a single read of an MII 16bit register. Returns zero
675 * on success or -ETIMEDOUT if the PHY did not respond.
676 */
677 static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
678 {
679 u16 ww;
680
681 /*
682 * Disable MIICR_MAUTO, so that mii addr can be set normally
683 */
684 safe_disable_mii_autopoll(regs);
685
686 writeb(index, &regs->MIIADR);
687
688 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
689
690 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
691 if (!(readb(&regs->MIICR) & MIICR_RCMD))
692 break;
693 }
694
695 *data = readw(&regs->MIIDATA);
696
697 enable_mii_autopoll(regs);
698 if (ww == W_MAX_TIMEOUT)
699 return -ETIMEDOUT;
700 return 0;
701 }
702
703
704 /**
705 * mii_check_media_mode - check media state
706 * @regs: velocity registers
707 *
708 * Check the current MII status and determine the link status
709 * accordingly
710 */
711 static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
712 {
713 u32 status = 0;
714 u16 ANAR;
715
716 if (!MII_REG_BITS_IS_ON(BMSR_LSTATUS, MII_BMSR, regs))
717 status |= VELOCITY_LINK_FAIL;
718
719 if (MII_REG_BITS_IS_ON(ADVERTISE_1000FULL, MII_CTRL1000, regs))
720 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
721 else if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF, MII_CTRL1000, regs))
722 status |= (VELOCITY_SPEED_1000);
723 else {
724 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
725 if (ANAR & ADVERTISE_100FULL)
726 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
727 else if (ANAR & ADVERTISE_100HALF)
728 status |= VELOCITY_SPEED_100;
729 else if (ANAR & ADVERTISE_10FULL)
730 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
731 else
732 status |= (VELOCITY_SPEED_10);
733 }
734
735 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
736 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
737 if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
738 == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
739 if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
740 status |= VELOCITY_AUTONEG_ENABLE;
741 }
742 }
743
744 return status;
745 }
746
747 /**
748 * velocity_mii_write - write MII data
749 * @regs: velocity registers
750 * @index: MII register index
751 * @data: 16bit data for the MII register
752 *
753 * Perform a single write to an MII 16bit register. Returns zero
754 * on success or -ETIMEDOUT if the PHY did not respond.
755 */
756 static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
757 {
758 u16 ww;
759
760 /*
761 * Disable MIICR_MAUTO, so that mii addr can be set normally
762 */
763 safe_disable_mii_autopoll(regs);
764
765 /* MII reg offset */
766 writeb(mii_addr, &regs->MIIADR);
767 /* set MII data */
768 writew(data, &regs->MIIDATA);
769
770 /* turn on MIICR_WCMD */
771 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
772
773 /* W_MAX_TIMEOUT is the timeout period */
774 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
775 udelay(5);
776 if (!(readb(&regs->MIICR) & MIICR_WCMD))
777 break;
778 }
779 enable_mii_autopoll(regs);
780
781 if (ww == W_MAX_TIMEOUT)
782 return -ETIMEDOUT;
783 return 0;
784 }
785
786 /**
787 * set_mii_flow_control - flow control setup
788 * @vptr: velocity interface
789 *
790 * Set up the flow control on this interface according to
791 * the supplied user/eeprom options.
792 */
793 static void set_mii_flow_control(struct velocity_info *vptr)
794 {
795 /*Enable or Disable PAUSE in ANAR */
796 switch (vptr->options.flow_cntl) {
797 case FLOW_CNTL_TX:
798 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
799 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
800 break;
801
802 case FLOW_CNTL_RX:
803 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
804 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
805 break;
806
807 case FLOW_CNTL_TX_RX:
808 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
809 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
810 break;
811
812 case FLOW_CNTL_DISABLE:
813 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
814 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
815 break;
816 default:
817 break;
818 }
819 }
820
821 /**
822 * mii_set_auto_on - autonegotiate on
823 * @vptr: velocity
824 *
825 * Enable autonegotation on this interface
826 */
827 static void mii_set_auto_on(struct velocity_info *vptr)
828 {
829 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs))
830 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
831 else
832 MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs);
833 }
834
835 static u32 check_connection_type(struct mac_regs __iomem *regs)
836 {
837 u32 status = 0;
838 u8 PHYSR0;
839 u16 ANAR;
840 PHYSR0 = readb(&regs->PHYSR0);
841
842 /*
843 if (!(PHYSR0 & PHYSR0_LINKGD))
844 status|=VELOCITY_LINK_FAIL;
845 */
846
847 if (PHYSR0 & PHYSR0_FDPX)
848 status |= VELOCITY_DUPLEX_FULL;
849
850 if (PHYSR0 & PHYSR0_SPDG)
851 status |= VELOCITY_SPEED_1000;
852 else if (PHYSR0 & PHYSR0_SPD10)
853 status |= VELOCITY_SPEED_10;
854 else
855 status |= VELOCITY_SPEED_100;
856
857 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
858 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
859 if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
860 == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
861 if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
862 status |= VELOCITY_AUTONEG_ENABLE;
863 }
864 }
865
866 return status;
867 }
868
869
870
871 /**
872 * velocity_set_media_mode - set media mode
873 * @mii_status: old MII link state
874 *
875 * Check the media link state and configure the flow control
876 * PHY and also velocity hardware setup accordingly. In particular
877 * we need to set up CD polling and frame bursting.
878 */
879 static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
880 {
881 u32 curr_status;
882 struct mac_regs __iomem *regs = vptr->mac_regs;
883
884 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
885 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
886
887 /* Set mii link status */
888 set_mii_flow_control(vptr);
889
890 /*
891 Check if new status is consistent with current status
892 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE) ||
893 (mii_status==curr_status)) {
894 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
895 vptr->mii_status=check_connection_type(vptr->mac_regs);
896 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
897 return 0;
898 }
899 */
900
901 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
902 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
903
904 /*
905 * If connection type is AUTO
906 */
907 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
908 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
909 /* clear force MAC mode bit */
910 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
911 /* set duplex mode of MAC according to duplex mode of MII */
912 MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs);
913 MII_REG_BITS_ON(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
914 MII_REG_BITS_ON(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs);
915
916 /* enable AUTO-NEGO mode */
917 mii_set_auto_on(vptr);
918 } else {
919 u16 CTRL1000;
920 u16 ANAR;
921 u8 CHIPGCR;
922
923 /*
924 * 1. if it's 3119, disable frame bursting in halfduplex mode
925 * and enable it in fullduplex mode
926 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
927 * 3. only enable CD heart beat counter in 10HD mode
928 */
929
930 /* set force MAC mode bit */
931 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
932
933 CHIPGCR = readb(&regs->CHIPGCR);
934
935 if (mii_status & VELOCITY_SPEED_1000)
936 CHIPGCR |= CHIPGCR_FCGMII;
937 else
938 CHIPGCR &= ~CHIPGCR_FCGMII;
939
940 if (mii_status & VELOCITY_DUPLEX_FULL) {
941 CHIPGCR |= CHIPGCR_FCFDX;
942 writeb(CHIPGCR, &regs->CHIPGCR);
943 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
944 if (vptr->rev_id < REV_ID_VT3216_A0)
945 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
946 } else {
947 CHIPGCR &= ~CHIPGCR_FCFDX;
948 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
949 writeb(CHIPGCR, &regs->CHIPGCR);
950 if (vptr->rev_id < REV_ID_VT3216_A0)
951 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
952 }
953
954 velocity_mii_read(vptr->mac_regs, MII_CTRL1000, &CTRL1000);
955 CTRL1000 &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
956 if ((mii_status & VELOCITY_SPEED_1000) &&
957 (mii_status & VELOCITY_DUPLEX_FULL)) {
958 CTRL1000 |= ADVERTISE_1000FULL;
959 }
960 velocity_mii_write(vptr->mac_regs, MII_CTRL1000, CTRL1000);
961
962 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10))
963 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
964 else
965 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
966
967 /* MII_REG_BITS_OFF(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); */
968 velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR);
969 ANAR &= (~(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF));
970 if (mii_status & VELOCITY_SPEED_100) {
971 if (mii_status & VELOCITY_DUPLEX_FULL)
972 ANAR |= ADVERTISE_100FULL;
973 else
974 ANAR |= ADVERTISE_100HALF;
975 } else if (mii_status & VELOCITY_SPEED_10) {
976 if (mii_status & VELOCITY_DUPLEX_FULL)
977 ANAR |= ADVERTISE_10FULL;
978 else
979 ANAR |= ADVERTISE_10HALF;
980 }
981 velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR);
982 /* enable AUTO-NEGO mode */
983 mii_set_auto_on(vptr);
984 /* MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); */
985 }
986 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
987 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
988 return VELOCITY_LINK_CHANGE;
989 }
990
991 /**
992 * velocity_print_link_status - link status reporting
993 * @vptr: velocity to report on
994 *
995 * Turn the link status of the velocity card into a kernel log
996 * description of the new link state, detailing speed and duplex
997 * status
998 */
999 static void velocity_print_link_status(struct velocity_info *vptr)
1000 {
1001
1002 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1003 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1004 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1005 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1006
1007 if (vptr->mii_status & VELOCITY_SPEED_1000)
1008 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1009 else if (vptr->mii_status & VELOCITY_SPEED_100)
1010 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1011 else
1012 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1013
1014 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1015 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1016 else
1017 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1018 } else {
1019 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1020 switch (vptr->options.spd_dpx) {
1021 case SPD_DPX_1000_FULL:
1022 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps full duplex\n");
1023 break;
1024 case SPD_DPX_100_HALF:
1025 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1026 break;
1027 case SPD_DPX_100_FULL:
1028 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1029 break;
1030 case SPD_DPX_10_HALF:
1031 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1032 break;
1033 case SPD_DPX_10_FULL:
1034 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1035 break;
1036 default:
1037 break;
1038 }
1039 }
1040 }
1041
1042 /**
1043 * enable_flow_control_ability - flow control
1044 * @vptr: veloity to configure
1045 *
1046 * Set up flow control according to the flow control options
1047 * determined by the eeprom/configuration.
1048 */
1049 static void enable_flow_control_ability(struct velocity_info *vptr)
1050 {
1051
1052 struct mac_regs __iomem *regs = vptr->mac_regs;
1053
1054 switch (vptr->options.flow_cntl) {
1055
1056 case FLOW_CNTL_DEFAULT:
1057 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
1058 writel(CR0_FDXRFCEN, &regs->CR0Set);
1059 else
1060 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1061
1062 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
1063 writel(CR0_FDXTFCEN, &regs->CR0Set);
1064 else
1065 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1066 break;
1067
1068 case FLOW_CNTL_TX:
1069 writel(CR0_FDXTFCEN, &regs->CR0Set);
1070 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1071 break;
1072
1073 case FLOW_CNTL_RX:
1074 writel(CR0_FDXRFCEN, &regs->CR0Set);
1075 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1076 break;
1077
1078 case FLOW_CNTL_TX_RX:
1079 writel(CR0_FDXTFCEN, &regs->CR0Set);
1080 writel(CR0_FDXRFCEN, &regs->CR0Set);
1081 break;
1082
1083 case FLOW_CNTL_DISABLE:
1084 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1085 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1086 break;
1087
1088 default:
1089 break;
1090 }
1091
1092 }
1093
1094 /**
1095 * velocity_soft_reset - soft reset
1096 * @vptr: velocity to reset
1097 *
1098 * Kick off a soft reset of the velocity adapter and then poll
1099 * until the reset sequence has completed before returning.
1100 */
1101 static int velocity_soft_reset(struct velocity_info *vptr)
1102 {
1103 struct mac_regs __iomem *regs = vptr->mac_regs;
1104 int i = 0;
1105
1106 writel(CR0_SFRST, &regs->CR0Set);
1107
1108 for (i = 0; i < W_MAX_TIMEOUT; i++) {
1109 udelay(5);
1110 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
1111 break;
1112 }
1113
1114 if (i == W_MAX_TIMEOUT) {
1115 writel(CR0_FORSRST, &regs->CR0Set);
1116 /* FIXME: PCI POSTING */
1117 /* delay 2ms */
1118 mdelay(2);
1119 }
1120 return 0;
1121 }
1122
1123 /**
1124 * velocity_set_multi - filter list change callback
1125 * @dev: network device
1126 *
1127 * Called by the network layer when the filter lists need to change
1128 * for a velocity adapter. Reload the CAMs with the new address
1129 * filter ruleset.
1130 */
1131 static void velocity_set_multi(struct net_device *dev)
1132 {
1133 struct velocity_info *vptr = netdev_priv(dev);
1134 struct mac_regs __iomem *regs = vptr->mac_regs;
1135 u8 rx_mode;
1136 int i;
1137 struct netdev_hw_addr *ha;
1138
1139 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1140 writel(0xffffffff, &regs->MARCAM[0]);
1141 writel(0xffffffff, &regs->MARCAM[4]);
1142 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
1143 } else if ((netdev_mc_count(dev) > vptr->multicast_limit) ||
1144 (dev->flags & IFF_ALLMULTI)) {
1145 writel(0xffffffff, &regs->MARCAM[0]);
1146 writel(0xffffffff, &regs->MARCAM[4]);
1147 rx_mode = (RCR_AM | RCR_AB);
1148 } else {
1149 int offset = MCAM_SIZE - vptr->multicast_limit;
1150 mac_get_cam_mask(regs, vptr->mCAMmask);
1151
1152 i = 0;
1153 netdev_for_each_mc_addr(ha, dev) {
1154 mac_set_cam(regs, i + offset, ha->addr);
1155 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
1156 i++;
1157 }
1158
1159 mac_set_cam_mask(regs, vptr->mCAMmask);
1160 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1161 }
1162 if (dev->mtu > 1500)
1163 rx_mode |= RCR_AL;
1164
1165 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
1166
1167 }
1168
1169 /*
1170 * MII access , media link mode setting functions
1171 */
1172
1173 /**
1174 * mii_init - set up MII
1175 * @vptr: velocity adapter
1176 * @mii_status: links tatus
1177 *
1178 * Set up the PHY for the current link state.
1179 */
1180 static void mii_init(struct velocity_info *vptr, u32 mii_status)
1181 {
1182 u16 BMCR;
1183
1184 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
1185 case PHYID_CICADA_CS8201:
1186 /*
1187 * Reset to hardware default
1188 */
1189 MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1190 /*
1191 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1192 * off it in NWay-forced half mode for NWay-forced v.s.
1193 * legacy-forced issue.
1194 */
1195 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1196 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1197 else
1198 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1199 /*
1200 * Turn on Link/Activity LED enable bit for CIS8201
1201 */
1202 MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
1203 break;
1204 case PHYID_VT3216_32BIT:
1205 case PHYID_VT3216_64BIT:
1206 /*
1207 * Reset to hardware default
1208 */
1209 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1210 /*
1211 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1212 * off it in NWay-forced half mode for NWay-forced v.s.
1213 * legacy-forced issue
1214 */
1215 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1216 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1217 else
1218 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1219 break;
1220
1221 case PHYID_MARVELL_1000:
1222 case PHYID_MARVELL_1000S:
1223 /*
1224 * Assert CRS on Transmit
1225 */
1226 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1227 /*
1228 * Reset to hardware default
1229 */
1230 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1231 break;
1232 default:
1233 ;
1234 }
1235 velocity_mii_read(vptr->mac_regs, MII_BMCR, &BMCR);
1236 if (BMCR & BMCR_ISOLATE) {
1237 BMCR &= ~BMCR_ISOLATE;
1238 velocity_mii_write(vptr->mac_regs, MII_BMCR, BMCR);
1239 }
1240 }
1241
1242 /**
1243 * setup_queue_timers - Setup interrupt timers
1244 *
1245 * Setup interrupt frequency during suppression (timeout if the frame
1246 * count isn't filled).
1247 */
1248 static void setup_queue_timers(struct velocity_info *vptr)
1249 {
1250 /* Only for newer revisions */
1251 if (vptr->rev_id >= REV_ID_VT3216_A0) {
1252 u8 txqueue_timer = 0;
1253 u8 rxqueue_timer = 0;
1254
1255 if (vptr->mii_status & (VELOCITY_SPEED_1000 |
1256 VELOCITY_SPEED_100)) {
1257 txqueue_timer = vptr->options.txqueue_timer;
1258 rxqueue_timer = vptr->options.rxqueue_timer;
1259 }
1260
1261 writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
1262 writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
1263 }
1264 }
1265 /**
1266 * setup_adaptive_interrupts - Setup interrupt suppression
1267 *
1268 * @vptr velocity adapter
1269 *
1270 * The velocity is able to suppress interrupt during high interrupt load.
1271 * This function turns on that feature.
1272 */
1273 static void setup_adaptive_interrupts(struct velocity_info *vptr)
1274 {
1275 struct mac_regs __iomem *regs = vptr->mac_regs;
1276 u16 tx_intsup = vptr->options.tx_intsup;
1277 u16 rx_intsup = vptr->options.rx_intsup;
1278
1279 /* Setup default interrupt mask (will be changed below) */
1280 vptr->int_mask = INT_MASK_DEF;
1281
1282 /* Set Tx Interrupt Suppression Threshold */
1283 writeb(CAMCR_PS0, &regs->CAMCR);
1284 if (tx_intsup != 0) {
1285 vptr->int_mask &= ~(ISR_PTXI | ISR_PTX0I | ISR_PTX1I |
1286 ISR_PTX2I | ISR_PTX3I);
1287 writew(tx_intsup, &regs->ISRCTL);
1288 } else
1289 writew(ISRCTL_TSUPDIS, &regs->ISRCTL);
1290
1291 /* Set Rx Interrupt Suppression Threshold */
1292 writeb(CAMCR_PS1, &regs->CAMCR);
1293 if (rx_intsup != 0) {
1294 vptr->int_mask &= ~ISR_PRXI;
1295 writew(rx_intsup, &regs->ISRCTL);
1296 } else
1297 writew(ISRCTL_RSUPDIS, &regs->ISRCTL);
1298
1299 /* Select page to interrupt hold timer */
1300 writeb(0, &regs->CAMCR);
1301 }
1302
1303 /**
1304 * velocity_init_registers - initialise MAC registers
1305 * @vptr: velocity to init
1306 * @type: type of initialisation (hot or cold)
1307 *
1308 * Initialise the MAC on a reset or on first set up on the
1309 * hardware.
1310 */
1311 static void velocity_init_registers(struct velocity_info *vptr,
1312 enum velocity_init_type type)
1313 {
1314 struct mac_regs __iomem *regs = vptr->mac_regs;
1315 int i, mii_status;
1316
1317 mac_wol_reset(regs);
1318
1319 switch (type) {
1320 case VELOCITY_INIT_RESET:
1321 case VELOCITY_INIT_WOL:
1322
1323 netif_stop_queue(vptr->dev);
1324
1325 /*
1326 * Reset RX to prevent RX pointer not on the 4X location
1327 */
1328 velocity_rx_reset(vptr);
1329 mac_rx_queue_run(regs);
1330 mac_rx_queue_wake(regs);
1331
1332 mii_status = velocity_get_opt_media_mode(vptr);
1333 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1334 velocity_print_link_status(vptr);
1335 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1336 netif_wake_queue(vptr->dev);
1337 }
1338
1339 enable_flow_control_ability(vptr);
1340
1341 mac_clear_isr(regs);
1342 writel(CR0_STOP, &regs->CR0Clr);
1343 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1344 &regs->CR0Set);
1345
1346 break;
1347
1348 case VELOCITY_INIT_COLD:
1349 default:
1350 /*
1351 * Do reset
1352 */
1353 velocity_soft_reset(vptr);
1354 mdelay(5);
1355
1356 mac_eeprom_reload(regs);
1357 for (i = 0; i < 6; i++)
1358 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
1359
1360 /*
1361 * clear Pre_ACPI bit.
1362 */
1363 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
1364 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
1365 mac_set_dma_length(regs, vptr->options.DMA_length);
1366
1367 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
1368 /*
1369 * Back off algorithm use original IEEE standard
1370 */
1371 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
1372
1373 /*
1374 * Init CAM filter
1375 */
1376 velocity_init_cam_filter(vptr);
1377
1378 /*
1379 * Set packet filter: Receive directed and broadcast address
1380 */
1381 velocity_set_multi(vptr->dev);
1382
1383 /*
1384 * Enable MII auto-polling
1385 */
1386 enable_mii_autopoll(regs);
1387
1388 setup_adaptive_interrupts(vptr);
1389
1390 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1391 writew(vptr->options.numrx - 1, &regs->RDCSize);
1392 mac_rx_queue_run(regs);
1393 mac_rx_queue_wake(regs);
1394
1395 writew(vptr->options.numtx - 1, &regs->TDCSize);
1396
1397 for (i = 0; i < vptr->tx.numq; i++) {
1398 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1399 mac_tx_queue_run(regs, i);
1400 }
1401
1402 init_flow_control_register(vptr);
1403
1404 writel(CR0_STOP, &regs->CR0Clr);
1405 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
1406
1407 mii_status = velocity_get_opt_media_mode(vptr);
1408 netif_stop_queue(vptr->dev);
1409
1410 mii_init(vptr, mii_status);
1411
1412 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1413 velocity_print_link_status(vptr);
1414 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1415 netif_wake_queue(vptr->dev);
1416 }
1417
1418 enable_flow_control_ability(vptr);
1419 mac_hw_mibs_init(regs);
1420 mac_write_int_mask(vptr->int_mask, regs);
1421 mac_clear_isr(regs);
1422
1423 }
1424 }
1425
1426 static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1427 {
1428 struct mac_regs __iomem *regs = vptr->mac_regs;
1429 int avail, dirty, unusable;
1430
1431 /*
1432 * RD number must be equal to 4X per hardware spec
1433 * (programming guide rev 1.20, p.13)
1434 */
1435 if (vptr->rx.filled < 4)
1436 return;
1437
1438 wmb();
1439
1440 unusable = vptr->rx.filled & 0x0003;
1441 dirty = vptr->rx.dirty - unusable;
1442 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1443 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1444 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1445 }
1446
1447 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1448 vptr->rx.filled = unusable;
1449 }
1450
1451 /**
1452 * velocity_init_dma_rings - set up DMA rings
1453 * @vptr: Velocity to set up
1454 *
1455 * Allocate PCI mapped DMA rings for the receive and transmit layer
1456 * to use.
1457 */
1458 static int velocity_init_dma_rings(struct velocity_info *vptr)
1459 {
1460 struct velocity_opt *opt = &vptr->options;
1461 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1462 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1463 struct pci_dev *pdev = vptr->pdev;
1464 dma_addr_t pool_dma;
1465 void *pool;
1466 unsigned int i;
1467
1468 /*
1469 * Allocate all RD/TD rings a single pool.
1470 *
1471 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1472 * alignment
1473 */
1474 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
1475 rx_ring_size, &pool_dma);
1476 if (!pool) {
1477 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1478 vptr->dev->name);
1479 return -ENOMEM;
1480 }
1481
1482 vptr->rx.ring = pool;
1483 vptr->rx.pool_dma = pool_dma;
1484
1485 pool += rx_ring_size;
1486 pool_dma += rx_ring_size;
1487
1488 for (i = 0; i < vptr->tx.numq; i++) {
1489 vptr->tx.rings[i] = pool;
1490 vptr->tx.pool_dma[i] = pool_dma;
1491 pool += tx_ring_size;
1492 pool_dma += tx_ring_size;
1493 }
1494
1495 return 0;
1496 }
1497
1498 static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1499 {
1500 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1501 }
1502
1503 /**
1504 * velocity_alloc_rx_buf - allocate aligned receive buffer
1505 * @vptr: velocity
1506 * @idx: ring index
1507 *
1508 * Allocate a new full sized buffer for the reception of a frame and
1509 * map it into PCI space for the hardware to use. The hardware
1510 * requires *64* byte alignment of the buffer which makes life
1511 * less fun than would be ideal.
1512 */
1513 static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1514 {
1515 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1516 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1517
1518 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1519 if (rd_info->skb == NULL)
1520 return -ENOMEM;
1521
1522 /*
1523 * Do the gymnastics to get the buffer head for data at
1524 * 64byte alignment.
1525 */
1526 skb_reserve(rd_info->skb,
1527 64 - ((unsigned long) rd_info->skb->data & 63));
1528 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1529 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1530
1531 /*
1532 * Fill in the descriptor to match
1533 */
1534
1535 *((u32 *) & (rd->rdesc0)) = 0;
1536 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1537 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1538 rd->pa_high = 0;
1539 return 0;
1540 }
1541
1542
1543 static int velocity_rx_refill(struct velocity_info *vptr)
1544 {
1545 int dirty = vptr->rx.dirty, done = 0;
1546
1547 do {
1548 struct rx_desc *rd = vptr->rx.ring + dirty;
1549
1550 /* Fine for an all zero Rx desc at init time as well */
1551 if (rd->rdesc0.len & OWNED_BY_NIC)
1552 break;
1553
1554 if (!vptr->rx.info[dirty].skb) {
1555 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1556 break;
1557 }
1558 done++;
1559 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1560 } while (dirty != vptr->rx.curr);
1561
1562 if (done) {
1563 vptr->rx.dirty = dirty;
1564 vptr->rx.filled += done;
1565 }
1566
1567 return done;
1568 }
1569
1570 /**
1571 * velocity_free_rd_ring - free receive ring
1572 * @vptr: velocity to clean up
1573 *
1574 * Free the receive buffers for each ring slot and any
1575 * attached socket buffers that need to go away.
1576 */
1577 static void velocity_free_rd_ring(struct velocity_info *vptr)
1578 {
1579 int i;
1580
1581 if (vptr->rx.info == NULL)
1582 return;
1583
1584 for (i = 0; i < vptr->options.numrx; i++) {
1585 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1586 struct rx_desc *rd = vptr->rx.ring + i;
1587
1588 memset(rd, 0, sizeof(*rd));
1589
1590 if (!rd_info->skb)
1591 continue;
1592 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1593 PCI_DMA_FROMDEVICE);
1594 rd_info->skb_dma = 0;
1595
1596 dev_kfree_skb(rd_info->skb);
1597 rd_info->skb = NULL;
1598 }
1599
1600 kfree(vptr->rx.info);
1601 vptr->rx.info = NULL;
1602 }
1603
1604
1605
1606 /**
1607 * velocity_init_rd_ring - set up receive ring
1608 * @vptr: velocity to configure
1609 *
1610 * Allocate and set up the receive buffers for each ring slot and
1611 * assign them to the network adapter.
1612 */
1613 static int velocity_init_rd_ring(struct velocity_info *vptr)
1614 {
1615 int ret = -ENOMEM;
1616
1617 vptr->rx.info = kcalloc(vptr->options.numrx,
1618 sizeof(struct velocity_rd_info), GFP_KERNEL);
1619 if (!vptr->rx.info)
1620 goto out;
1621
1622 velocity_init_rx_ring_indexes(vptr);
1623
1624 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1625 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1626 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1627 velocity_free_rd_ring(vptr);
1628 goto out;
1629 }
1630
1631 ret = 0;
1632 out:
1633 return ret;
1634 }
1635
1636 /**
1637 * velocity_init_td_ring - set up transmit ring
1638 * @vptr: velocity
1639 *
1640 * Set up the transmit ring and chain the ring pointers together.
1641 * Returns zero on success or a negative posix errno code for
1642 * failure.
1643 */
1644 static int velocity_init_td_ring(struct velocity_info *vptr)
1645 {
1646 int j;
1647
1648 /* Init the TD ring entries */
1649 for (j = 0; j < vptr->tx.numq; j++) {
1650
1651 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
1652 sizeof(struct velocity_td_info),
1653 GFP_KERNEL);
1654 if (!vptr->tx.infos[j]) {
1655 while (--j >= 0)
1656 kfree(vptr->tx.infos[j]);
1657 return -ENOMEM;
1658 }
1659
1660 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1661 }
1662 return 0;
1663 }
1664
1665 /**
1666 * velocity_free_dma_rings - free PCI ring pointers
1667 * @vptr: Velocity to free from
1668 *
1669 * Clean up the PCI ring buffers allocated to this velocity.
1670 */
1671 static void velocity_free_dma_rings(struct velocity_info *vptr)
1672 {
1673 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1674 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1675
1676 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1677 }
1678
1679
1680 static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1681 {
1682 int ret;
1683
1684 velocity_set_rxbufsize(vptr, mtu);
1685
1686 ret = velocity_init_dma_rings(vptr);
1687 if (ret < 0)
1688 goto out;
1689
1690 ret = velocity_init_rd_ring(vptr);
1691 if (ret < 0)
1692 goto err_free_dma_rings_0;
1693
1694 ret = velocity_init_td_ring(vptr);
1695 if (ret < 0)
1696 goto err_free_rd_ring_1;
1697 out:
1698 return ret;
1699
1700 err_free_rd_ring_1:
1701 velocity_free_rd_ring(vptr);
1702 err_free_dma_rings_0:
1703 velocity_free_dma_rings(vptr);
1704 goto out;
1705 }
1706
1707 /**
1708 * velocity_free_tx_buf - free transmit buffer
1709 * @vptr: velocity
1710 * @tdinfo: buffer
1711 *
1712 * Release an transmit buffer. If the buffer was preallocated then
1713 * recycle it, if not then unmap the buffer.
1714 */
1715 static void velocity_free_tx_buf(struct velocity_info *vptr,
1716 struct velocity_td_info *tdinfo, struct tx_desc *td)
1717 {
1718 struct sk_buff *skb = tdinfo->skb;
1719
1720 /*
1721 * Don't unmap the pre-allocated tx_bufs
1722 */
1723 if (tdinfo->skb_dma) {
1724 int i;
1725
1726 for (i = 0; i < tdinfo->nskb_dma; i++) {
1727 size_t pktlen = max_t(size_t, skb->len, ETH_ZLEN);
1728
1729 /* For scatter-gather */
1730 if (skb_shinfo(skb)->nr_frags > 0)
1731 pktlen = max_t(size_t, pktlen,
1732 td->td_buf[i].size & ~TD_QUEUE);
1733
1734 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i],
1735 le16_to_cpu(pktlen), PCI_DMA_TODEVICE);
1736 }
1737 }
1738 dev_kfree_skb_irq(skb);
1739 tdinfo->skb = NULL;
1740 }
1741
1742
1743 /*
1744 * FIXME: could we merge this with velocity_free_tx_buf ?
1745 */
1746 static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1747 int q, int n)
1748 {
1749 struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]);
1750 int i;
1751
1752 if (td_info == NULL)
1753 return;
1754
1755 if (td_info->skb) {
1756 for (i = 0; i < td_info->nskb_dma; i++) {
1757 if (td_info->skb_dma[i]) {
1758 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1759 td_info->skb->len, PCI_DMA_TODEVICE);
1760 td_info->skb_dma[i] = 0;
1761 }
1762 }
1763 dev_kfree_skb(td_info->skb);
1764 td_info->skb = NULL;
1765 }
1766 }
1767
1768 /**
1769 * velocity_free_td_ring - free td ring
1770 * @vptr: velocity
1771 *
1772 * Free up the transmit ring for this particular velocity adapter.
1773 * We free the ring contents but not the ring itself.
1774 */
1775 static void velocity_free_td_ring(struct velocity_info *vptr)
1776 {
1777 int i, j;
1778
1779 for (j = 0; j < vptr->tx.numq; j++) {
1780 if (vptr->tx.infos[j] == NULL)
1781 continue;
1782 for (i = 0; i < vptr->options.numtx; i++)
1783 velocity_free_td_ring_entry(vptr, j, i);
1784
1785 kfree(vptr->tx.infos[j]);
1786 vptr->tx.infos[j] = NULL;
1787 }
1788 }
1789
1790
1791 static void velocity_free_rings(struct velocity_info *vptr)
1792 {
1793 velocity_free_td_ring(vptr);
1794 velocity_free_rd_ring(vptr);
1795 velocity_free_dma_rings(vptr);
1796 }
1797
1798 /**
1799 * velocity_error - handle error from controller
1800 * @vptr: velocity
1801 * @status: card status
1802 *
1803 * Process an error report from the hardware and attempt to recover
1804 * the card itself. At the moment we cannot recover from some
1805 * theoretically impossible errors but this could be fixed using
1806 * the pci_device_failed logic to bounce the hardware
1807 *
1808 */
1809 static void velocity_error(struct velocity_info *vptr, int status)
1810 {
1811
1812 if (status & ISR_TXSTLI) {
1813 struct mac_regs __iomem *regs = vptr->mac_regs;
1814
1815 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1816 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1817 writew(TRDCSR_RUN, &regs->TDCSRClr);
1818 netif_stop_queue(vptr->dev);
1819
1820 /* FIXME: port over the pci_device_failed code and use it
1821 here */
1822 }
1823
1824 if (status & ISR_SRCI) {
1825 struct mac_regs __iomem *regs = vptr->mac_regs;
1826 int linked;
1827
1828 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1829 vptr->mii_status = check_connection_type(regs);
1830
1831 /*
1832 * If it is a 3119, disable frame bursting in
1833 * halfduplex mode and enable it in fullduplex
1834 * mode
1835 */
1836 if (vptr->rev_id < REV_ID_VT3216_A0) {
1837 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1838 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1839 else
1840 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1841 }
1842 /*
1843 * Only enable CD heart beat counter in 10HD mode
1844 */
1845 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10))
1846 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1847 else
1848 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1849
1850 setup_queue_timers(vptr);
1851 }
1852 /*
1853 * Get link status from PHYSR0
1854 */
1855 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1856
1857 if (linked) {
1858 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
1859 netif_carrier_on(vptr->dev);
1860 } else {
1861 vptr->mii_status |= VELOCITY_LINK_FAIL;
1862 netif_carrier_off(vptr->dev);
1863 }
1864
1865 velocity_print_link_status(vptr);
1866 enable_flow_control_ability(vptr);
1867
1868 /*
1869 * Re-enable auto-polling because SRCI will disable
1870 * auto-polling
1871 */
1872
1873 enable_mii_autopoll(regs);
1874
1875 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1876 netif_stop_queue(vptr->dev);
1877 else
1878 netif_wake_queue(vptr->dev);
1879
1880 }
1881 if (status & ISR_MIBFI)
1882 velocity_update_hw_mibs(vptr);
1883 if (status & ISR_LSTEI)
1884 mac_rx_queue_wake(vptr->mac_regs);
1885 }
1886
1887 /**
1888 * tx_srv - transmit interrupt service
1889 * @vptr; Velocity
1890 *
1891 * Scan the queues looking for transmitted packets that
1892 * we can complete and clean up. Update any statistics as
1893 * necessary/
1894 */
1895 static int velocity_tx_srv(struct velocity_info *vptr)
1896 {
1897 struct tx_desc *td;
1898 int qnum;
1899 int full = 0;
1900 int idx;
1901 int works = 0;
1902 struct velocity_td_info *tdinfo;
1903 struct net_device_stats *stats = &vptr->dev->stats;
1904
1905 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1906 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1907 idx = (idx + 1) % vptr->options.numtx) {
1908
1909 /*
1910 * Get Tx Descriptor
1911 */
1912 td = &(vptr->tx.rings[qnum][idx]);
1913 tdinfo = &(vptr->tx.infos[qnum][idx]);
1914
1915 if (td->tdesc0.len & OWNED_BY_NIC)
1916 break;
1917
1918 if ((works++ > 15))
1919 break;
1920
1921 if (td->tdesc0.TSR & TSR0_TERR) {
1922 stats->tx_errors++;
1923 stats->tx_dropped++;
1924 if (td->tdesc0.TSR & TSR0_CDH)
1925 stats->tx_heartbeat_errors++;
1926 if (td->tdesc0.TSR & TSR0_CRS)
1927 stats->tx_carrier_errors++;
1928 if (td->tdesc0.TSR & TSR0_ABT)
1929 stats->tx_aborted_errors++;
1930 if (td->tdesc0.TSR & TSR0_OWC)
1931 stats->tx_window_errors++;
1932 } else {
1933 stats->tx_packets++;
1934 stats->tx_bytes += tdinfo->skb->len;
1935 }
1936 velocity_free_tx_buf(vptr, tdinfo, td);
1937 vptr->tx.used[qnum]--;
1938 }
1939 vptr->tx.tail[qnum] = idx;
1940
1941 if (AVAIL_TD(vptr, qnum) < 1)
1942 full = 1;
1943 }
1944 /*
1945 * Look to see if we should kick the transmit network
1946 * layer for more work.
1947 */
1948 if (netif_queue_stopped(vptr->dev) && (full == 0) &&
1949 (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1950 netif_wake_queue(vptr->dev);
1951 }
1952 return works;
1953 }
1954
1955 /**
1956 * velocity_rx_csum - checksum process
1957 * @rd: receive packet descriptor
1958 * @skb: network layer packet buffer
1959 *
1960 * Process the status bits for the received packet and determine
1961 * if the checksum was computed and verified by the hardware
1962 */
1963 static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1964 {
1965 skb_checksum_none_assert(skb);
1966
1967 if (rd->rdesc1.CSM & CSM_IPKT) {
1968 if (rd->rdesc1.CSM & CSM_IPOK) {
1969 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1970 (rd->rdesc1.CSM & CSM_UDPKT)) {
1971 if (!(rd->rdesc1.CSM & CSM_TUPOK))
1972 return;
1973 }
1974 skb->ip_summed = CHECKSUM_UNNECESSARY;
1975 }
1976 }
1977 }
1978
1979 /**
1980 * velocity_rx_copy - in place Rx copy for small packets
1981 * @rx_skb: network layer packet buffer candidate
1982 * @pkt_size: received data size
1983 * @rd: receive packet descriptor
1984 * @dev: network device
1985 *
1986 * Replace the current skb that is scheduled for Rx processing by a
1987 * shorter, immediately allocated skb, if the received packet is small
1988 * enough. This function returns a negative value if the received
1989 * packet is too big or if memory is exhausted.
1990 */
1991 static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1992 struct velocity_info *vptr)
1993 {
1994 int ret = -1;
1995 if (pkt_size < rx_copybreak) {
1996 struct sk_buff *new_skb;
1997
1998 new_skb = netdev_alloc_skb_ip_align(vptr->dev, pkt_size);
1999 if (new_skb) {
2000 new_skb->ip_summed = rx_skb[0]->ip_summed;
2001 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
2002 *rx_skb = new_skb;
2003 ret = 0;
2004 }
2005
2006 }
2007 return ret;
2008 }
2009
2010 /**
2011 * velocity_iph_realign - IP header alignment
2012 * @vptr: velocity we are handling
2013 * @skb: network layer packet buffer
2014 * @pkt_size: received data size
2015 *
2016 * Align IP header on a 2 bytes boundary. This behavior can be
2017 * configured by the user.
2018 */
2019 static inline void velocity_iph_realign(struct velocity_info *vptr,
2020 struct sk_buff *skb, int pkt_size)
2021 {
2022 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
2023 memmove(skb->data + 2, skb->data, pkt_size);
2024 skb_reserve(skb, 2);
2025 }
2026 }
2027
2028
2029 /**
2030 * velocity_receive_frame - received packet processor
2031 * @vptr: velocity we are handling
2032 * @idx: ring index
2033 *
2034 * A packet has arrived. We process the packet and if appropriate
2035 * pass the frame up the network stack
2036 */
2037 static int velocity_receive_frame(struct velocity_info *vptr, int idx)
2038 {
2039 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
2040 struct net_device_stats *stats = &vptr->dev->stats;
2041 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
2042 struct rx_desc *rd = &(vptr->rx.ring[idx]);
2043 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
2044 struct sk_buff *skb;
2045
2046 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
2047 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
2048 stats->rx_length_errors++;
2049 return -EINVAL;
2050 }
2051
2052 if (rd->rdesc0.RSR & RSR_MAR)
2053 stats->multicast++;
2054
2055 skb = rd_info->skb;
2056
2057 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
2058 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
2059
2060 /*
2061 * Drop frame not meeting IEEE 802.3
2062 */
2063
2064 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
2065 if (rd->rdesc0.RSR & RSR_RL) {
2066 stats->rx_length_errors++;
2067 return -EINVAL;
2068 }
2069 }
2070
2071 pci_action = pci_dma_sync_single_for_device;
2072
2073 velocity_rx_csum(rd, skb);
2074
2075 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
2076 velocity_iph_realign(vptr, skb, pkt_len);
2077 pci_action = pci_unmap_single;
2078 rd_info->skb = NULL;
2079 }
2080
2081 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
2082 PCI_DMA_FROMDEVICE);
2083
2084 skb_put(skb, pkt_len - 4);
2085 skb->protocol = eth_type_trans(skb, vptr->dev);
2086
2087 if (rd->rdesc0.RSR & RSR_DETAG) {
2088 u16 vid = swab16(le16_to_cpu(rd->rdesc1.PQTAG));
2089
2090 __vlan_hwaccel_put_tag(skb, vid);
2091 }
2092 netif_rx(skb);
2093
2094 stats->rx_bytes += pkt_len;
2095
2096 return 0;
2097 }
2098
2099
2100 /**
2101 * velocity_rx_srv - service RX interrupt
2102 * @vptr: velocity
2103 *
2104 * Walk the receive ring of the velocity adapter and remove
2105 * any received packets from the receive queue. Hand the ring
2106 * slots back to the adapter for reuse.
2107 */
2108 static int velocity_rx_srv(struct velocity_info *vptr, int budget_left)
2109 {
2110 struct net_device_stats *stats = &vptr->dev->stats;
2111 int rd_curr = vptr->rx.curr;
2112 int works = 0;
2113
2114 while (works < budget_left) {
2115 struct rx_desc *rd = vptr->rx.ring + rd_curr;
2116
2117 if (!vptr->rx.info[rd_curr].skb)
2118 break;
2119
2120 if (rd->rdesc0.len & OWNED_BY_NIC)
2121 break;
2122
2123 rmb();
2124
2125 /*
2126 * Don't drop CE or RL error frame although RXOK is off
2127 */
2128 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
2129 if (velocity_receive_frame(vptr, rd_curr) < 0)
2130 stats->rx_dropped++;
2131 } else {
2132 if (rd->rdesc0.RSR & RSR_CRC)
2133 stats->rx_crc_errors++;
2134 if (rd->rdesc0.RSR & RSR_FAE)
2135 stats->rx_frame_errors++;
2136
2137 stats->rx_dropped++;
2138 }
2139
2140 rd->size |= RX_INTEN;
2141
2142 rd_curr++;
2143 if (rd_curr >= vptr->options.numrx)
2144 rd_curr = 0;
2145 works++;
2146 }
2147
2148 vptr->rx.curr = rd_curr;
2149
2150 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
2151 velocity_give_many_rx_descs(vptr);
2152
2153 VAR_USED(stats);
2154 return works;
2155 }
2156
2157 static int velocity_poll(struct napi_struct *napi, int budget)
2158 {
2159 struct velocity_info *vptr = container_of(napi,
2160 struct velocity_info, napi);
2161 unsigned int rx_done;
2162 unsigned long flags;
2163
2164 spin_lock_irqsave(&vptr->lock, flags);
2165 /*
2166 * Do rx and tx twice for performance (taken from the VIA
2167 * out-of-tree driver).
2168 */
2169 rx_done = velocity_rx_srv(vptr, budget / 2);
2170 velocity_tx_srv(vptr);
2171 rx_done += velocity_rx_srv(vptr, budget - rx_done);
2172 velocity_tx_srv(vptr);
2173
2174 /* If budget not fully consumed, exit the polling mode */
2175 if (rx_done < budget) {
2176 napi_complete(napi);
2177 mac_enable_int(vptr->mac_regs);
2178 }
2179 spin_unlock_irqrestore(&vptr->lock, flags);
2180
2181 return rx_done;
2182 }
2183
2184 /**
2185 * velocity_intr - interrupt callback
2186 * @irq: interrupt number
2187 * @dev_instance: interrupting device
2188 *
2189 * Called whenever an interrupt is generated by the velocity
2190 * adapter IRQ line. We may not be the source of the interrupt
2191 * and need to identify initially if we are, and if not exit as
2192 * efficiently as possible.
2193 */
2194 static irqreturn_t velocity_intr(int irq, void *dev_instance)
2195 {
2196 struct net_device *dev = dev_instance;
2197 struct velocity_info *vptr = netdev_priv(dev);
2198 u32 isr_status;
2199
2200 spin_lock(&vptr->lock);
2201 isr_status = mac_read_isr(vptr->mac_regs);
2202
2203 /* Not us ? */
2204 if (isr_status == 0) {
2205 spin_unlock(&vptr->lock);
2206 return IRQ_NONE;
2207 }
2208
2209 /* Ack the interrupt */
2210 mac_write_isr(vptr->mac_regs, isr_status);
2211
2212 if (likely(napi_schedule_prep(&vptr->napi))) {
2213 mac_disable_int(vptr->mac_regs);
2214 __napi_schedule(&vptr->napi);
2215 }
2216
2217 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2218 velocity_error(vptr, isr_status);
2219
2220 spin_unlock(&vptr->lock);
2221
2222 return IRQ_HANDLED;
2223 }
2224
2225 /**
2226 * velocity_open - interface activation callback
2227 * @dev: network layer device to open
2228 *
2229 * Called when the network layer brings the interface up. Returns
2230 * a negative posix error code on failure, or zero on success.
2231 *
2232 * All the ring allocation and set up is done on open for this
2233 * adapter to minimise memory usage when inactive
2234 */
2235 static int velocity_open(struct net_device *dev)
2236 {
2237 struct velocity_info *vptr = netdev_priv(dev);
2238 int ret;
2239
2240 ret = velocity_init_rings(vptr, dev->mtu);
2241 if (ret < 0)
2242 goto out;
2243
2244 /* Ensure chip is running */
2245 pci_set_power_state(vptr->pdev, PCI_D0);
2246
2247 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2248
2249 ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
2250 dev->name, dev);
2251 if (ret < 0) {
2252 /* Power down the chip */
2253 pci_set_power_state(vptr->pdev, PCI_D3hot);
2254 velocity_free_rings(vptr);
2255 goto out;
2256 }
2257
2258 velocity_give_many_rx_descs(vptr);
2259
2260 mac_enable_int(vptr->mac_regs);
2261 netif_start_queue(dev);
2262 napi_enable(&vptr->napi);
2263 vptr->flags |= VELOCITY_FLAGS_OPENED;
2264 out:
2265 return ret;
2266 }
2267
2268 /**
2269 * velocity_shutdown - shut down the chip
2270 * @vptr: velocity to deactivate
2271 *
2272 * Shuts down the internal operations of the velocity and
2273 * disables interrupts, autopolling, transmit and receive
2274 */
2275 static void velocity_shutdown(struct velocity_info *vptr)
2276 {
2277 struct mac_regs __iomem *regs = vptr->mac_regs;
2278 mac_disable_int(regs);
2279 writel(CR0_STOP, &regs->CR0Set);
2280 writew(0xFFFF, &regs->TDCSRClr);
2281 writeb(0xFF, &regs->RDCSRClr);
2282 safe_disable_mii_autopoll(regs);
2283 mac_clear_isr(regs);
2284 }
2285
2286 /**
2287 * velocity_change_mtu - MTU change callback
2288 * @dev: network device
2289 * @new_mtu: desired MTU
2290 *
2291 * Handle requests from the networking layer for MTU change on
2292 * this interface. It gets called on a change by the network layer.
2293 * Return zero for success or negative posix error code.
2294 */
2295 static int velocity_change_mtu(struct net_device *dev, int new_mtu)
2296 {
2297 struct velocity_info *vptr = netdev_priv(dev);
2298 int ret = 0;
2299
2300 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
2301 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
2302 vptr->dev->name);
2303 ret = -EINVAL;
2304 goto out_0;
2305 }
2306
2307 if (!netif_running(dev)) {
2308 dev->mtu = new_mtu;
2309 goto out_0;
2310 }
2311
2312 if (dev->mtu != new_mtu) {
2313 struct velocity_info *tmp_vptr;
2314 unsigned long flags;
2315 struct rx_info rx;
2316 struct tx_info tx;
2317
2318 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
2319 if (!tmp_vptr) {
2320 ret = -ENOMEM;
2321 goto out_0;
2322 }
2323
2324 tmp_vptr->dev = dev;
2325 tmp_vptr->pdev = vptr->pdev;
2326 tmp_vptr->options = vptr->options;
2327 tmp_vptr->tx.numq = vptr->tx.numq;
2328
2329 ret = velocity_init_rings(tmp_vptr, new_mtu);
2330 if (ret < 0)
2331 goto out_free_tmp_vptr_1;
2332
2333 spin_lock_irqsave(&vptr->lock, flags);
2334
2335 netif_stop_queue(dev);
2336 velocity_shutdown(vptr);
2337
2338 rx = vptr->rx;
2339 tx = vptr->tx;
2340
2341 vptr->rx = tmp_vptr->rx;
2342 vptr->tx = tmp_vptr->tx;
2343
2344 tmp_vptr->rx = rx;
2345 tmp_vptr->tx = tx;
2346
2347 dev->mtu = new_mtu;
2348
2349 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2350
2351 velocity_give_many_rx_descs(vptr);
2352
2353 mac_enable_int(vptr->mac_regs);
2354 netif_start_queue(dev);
2355
2356 spin_unlock_irqrestore(&vptr->lock, flags);
2357
2358 velocity_free_rings(tmp_vptr);
2359
2360 out_free_tmp_vptr_1:
2361 kfree(tmp_vptr);
2362 }
2363 out_0:
2364 return ret;
2365 }
2366
2367 /**
2368 * velocity_mii_ioctl - MII ioctl handler
2369 * @dev: network device
2370 * @ifr: the ifreq block for the ioctl
2371 * @cmd: the command
2372 *
2373 * Process MII requests made via ioctl from the network layer. These
2374 * are used by tools like kudzu to interrogate the link state of the
2375 * hardware
2376 */
2377 static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2378 {
2379 struct velocity_info *vptr = netdev_priv(dev);
2380 struct mac_regs __iomem *regs = vptr->mac_regs;
2381 unsigned long flags;
2382 struct mii_ioctl_data *miidata = if_mii(ifr);
2383 int err;
2384
2385 switch (cmd) {
2386 case SIOCGMIIPHY:
2387 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
2388 break;
2389 case SIOCGMIIREG:
2390 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2391 return -ETIMEDOUT;
2392 break;
2393 case SIOCSMIIREG:
2394 spin_lock_irqsave(&vptr->lock, flags);
2395 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2396 spin_unlock_irqrestore(&vptr->lock, flags);
2397 check_connection_type(vptr->mac_regs);
2398 if (err)
2399 return err;
2400 break;
2401 default:
2402 return -EOPNOTSUPP;
2403 }
2404 return 0;
2405 }
2406
2407
2408 /**
2409 * velocity_ioctl - ioctl entry point
2410 * @dev: network device
2411 * @rq: interface request ioctl
2412 * @cmd: command code
2413 *
2414 * Called when the user issues an ioctl request to the network
2415 * device in question. The velocity interface supports MII.
2416 */
2417 static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2418 {
2419 struct velocity_info *vptr = netdev_priv(dev);
2420 int ret;
2421
2422 /* If we are asked for information and the device is power
2423 saving then we need to bring the device back up to talk to it */
2424
2425 if (!netif_running(dev))
2426 pci_set_power_state(vptr->pdev, PCI_D0);
2427
2428 switch (cmd) {
2429 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2430 case SIOCGMIIREG: /* Read MII PHY register. */
2431 case SIOCSMIIREG: /* Write to MII PHY register. */
2432 ret = velocity_mii_ioctl(dev, rq, cmd);
2433 break;
2434
2435 default:
2436 ret = -EOPNOTSUPP;
2437 }
2438 if (!netif_running(dev))
2439 pci_set_power_state(vptr->pdev, PCI_D3hot);
2440
2441
2442 return ret;
2443 }
2444
2445 /**
2446 * velocity_get_status - statistics callback
2447 * @dev: network device
2448 *
2449 * Callback from the network layer to allow driver statistics
2450 * to be resynchronized with hardware collected state. In the
2451 * case of the velocity we need to pull the MIB counters from
2452 * the hardware into the counters before letting the network
2453 * layer display them.
2454 */
2455 static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2456 {
2457 struct velocity_info *vptr = netdev_priv(dev);
2458
2459 /* If the hardware is down, don't touch MII */
2460 if (!netif_running(dev))
2461 return &dev->stats;
2462
2463 spin_lock_irq(&vptr->lock);
2464 velocity_update_hw_mibs(vptr);
2465 spin_unlock_irq(&vptr->lock);
2466
2467 dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2468 dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2469 dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2470
2471 // unsigned long rx_dropped; /* no space in linux buffers */
2472 dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2473 /* detailed rx_errors: */
2474 // unsigned long rx_length_errors;
2475 // unsigned long rx_over_errors; /* receiver ring buff overflow */
2476 dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2477 // unsigned long rx_frame_errors; /* recv'd frame alignment error */
2478 // unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2479 // unsigned long rx_missed_errors; /* receiver missed packet */
2480
2481 /* detailed tx_errors */
2482 // unsigned long tx_fifo_errors;
2483
2484 return &dev->stats;
2485 }
2486
2487 /**
2488 * velocity_close - close adapter callback
2489 * @dev: network device
2490 *
2491 * Callback from the network layer when the velocity is being
2492 * deactivated by the network layer
2493 */
2494 static int velocity_close(struct net_device *dev)
2495 {
2496 struct velocity_info *vptr = netdev_priv(dev);
2497
2498 napi_disable(&vptr->napi);
2499 netif_stop_queue(dev);
2500 velocity_shutdown(vptr);
2501
2502 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2503 velocity_get_ip(vptr);
2504 if (dev->irq != 0)
2505 free_irq(dev->irq, dev);
2506
2507 /* Power down the chip */
2508 pci_set_power_state(vptr->pdev, PCI_D3hot);
2509
2510 velocity_free_rings(vptr);
2511
2512 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2513 return 0;
2514 }
2515
2516 /**
2517 * velocity_xmit - transmit packet callback
2518 * @skb: buffer to transmit
2519 * @dev: network device
2520 *
2521 * Called by the networ layer to request a packet is queued to
2522 * the velocity. Returns zero on success.
2523 */
2524 static netdev_tx_t velocity_xmit(struct sk_buff *skb,
2525 struct net_device *dev)
2526 {
2527 struct velocity_info *vptr = netdev_priv(dev);
2528 int qnum = 0;
2529 struct tx_desc *td_ptr;
2530 struct velocity_td_info *tdinfo;
2531 unsigned long flags;
2532 int pktlen;
2533 int index, prev;
2534 int i = 0;
2535
2536 if (skb_padto(skb, ETH_ZLEN))
2537 goto out;
2538
2539 /* The hardware can handle at most 7 memory segments, so merge
2540 * the skb if there are more */
2541 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2542 kfree_skb(skb);
2543 return NETDEV_TX_OK;
2544 }
2545
2546 pktlen = skb_shinfo(skb)->nr_frags == 0 ?
2547 max_t(unsigned int, skb->len, ETH_ZLEN) :
2548 skb_headlen(skb);
2549
2550 spin_lock_irqsave(&vptr->lock, flags);
2551
2552 index = vptr->tx.curr[qnum];
2553 td_ptr = &(vptr->tx.rings[qnum][index]);
2554 tdinfo = &(vptr->tx.infos[qnum][index]);
2555
2556 td_ptr->tdesc1.TCR = TCR0_TIC;
2557 td_ptr->td_buf[0].size &= ~TD_QUEUE;
2558
2559 /*
2560 * Map the linear network buffer into PCI space and
2561 * add it to the transmit ring.
2562 */
2563 tdinfo->skb = skb;
2564 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
2565 td_ptr->tdesc0.len = cpu_to_le16(pktlen);
2566 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2567 td_ptr->td_buf[0].pa_high = 0;
2568 td_ptr->td_buf[0].size = cpu_to_le16(pktlen);
2569
2570 /* Handle fragments */
2571 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2572 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2573
2574 tdinfo->skb_dma[i + 1] = pci_map_page(vptr->pdev, frag->page,
2575 frag->page_offset, frag->size,
2576 PCI_DMA_TODEVICE);
2577
2578 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2579 td_ptr->td_buf[i + 1].pa_high = 0;
2580 td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size);
2581 }
2582 tdinfo->nskb_dma = i + 1;
2583
2584 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
2585
2586 if (vlan_tx_tag_present(skb)) {
2587 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2588 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2589 }
2590
2591 /*
2592 * Handle hardware checksum
2593 */
2594 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2595 const struct iphdr *ip = ip_hdr(skb);
2596 if (ip->protocol == IPPROTO_TCP)
2597 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2598 else if (ip->protocol == IPPROTO_UDP)
2599 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2600 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2601 }
2602
2603 prev = index - 1;
2604 if (prev < 0)
2605 prev = vptr->options.numtx - 1;
2606 td_ptr->tdesc0.len |= OWNED_BY_NIC;
2607 vptr->tx.used[qnum]++;
2608 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
2609
2610 if (AVAIL_TD(vptr, qnum) < 1)
2611 netif_stop_queue(dev);
2612
2613 td_ptr = &(vptr->tx.rings[qnum][prev]);
2614 td_ptr->td_buf[0].size |= TD_QUEUE;
2615 mac_tx_queue_wake(vptr->mac_regs, qnum);
2616
2617 spin_unlock_irqrestore(&vptr->lock, flags);
2618 out:
2619 return NETDEV_TX_OK;
2620 }
2621
2622
2623 static const struct net_device_ops velocity_netdev_ops = {
2624 .ndo_open = velocity_open,
2625 .ndo_stop = velocity_close,
2626 .ndo_start_xmit = velocity_xmit,
2627 .ndo_get_stats = velocity_get_stats,
2628 .ndo_validate_addr = eth_validate_addr,
2629 .ndo_set_mac_address = eth_mac_addr,
2630 .ndo_set_multicast_list = velocity_set_multi,
2631 .ndo_change_mtu = velocity_change_mtu,
2632 .ndo_do_ioctl = velocity_ioctl,
2633 .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
2634 .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
2635 };
2636
2637 /**
2638 * velocity_init_info - init private data
2639 * @pdev: PCI device
2640 * @vptr: Velocity info
2641 * @info: Board type
2642 *
2643 * Set up the initial velocity_info struct for the device that has been
2644 * discovered.
2645 */
2646 static void __devinit velocity_init_info(struct pci_dev *pdev,
2647 struct velocity_info *vptr,
2648 const struct velocity_info_tbl *info)
2649 {
2650 memset(vptr, 0, sizeof(struct velocity_info));
2651
2652 vptr->pdev = pdev;
2653 vptr->chip_id = info->chip_id;
2654 vptr->tx.numq = info->txqueue;
2655 vptr->multicast_limit = MCAM_SIZE;
2656 spin_lock_init(&vptr->lock);
2657 }
2658
2659 /**
2660 * velocity_get_pci_info - retrieve PCI info for device
2661 * @vptr: velocity device
2662 * @pdev: PCI device it matches
2663 *
2664 * Retrieve the PCI configuration space data that interests us from
2665 * the kernel PCI layer
2666 */
2667 static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
2668 {
2669 vptr->rev_id = pdev->revision;
2670
2671 pci_set_master(pdev);
2672
2673 vptr->ioaddr = pci_resource_start(pdev, 0);
2674 vptr->memaddr = pci_resource_start(pdev, 1);
2675
2676 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
2677 dev_err(&pdev->dev,
2678 "region #0 is not an I/O resource, aborting.\n");
2679 return -EINVAL;
2680 }
2681
2682 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
2683 dev_err(&pdev->dev,
2684 "region #1 is an I/O resource, aborting.\n");
2685 return -EINVAL;
2686 }
2687
2688 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
2689 dev_err(&pdev->dev, "region #1 is too small.\n");
2690 return -EINVAL;
2691 }
2692 vptr->pdev = pdev;
2693
2694 return 0;
2695 }
2696
2697 /**
2698 * velocity_print_info - per driver data
2699 * @vptr: velocity
2700 *
2701 * Print per driver data as the kernel driver finds Velocity
2702 * hardware
2703 */
2704 static void __devinit velocity_print_info(struct velocity_info *vptr)
2705 {
2706 struct net_device *dev = vptr->dev;
2707
2708 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
2709 printk(KERN_INFO "%s: Ethernet Address: %pM\n",
2710 dev->name, dev->dev_addr);
2711 }
2712
2713 static u32 velocity_get_link(struct net_device *dev)
2714 {
2715 struct velocity_info *vptr = netdev_priv(dev);
2716 struct mac_regs __iomem *regs = vptr->mac_regs;
2717 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
2718 }
2719
2720
2721 /**
2722 * velocity_found1 - set up discovered velocity card
2723 * @pdev: PCI device
2724 * @ent: PCI device table entry that matched
2725 *
2726 * Configure a discovered adapter from scratch. Return a negative
2727 * errno error code on failure paths.
2728 */
2729 static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
2730 {
2731 static int first = 1;
2732 struct net_device *dev;
2733 int i;
2734 const char *drv_string;
2735 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
2736 struct velocity_info *vptr;
2737 struct mac_regs __iomem *regs;
2738 int ret = -ENOMEM;
2739
2740 /* FIXME: this driver, like almost all other ethernet drivers,
2741 * can support more than MAX_UNITS.
2742 */
2743 if (velocity_nics >= MAX_UNITS) {
2744 dev_notice(&pdev->dev, "already found %d NICs.\n",
2745 velocity_nics);
2746 return -ENODEV;
2747 }
2748
2749 dev = alloc_etherdev(sizeof(struct velocity_info));
2750 if (!dev) {
2751 dev_err(&pdev->dev, "allocate net device failed.\n");
2752 goto out;
2753 }
2754
2755 /* Chain it all together */
2756
2757 SET_NETDEV_DEV(dev, &pdev->dev);
2758 vptr = netdev_priv(dev);
2759
2760
2761 if (first) {
2762 printk(KERN_INFO "%s Ver. %s\n",
2763 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
2764 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
2765 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
2766 first = 0;
2767 }
2768
2769 velocity_init_info(pdev, vptr, info);
2770
2771 vptr->dev = dev;
2772
2773 ret = pci_enable_device(pdev);
2774 if (ret < 0)
2775 goto err_free_dev;
2776
2777 dev->irq = pdev->irq;
2778
2779 ret = velocity_get_pci_info(vptr, pdev);
2780 if (ret < 0) {
2781 /* error message already printed */
2782 goto err_disable;
2783 }
2784
2785 ret = pci_request_regions(pdev, VELOCITY_NAME);
2786 if (ret < 0) {
2787 dev_err(&pdev->dev, "No PCI resources.\n");
2788 goto err_disable;
2789 }
2790
2791 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
2792 if (regs == NULL) {
2793 ret = -EIO;
2794 goto err_release_res;
2795 }
2796
2797 vptr->mac_regs = regs;
2798
2799 mac_wol_reset(regs);
2800
2801 dev->base_addr = vptr->ioaddr;
2802
2803 for (i = 0; i < 6; i++)
2804 dev->dev_addr[i] = readb(&regs->PAR[i]);
2805
2806
2807 drv_string = dev_driver_string(&pdev->dev);
2808
2809 velocity_get_options(&vptr->options, velocity_nics, drv_string);
2810
2811 /*
2812 * Mask out the options cannot be set to the chip
2813 */
2814
2815 vptr->options.flags &= info->flags;
2816
2817 /*
2818 * Enable the chip specified capbilities
2819 */
2820
2821 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
2822
2823 vptr->wol_opts = vptr->options.wol_opts;
2824 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2825
2826 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
2827
2828 dev->irq = pdev->irq;
2829 dev->netdev_ops = &velocity_netdev_ops;
2830 dev->ethtool_ops = &velocity_ethtool_ops;
2831 netif_napi_add(dev, &vptr->napi, velocity_poll, VELOCITY_NAPI_WEIGHT);
2832
2833 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HW_VLAN_TX;
2834 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
2835 NETIF_F_HW_VLAN_RX | NETIF_F_IP_CSUM;
2836
2837 ret = register_netdev(dev);
2838 if (ret < 0)
2839 goto err_iounmap;
2840
2841 if (!velocity_get_link(dev)) {
2842 netif_carrier_off(dev);
2843 vptr->mii_status |= VELOCITY_LINK_FAIL;
2844 }
2845
2846 velocity_print_info(vptr);
2847 pci_set_drvdata(pdev, dev);
2848
2849 /* and leave the chip powered down */
2850
2851 pci_set_power_state(pdev, PCI_D3hot);
2852 velocity_nics++;
2853 out:
2854 return ret;
2855
2856 err_iounmap:
2857 iounmap(regs);
2858 err_release_res:
2859 pci_release_regions(pdev);
2860 err_disable:
2861 pci_disable_device(pdev);
2862 err_free_dev:
2863 free_netdev(dev);
2864 goto out;
2865 }
2866
2867
2868 #ifdef CONFIG_PM
2869 /**
2870 * wol_calc_crc - WOL CRC
2871 * @pattern: data pattern
2872 * @mask_pattern: mask
2873 *
2874 * Compute the wake on lan crc hashes for the packet header
2875 * we are interested in.
2876 */
2877 static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
2878 {
2879 u16 crc = 0xFFFF;
2880 u8 mask;
2881 int i, j;
2882
2883 for (i = 0; i < size; i++) {
2884 mask = mask_pattern[i];
2885
2886 /* Skip this loop if the mask equals to zero */
2887 if (mask == 0x00)
2888 continue;
2889
2890 for (j = 0; j < 8; j++) {
2891 if ((mask & 0x01) == 0) {
2892 mask >>= 1;
2893 continue;
2894 }
2895 mask >>= 1;
2896 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
2897 }
2898 }
2899 /* Finally, invert the result once to get the correct data */
2900 crc = ~crc;
2901 return bitrev32(crc) >> 16;
2902 }
2903
2904 /**
2905 * velocity_set_wol - set up for wake on lan
2906 * @vptr: velocity to set WOL status on
2907 *
2908 * Set a card up for wake on lan either by unicast or by
2909 * ARP packet.
2910 *
2911 * FIXME: check static buffer is safe here
2912 */
2913 static int velocity_set_wol(struct velocity_info *vptr)
2914 {
2915 struct mac_regs __iomem *regs = vptr->mac_regs;
2916 enum speed_opt spd_dpx = vptr->options.spd_dpx;
2917 static u8 buf[256];
2918 int i;
2919
2920 static u32 mask_pattern[2][4] = {
2921 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
2922 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
2923 };
2924
2925 writew(0xFFFF, &regs->WOLCRClr);
2926 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
2927 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
2928
2929 /*
2930 if (vptr->wol_opts & VELOCITY_WOL_PHY)
2931 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
2932 */
2933
2934 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
2935 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
2936
2937 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
2938 struct arp_packet *arp = (struct arp_packet *) buf;
2939 u16 crc;
2940 memset(buf, 0, sizeof(struct arp_packet) + 7);
2941
2942 for (i = 0; i < 4; i++)
2943 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
2944
2945 arp->type = htons(ETH_P_ARP);
2946 arp->ar_op = htons(1);
2947
2948 memcpy(arp->ar_tip, vptr->ip_addr, 4);
2949
2950 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
2951 (u8 *) & mask_pattern[0][0]);
2952
2953 writew(crc, &regs->PatternCRC[0]);
2954 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
2955 }
2956
2957 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
2958 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
2959
2960 writew(0x0FFF, &regs->WOLSRClr);
2961
2962 if (spd_dpx == SPD_DPX_1000_FULL)
2963 goto mac_done;
2964
2965 if (spd_dpx != SPD_DPX_AUTO)
2966 goto advertise_done;
2967
2968 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
2969 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
2970 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
2971
2972 MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
2973 }
2974
2975 if (vptr->mii_status & VELOCITY_SPEED_1000)
2976 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
2977
2978 advertise_done:
2979 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2980
2981 {
2982 u8 GCR;
2983 GCR = readb(&regs->CHIPGCR);
2984 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
2985 writeb(GCR, &regs->CHIPGCR);
2986 }
2987
2988 mac_done:
2989 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
2990 /* Turn on SWPTAG just before entering power mode */
2991 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
2992 /* Go to bed ..... */
2993 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
2994
2995 return 0;
2996 }
2997
2998 /**
2999 * velocity_save_context - save registers
3000 * @vptr: velocity
3001 * @context: buffer for stored context
3002 *
3003 * Retrieve the current configuration from the velocity hardware
3004 * and stash it in the context structure, for use by the context
3005 * restore functions. This allows us to save things we need across
3006 * power down states
3007 */
3008 static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context)
3009 {
3010 struct mac_regs __iomem *regs = vptr->mac_regs;
3011 u16 i;
3012 u8 __iomem *ptr = (u8 __iomem *)regs;
3013
3014 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3015 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3016
3017 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3018 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3019
3020 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3021 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3022
3023 }
3024
3025 static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3026 {
3027 struct net_device *dev = pci_get_drvdata(pdev);
3028 struct velocity_info *vptr = netdev_priv(dev);
3029 unsigned long flags;
3030
3031 if (!netif_running(vptr->dev))
3032 return 0;
3033
3034 netif_device_detach(vptr->dev);
3035
3036 spin_lock_irqsave(&vptr->lock, flags);
3037 pci_save_state(pdev);
3038 #ifdef ETHTOOL_GWOL
3039 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3040 velocity_get_ip(vptr);
3041 velocity_save_context(vptr, &vptr->context);
3042 velocity_shutdown(vptr);
3043 velocity_set_wol(vptr);
3044 pci_enable_wake(pdev, PCI_D3hot, 1);
3045 pci_set_power_state(pdev, PCI_D3hot);
3046 } else {
3047 velocity_save_context(vptr, &vptr->context);
3048 velocity_shutdown(vptr);
3049 pci_disable_device(pdev);
3050 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3051 }
3052 #else
3053 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3054 #endif
3055 spin_unlock_irqrestore(&vptr->lock, flags);
3056 return 0;
3057 }
3058
3059 /**
3060 * velocity_restore_context - restore registers
3061 * @vptr: velocity
3062 * @context: buffer for stored context
3063 *
3064 * Reload the register configuration from the velocity context
3065 * created by velocity_save_context.
3066 */
3067 static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3068 {
3069 struct mac_regs __iomem *regs = vptr->mac_regs;
3070 int i;
3071 u8 __iomem *ptr = (u8 __iomem *)regs;
3072
3073 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4)
3074 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3075
3076 /* Just skip cr0 */
3077 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3078 /* Clear */
3079 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3080 /* Set */
3081 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3082 }
3083
3084 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4)
3085 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3086
3087 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3088 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3089
3090 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++)
3091 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3092 }
3093
3094 static int velocity_resume(struct pci_dev *pdev)
3095 {
3096 struct net_device *dev = pci_get_drvdata(pdev);
3097 struct velocity_info *vptr = netdev_priv(dev);
3098 unsigned long flags;
3099 int i;
3100
3101 if (!netif_running(vptr->dev))
3102 return 0;
3103
3104 pci_set_power_state(pdev, PCI_D0);
3105 pci_enable_wake(pdev, 0, 0);
3106 pci_restore_state(pdev);
3107
3108 mac_wol_reset(vptr->mac_regs);
3109
3110 spin_lock_irqsave(&vptr->lock, flags);
3111 velocity_restore_context(vptr, &vptr->context);
3112 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3113 mac_disable_int(vptr->mac_regs);
3114
3115 velocity_tx_srv(vptr);
3116
3117 for (i = 0; i < vptr->tx.numq; i++) {
3118 if (vptr->tx.used[i])
3119 mac_tx_queue_wake(vptr->mac_regs, i);
3120 }
3121
3122 mac_enable_int(vptr->mac_regs);
3123 spin_unlock_irqrestore(&vptr->lock, flags);
3124 netif_device_attach(vptr->dev);
3125
3126 return 0;
3127 }
3128 #endif
3129
3130 /*
3131 * Definition for our device driver. The PCI layer interface
3132 * uses this to handle all our card discover and plugging
3133 */
3134 static struct pci_driver velocity_driver = {
3135 .name = VELOCITY_NAME,
3136 .id_table = velocity_id_table,
3137 .probe = velocity_found1,
3138 .remove = __devexit_p(velocity_remove1),
3139 #ifdef CONFIG_PM
3140 .suspend = velocity_suspend,
3141 .resume = velocity_resume,
3142 #endif
3143 };
3144
3145
3146 /**
3147 * velocity_ethtool_up - pre hook for ethtool
3148 * @dev: network device
3149 *
3150 * Called before an ethtool operation. We need to make sure the
3151 * chip is out of D3 state before we poke at it.
3152 */
3153 static int velocity_ethtool_up(struct net_device *dev)
3154 {
3155 struct velocity_info *vptr = netdev_priv(dev);
3156 if (!netif_running(dev))
3157 pci_set_power_state(vptr->pdev, PCI_D0);
3158 return 0;
3159 }
3160
3161 /**
3162 * velocity_ethtool_down - post hook for ethtool
3163 * @dev: network device
3164 *
3165 * Called after an ethtool operation. Restore the chip back to D3
3166 * state if it isn't running.
3167 */
3168 static void velocity_ethtool_down(struct net_device *dev)
3169 {
3170 struct velocity_info *vptr = netdev_priv(dev);
3171 if (!netif_running(dev))
3172 pci_set_power_state(vptr->pdev, PCI_D3hot);
3173 }
3174
3175 static int velocity_get_settings(struct net_device *dev,
3176 struct ethtool_cmd *cmd)
3177 {
3178 struct velocity_info *vptr = netdev_priv(dev);
3179 struct mac_regs __iomem *regs = vptr->mac_regs;
3180 u32 status;
3181 status = check_connection_type(vptr->mac_regs);
3182
3183 cmd->supported = SUPPORTED_TP |
3184 SUPPORTED_Autoneg |
3185 SUPPORTED_10baseT_Half |
3186 SUPPORTED_10baseT_Full |
3187 SUPPORTED_100baseT_Half |
3188 SUPPORTED_100baseT_Full |
3189 SUPPORTED_1000baseT_Half |
3190 SUPPORTED_1000baseT_Full;
3191
3192 cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
3193 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
3194 cmd->advertising |=
3195 ADVERTISED_10baseT_Half |
3196 ADVERTISED_10baseT_Full |
3197 ADVERTISED_100baseT_Half |
3198 ADVERTISED_100baseT_Full |
3199 ADVERTISED_1000baseT_Half |
3200 ADVERTISED_1000baseT_Full;
3201 } else {
3202 switch (vptr->options.spd_dpx) {
3203 case SPD_DPX_1000_FULL:
3204 cmd->advertising |= ADVERTISED_1000baseT_Full;
3205 break;
3206 case SPD_DPX_100_HALF:
3207 cmd->advertising |= ADVERTISED_100baseT_Half;
3208 break;
3209 case SPD_DPX_100_FULL:
3210 cmd->advertising |= ADVERTISED_100baseT_Full;
3211 break;
3212 case SPD_DPX_10_HALF:
3213 cmd->advertising |= ADVERTISED_10baseT_Half;
3214 break;
3215 case SPD_DPX_10_FULL:
3216 cmd->advertising |= ADVERTISED_10baseT_Full;
3217 break;
3218 default:
3219 break;
3220 }
3221 }
3222
3223 if (status & VELOCITY_SPEED_1000)
3224 ethtool_cmd_speed_set(cmd, SPEED_1000);
3225 else if (status & VELOCITY_SPEED_100)
3226 ethtool_cmd_speed_set(cmd, SPEED_100);
3227 else
3228 ethtool_cmd_speed_set(cmd, SPEED_10);
3229
3230 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3231 cmd->port = PORT_TP;
3232 cmd->transceiver = XCVR_INTERNAL;
3233 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3234
3235 if (status & VELOCITY_DUPLEX_FULL)
3236 cmd->duplex = DUPLEX_FULL;
3237 else
3238 cmd->duplex = DUPLEX_HALF;
3239
3240 return 0;
3241 }
3242
3243 static int velocity_set_settings(struct net_device *dev,
3244 struct ethtool_cmd *cmd)
3245 {
3246 struct velocity_info *vptr = netdev_priv(dev);
3247 u32 speed = ethtool_cmd_speed(cmd);
3248 u32 curr_status;
3249 u32 new_status = 0;
3250 int ret = 0;
3251
3252 curr_status = check_connection_type(vptr->mac_regs);
3253 curr_status &= (~VELOCITY_LINK_FAIL);
3254
3255 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3256 new_status |= ((speed == SPEED_1000) ? VELOCITY_SPEED_1000 : 0);
3257 new_status |= ((speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3258 new_status |= ((speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3259 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3260
3261 if ((new_status & VELOCITY_AUTONEG_ENABLE) &&
3262 (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE))) {
3263 ret = -EINVAL;
3264 } else {
3265 enum speed_opt spd_dpx;
3266
3267 if (new_status & VELOCITY_AUTONEG_ENABLE)
3268 spd_dpx = SPD_DPX_AUTO;
3269 else if ((new_status & VELOCITY_SPEED_1000) &&
3270 (new_status & VELOCITY_DUPLEX_FULL)) {
3271 spd_dpx = SPD_DPX_1000_FULL;
3272 } else if (new_status & VELOCITY_SPEED_100)
3273 spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ?
3274 SPD_DPX_100_FULL : SPD_DPX_100_HALF;
3275 else if (new_status & VELOCITY_SPEED_10)
3276 spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ?
3277 SPD_DPX_10_FULL : SPD_DPX_10_HALF;
3278 else
3279 return -EOPNOTSUPP;
3280
3281 vptr->options.spd_dpx = spd_dpx;
3282
3283 velocity_set_media_mode(vptr, new_status);
3284 }
3285
3286 return ret;
3287 }
3288
3289 static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3290 {
3291 struct velocity_info *vptr = netdev_priv(dev);
3292 strcpy(info->driver, VELOCITY_NAME);
3293 strcpy(info->version, VELOCITY_VERSION);
3294 strcpy(info->bus_info, pci_name(vptr->pdev));
3295 }
3296
3297 static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3298 {
3299 struct velocity_info *vptr = netdev_priv(dev);
3300 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3301 wol->wolopts |= WAKE_MAGIC;
3302 /*
3303 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3304 wol.wolopts|=WAKE_PHY;
3305 */
3306 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3307 wol->wolopts |= WAKE_UCAST;
3308 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3309 wol->wolopts |= WAKE_ARP;
3310 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3311 }
3312
3313 static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3314 {
3315 struct velocity_info *vptr = netdev_priv(dev);
3316
3317 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3318 return -EFAULT;
3319 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3320
3321 /*
3322 if (wol.wolopts & WAKE_PHY) {
3323 vptr->wol_opts|=VELOCITY_WOL_PHY;
3324 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3325 }
3326 */
3327
3328 if (wol->wolopts & WAKE_MAGIC) {
3329 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3330 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3331 }
3332 if (wol->wolopts & WAKE_UCAST) {
3333 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3334 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3335 }
3336 if (wol->wolopts & WAKE_ARP) {
3337 vptr->wol_opts |= VELOCITY_WOL_ARP;
3338 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3339 }
3340 memcpy(vptr->wol_passwd, wol->sopass, 6);
3341 return 0;
3342 }
3343
3344 static u32 velocity_get_msglevel(struct net_device *dev)
3345 {
3346 return msglevel;
3347 }
3348
3349 static void velocity_set_msglevel(struct net_device *dev, u32 value)
3350 {
3351 msglevel = value;
3352 }
3353
3354 static int get_pending_timer_val(int val)
3355 {
3356 int mult_bits = val >> 6;
3357 int mult = 1;
3358
3359 switch (mult_bits)
3360 {
3361 case 1:
3362 mult = 4; break;
3363 case 2:
3364 mult = 16; break;
3365 case 3:
3366 mult = 64; break;
3367 case 0:
3368 default:
3369 break;
3370 }
3371
3372 return (val & 0x3f) * mult;
3373 }
3374
3375 static void set_pending_timer_val(int *val, u32 us)
3376 {
3377 u8 mult = 0;
3378 u8 shift = 0;
3379
3380 if (us >= 0x3f) {
3381 mult = 1; /* mult with 4 */
3382 shift = 2;
3383 }
3384 if (us >= 0x3f * 4) {
3385 mult = 2; /* mult with 16 */
3386 shift = 4;
3387 }
3388 if (us >= 0x3f * 16) {
3389 mult = 3; /* mult with 64 */
3390 shift = 6;
3391 }
3392
3393 *val = (mult << 6) | ((us >> shift) & 0x3f);
3394 }
3395
3396
3397 static int velocity_get_coalesce(struct net_device *dev,
3398 struct ethtool_coalesce *ecmd)
3399 {
3400 struct velocity_info *vptr = netdev_priv(dev);
3401
3402 ecmd->tx_max_coalesced_frames = vptr->options.tx_intsup;
3403 ecmd->rx_max_coalesced_frames = vptr->options.rx_intsup;
3404
3405 ecmd->rx_coalesce_usecs = get_pending_timer_val(vptr->options.rxqueue_timer);
3406 ecmd->tx_coalesce_usecs = get_pending_timer_val(vptr->options.txqueue_timer);
3407
3408 return 0;
3409 }
3410
3411 static int velocity_set_coalesce(struct net_device *dev,
3412 struct ethtool_coalesce *ecmd)
3413 {
3414 struct velocity_info *vptr = netdev_priv(dev);
3415 int max_us = 0x3f * 64;
3416 unsigned long flags;
3417
3418 /* 6 bits of */
3419 if (ecmd->tx_coalesce_usecs > max_us)
3420 return -EINVAL;
3421 if (ecmd->rx_coalesce_usecs > max_us)
3422 return -EINVAL;
3423
3424 if (ecmd->tx_max_coalesced_frames > 0xff)
3425 return -EINVAL;
3426 if (ecmd->rx_max_coalesced_frames > 0xff)
3427 return -EINVAL;
3428
3429 vptr->options.rx_intsup = ecmd->rx_max_coalesced_frames;
3430 vptr->options.tx_intsup = ecmd->tx_max_coalesced_frames;
3431
3432 set_pending_timer_val(&vptr->options.rxqueue_timer,
3433 ecmd->rx_coalesce_usecs);
3434 set_pending_timer_val(&vptr->options.txqueue_timer,
3435 ecmd->tx_coalesce_usecs);
3436
3437 /* Setup the interrupt suppression and queue timers */
3438 spin_lock_irqsave(&vptr->lock, flags);
3439 mac_disable_int(vptr->mac_regs);
3440 setup_adaptive_interrupts(vptr);
3441 setup_queue_timers(vptr);
3442
3443 mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
3444 mac_clear_isr(vptr->mac_regs);
3445 mac_enable_int(vptr->mac_regs);
3446 spin_unlock_irqrestore(&vptr->lock, flags);
3447
3448 return 0;
3449 }
3450
3451 static const struct ethtool_ops velocity_ethtool_ops = {
3452 .get_settings = velocity_get_settings,
3453 .set_settings = velocity_set_settings,
3454 .get_drvinfo = velocity_get_drvinfo,
3455 .get_wol = velocity_ethtool_get_wol,
3456 .set_wol = velocity_ethtool_set_wol,
3457 .get_msglevel = velocity_get_msglevel,
3458 .set_msglevel = velocity_set_msglevel,
3459 .get_link = velocity_get_link,
3460 .get_coalesce = velocity_get_coalesce,
3461 .set_coalesce = velocity_set_coalesce,
3462 .begin = velocity_ethtool_up,
3463 .complete = velocity_ethtool_down
3464 };
3465
3466 #ifdef CONFIG_PM
3467 #ifdef CONFIG_INET
3468 static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3469 {
3470 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3471 struct net_device *dev = ifa->ifa_dev->dev;
3472
3473 if (dev_net(dev) == &init_net &&
3474 dev->netdev_ops == &velocity_netdev_ops)
3475 velocity_get_ip(netdev_priv(dev));
3476
3477 return NOTIFY_DONE;
3478 }
3479 #endif /* CONFIG_INET */
3480 #endif /* CONFIG_PM */
3481
3482 #if defined(CONFIG_PM) && defined(CONFIG_INET)
3483 static struct notifier_block velocity_inetaddr_notifier = {
3484 .notifier_call = velocity_netdev_event,
3485 };
3486
3487 static void velocity_register_notifier(void)
3488 {
3489 register_inetaddr_notifier(&velocity_inetaddr_notifier);
3490 }
3491
3492 static void velocity_unregister_notifier(void)
3493 {
3494 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
3495 }
3496
3497 #else
3498
3499 #define velocity_register_notifier() do {} while (0)
3500 #define velocity_unregister_notifier() do {} while (0)
3501
3502 #endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */
3503
3504 /**
3505 * velocity_init_module - load time function
3506 *
3507 * Called when the velocity module is loaded. The PCI driver
3508 * is registered with the PCI layer, and in turn will call
3509 * the probe functions for each velocity adapter installed
3510 * in the system.
3511 */
3512 static int __init velocity_init_module(void)
3513 {
3514 int ret;
3515
3516 velocity_register_notifier();
3517 ret = pci_register_driver(&velocity_driver);
3518 if (ret < 0)
3519 velocity_unregister_notifier();
3520 return ret;
3521 }
3522
3523 /**
3524 * velocity_cleanup - module unload
3525 *
3526 * When the velocity hardware is unloaded this function is called.
3527 * It will clean up the notifiers and the unregister the PCI
3528 * driver interface for this hardware. This in turn cleans up
3529 * all discovered interfaces before returning from the function
3530 */
3531 static void __exit velocity_cleanup_module(void)
3532 {
3533 velocity_unregister_notifier();
3534 pci_unregister_driver(&velocity_driver);
3535 }
3536
3537 module_init(velocity_init_module);
3538 module_exit(velocity_cleanup_module);
Linux 2.6 libata-dev (mirror)