drivers/usb/otg/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/spinlock.h>
  32 #include <linux/workqueue.h>
  33 #include <linux/io.h>
  34 #include <linux/delay.h>
  35 #include <linux/usb/otg.h>
  36 #include <linux/usb/ulpi.h>
  37 #include <linux/i2c/twl.h>
  38 #include <linux/regulator/consumer.h>
  39 #include <linux/err.h>
  40 #include <linux/notifier.h>
  41 #include <linux/slab.h>
  42
  43 /* Register defines */
  44
  45 #define MCPC_CTRL                       0x30
  46 #define MCPC_CTRL_RTSOL                 (1 << 7)
  47 #define MCPC_CTRL_EXTSWR                (1 << 6)
  48 #define MCPC_CTRL_EXTSWC                (1 << 5)
  49 #define MCPC_CTRL_VOICESW               (1 << 4)
  50 #define MCPC_CTRL_OUT64K                (1 << 3)
  51 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
  52 #define MCPC_CTRL_HS_UART               (1 << 0)
  53
  54 #define MCPC_IO_CTRL                    0x33
  55 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
  56 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
  57 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
  58 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
  59 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
  60 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
  61
  62 #define MCPC_CTRL2                      0x36
  63 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
  64
  65 #define OTHER_FUNC_CTRL                 0x80
  66 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
  67 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
  68
  69 #define OTHER_IFC_CTRL                  0x83
  70 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
  71 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
  72 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
  73 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
  74 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
  75 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
  76
  77 #define OTHER_INT_EN_RISE               0x86
  78 #define OTHER_INT_EN_FALL               0x89
  79 #define OTHER_INT_STS                   0x8C
  80 #define OTHER_INT_LATCH                 0x8D
  81 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
  82 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
  83 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
  84 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
  85 #define OTHER_INT_MANU                  (1 << 1)
  86 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
  87
  88 #define ID_STATUS                       0x96
  89 #define ID_RES_FLOAT                    (1 << 4)
  90 #define ID_RES_440K                     (1 << 3)
  91 #define ID_RES_200K                     (1 << 2)
  92 #define ID_RES_102K                     (1 << 1)
  93 #define ID_RES_GND                      (1 << 0)
  94
  95 #define POWER_CTRL                      0xAC
  96 #define POWER_CTRL_OTG_ENAB             (1 << 5)
  97
  98 #define OTHER_IFC_CTRL2                 0xAF
  99 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 100 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 101 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 102 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 103 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 104 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 105
 106 #define REG_CTRL_EN                     0xB2
 107 #define REG_CTRL_ERROR                  0xB5
 108 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 109
 110 #define OTHER_FUNC_CTRL2                0xB8
 111 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 112
 113 /* following registers do not have separate _clr and _set registers */
 114 #define VBUS_DEBOUNCE                   0xC0
 115 #define ID_DEBOUNCE                     0xC1
 116 #define VBAT_TIMER                      0xD3
 117 #define PHY_PWR_CTRL                    0xFD
 118 #define PHY_PWR_PHYPWD                  (1 << 0)
 119 #define PHY_CLK_CTRL                    0xFE
 120 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 121 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 122 #define REQ_PHY_DPLL_CLK                (1 << 0)
 123 #define PHY_CLK_CTRL_STS                0xFF
 124 #define PHY_DPLL_CLK                    (1 << 0)
 125
 126 /* In module TWL4030_MODULE_PM_MASTER */
 127 #define STS_HW_CONDITIONS               0x0F
 128
 129 /* In module TWL4030_MODULE_PM_RECEIVER */
 130 #define VUSB_DEDICATED1                 0x7D
 131 #define VUSB_DEDICATED2                 0x7E
 132 #define VUSB1V5_DEV_GRP                 0x71
 133 #define VUSB1V5_TYPE                    0x72
 134 #define VUSB1V5_REMAP                   0x73
 135 #define VUSB1V8_DEV_GRP                 0x74
 136 #define VUSB1V8_TYPE                    0x75
 137 #define VUSB1V8_REMAP                   0x76
 138 #define VUSB3V1_DEV_GRP                 0x77
 139 #define VUSB3V1_TYPE                    0x78
 140 #define VUSB3V1_REMAP                   0x79
 141
 142 /* In module TWL4030_MODULE_INTBR */
 143 #define PMBR1                           0x0D
 144 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 145
 146 struct twl4030_usb {
 147         struct usb_phy          phy;
 148         struct device           *dev;
 149
 150         /* TWL4030 internal USB regulator supplies */
 151         struct regulator        *usb1v5;
 152         struct regulator        *usb1v8;
 153         struct regulator        *usb3v1;
 154
 155         /* for vbus reporting with irqs disabled */
 156         spinlock_t              lock;
 157
 158         /* pin configuration */
 159         enum twl4030_usb_mode   usb_mode;
 160
 161         int                     irq;
 162         u8                      linkstat;
 163         bool                    vbus_supplied;
 164         u8                      asleep;
 165         bool                    irq_enabled;
 166 };
 167
 168 /* internal define on top of container_of */
 169 #define phy_to_twl(x)           container_of((x), struct twl4030_usb, phy)
 170
 171 /*-------------------------------------------------------------------------*/
 172
 173 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 174                 u8 module, u8 data, u8 address)
 175 {
 176         u8 check;
 177
 178         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 179             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 180                                                 (check == data))
 181                 return 0;
 182         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 183                         1, module, address, check, data);
 184
 185         /* Failed once: Try again */
 186         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 187             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 188                                                 (check == data))
 189                 return 0;
 190         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 191                         2, module, address, check, data);
 192
 193         /* Failed again: Return error */
 194         return -EBUSY;
 195 }
 196
 197 #define twl4030_usb_write_verify(twl, address, data)    \
 198         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
 199
 200 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 201                 u8 address, u8 data)
 202 {
 203         int ret = 0;
 204
 205         ret = twl_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 206         if (ret < 0)
 207                 dev_dbg(twl->dev,
 208                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 209         return ret;
 210 }
 211
 212 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
 213 {
 214         u8 data;
 215         int ret = 0;
 216
 217         ret = twl_i2c_read_u8(module, &data, address);
 218         if (ret >= 0)
 219                 ret = data;
 220         else
 221                 dev_dbg(twl->dev,
 222                         "TWL4030:readb[0x%x,0x%x] Error %d\n",
 223                                         module, address, ret);
 224
 225         return ret;
 226 }
 227
 228 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 229 {
 230         return twl4030_readb(twl, TWL4030_MODULE_USB, address);
 231 }
 232
 233 /*-------------------------------------------------------------------------*/
 234
 235 static inline int
 236 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 237 {
 238         return twl4030_usb_write(twl, ULPI_SET(reg), bits);
 239 }
 240
 241 static inline int
 242 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 243 {
 244         return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
 245 }
 246
 247 /*-------------------------------------------------------------------------*/
 248
 249 static enum usb_phy_events twl4030_usb_linkstat(struct twl4030_usb *twl)
 250 {
 251         int     status;
 252         int     linkstat = USB_EVENT_NONE;
 253         struct usb_otg *otg = twl->phy.otg;
 254
 255         twl->vbus_supplied = false;
 256
 257         /*
 258          * For ID/VBUS sensing, see manual section 15.4.8 ...
 259          * except when using only battery backup power, two
 260          * comparators produce VBUS_PRES and ID_PRES signals,
 261          * which don't match docs elsewhere.  But ... BIT(7)
 262          * and BIT(2) of STS_HW_CONDITIONS, respectively, do
 263          * seem to match up.  If either is true the USB_PRES
 264          * signal is active, the OTG module is activated, and
 265          * its interrupt may be raised (may wake the system).
 266          */
 267         status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER,
 268                         STS_HW_CONDITIONS);
 269         if (status < 0)
 270                 dev_err(twl->dev, "USB link status err %d\n", status);
 271         else if (status & (BIT(7) | BIT(2))) {
 272                 if (status & (BIT(7)))
 273                         twl->vbus_supplied = true;
 274
 275                 if (status & BIT(2))
 276                         linkstat = USB_EVENT_ID;
 277                 else
 278                         linkstat = USB_EVENT_VBUS;
 279         } else
 280                 linkstat = USB_EVENT_NONE;
 281
 282         dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
 283                         status, status, linkstat);
 284
 285         twl->phy.last_event = linkstat;
 286
 287         /* REVISIT this assumes host and peripheral controllers
 288          * are registered, and that both are active...
 289          */
 290
 291         spin_lock_irq(&twl->lock);
 292         twl->linkstat = linkstat;
 293         if (linkstat == USB_EVENT_ID) {
 294                 otg->default_a = true;
 295                 twl->phy.state = OTG_STATE_A_IDLE;
 296         } else {
 297                 otg->default_a = false;
 298                 twl->phy.state = OTG_STATE_B_IDLE;
 299         }
 300         spin_unlock_irq(&twl->lock);
 301
 302         return linkstat;
 303 }
 304
 305 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 306 {
 307         twl->usb_mode = mode;
 308
 309         switch (mode) {
 310         case T2_USB_MODE_ULPI:
 311                 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
 312                                         ULPI_IFC_CTRL_CARKITMODE);
 313                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 314                 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
 315                                         ULPI_FUNC_CTRL_XCVRSEL_MASK |
 316                                         ULPI_FUNC_CTRL_OPMODE_MASK);
 317                 break;
 318         case -1:
 319                 /* FIXME: power on defaults */
 320                 break;
 321         default:
 322                 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
 323                                 mode);
 324                 break;
 325         };
 326 }
 327
 328 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 329 {
 330         unsigned long timeout;
 331         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 332
 333         if (val >= 0) {
 334                 if (on) {
 335                         /* enable DPLL to access PHY registers over I2C */
 336                         val |= REQ_PHY_DPLL_CLK;
 337                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 338                                                 (u8)val) < 0);
 339
 340                         timeout = jiffies + HZ;
 341                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 342                                                         PHY_DPLL_CLK)
 343                                 && time_before(jiffies, timeout))
 344                                         udelay(10);
 345                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 346                                                         PHY_DPLL_CLK))
 347                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 348                                                 "PHY DPLL clock\n");
 349                 } else {
 350                         /* let ULPI control the DPLL clock */
 351                         val &= ~REQ_PHY_DPLL_CLK;
 352                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 353                                                 (u8)val) < 0);
 354                 }
 355         }
 356 }
 357
 358 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
 359 {
 360         u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 361
 362         if (on)
 363                 pwr &= ~PHY_PWR_PHYPWD;
 364         else
 365                 pwr |= PHY_PWR_PHYPWD;
 366
 367         WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 368 }
 369
 370 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 371 {
 372         if (on) {
 373                 regulator_enable(twl->usb3v1);
 374                 regulator_enable(twl->usb1v8);
 375                 /*
 376                  * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
 377                  * in twl4030) resets the VUSB_DEDICATED2 register. This reset
 378                  * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
 379                  * SLEEP. We work around this by clearing the bit after usv3v1
 380                  * is re-activated. This ensures that VUSB3V1 is really active.
 381                  */
 382                 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0,
 383                                                         VUSB_DEDICATED2);
 384                 regulator_enable(twl->usb1v5);
 385                 __twl4030_phy_power(twl, 1);
 386                 twl4030_usb_write(twl, PHY_CLK_CTRL,
 387                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
 388                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 389                                                 PHY_CLK_CTRL_CLK32K_EN));
 390         } else {
 391                 __twl4030_phy_power(twl, 0);
 392                 regulator_disable(twl->usb1v5);
 393                 regulator_disable(twl->usb1v8);
 394                 regulator_disable(twl->usb3v1);
 395         }
 396 }
 397
 398 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
 399 {
 400         if (twl->asleep)
 401                 return;
 402
 403         twl4030_phy_power(twl, 0);
 404         twl->asleep = 1;
 405         dev_dbg(twl->dev, "%s\n", __func__);
 406 }
 407
 408 static void __twl4030_phy_resume(struct twl4030_usb *twl)
 409 {
 410         twl4030_phy_power(twl, 1);
 411         twl4030_i2c_access(twl, 1);
 412         twl4030_usb_set_mode(twl, twl->usb_mode);
 413         if (twl->usb_mode == T2_USB_MODE_ULPI)
 414                 twl4030_i2c_access(twl, 0);
 415 }
 416
 417 static void twl4030_phy_resume(struct twl4030_usb *twl)
 418 {
 419         if (!twl->asleep)
 420                 return;
 421         __twl4030_phy_resume(twl);
 422         twl->asleep = 0;
 423         dev_dbg(twl->dev, "%s\n", __func__);
 424 }
 425
 426 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
 427 {
 428         /* Enable writing to power configuration registers */
 429         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
 430                         TWL4030_PM_MASTER_KEY_CFG1,
 431                         TWL4030_PM_MASTER_PROTECT_KEY);
 432
 433         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
 434                         TWL4030_PM_MASTER_KEY_CFG2,
 435                         TWL4030_PM_MASTER_PROTECT_KEY);
 436
 437         /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
 438         /*twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
 439
 440         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 441         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 442
 443         /* Initialize 3.1V regulator */
 444         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
 445
 446         twl->usb3v1 = regulator_get(twl->dev, "usb3v1");
 447         if (IS_ERR(twl->usb3v1))
 448                 return -ENODEV;
 449
 450         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 451
 452         /* Initialize 1.5V regulator */
 453         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
 454
 455         twl->usb1v5 = regulator_get(twl->dev, "usb1v5");
 456         if (IS_ERR(twl->usb1v5))
 457                 goto fail1;
 458
 459         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 460
 461         /* Initialize 1.8V regulator */
 462         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
 463
 464         twl->usb1v8 = regulator_get(twl->dev, "usb1v8");
 465         if (IS_ERR(twl->usb1v8))
 466                 goto fail2;
 467
 468         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 469
 470         /* disable access to power configuration registers */
 471         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
 472                         TWL4030_PM_MASTER_PROTECT_KEY);
 473
 474         return 0;
 475
 476 fail2:
 477         regulator_put(twl->usb1v5);
 478         twl->usb1v5 = NULL;
 479 fail1:
 480         regulator_put(twl->usb3v1);
 481         twl->usb3v1 = NULL;
 482         return -ENODEV;
 483 }
 484
 485 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 486                 struct device_attribute *attr, char *buf)
 487 {
 488         struct twl4030_usb *twl = dev_get_drvdata(dev);
 489         unsigned long flags;
 490         int ret = -EINVAL;
 491
 492         spin_lock_irqsave(&twl->lock, flags);
 493         ret = sprintf(buf, "%s\n",
 494                         twl->vbus_supplied ? "on" : "off");
 495         spin_unlock_irqrestore(&twl->lock, flags);
 496
 497         return ret;
 498 }
 499 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 500
 501 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 502 {
 503         struct twl4030_usb *twl = _twl;
 504         int status;
 505
 506         status = twl4030_usb_linkstat(twl);
 507         if (status >= 0) {
 508                 /* FIXME add a set_power() method so that B-devices can
 509                  * configure the charger appropriately.  It's not always
 510                  * correct to consume VBUS power, and how much current to
 511                  * consume is a function of the USB configuration chosen
 512                  * by the host.
 513                  *
 514                  * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
 515                  * its disconnect() sibling, when changing to/from the
 516                  * USB_LINK_VBUS state.  musb_hdrc won't care until it
 517                  * starts to handle softconnect right.
 518                  */
 519                 if (status == USB_EVENT_NONE)
 520                         twl4030_phy_suspend(twl, 0);
 521                 else
 522                         twl4030_phy_resume(twl);
 523
 524                 atomic_notifier_call_chain(&twl->phy.notifier, status,
 525                                 twl->phy.otg->gadget);
 526         }
 527         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 528
 529         return IRQ_HANDLED;
 530 }
 531
 532 static void twl4030_usb_phy_init(struct twl4030_usb *twl)
 533 {
 534         int status;
 535
 536         status = twl4030_usb_linkstat(twl);
 537         if (status >= 0) {
 538                 if (status == USB_EVENT_NONE) {
 539                         __twl4030_phy_power(twl, 0);
 540                         twl->asleep = 1;
 541                 } else {
 542                         __twl4030_phy_resume(twl);
 543                         twl->asleep = 0;
 544                 }
 545
 546                 atomic_notifier_call_chain(&twl->phy.notifier, status,
 547                                 twl->phy.otg->gadget);
 548         }
 549         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 550 }
 551
 552 static int twl4030_set_suspend(struct usb_phy *x, int suspend)
 553 {
 554         struct twl4030_usb *twl = phy_to_twl(x);
 555
 556         if (suspend)
 557                 twl4030_phy_suspend(twl, 1);
 558         else
 559                 twl4030_phy_resume(twl);
 560
 561         return 0;
 562 }
 563
 564 static int twl4030_set_peripheral(struct usb_otg *otg,
 565                                         struct usb_gadget *gadget)
 566 {
 567         if (!otg)
 568                 return -ENODEV;
 569
 570         otg->gadget = gadget;
 571         if (!gadget)
 572                 otg->phy->state = OTG_STATE_UNDEFINED;
 573
 574         return 0;
 575 }
 576
 577 static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host)
 578 {
 579         if (!otg)
 580                 return -ENODEV;
 581
 582         otg->host = host;
 583         if (!host)
 584                 otg->phy->state = OTG_STATE_UNDEFINED;
 585
 586         return 0;
 587 }
 588
 589 static int __devinit twl4030_usb_probe(struct platform_device *pdev)
 590 {
 591         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
 592         struct twl4030_usb      *twl;
 593         int                     status, err;
 594         struct usb_otg          *otg;
 595
 596         if (!pdata) {
 597                 dev_dbg(&pdev->dev, "platform_data not available\n");
 598                 return -EINVAL;
 599         }
 600
 601         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 602         if (!twl)
 603                 return -ENOMEM;
 604
 605         otg = kzalloc(sizeof *otg, GFP_KERNEL);
 606         if (!otg) {
 607                 kfree(twl);
 608                 return -ENOMEM;
 609         }
 610
 611         twl->dev                = &pdev->dev;
 612         twl->irq                = platform_get_irq(pdev, 0);
 613         twl->usb_mode           = pdata->usb_mode;
 614         twl->vbus_supplied      = false;
 615         twl->asleep             = 1;
 616
 617         twl->phy.dev            = twl->dev;
 618         twl->phy.label          = "twl4030";
 619         twl->phy.otg            = otg;
 620         twl->phy.set_suspend    = twl4030_set_suspend;
 621
 622         otg->phy                = &twl->phy;
 623         otg->set_host           = twl4030_set_host;
 624         otg->set_peripheral     = twl4030_set_peripheral;
 625
 626         /* init spinlock for workqueue */
 627         spin_lock_init(&twl->lock);
 628
 629         err = twl4030_usb_ldo_init(twl);
 630         if (err) {
 631                 dev_err(&pdev->dev, "ldo init failed\n");
 632                 kfree(otg);
 633                 kfree(twl);
 634                 return err;
 635         }
 636         usb_set_transceiver(&twl->phy);
 637
 638         platform_set_drvdata(pdev, twl);
 639         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 640                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 641
 642         ATOMIC_INIT_NOTIFIER_HEAD(&twl->phy.notifier);
 643
 644         /* Our job is to use irqs and status from the power module
 645          * to keep the transceiver disabled when nothing's connected.
 646          *
 647          * FIXME we actually shouldn't start enabling it until the
 648          * USB controller drivers have said they're ready, by calling
 649          * set_host() and/or set_peripheral() ... OTG_capable boards
 650          * need both handles, otherwise just one suffices.
 651          */
 652         twl->irq_enabled = true;
 653         status = request_threaded_irq(twl->irq, NULL, twl4030_usb_irq,
 654                         IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 655                         "twl4030_usb", twl);
 656         if (status < 0) {
 657                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 658                         twl->irq, status);
 659                 kfree(otg);
 660                 kfree(twl);
 661                 return status;
 662         }
 663
 664         /* Power down phy or make it work according to
 665          * current link state.
 666          */
 667         twl4030_usb_phy_init(twl);
 668
 669         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 670         return 0;
 671 }
 672
 673 static int __exit twl4030_usb_remove(struct platform_device *pdev)
 674 {
 675         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 676         int val;
 677
 678         free_irq(twl->irq, twl);
 679         device_remove_file(twl->dev, &dev_attr_vbus);
 680
 681         /* set transceiver mode to power on defaults */
 682         twl4030_usb_set_mode(twl, -1);
 683
 684         /* autogate 60MHz ULPI clock,
 685          * clear dpll clock request for i2c access,
 686          * disable 32KHz
 687          */
 688         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 689         if (val >= 0) {
 690                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 691                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 692                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 693         }
 694
 695         /* disable complete OTG block */
 696         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 697
 698         if (!twl->asleep)
 699                 twl4030_phy_power(twl, 0);
 700         regulator_put(twl->usb1v5);
 701         regulator_put(twl->usb1v8);
 702         regulator_put(twl->usb3v1);
 703
 704         kfree(twl->phy.otg);
 705         kfree(twl);
 706
 707         return 0;
 708 }
 709
 710 static struct platform_driver twl4030_usb_driver = {
 711         .probe          = twl4030_usb_probe,
 712         .remove         = __exit_p(twl4030_usb_remove),
 713         .driver         = {
 714                 .name   = "twl4030_usb",
 715                 .owner  = THIS_MODULE,
 716         },
 717 };
 718
 719 static int __init twl4030_usb_init(void)
 720 {
 721         return platform_driver_register(&twl4030_usb_driver);
 722 }
 723 subsys_initcall(twl4030_usb_init);
 724
 725 static void __exit twl4030_usb_exit(void)
 726 {
 727         platform_driver_unregister(&twl4030_usb_driver);
 728 }
 729 module_exit(twl4030_usb_exit);
 730
 731 MODULE_ALIAS("platform:twl4030_usb");
 732 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 733 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 734 MODULE_LICENSE("GPL");