arch/mips/lantiq/prom.c

   1 /*
   2  *  This program is free software; you can redistribute it and/or modify it
   3  *  under the terms of the GNU General Public License version 2 as published
   4  *  by the Free Software Foundation.
   5  *
   6  * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
   7  */
   8
   9 #include <linux/export.h>
  10 #include <linux/clk.h>
  11 #include <linux/bootmem.h>
  12 #include <linux/of_platform.h>
  13 #include <linux/of_fdt.h>
  14
  15 #include <asm/bootinfo.h>
  16 #include <asm/time.h>
  17
  18 #include <lantiq.h>
  19
  20 #include "prom.h"
  21 #include "clk.h"
  22
  23 /* access to the ebu needs to be locked between different drivers */
  24 DEFINE_SPINLOCK(ebu_lock);
  25 EXPORT_SYMBOL_GPL(ebu_lock);
  26
  27 /*
  28  * this struct is filled by the soc specific detection code and holds
  29  * information about the specific soc type, revision and name
  30  */
  31 static struct ltq_soc_info soc_info;
  32
  33 const char *get_system_type(void)
  34 {
  35         return soc_info.sys_type;
  36 }
  37
  38 void prom_free_prom_memory(void)
  39 {
  40 }
  41
  42 static void __init prom_init_cmdline(void)
  43 {
  44         int argc = fw_arg0;
  45         char **argv = (char **) KSEG1ADDR(fw_arg1);
  46         int i;
  47
  48         arcs_cmdline[0] = '\0';
  49
  50         for (i = 0; i < argc; i++) {
  51                 char *p = (char *) KSEG1ADDR(argv[i]);
  52
  53                 if (CPHYSADDR(p) && *p) {
  54                         strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
  55                         strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
  56                 }
  57         }
  58 }
  59
  60 void __init plat_mem_setup(void)
  61 {
  62         ioport_resource.start = IOPORT_RESOURCE_START;
  63         ioport_resource.end = IOPORT_RESOURCE_END;
  64         iomem_resource.start = IOMEM_RESOURCE_START;
  65         iomem_resource.end = IOMEM_RESOURCE_END;
  66
  67         set_io_port_base((unsigned long) KSEG1);
  68
  69         /*
  70          * Load the builtin devicetree. This causes the chosen node to be
  71          * parsed resulting in our memory appearing
  72          */
  73         __dt_setup_arch(&__dtb_start);
  74 }
  75
  76 void __init device_tree_init(void)
  77 {
  78         unsigned long base, size;
  79
  80         if (!initial_boot_params)
  81                 return;
  82
  83         base = virt_to_phys((void *)initial_boot_params);
  84         size = be32_to_cpu(initial_boot_params->totalsize);
  85
  86         /* Before we do anything, lets reserve the dt blob */
  87         reserve_bootmem(base, size, BOOTMEM_DEFAULT);
  88
  89         unflatten_device_tree();
  90
  91         /* free the space reserved for the dt blob */
  92         free_bootmem(base, size);
  93 }
  94
  95 void __init prom_init(void)
  96 {
  97         /* call the soc specific detetcion code and get it to fill soc_info */
  98         ltq_soc_detect(&soc_info);
  99         snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s",
 100                 soc_info.name, soc_info.rev_type);
 101         soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';
 102         pr_info("SoC: %s\n", soc_info.sys_type);
 103         prom_init_cmdline();
 104
 105 #if defined(CONFIG_MIPS_MT_SMP)
 106         if (register_vsmp_smp_ops())
 107                 panic("failed to register_vsmp_smp_ops()");
 108 #endif
 109 }
 110
 111 int __init plat_of_setup(void)
 112 {
 113         static struct of_device_id of_ids[3];
 114
 115         if (!of_have_populated_dt())
 116                 panic("device tree not present");
 117
 118         strncpy(of_ids[0].compatible, soc_info.compatible,
 119                 sizeof(of_ids[0].compatible));
 120         strncpy(of_ids[1].compatible, "simple-bus",
 121                 sizeof(of_ids[1].compatible));
 122         return of_platform_bus_probe(NULL, of_ids, NULL);
 123 }
 124
 125 arch_initcall(plat_of_setup);