| blob | 73afd11799ca7c10cfa015a3b0c83435a7003e9d |
1 /*
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 *
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
7 */
9 .text
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeature.h>
23 #include <asm/percpu.h>
24 #include <asm/nops.h>
26 /* Physical address */
27 #define pa(X) ((X) - __PAGE_OFFSET)
29 /*
30 * References to members of the new_cpu_data structure.
31 */
33 #define X86 new_cpu_data+CPUINFO_x86
34 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
35 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
36 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
37 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
38 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
39 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
40 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
42 /*
43 * This is how much memory in addition to the memory covered up to
44 * and including _end we need mapped initially.
45 * We need:
46 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
47 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
48 *
49 * Modulo rounding, each megabyte assigned here requires a kilobyte of
50 * memory, which is currently unreclaimed.
51 *
52 * This should be a multiple of a page.
53 *
54 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
55 * and small than max_low_pfn, otherwise will waste some page table entries
56 */
58 #if PTRS_PER_PMD > 1
59 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
60 #else
61 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
62 #endif
64 /* Number of possible pages in the lowmem region */
65 LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT)
67 /* Enough space to fit pagetables for the low memory linear map */
68 MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
70 /*
71 * Worst-case size of the kernel mapping we need to make:
72 * a relocatable kernel can live anywhere in lowmem, so we need to be able
73 * to map all of lowmem.
74 */
75 KERNEL_PAGES = LOWMEM_PAGES
77 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
78 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
80 /*
81 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
82 * %esi points to the real-mode code as a 32-bit pointer.
83 * CS and DS must be 4 GB flat segments, but we don't depend on
84 * any particular GDT layout, because we load our own as soon as we
85 * can.
86 */
87 __HEAD
88 ENTRY(startup_32)
89 movl pa(stack_start),%ecx
91 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
92 us to not reload segments */
93 testb $(1<<6), BP_loadflags(%esi)
94 jnz 2f
96 /*
97 * Set segments to known values.
98 */
99 lgdt pa(boot_gdt_descr)
100 movl $(__BOOT_DS),%eax
101 movl %eax,%ds
102 movl %eax,%es
103 movl %eax,%fs
104 movl %eax,%gs
105 movl %eax,%ss
106 2:
107 leal -__PAGE_OFFSET(%ecx),%esp
109 /*
110 * Clear BSS first so that there are no surprises...
111 */
112 cld
113 xorl %eax,%eax
114 movl $pa(__bss_start),%edi
115 movl $pa(__bss_stop),%ecx
116 subl %edi,%ecx
117 shrl $2,%ecx
118 rep ; stosl
119 /*
120 * Copy bootup parameters out of the way.
121 * Note: %esi still has the pointer to the real-mode data.
122 * With the kexec as boot loader, parameter segment might be loaded beyond
123 * kernel image and might not even be addressable by early boot page tables.
124 * (kexec on panic case). Hence copy out the parameters before initializing
125 * page tables.
126 */
127 movl $pa(boot_params),%edi
128 movl $(PARAM_SIZE/4),%ecx
129 cld
130 rep
131 movsl
132 movl pa(boot_params) + NEW_CL_POINTER,%esi
133 andl %esi,%esi
134 jz 1f # No command line
135 movl $pa(boot_command_line),%edi
136 movl $(COMMAND_LINE_SIZE/4),%ecx
137 rep
138 movsl
139 1:
141 #ifdef CONFIG_OLPC
142 /* save OFW's pgdir table for later use when calling into OFW */
143 movl %cr3, %eax
144 movl %eax, pa(olpc_ofw_pgd)
145 #endif
147 #ifdef CONFIG_MICROCODE_EARLY
148 /* Early load ucode on BSP. */
149 call load_ucode_bsp
150 #endif
152 /*
153 * Initialize page tables. This creates a PDE and a set of page
154 * tables, which are located immediately beyond __brk_base. The variable
155 * _brk_end is set up to point to the first "safe" location.
156 * Mappings are created both at virtual address 0 (identity mapping)
157 * and PAGE_OFFSET for up to _end.
158 */
159 #ifdef CONFIG_X86_PAE
161 /*
162 * In PAE mode initial_page_table is statically defined to contain
163 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
164 * entries). The identity mapping is handled by pointing two PGD entries
165 * to the first kernel PMD.
166 *
167 * Note the upper half of each PMD or PTE are always zero at this stage.
168 */
170 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
172 xorl %ebx,%ebx /* %ebx is kept at zero */
174 movl $pa(__brk_base), %edi
175 movl $pa(initial_pg_pmd), %edx
176 movl $PTE_IDENT_ATTR, %eax
177 10:
178 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
179 movl %ecx,(%edx) /* Store PMD entry */
180 /* Upper half already zero */
181 addl $8,%edx
182 movl $512,%ecx
183 11:
184 stosl
185 xchgl %eax,%ebx
186 stosl
187 xchgl %eax,%ebx
188 addl $0x1000,%eax
189 loop 11b
191 /*
192 * End condition: we must map up to the end + MAPPING_BEYOND_END.
193 */
194 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
195 cmpl %ebp,%eax
196 jb 10b
197 1:
198 addl $__PAGE_OFFSET, %edi
199 movl %edi, pa(_brk_end)
200 shrl $12, %eax
201 movl %eax, pa(max_pfn_mapped)
203 /* Do early initialization of the fixmap area */
204 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
205 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
206 #else /* Not PAE */
208 page_pde_offset = (__PAGE_OFFSET >> 20);
210 movl $pa(__brk_base), %edi
211 movl $pa(initial_page_table), %edx
212 movl $PTE_IDENT_ATTR, %eax
213 10:
214 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
215 movl %ecx,(%edx) /* Store identity PDE entry */
216 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
217 addl $4,%edx
218 movl $1024, %ecx
219 11:
220 stosl
221 addl $0x1000,%eax
222 loop 11b
223 /*
224 * End condition: we must map up to the end + MAPPING_BEYOND_END.
225 */
226 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
227 cmpl %ebp,%eax
228 jb 10b
229 addl $__PAGE_OFFSET, %edi
230 movl %edi, pa(_brk_end)
231 shrl $12, %eax
232 movl %eax, pa(max_pfn_mapped)
234 /* Do early initialization of the fixmap area */
235 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
236 movl %eax,pa(initial_page_table+0xffc)
237 #endif
239 #ifdef CONFIG_PARAVIRT
240 /* This is can only trip for a broken bootloader... */
241 cmpw $0x207, pa(boot_params + BP_version)
242 jb default_entry
244 /* Paravirt-compatible boot parameters. Look to see what architecture
245 we're booting under. */
246 movl pa(boot_params + BP_hardware_subarch), %eax
247 cmpl $num_subarch_entries, %eax
248 jae bad_subarch
250 movl pa(subarch_entries)(,%eax,4), %eax
251 subl $__PAGE_OFFSET, %eax
252 jmp *%eax
254 bad_subarch:
255 WEAK(lguest_entry)
256 WEAK(xen_entry)
257 /* Unknown implementation; there's really
258 nothing we can do at this point. */
259 ud2a
261 __INITDATA
263 subarch_entries:
264 .long default_entry /* normal x86/PC */
265 .long lguest_entry /* lguest hypervisor */
266 .long xen_entry /* Xen hypervisor */
267 .long default_entry /* Moorestown MID */
268 num_subarch_entries = (. - subarch_entries) / 4
269 .previous
270 #else
271 jmp default_entry
272 #endif /* CONFIG_PARAVIRT */
274 #ifdef CONFIG_HOTPLUG_CPU
275 /*
276 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
277 * up already except stack. We just set up stack here. Then call
278 * start_secondary().
279 */
280 ENTRY(start_cpu0)
281 movl stack_start, %ecx
282 movl %ecx, %esp
283 jmp *(initial_code)
284 ENDPROC(start_cpu0)
285 #endif
287 /*
288 * Non-boot CPU entry point; entered from trampoline.S
289 * We can't lgdt here, because lgdt itself uses a data segment, but
290 * we know the trampoline has already loaded the boot_gdt for us.
291 *
292 * If cpu hotplug is not supported then this code can go in init section
293 * which will be freed later
294 */
295 __CPUINIT
296 ENTRY(startup_32_smp)
297 cld
298 movl $(__BOOT_DS),%eax
299 movl %eax,%ds
300 movl %eax,%es
301 movl %eax,%fs
302 movl %eax,%gs
303 movl pa(stack_start),%ecx
304 movl %eax,%ss
305 leal -__PAGE_OFFSET(%ecx),%esp
307 #ifdef CONFIG_MICROCODE_EARLY
308 /* Early load ucode on AP. */
309 call load_ucode_ap
310 #endif
313 default_entry:
314 #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
315 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
316 X86_CR0_PG)
317 movl $(CR0_STATE & ~X86_CR0_PG),%eax
318 movl %eax,%cr0
320 /*
321 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
322 * bits like NT set. This would confuse the debugger if this code is traced. So
323 * initialize them properly now before switching to protected mode. That means
324 * DF in particular (even though we have cleared it earlier after copying the
325 * command line) because GCC expects it.
326 */
327 pushl $0
328 popfl
330 /*
331 * New page tables may be in 4Mbyte page mode and may be using the global pages.
332 *
333 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
334 * if and only if CPUID exists and has flags other than the FPU flag set.
335 */
336 movl $-1,pa(X86_CPUID) # preset CPUID level
337 movl $X86_EFLAGS_ID,%ecx
338 pushl %ecx
339 popfl # set EFLAGS=ID
340 pushfl
341 popl %eax # get EFLAGS
342 testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set?
343 jz enable_paging # hw disallowed setting of ID bit
344 # which means no CPUID and no CR4
346 xorl %eax,%eax
347 cpuid
348 movl %eax,pa(X86_CPUID) # save largest std CPUID function
350 movl $1,%eax
351 cpuid
352 andl $~1,%edx # Ignore CPUID.FPU
353 jz enable_paging # No flags or only CPUID.FPU = no CR4
355 movl pa(mmu_cr4_features),%eax
356 movl %eax,%cr4
358 testb $X86_CR4_PAE, %al # check if PAE is enabled
359 jz enable_paging
361 /* Check if extended functions are implemented */
362 movl $0x80000000, %eax
363 cpuid
364 /* Value must be in the range 0x80000001 to 0x8000ffff */
365 subl $0x80000001, %eax
366 cmpl $(0x8000ffff-0x80000001), %eax
367 ja enable_paging
369 /* Clear bogus XD_DISABLE bits */
370 call verify_cpu
372 mov $0x80000001, %eax
373 cpuid
374 /* Execute Disable bit supported? */
375 btl $(X86_FEATURE_NX & 31), %edx
376 jnc enable_paging
378 /* Setup EFER (Extended Feature Enable Register) */
379 movl $MSR_EFER, %ecx
380 rdmsr
382 btsl $_EFER_NX, %eax
383 /* Make changes effective */
384 wrmsr
386 enable_paging:
388 /*
389 * Enable paging
390 */
391 movl $pa(initial_page_table), %eax
392 movl %eax,%cr3 /* set the page table pointer.. */
393 movl $CR0_STATE,%eax
394 movl %eax,%cr0 /* ..and set paging (PG) bit */
395 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
396 1:
397 /* Shift the stack pointer to a virtual address */
398 addl $__PAGE_OFFSET, %esp
400 /*
401 * start system 32-bit setup. We need to re-do some of the things done
402 * in 16-bit mode for the "real" operations.
403 */
404 movl setup_once_ref,%eax
405 andl %eax,%eax
406 jz 1f # Did we do this already?
407 call *%eax
408 1:
410 /*
411 * Check if it is 486
412 */
413 cmpl $-1,X86_CPUID
414 je is486
416 /* get vendor info */
417 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
418 cpuid
419 movl %eax,X86_CPUID # save CPUID level
420 movl %ebx,X86_VENDOR_ID # lo 4 chars
421 movl %edx,X86_VENDOR_ID+4 # next 4 chars
422 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
424 orl %eax,%eax # do we have processor info as well?
425 je is486
427 movl $1,%eax # Use the CPUID instruction to get CPU type
428 cpuid
429 movb %al,%cl # save reg for future use
430 andb $0x0f,%ah # mask processor family
431 movb %ah,X86
432 andb $0xf0,%al # mask model
433 shrb $4,%al
434 movb %al,X86_MODEL
435 andb $0x0f,%cl # mask mask revision
436 movb %cl,X86_MASK
437 movl %edx,X86_CAPABILITY
439 is486:
440 movb $4,X86
441 movl $0x50022,%ecx # set AM, WP, NE and MP
442 movl %cr0,%eax
443 andl $0x80000011,%eax # Save PG,PE,ET
444 orl %ecx,%eax
445 movl %eax,%cr0
447 call check_x87
448 lgdt early_gdt_descr
449 lidt idt_descr
450 ljmp $(__KERNEL_CS),$1f
451 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
452 movl %eax,%ss # after changing gdt.
454 movl $(__USER_DS),%eax # DS/ES contains default USER segment
455 movl %eax,%ds
456 movl %eax,%es
458 movl $(__KERNEL_PERCPU), %eax
459 movl %eax,%fs # set this cpu's percpu
461 movl $(__KERNEL_STACK_CANARY),%eax
462 movl %eax,%gs
464 xorl %eax,%eax # Clear LDT
465 lldt %ax
467 pushl $0 # fake return address for unwinder
468 jmp *(initial_code)
470 /*
471 * We depend on ET to be correct. This checks for 287/387.
472 */
473 check_x87:
474 movb $0,X86_HARD_MATH
475 clts
476 fninit
477 fstsw %ax
478 cmpb $0,%al
479 je 1f
480 movl %cr0,%eax /* no coprocessor: have to set bits */
481 xorl $4,%eax /* set EM */
482 movl %eax,%cr0
483 ret
484 ALIGN
485 1: movb $1,X86_HARD_MATH
486 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
487 ret
490 #include "verify_cpu.S"
492 /*
493 * setup_once
494 *
495 * The setup work we only want to run on the BSP.
496 *
497 * Warning: %esi is live across this function.
498 */
499 __INIT
500 setup_once:
501 /*
502 * Set up a idt with 256 entries pointing to ignore_int,
503 * interrupt gates. It doesn't actually load idt - that needs
504 * to be done on each CPU. Interrupts are enabled elsewhere,
505 * when we can be relatively sure everything is ok.
506 */
508 movl $idt_table,%edi
509 movl $early_idt_handlers,%eax
510 movl $NUM_EXCEPTION_VECTORS,%ecx
511 1:
512 movl %eax,(%edi)
513 movl %eax,4(%edi)
514 /* interrupt gate, dpl=0, present */
515 movl $(0x8E000000 + __KERNEL_CS),2(%edi)
516 addl $9,%eax
517 addl $8,%edi
518 loop 1b
520 movl $256 - NUM_EXCEPTION_VECTORS,%ecx
521 movl $ignore_int,%edx
522 movl $(__KERNEL_CS << 16),%eax
523 movw %dx,%ax /* selector = 0x0010 = cs */
524 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
525 2:
526 movl %eax,(%edi)
527 movl %edx,4(%edi)
528 addl $8,%edi
529 loop 2b
531 #ifdef CONFIG_CC_STACKPROTECTOR
532 /*
533 * Configure the stack canary. The linker can't handle this by
534 * relocation. Manually set base address in stack canary
535 * segment descriptor.
536 */
537 movl $gdt_page,%eax
538 movl $stack_canary,%ecx
539 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
540 shrl $16, %ecx
541 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
542 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
543 #endif
545 andl $0,setup_once_ref /* Once is enough, thanks */
546 ret
548 ENTRY(early_idt_handlers)
549 # 36(%esp) %eflags
550 # 32(%esp) %cs
551 # 28(%esp) %eip
552 # 24(%rsp) error code
553 i = 0
554 .rept NUM_EXCEPTION_VECTORS
555 .if (EXCEPTION_ERRCODE_MASK >> i) & 1
556 ASM_NOP2
557 .else
558 pushl $0 # Dummy error code, to make stack frame uniform
559 .endif
560 pushl $i # 20(%esp) Vector number
561 jmp early_idt_handler
562 i = i + 1
563 .endr
564 ENDPROC(early_idt_handlers)
566 /* This is global to keep gas from relaxing the jumps */
567 ENTRY(early_idt_handler)
568 cld
569 cmpl $2,%ss:early_recursion_flag
570 je hlt_loop
571 incl %ss:early_recursion_flag
573 push %eax # 16(%esp)
574 push %ecx # 12(%esp)
575 push %edx # 8(%esp)
576 push %ds # 4(%esp)
577 push %es # 0(%esp)
578 movl $(__KERNEL_DS),%eax
579 movl %eax,%ds
580 movl %eax,%es
582 cmpl $(__KERNEL_CS),32(%esp)
583 jne 10f
585 leal 28(%esp),%eax # Pointer to %eip
586 call early_fixup_exception
587 andl %eax,%eax
588 jnz ex_entry /* found an exception entry */
590 10:
591 #ifdef CONFIG_PRINTK
592 xorl %eax,%eax
593 movw %ax,2(%esp) /* clean up the segment values on some cpus */
594 movw %ax,6(%esp)
595 movw %ax,34(%esp)
596 leal 40(%esp),%eax
597 pushl %eax /* %esp before the exception */
598 pushl %ebx
599 pushl %ebp
600 pushl %esi
601 pushl %edi
602 movl %cr2,%eax
603 pushl %eax
604 pushl (20+6*4)(%esp) /* trapno */
605 pushl $fault_msg
606 call printk
607 #endif
608 call dump_stack
609 hlt_loop:
610 hlt
611 jmp hlt_loop
613 ex_entry:
614 pop %es
615 pop %ds
616 pop %edx
617 pop %ecx
618 pop %eax
619 addl $8,%esp /* drop vector number and error code */
620 decl %ss:early_recursion_flag
621 iret
622 ENDPROC(early_idt_handler)
624 /* This is the default interrupt "handler" :-) */
625 ALIGN
626 ignore_int:
627 cld
628 #ifdef CONFIG_PRINTK
629 pushl %eax
630 pushl %ecx
631 pushl %edx
632 pushl %es
633 pushl %ds
634 movl $(__KERNEL_DS),%eax
635 movl %eax,%ds
636 movl %eax,%es
637 cmpl $2,early_recursion_flag
638 je hlt_loop
639 incl early_recursion_flag
640 pushl 16(%esp)
641 pushl 24(%esp)
642 pushl 32(%esp)
643 pushl 40(%esp)
644 pushl $int_msg
645 call printk
647 call dump_stack
649 addl $(5*4),%esp
650 popl %ds
651 popl %es
652 popl %edx
653 popl %ecx
654 popl %eax
655 #endif
656 iret
657 ENDPROC(ignore_int)
658 __INITDATA
659 .align 4
660 early_recursion_flag:
661 .long 0
663 __REFDATA
664 .align 4
665 ENTRY(initial_code)
666 .long i386_start_kernel
667 ENTRY(setup_once_ref)
668 .long setup_once
670 /*
671 * BSS section
672 */
673 __PAGE_ALIGNED_BSS
674 .align PAGE_SIZE
675 #ifdef CONFIG_X86_PAE
676 initial_pg_pmd:
677 .fill 1024*KPMDS,4,0
678 #else
679 ENTRY(initial_page_table)
680 .fill 1024,4,0
681 #endif
682 initial_pg_fixmap:
683 .fill 1024,4,0
684 ENTRY(empty_zero_page)
685 .fill 4096,1,0
686 ENTRY(swapper_pg_dir)
687 .fill 1024,4,0
689 /*
690 * This starts the data section.
691 */
692 #ifdef CONFIG_X86_PAE
693 __PAGE_ALIGNED_DATA
694 /* Page-aligned for the benefit of paravirt? */
695 .align PAGE_SIZE
696 ENTRY(initial_page_table)
697 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
698 # if KPMDS == 3
699 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
700 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
701 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
702 # elif KPMDS == 2
703 .long 0,0
704 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
705 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
706 # elif KPMDS == 1
707 .long 0,0
708 .long 0,0
709 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
710 # else
711 # error "Kernel PMDs should be 1, 2 or 3"
712 # endif
713 .align PAGE_SIZE /* needs to be page-sized too */
714 #endif
716 .data
717 .balign 4
718 ENTRY(stack_start)
719 .long init_thread_union+THREAD_SIZE
721 __INITRODATA
722 int_msg:
723 .asciz "Unknown interrupt or fault at: %p %p %p\n"
725 fault_msg:
726 /* fault info: */
727 .ascii "BUG: Int %d: CR2 %p\n"
728 /* regs pushed in early_idt_handler: */
729 .ascii " EDI %p ESI %p EBP %p EBX %p\n"
730 .ascii " ESP %p ES %p DS %p\n"
731 .ascii " EDX %p ECX %p EAX %p\n"
732 /* fault frame: */
733 .ascii " vec %p err %p EIP %p CS %p flg %p\n"
734 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
735 .ascii " %p %p %p %p %p %p %p %p\n"
736 .asciz " %p %p %p %p %p %p %p %p\n"
738 #include "../../x86/xen/xen-head.S"
740 /*
741 * The IDT and GDT 'descriptors' are a strange 48-bit object
742 * only used by the lidt and lgdt instructions. They are not
743 * like usual segment descriptors - they consist of a 16-bit
744 * segment size, and 32-bit linear address value:
745 */
747 .data
748 .globl boot_gdt_descr
749 .globl idt_descr
751 ALIGN
752 # early boot GDT descriptor (must use 1:1 address mapping)
753 .word 0 # 32 bit align gdt_desc.address
754 boot_gdt_descr:
755 .word __BOOT_DS+7
756 .long boot_gdt - __PAGE_OFFSET
758 .word 0 # 32-bit align idt_desc.address
759 idt_descr:
760 .word IDT_ENTRIES*8-1 # idt contains 256 entries
761 .long idt_table
763 # boot GDT descriptor (later on used by CPU#0):
764 .word 0 # 32 bit align gdt_desc.address
765 ENTRY(early_gdt_descr)
766 .word GDT_ENTRIES*8-1
767 .long gdt_page /* Overwritten for secondary CPUs */
769 /*
770 * The boot_gdt must mirror the equivalent in setup.S and is
771 * used only for booting.
772 */
773 .align L1_CACHE_BYTES
774 ENTRY(boot_gdt)
775 .fill GDT_ENTRY_BOOT_CS,8,0
776 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
777 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */