2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
44 0x00, /* this register not used */
45 0x00, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x00, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0f, /* REG_ATXL1PGA (0xA) */
55 0x0f, /* REG_ATXR1PGA (0xB) */
56 0x0f, /* REG_AVTXL2PGA (0xC) */
57 0x0f, /* REG_AVTXR2PGA (0xD) */
58 0x00, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x3f, /* REG_ARXR1PGA (0x10) */
61 0x3f, /* REG_ARXL1PGA (0x11) */
62 0x3f, /* REG_ARXR2PGA (0x12) */
63 0x3f, /* REG_ARXL2PGA (0x13) */
64 0x25, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x00, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x55, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x00, /* REG_HS_SEL (0x22) */
79 0x00, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x05, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x13, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x79, /* REG_DTMF_TONOFF (0x35) */
98 0x11, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x06, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x32, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
118 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
121 /* codec private data */
122 struct twl4030_priv
{
123 struct snd_soc_codec codec
;
125 unsigned int codec_powered
;
127 /* reference counts of AIF/APLL users */
128 unsigned int apll_enabled
;
130 struct snd_pcm_substream
*master_substream
;
131 struct snd_pcm_substream
*slave_substream
;
133 unsigned int configured
;
135 unsigned int sample_bits
;
136 unsigned int channels
;
140 /* Output (with associated amp) states */
141 u8 hsl_enabled
, hsr_enabled
;
143 u8 predrivel_enabled
, predriver_enabled
;
144 u8 carkitl_enabled
, carkitr_enabled
;
148 * read twl4030 register cache
150 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
153 u8
*cache
= codec
->reg_cache
;
155 if (reg
>= TWL4030_CACHEREGNUM
)
162 * write twl4030 register cache
164 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
167 u8
*cache
= codec
->reg_cache
;
169 if (reg
>= TWL4030_CACHEREGNUM
)
175 * write to the twl4030 register space
177 static int twl4030_write(struct snd_soc_codec
*codec
,
178 unsigned int reg
, unsigned int value
)
180 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
181 int write_to_reg
= 0;
183 twl4030_write_reg_cache(codec
, reg
, value
);
184 if (likely(reg
< TWL4030_REG_SW_SHADOW
)) {
185 /* Decide if the given register can be written */
187 case TWL4030_REG_EAR_CTL
:
188 if (twl4030
->earpiece_enabled
)
191 case TWL4030_REG_PREDL_CTL
:
192 if (twl4030
->predrivel_enabled
)
195 case TWL4030_REG_PREDR_CTL
:
196 if (twl4030
->predriver_enabled
)
199 case TWL4030_REG_PRECKL_CTL
:
200 if (twl4030
->carkitl_enabled
)
203 case TWL4030_REG_PRECKR_CTL
:
204 if (twl4030
->carkitr_enabled
)
207 case TWL4030_REG_HS_GAIN_SET
:
208 if (twl4030
->hsl_enabled
|| twl4030
->hsr_enabled
)
212 /* All other register can be written */
217 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
223 static void twl4030_codec_enable(struct snd_soc_codec
*codec
, int enable
)
225 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
228 if (enable
== twl4030
->codec_powered
)
232 mode
= twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER
);
234 mode
= twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER
);
237 twl4030_write_reg_cache(codec
, TWL4030_REG_CODEC_MODE
, mode
);
238 twl4030
->codec_powered
= enable
;
241 /* REVISIT: this delay is present in TI sample drivers */
242 /* but there seems to be no TRM requirement for it */
246 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
248 u8
*cache
= codec
->reg_cache
;
251 /* clear CODECPDZ prior to setting register defaults */
252 twl4030_codec_enable(codec
, 0);
254 /* set all audio section registers to reasonable defaults */
255 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
256 if (i
!= TWL4030_REG_APLL_CTL
)
257 twl4030_write(codec
, i
, cache
[i
]);
261 static void twl4030_apll_enable(struct snd_soc_codec
*codec
, int enable
)
263 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
267 twl4030
->apll_enabled
++;
268 if (twl4030
->apll_enabled
== 1)
269 status
= twl4030_codec_enable_resource(
270 TWL4030_CODEC_RES_APLL
);
272 twl4030
->apll_enabled
--;
273 if (!twl4030
->apll_enabled
)
274 status
= twl4030_codec_disable_resource(
275 TWL4030_CODEC_RES_APLL
);
279 twl4030_write_reg_cache(codec
, TWL4030_REG_APLL_CTL
, status
);
282 static void twl4030_power_up(struct snd_soc_codec
*codec
)
284 struct snd_soc_device
*socdev
= codec
->socdev
;
285 struct twl4030_setup_data
*setup
= socdev
->codec_data
;
286 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
287 u8 anamicl
, regmisc1
, byte
;
290 if (twl4030
->codec_powered
)
293 /* set CODECPDZ to turn on codec */
294 twl4030_codec_enable(codec
, 1);
296 /* initiate offset cancellation */
297 anamicl
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
298 anamicl
&= ~TWL4030_OFFSET_CNCL_SEL
;
299 anamicl
|= setup
->offset_cncl_path
;
300 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
301 anamicl
| TWL4030_CNCL_OFFSET_START
);
303 /* wait for offset cancellation to complete */
305 /* this takes a little while, so don't slam i2c */
307 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
308 TWL4030_REG_ANAMICL
);
309 } while ((i
++ < 100) &&
310 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
311 TWL4030_CNCL_OFFSET_START
));
313 /* Make sure that the reg_cache has the same value as the HW */
314 twl4030_write_reg_cache(codec
, TWL4030_REG_ANAMICL
, byte
);
316 /* anti-pop when changing analog gain */
317 regmisc1
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
318 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
319 regmisc1
| TWL4030_SMOOTH_ANAVOL_EN
);
321 /* toggle CODECPDZ as per TRM */
322 twl4030_codec_enable(codec
, 0);
323 twl4030_codec_enable(codec
, 1);
327 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls
[] = {
328 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL
, 0, 1, 0),
329 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL
, 1, 1, 0),
330 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL
, 2, 1, 0),
331 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL
, 3, 1, 0),
335 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls
[] = {
336 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL
, 0, 1, 0),
337 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL
, 1, 1, 0),
338 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL
, 2, 1, 0),
339 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL
, 3, 1, 0),
343 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls
[] = {
344 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL
, 0, 1, 0),
345 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL
, 1, 1, 0),
346 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL
, 2, 1, 0),
347 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL
, 3, 1, 0),
351 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls
[] = {
352 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 0, 1, 0),
353 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL
, 1, 1, 0),
354 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL
, 2, 1, 0),
358 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls
[] = {
359 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 3, 1, 0),
360 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL
, 4, 1, 0),
361 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL
, 5, 1, 0),
365 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls
[] = {
366 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL
, 0, 1, 0),
367 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL
, 1, 1, 0),
368 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL
, 2, 1, 0),
372 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls
[] = {
373 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL
, 0, 1, 0),
374 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL
, 1, 1, 0),
375 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL
, 2, 1, 0),
379 static const char *twl4030_handsfreel_texts
[] =
380 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
382 static const struct soc_enum twl4030_handsfreel_enum
=
383 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
384 ARRAY_SIZE(twl4030_handsfreel_texts
),
385 twl4030_handsfreel_texts
);
387 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
388 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
390 /* Handsfree Left virtual mute */
391 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control
=
392 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW
, 0, 1, 0);
394 /* Handsfree Right */
395 static const char *twl4030_handsfreer_texts
[] =
396 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
398 static const struct soc_enum twl4030_handsfreer_enum
=
399 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
400 ARRAY_SIZE(twl4030_handsfreer_texts
),
401 twl4030_handsfreer_texts
);
403 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
404 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
406 /* Handsfree Right virtual mute */
407 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control
=
408 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW
, 1, 1, 0);
411 /* Vibra audio path selection */
412 static const char *twl4030_vibra_texts
[] =
413 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
415 static const struct soc_enum twl4030_vibra_enum
=
416 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 2,
417 ARRAY_SIZE(twl4030_vibra_texts
),
418 twl4030_vibra_texts
);
420 static const struct snd_kcontrol_new twl4030_dapm_vibra_control
=
421 SOC_DAPM_ENUM("Route", twl4030_vibra_enum
);
423 /* Vibra path selection: local vibrator (PWM) or audio driven */
424 static const char *twl4030_vibrapath_texts
[] =
425 {"Local vibrator", "Audio"};
427 static const struct soc_enum twl4030_vibrapath_enum
=
428 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 4,
429 ARRAY_SIZE(twl4030_vibrapath_texts
),
430 twl4030_vibrapath_texts
);
432 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control
=
433 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum
);
435 /* Left analog microphone selection */
436 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls
[] = {
437 SOC_DAPM_SINGLE("Main Mic Capture Switch",
438 TWL4030_REG_ANAMICL
, 0, 1, 0),
439 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
440 TWL4030_REG_ANAMICL
, 1, 1, 0),
441 SOC_DAPM_SINGLE("AUXL Capture Switch",
442 TWL4030_REG_ANAMICL
, 2, 1, 0),
443 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
444 TWL4030_REG_ANAMICL
, 3, 1, 0),
447 /* Right analog microphone selection */
448 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls
[] = {
449 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR
, 0, 1, 0),
450 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR
, 2, 1, 0),
453 /* TX1 L/R Analog/Digital microphone selection */
454 static const char *twl4030_micpathtx1_texts
[] =
455 {"Analog", "Digimic0"};
457 static const struct soc_enum twl4030_micpathtx1_enum
=
458 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
459 ARRAY_SIZE(twl4030_micpathtx1_texts
),
460 twl4030_micpathtx1_texts
);
462 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
463 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
465 /* TX2 L/R Analog/Digital microphone selection */
466 static const char *twl4030_micpathtx2_texts
[] =
467 {"Analog", "Digimic1"};
469 static const struct soc_enum twl4030_micpathtx2_enum
=
470 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
471 ARRAY_SIZE(twl4030_micpathtx2_texts
),
472 twl4030_micpathtx2_texts
);
474 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
475 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
477 /* Analog bypass for AudioR1 */
478 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control
=
479 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL
, 2, 1, 0);
481 /* Analog bypass for AudioL1 */
482 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control
=
483 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL
, 2, 1, 0);
485 /* Analog bypass for AudioR2 */
486 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control
=
487 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL
, 2, 1, 0);
489 /* Analog bypass for AudioL2 */
490 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control
=
491 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL
, 2, 1, 0);
493 /* Analog bypass for Voice */
494 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control
=
495 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL
, 2, 1, 0);
497 /* Digital bypass gain, 0 mutes the bypass */
498 static const unsigned int twl4030_dapm_dbypass_tlv
[] = {
499 TLV_DB_RANGE_HEAD(2),
500 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
501 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
504 /* Digital bypass left (TX1L -> RX2L) */
505 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control
=
506 SOC_DAPM_SINGLE_TLV("Volume",
507 TWL4030_REG_ATX2ARXPGA
, 3, 7, 0,
508 twl4030_dapm_dbypass_tlv
);
510 /* Digital bypass right (TX1R -> RX2R) */
511 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control
=
512 SOC_DAPM_SINGLE_TLV("Volume",
513 TWL4030_REG_ATX2ARXPGA
, 0, 7, 0,
514 twl4030_dapm_dbypass_tlv
);
517 * Voice Sidetone GAIN volume control:
518 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
520 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv
, -5100, 100, 1);
522 /* Digital bypass voice: sidetone (VUL -> VDL)*/
523 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control
=
524 SOC_DAPM_SINGLE_TLV("Volume",
525 TWL4030_REG_VSTPGA
, 0, 0x29, 0,
526 twl4030_dapm_dbypassv_tlv
);
528 static int micpath_event(struct snd_soc_dapm_widget
*w
,
529 struct snd_kcontrol
*kcontrol
, int event
)
531 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
532 unsigned char adcmicsel
, micbias_ctl
;
534 adcmicsel
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_ADCMICSEL
);
535 micbias_ctl
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MICBIAS_CTL
);
536 /* Prepare the bits for the given TX path:
537 * shift_l == 0: TX1 microphone path
538 * shift_l == 2: TX2 microphone path */
540 /* TX2 microphone path */
541 if (adcmicsel
& TWL4030_TX2IN_SEL
)
542 micbias_ctl
|= TWL4030_MICBIAS2_CTL
; /* digimic */
544 micbias_ctl
&= ~TWL4030_MICBIAS2_CTL
;
546 /* TX1 microphone path */
547 if (adcmicsel
& TWL4030_TX1IN_SEL
)
548 micbias_ctl
|= TWL4030_MICBIAS1_CTL
; /* digimic */
550 micbias_ctl
&= ~TWL4030_MICBIAS1_CTL
;
553 twl4030_write(w
->codec
, TWL4030_REG_MICBIAS_CTL
, micbias_ctl
);
559 * Output PGA builder:
560 * Handle the muting and unmuting of the given output (turning off the
561 * amplifier associated with the output pin)
562 * On mute bypass the reg_cache and write 0 to the register
563 * On unmute: restore the register content from the reg_cache
564 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
566 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
567 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
568 struct snd_kcontrol *kcontrol, int event) \
570 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
573 case SND_SOC_DAPM_POST_PMU: \
574 twl4030->pin_name##_enabled = 1; \
575 twl4030_write(w->codec, reg, \
576 twl4030_read_reg_cache(w->codec, reg)); \
578 case SND_SOC_DAPM_POST_PMD: \
579 twl4030->pin_name##_enabled = 0; \
580 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
587 TWL4030_OUTPUT_PGA(earpiece
, TWL4030_REG_EAR_CTL
, TWL4030_EAR_GAIN
);
588 TWL4030_OUTPUT_PGA(predrivel
, TWL4030_REG_PREDL_CTL
, TWL4030_PREDL_GAIN
);
589 TWL4030_OUTPUT_PGA(predriver
, TWL4030_REG_PREDR_CTL
, TWL4030_PREDR_GAIN
);
590 TWL4030_OUTPUT_PGA(carkitl
, TWL4030_REG_PRECKL_CTL
, TWL4030_PRECKL_GAIN
);
591 TWL4030_OUTPUT_PGA(carkitr
, TWL4030_REG_PRECKR_CTL
, TWL4030_PRECKR_GAIN
);
593 static void handsfree_ramp(struct snd_soc_codec
*codec
, int reg
, int ramp
)
595 unsigned char hs_ctl
;
597 hs_ctl
= twl4030_read_reg_cache(codec
, reg
);
601 hs_ctl
|= TWL4030_HF_CTL_REF_EN
;
602 twl4030_write(codec
, reg
, hs_ctl
);
604 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
605 twl4030_write(codec
, reg
, hs_ctl
);
607 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
608 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
609 twl4030_write(codec
, reg
, hs_ctl
);
612 hs_ctl
&= ~TWL4030_HF_CTL_LOOP_EN
;
613 hs_ctl
&= ~TWL4030_HF_CTL_HB_EN
;
614 twl4030_write(codec
, reg
, hs_ctl
);
615 hs_ctl
&= ~TWL4030_HF_CTL_RAMP_EN
;
616 twl4030_write(codec
, reg
, hs_ctl
);
618 hs_ctl
&= ~TWL4030_HF_CTL_REF_EN
;
619 twl4030_write(codec
, reg
, hs_ctl
);
623 static int handsfreelpga_event(struct snd_soc_dapm_widget
*w
,
624 struct snd_kcontrol
*kcontrol
, int event
)
627 case SND_SOC_DAPM_POST_PMU
:
628 handsfree_ramp(w
->codec
, TWL4030_REG_HFL_CTL
, 1);
630 case SND_SOC_DAPM_POST_PMD
:
631 handsfree_ramp(w
->codec
, TWL4030_REG_HFL_CTL
, 0);
637 static int handsfreerpga_event(struct snd_soc_dapm_widget
*w
,
638 struct snd_kcontrol
*kcontrol
, int event
)
641 case SND_SOC_DAPM_POST_PMU
:
642 handsfree_ramp(w
->codec
, TWL4030_REG_HFR_CTL
, 1);
644 case SND_SOC_DAPM_POST_PMD
:
645 handsfree_ramp(w
->codec
, TWL4030_REG_HFR_CTL
, 0);
651 static int vibramux_event(struct snd_soc_dapm_widget
*w
,
652 struct snd_kcontrol
*kcontrol
, int event
)
654 twl4030_write(w
->codec
, TWL4030_REG_VIBRA_SET
, 0xff);
658 static int apll_event(struct snd_soc_dapm_widget
*w
,
659 struct snd_kcontrol
*kcontrol
, int event
)
662 case SND_SOC_DAPM_PRE_PMU
:
663 twl4030_apll_enable(w
->codec
, 1);
665 case SND_SOC_DAPM_POST_PMD
:
666 twl4030_apll_enable(w
->codec
, 0);
672 static int aif_event(struct snd_soc_dapm_widget
*w
,
673 struct snd_kcontrol
*kcontrol
, int event
)
677 audio_if
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_AUDIO_IF
);
679 case SND_SOC_DAPM_PRE_PMU
:
681 /* enable the PLL before we use it to clock the DAI */
682 twl4030_apll_enable(w
->codec
, 1);
684 twl4030_write(w
->codec
, TWL4030_REG_AUDIO_IF
,
685 audio_if
| TWL4030_AIF_EN
);
687 case SND_SOC_DAPM_POST_PMD
:
688 /* disable the DAI before we stop it's source PLL */
689 twl4030_write(w
->codec
, TWL4030_REG_AUDIO_IF
,
690 audio_if
& ~TWL4030_AIF_EN
);
691 twl4030_apll_enable(w
->codec
, 0);
697 static void headset_ramp(struct snd_soc_codec
*codec
, int ramp
)
699 struct snd_soc_device
*socdev
= codec
->socdev
;
700 struct twl4030_setup_data
*setup
= socdev
->codec_data
;
702 unsigned char hs_gain
, hs_pop
;
703 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
704 /* Base values for ramp delay calculation: 2^19 - 2^26 */
705 unsigned int ramp_base
[] = {524288, 1048576, 2097152, 4194304,
706 8388608, 16777216, 33554432, 67108864};
708 hs_gain
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_GAIN_SET
);
709 hs_pop
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
711 /* Enable external mute control, this dramatically reduces
713 if (setup
&& setup
->hs_extmute
) {
714 if (setup
->set_hs_extmute
) {
715 setup
->set_hs_extmute(1);
717 hs_pop
|= TWL4030_EXTMUTE
;
718 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
723 /* Headset ramp-up according to the TRM */
724 hs_pop
|= TWL4030_VMID_EN
;
725 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
726 /* Actually write to the register */
727 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
729 TWL4030_REG_HS_GAIN_SET
);
730 hs_pop
|= TWL4030_RAMP_EN
;
731 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
732 /* Wait ramp delay time + 1, so the VMID can settle */
733 mdelay((ramp_base
[(hs_pop
& TWL4030_RAMP_DELAY
) >> 2] /
734 twl4030
->sysclk
) + 1);
736 /* Headset ramp-down _not_ according to
737 * the TRM, but in a way that it is working */
738 hs_pop
&= ~TWL4030_RAMP_EN
;
739 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
740 /* Wait ramp delay time + 1, so the VMID can settle */
741 mdelay((ramp_base
[(hs_pop
& TWL4030_RAMP_DELAY
) >> 2] /
742 twl4030
->sysclk
) + 1);
743 /* Bypass the reg_cache to mute the headset */
744 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
746 TWL4030_REG_HS_GAIN_SET
);
748 hs_pop
&= ~TWL4030_VMID_EN
;
749 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
752 /* Disable external mute */
753 if (setup
&& setup
->hs_extmute
) {
754 if (setup
->set_hs_extmute
) {
755 setup
->set_hs_extmute(0);
757 hs_pop
&= ~TWL4030_EXTMUTE
;
758 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
763 static int headsetlpga_event(struct snd_soc_dapm_widget
*w
,
764 struct snd_kcontrol
*kcontrol
, int event
)
766 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(w
->codec
);
769 case SND_SOC_DAPM_POST_PMU
:
770 /* Do the ramp-up only once */
771 if (!twl4030
->hsr_enabled
)
772 headset_ramp(w
->codec
, 1);
774 twl4030
->hsl_enabled
= 1;
776 case SND_SOC_DAPM_POST_PMD
:
777 /* Do the ramp-down only if both headsetL/R is disabled */
778 if (!twl4030
->hsr_enabled
)
779 headset_ramp(w
->codec
, 0);
781 twl4030
->hsl_enabled
= 0;
787 static int headsetrpga_event(struct snd_soc_dapm_widget
*w
,
788 struct snd_kcontrol
*kcontrol
, int event
)
790 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(w
->codec
);
793 case SND_SOC_DAPM_POST_PMU
:
794 /* Do the ramp-up only once */
795 if (!twl4030
->hsl_enabled
)
796 headset_ramp(w
->codec
, 1);
798 twl4030
->hsr_enabled
= 1;
800 case SND_SOC_DAPM_POST_PMD
:
801 /* Do the ramp-down only if both headsetL/R is disabled */
802 if (!twl4030
->hsl_enabled
)
803 headset_ramp(w
->codec
, 0);
805 twl4030
->hsr_enabled
= 0;
812 * Some of the gain controls in TWL (mostly those which are associated with
813 * the outputs) are implemented in an interesting way:
814 * 0x0 : Power down (mute)
818 * Inverting not going to help with these.
819 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
821 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
822 xinvert, tlv_array) \
823 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
824 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
825 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
826 .tlv.p = (tlv_array), \
827 .info = snd_soc_info_volsw, \
828 .get = snd_soc_get_volsw_twl4030, \
829 .put = snd_soc_put_volsw_twl4030, \
830 .private_value = (unsigned long)&(struct soc_mixer_control) \
831 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
832 .max = xmax, .invert = xinvert} }
833 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
834 xinvert, tlv_array) \
835 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
836 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
837 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
838 .tlv.p = (tlv_array), \
839 .info = snd_soc_info_volsw_2r, \
840 .get = snd_soc_get_volsw_r2_twl4030,\
841 .put = snd_soc_put_volsw_r2_twl4030, \
842 .private_value = (unsigned long)&(struct soc_mixer_control) \
843 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
844 .rshift = xshift, .max = xmax, .invert = xinvert} }
845 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
846 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
849 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
850 struct snd_ctl_elem_value
*ucontrol
)
852 struct soc_mixer_control
*mc
=
853 (struct soc_mixer_control
*)kcontrol
->private_value
;
854 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
855 unsigned int reg
= mc
->reg
;
856 unsigned int shift
= mc
->shift
;
857 unsigned int rshift
= mc
->rshift
;
859 int mask
= (1 << fls(max
)) - 1;
861 ucontrol
->value
.integer
.value
[0] =
862 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
863 if (ucontrol
->value
.integer
.value
[0])
864 ucontrol
->value
.integer
.value
[0] =
865 max
+ 1 - ucontrol
->value
.integer
.value
[0];
867 if (shift
!= rshift
) {
868 ucontrol
->value
.integer
.value
[1] =
869 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
870 if (ucontrol
->value
.integer
.value
[1])
871 ucontrol
->value
.integer
.value
[1] =
872 max
+ 1 - ucontrol
->value
.integer
.value
[1];
878 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
879 struct snd_ctl_elem_value
*ucontrol
)
881 struct soc_mixer_control
*mc
=
882 (struct soc_mixer_control
*)kcontrol
->private_value
;
883 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
884 unsigned int reg
= mc
->reg
;
885 unsigned int shift
= mc
->shift
;
886 unsigned int rshift
= mc
->rshift
;
888 int mask
= (1 << fls(max
)) - 1;
889 unsigned short val
, val2
, val_mask
;
891 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
893 val_mask
= mask
<< shift
;
897 if (shift
!= rshift
) {
898 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
899 val_mask
|= mask
<< rshift
;
901 val2
= max
+ 1 - val2
;
902 val
|= val2
<< rshift
;
904 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
907 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
908 struct snd_ctl_elem_value
*ucontrol
)
910 struct soc_mixer_control
*mc
=
911 (struct soc_mixer_control
*)kcontrol
->private_value
;
912 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
913 unsigned int reg
= mc
->reg
;
914 unsigned int reg2
= mc
->rreg
;
915 unsigned int shift
= mc
->shift
;
917 int mask
= (1<<fls(max
))-1;
919 ucontrol
->value
.integer
.value
[0] =
920 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
921 ucontrol
->value
.integer
.value
[1] =
922 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
924 if (ucontrol
->value
.integer
.value
[0])
925 ucontrol
->value
.integer
.value
[0] =
926 max
+ 1 - ucontrol
->value
.integer
.value
[0];
927 if (ucontrol
->value
.integer
.value
[1])
928 ucontrol
->value
.integer
.value
[1] =
929 max
+ 1 - ucontrol
->value
.integer
.value
[1];
934 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
935 struct snd_ctl_elem_value
*ucontrol
)
937 struct soc_mixer_control
*mc
=
938 (struct soc_mixer_control
*)kcontrol
->private_value
;
939 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
940 unsigned int reg
= mc
->reg
;
941 unsigned int reg2
= mc
->rreg
;
942 unsigned int shift
= mc
->shift
;
944 int mask
= (1 << fls(max
)) - 1;
946 unsigned short val
, val2
, val_mask
;
948 val_mask
= mask
<< shift
;
949 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
950 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
955 val2
= max
+ 1 - val2
;
958 val2
= val2
<< shift
;
960 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
964 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
968 /* Codec operation modes */
969 static const char *twl4030_op_modes_texts
[] = {
970 "Option 2 (voice/audio)", "Option 1 (audio)"
973 static const struct soc_enum twl4030_op_modes_enum
=
974 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE
, 0,
975 ARRAY_SIZE(twl4030_op_modes_texts
),
976 twl4030_op_modes_texts
);
978 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol
*kcontrol
,
979 struct snd_ctl_elem_value
*ucontrol
)
981 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
982 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
983 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
985 unsigned short mask
, bitmask
;
987 if (twl4030
->configured
) {
988 printk(KERN_ERR
"twl4030 operation mode cannot be "
989 "changed on-the-fly\n");
993 for (bitmask
= 1; bitmask
< e
->max
; bitmask
<<= 1)
995 if (ucontrol
->value
.enumerated
.item
[0] > e
->max
- 1)
998 val
= ucontrol
->value
.enumerated
.item
[0] << e
->shift_l
;
999 mask
= (bitmask
- 1) << e
->shift_l
;
1000 if (e
->shift_l
!= e
->shift_r
) {
1001 if (ucontrol
->value
.enumerated
.item
[1] > e
->max
- 1)
1003 val
|= ucontrol
->value
.enumerated
.item
[1] << e
->shift_r
;
1004 mask
|= (bitmask
- 1) << e
->shift_r
;
1007 return snd_soc_update_bits(codec
, e
->reg
, mask
, val
);
1011 * FGAIN volume control:
1012 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1014 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
1017 * CGAIN volume control:
1018 * 0 dB to 12 dB in 6 dB steps
1019 * value 2 and 3 means 12 dB
1021 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
1024 * Voice Downlink GAIN volume control:
1025 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1027 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv
, -3700, 100, 1);
1030 * Analog playback gain
1031 * -24 dB to 12 dB in 2 dB steps
1033 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
1036 * Gain controls tied to outputs
1037 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1039 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
1042 * Gain control for earpiece amplifier
1043 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1045 static DECLARE_TLV_DB_SCALE(output_ear_tvl
, -600, 600, 1);
1048 * Capture gain after the ADCs
1049 * from 0 dB to 31 dB in 1 dB steps
1051 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
1054 * Gain control for input amplifiers
1055 * 0 dB to 30 dB in 6 dB steps
1057 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
1059 /* AVADC clock priority */
1060 static const char *twl4030_avadc_clk_priority_texts
[] = {
1061 "Voice high priority", "HiFi high priority"
1064 static const struct soc_enum twl4030_avadc_clk_priority_enum
=
1065 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL
, 2,
1066 ARRAY_SIZE(twl4030_avadc_clk_priority_texts
),
1067 twl4030_avadc_clk_priority_texts
);
1069 static const char *twl4030_rampdelay_texts
[] = {
1070 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1071 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1075 static const struct soc_enum twl4030_rampdelay_enum
=
1076 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET
, 2,
1077 ARRAY_SIZE(twl4030_rampdelay_texts
),
1078 twl4030_rampdelay_texts
);
1080 /* Vibra H-bridge direction mode */
1081 static const char *twl4030_vibradirmode_texts
[] = {
1082 "Vibra H-bridge direction", "Audio data MSB",
1085 static const struct soc_enum twl4030_vibradirmode_enum
=
1086 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 5,
1087 ARRAY_SIZE(twl4030_vibradirmode_texts
),
1088 twl4030_vibradirmode_texts
);
1090 /* Vibra H-bridge direction */
1091 static const char *twl4030_vibradir_texts
[] = {
1092 "Positive polarity", "Negative polarity",
1095 static const struct soc_enum twl4030_vibradir_enum
=
1096 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 1,
1097 ARRAY_SIZE(twl4030_vibradir_texts
),
1098 twl4030_vibradir_texts
);
1100 /* Digimic Left and right swapping */
1101 static const char *twl4030_digimicswap_texts
[] = {
1102 "Not swapped", "Swapped",
1105 static const struct soc_enum twl4030_digimicswap_enum
=
1106 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1
, 0,
1107 ARRAY_SIZE(twl4030_digimicswap_texts
),
1108 twl4030_digimicswap_texts
);
1110 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
1111 /* Codec operation mode control */
1112 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum
,
1113 snd_soc_get_enum_double
,
1114 snd_soc_put_twl4030_opmode_enum_double
),
1116 /* Common playback gain controls */
1117 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1118 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
1119 0, 0x3f, 0, digital_fine_tlv
),
1120 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1121 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
1122 0, 0x3f, 0, digital_fine_tlv
),
1124 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1125 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
1126 6, 0x2, 0, digital_coarse_tlv
),
1127 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1128 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
1129 6, 0x2, 0, digital_coarse_tlv
),
1131 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1132 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
1133 3, 0x12, 1, analog_tlv
),
1134 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1135 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
1136 3, 0x12, 1, analog_tlv
),
1137 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1138 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
1140 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1141 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
1144 /* Common voice downlink gain controls */
1145 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1146 TWL4030_REG_VRXPGA
, 0, 0x31, 0, digital_voice_downlink_tlv
),
1148 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1149 TWL4030_REG_VDL_APGA_CTL
, 3, 0x12, 1, analog_tlv
),
1151 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1152 TWL4030_REG_VDL_APGA_CTL
, 1, 1, 0),
1154 /* Separate output gain controls */
1155 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1156 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
1157 4, 3, 0, output_tvl
),
1159 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1160 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
1162 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1163 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
1164 4, 3, 0, output_tvl
),
1166 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
1167 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_ear_tvl
),
1169 /* Common capture gain controls */
1170 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1171 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
1172 0, 0x1f, 0, digital_capture_tlv
),
1173 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1174 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
1175 0, 0x1f, 0, digital_capture_tlv
),
1177 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
1178 0, 3, 5, 0, input_gain_tlv
),
1180 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum
),
1182 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum
),
1184 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum
),
1185 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum
),
1187 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum
),
1190 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
1191 /* Left channel inputs */
1192 SND_SOC_DAPM_INPUT("MAINMIC"),
1193 SND_SOC_DAPM_INPUT("HSMIC"),
1194 SND_SOC_DAPM_INPUT("AUXL"),
1195 SND_SOC_DAPM_INPUT("CARKITMIC"),
1196 /* Right channel inputs */
1197 SND_SOC_DAPM_INPUT("SUBMIC"),
1198 SND_SOC_DAPM_INPUT("AUXR"),
1199 /* Digital microphones (Stereo) */
1200 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1201 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1204 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1205 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1206 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1207 SND_SOC_DAPM_OUTPUT("HSOL"),
1208 SND_SOC_DAPM_OUTPUT("HSOR"),
1209 SND_SOC_DAPM_OUTPUT("CARKITL"),
1210 SND_SOC_DAPM_OUTPUT("CARKITR"),
1211 SND_SOC_DAPM_OUTPUT("HFL"),
1212 SND_SOC_DAPM_OUTPUT("HFR"),
1213 SND_SOC_DAPM_OUTPUT("VIBRA"),
1215 /* AIF and APLL clocks for running DAIs (including loopback) */
1216 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1217 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1218 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1221 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1222 SND_SOC_NOPM
, 0, 0),
1223 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1224 SND_SOC_NOPM
, 0, 0),
1225 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1226 SND_SOC_NOPM
, 0, 0),
1227 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1228 SND_SOC_NOPM
, 0, 0),
1229 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1230 SND_SOC_NOPM
, 0, 0),
1232 /* Analog bypasses */
1233 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1234 &twl4030_dapm_abypassr1_control
),
1235 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1236 &twl4030_dapm_abypassl1_control
),
1237 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1238 &twl4030_dapm_abypassr2_control
),
1239 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1240 &twl4030_dapm_abypassl2_control
),
1241 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM
, 0, 0,
1242 &twl4030_dapm_abypassv_control
),
1244 /* Master analog loopback switch */
1245 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1
, 5, 0,
1248 /* Digital bypasses */
1249 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM
, 0, 0,
1250 &twl4030_dapm_dbypassl_control
),
1251 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM
, 0, 0,
1252 &twl4030_dapm_dbypassr_control
),
1253 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM
, 0, 0,
1254 &twl4030_dapm_dbypassv_control
),
1256 /* Digital mixers, power control for the physical DACs */
1257 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1258 TWL4030_REG_AVDAC_CTL
, 0, 0, NULL
, 0),
1259 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1260 TWL4030_REG_AVDAC_CTL
, 1, 0, NULL
, 0),
1261 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1262 TWL4030_REG_AVDAC_CTL
, 2, 0, NULL
, 0),
1263 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1264 TWL4030_REG_AVDAC_CTL
, 3, 0, NULL
, 0),
1265 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1266 TWL4030_REG_AVDAC_CTL
, 4, 0, NULL
, 0),
1268 /* Analog mixers, power control for the physical PGAs */
1269 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1270 TWL4030_REG_ARXR1_APGA_CTL
, 0, 0, NULL
, 0),
1271 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1272 TWL4030_REG_ARXL1_APGA_CTL
, 0, 0, NULL
, 0),
1273 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1274 TWL4030_REG_ARXR2_APGA_CTL
, 0, 0, NULL
, 0),
1275 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1276 TWL4030_REG_ARXL2_APGA_CTL
, 0, 0, NULL
, 0),
1277 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1278 TWL4030_REG_VDL_APGA_CTL
, 0, 0, NULL
, 0),
1280 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM
, 0, 0, apll_event
,
1281 SND_SOC_DAPM_PRE_PMU
|SND_SOC_DAPM_POST_PMD
),
1283 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM
, 0, 0, aif_event
,
1284 SND_SOC_DAPM_PRE_PMU
|SND_SOC_DAPM_POST_PMD
),
1286 /* Output MIXER controls */
1288 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM
, 0, 0,
1289 &twl4030_dapm_earpiece_controls
[0],
1290 ARRAY_SIZE(twl4030_dapm_earpiece_controls
)),
1291 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM
,
1292 0, 0, NULL
, 0, earpiecepga_event
,
1293 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1295 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM
, 0, 0,
1296 &twl4030_dapm_predrivel_controls
[0],
1297 ARRAY_SIZE(twl4030_dapm_predrivel_controls
)),
1298 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM
,
1299 0, 0, NULL
, 0, predrivelpga_event
,
1300 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1301 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM
, 0, 0,
1302 &twl4030_dapm_predriver_controls
[0],
1303 ARRAY_SIZE(twl4030_dapm_predriver_controls
)),
1304 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM
,
1305 0, 0, NULL
, 0, predriverpga_event
,
1306 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1308 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM
, 0, 0,
1309 &twl4030_dapm_hsol_controls
[0],
1310 ARRAY_SIZE(twl4030_dapm_hsol_controls
)),
1311 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM
,
1312 0, 0, NULL
, 0, headsetlpga_event
,
1313 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1314 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM
, 0, 0,
1315 &twl4030_dapm_hsor_controls
[0],
1316 ARRAY_SIZE(twl4030_dapm_hsor_controls
)),
1317 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM
,
1318 0, 0, NULL
, 0, headsetrpga_event
,
1319 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1321 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM
, 0, 0,
1322 &twl4030_dapm_carkitl_controls
[0],
1323 ARRAY_SIZE(twl4030_dapm_carkitl_controls
)),
1324 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM
,
1325 0, 0, NULL
, 0, carkitlpga_event
,
1326 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1327 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM
, 0, 0,
1328 &twl4030_dapm_carkitr_controls
[0],
1329 ARRAY_SIZE(twl4030_dapm_carkitr_controls
)),
1330 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM
,
1331 0, 0, NULL
, 0, carkitrpga_event
,
1332 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1334 /* Output MUX controls */
1336 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM
, 0, 0,
1337 &twl4030_dapm_handsfreel_control
),
1338 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM
, 0, 0,
1339 &twl4030_dapm_handsfreelmute_control
),
1340 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM
,
1341 0, 0, NULL
, 0, handsfreelpga_event
,
1342 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1343 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM
, 5, 0,
1344 &twl4030_dapm_handsfreer_control
),
1345 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM
, 0, 0,
1346 &twl4030_dapm_handsfreermute_control
),
1347 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM
,
1348 0, 0, NULL
, 0, handsfreerpga_event
,
1349 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1351 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL
, 0, 0,
1352 &twl4030_dapm_vibra_control
, vibramux_event
,
1353 SND_SOC_DAPM_PRE_PMU
),
1354 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM
, 0, 0,
1355 &twl4030_dapm_vibrapath_control
),
1357 /* Introducing four virtual ADC, since TWL4030 have four channel for
1359 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1360 SND_SOC_NOPM
, 0, 0),
1361 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1362 SND_SOC_NOPM
, 0, 0),
1363 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1364 SND_SOC_NOPM
, 0, 0),
1365 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1366 SND_SOC_NOPM
, 0, 0),
1368 /* Analog/Digital mic path selection.
1369 TX1 Left/Right: either analog Left/Right or Digimic0
1370 TX2 Left/Right: either analog Left/Right or Digimic1 */
1371 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
1372 &twl4030_dapm_micpathtx1_control
, micpath_event
,
1373 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
1374 SND_SOC_DAPM_POST_REG
),
1375 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
1376 &twl4030_dapm_micpathtx2_control
, micpath_event
,
1377 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
1378 SND_SOC_DAPM_POST_REG
),
1380 /* Analog input mixers for the capture amplifiers */
1381 SND_SOC_DAPM_MIXER("Analog Left",
1382 TWL4030_REG_ANAMICL
, 4, 0,
1383 &twl4030_dapm_analoglmic_controls
[0],
1384 ARRAY_SIZE(twl4030_dapm_analoglmic_controls
)),
1385 SND_SOC_DAPM_MIXER("Analog Right",
1386 TWL4030_REG_ANAMICR
, 4, 0,
1387 &twl4030_dapm_analogrmic_controls
[0],
1388 ARRAY_SIZE(twl4030_dapm_analogrmic_controls
)),
1390 SND_SOC_DAPM_PGA("ADC Physical Left",
1391 TWL4030_REG_AVADC_CTL
, 3, 0, NULL
, 0),
1392 SND_SOC_DAPM_PGA("ADC Physical Right",
1393 TWL4030_REG_AVADC_CTL
, 1, 0, NULL
, 0),
1395 SND_SOC_DAPM_PGA("Digimic0 Enable",
1396 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0),
1397 SND_SOC_DAPM_PGA("Digimic1 Enable",
1398 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0),
1400 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
1401 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
1402 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
1406 static const struct snd_soc_dapm_route intercon
[] = {
1407 {"Digital L1 Playback Mixer", NULL
, "DAC Left1"},
1408 {"Digital R1 Playback Mixer", NULL
, "DAC Right1"},
1409 {"Digital L2 Playback Mixer", NULL
, "DAC Left2"},
1410 {"Digital R2 Playback Mixer", NULL
, "DAC Right2"},
1411 {"Digital Voice Playback Mixer", NULL
, "DAC Voice"},
1413 /* Supply for the digital part (APLL) */
1414 {"Digital Voice Playback Mixer", NULL
, "APLL Enable"},
1416 {"Digital R1 Playback Mixer", NULL
, "AIF Enable"},
1417 {"Digital L1 Playback Mixer", NULL
, "AIF Enable"},
1418 {"Digital R2 Playback Mixer", NULL
, "AIF Enable"},
1419 {"Digital L2 Playback Mixer", NULL
, "AIF Enable"},
1421 {"Analog L1 Playback Mixer", NULL
, "Digital L1 Playback Mixer"},
1422 {"Analog R1 Playback Mixer", NULL
, "Digital R1 Playback Mixer"},
1423 {"Analog L2 Playback Mixer", NULL
, "Digital L2 Playback Mixer"},
1424 {"Analog R2 Playback Mixer", NULL
, "Digital R2 Playback Mixer"},
1425 {"Analog Voice Playback Mixer", NULL
, "Digital Voice Playback Mixer"},
1427 /* Internal playback routings */
1429 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1430 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1431 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1432 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1433 {"Earpiece PGA", NULL
, "Earpiece Mixer"},
1435 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1436 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1437 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1438 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1439 {"PredriveL PGA", NULL
, "PredriveL Mixer"},
1441 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1442 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1443 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1444 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1445 {"PredriveR PGA", NULL
, "PredriveR Mixer"},
1447 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1448 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1449 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1450 {"HeadsetL PGA", NULL
, "HeadsetL Mixer"},
1452 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1453 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1454 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1455 {"HeadsetR PGA", NULL
, "HeadsetR Mixer"},
1457 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1458 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1459 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1460 {"CarkitL PGA", NULL
, "CarkitL Mixer"},
1462 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1463 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1464 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1465 {"CarkitR PGA", NULL
, "CarkitR Mixer"},
1467 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1468 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1469 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1470 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1471 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1472 {"HandsfreeL PGA", NULL
, "HandsfreeL"},
1474 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1475 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1476 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1477 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1478 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1479 {"HandsfreeR PGA", NULL
, "HandsfreeR"},
1481 {"Vibra Mux", "AudioL1", "DAC Left1"},
1482 {"Vibra Mux", "AudioR1", "DAC Right1"},
1483 {"Vibra Mux", "AudioL2", "DAC Left2"},
1484 {"Vibra Mux", "AudioR2", "DAC Right2"},
1487 /* Must be always connected (for AIF and APLL) */
1488 {"Virtual HiFi OUT", NULL
, "Digital L1 Playback Mixer"},
1489 {"Virtual HiFi OUT", NULL
, "Digital R1 Playback Mixer"},
1490 {"Virtual HiFi OUT", NULL
, "Digital L2 Playback Mixer"},
1491 {"Virtual HiFi OUT", NULL
, "Digital R2 Playback Mixer"},
1492 /* Must be always connected (for APLL) */
1493 {"Virtual Voice OUT", NULL
, "Digital Voice Playback Mixer"},
1494 /* Physical outputs */
1495 {"EARPIECE", NULL
, "Earpiece PGA"},
1496 {"PREDRIVEL", NULL
, "PredriveL PGA"},
1497 {"PREDRIVER", NULL
, "PredriveR PGA"},
1498 {"HSOL", NULL
, "HeadsetL PGA"},
1499 {"HSOR", NULL
, "HeadsetR PGA"},
1500 {"CARKITL", NULL
, "CarkitL PGA"},
1501 {"CARKITR", NULL
, "CarkitR PGA"},
1502 {"HFL", NULL
, "HandsfreeL PGA"},
1503 {"HFR", NULL
, "HandsfreeR PGA"},
1504 {"Vibra Route", "Audio", "Vibra Mux"},
1505 {"VIBRA", NULL
, "Vibra Route"},
1508 /* Must be always connected (for AIF and APLL) */
1509 {"ADC Virtual Left1", NULL
, "Virtual HiFi IN"},
1510 {"ADC Virtual Right1", NULL
, "Virtual HiFi IN"},
1511 {"ADC Virtual Left2", NULL
, "Virtual HiFi IN"},
1512 {"ADC Virtual Right2", NULL
, "Virtual HiFi IN"},
1513 /* Physical inputs */
1514 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1515 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1516 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1517 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1519 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1520 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1522 {"ADC Physical Left", NULL
, "Analog Left"},
1523 {"ADC Physical Right", NULL
, "Analog Right"},
1525 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
1526 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
1528 /* TX1 Left capture path */
1529 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1530 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1531 /* TX1 Right capture path */
1532 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1533 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1534 /* TX2 Left capture path */
1535 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1536 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1537 /* TX2 Right capture path */
1538 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1539 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1541 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
1542 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
1543 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
1544 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
1546 {"ADC Virtual Left1", NULL
, "AIF Enable"},
1547 {"ADC Virtual Right1", NULL
, "AIF Enable"},
1548 {"ADC Virtual Left2", NULL
, "AIF Enable"},
1549 {"ADC Virtual Right2", NULL
, "AIF Enable"},
1551 /* Analog bypass routes */
1552 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1553 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1554 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1555 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1556 {"Voice Analog Loopback", "Switch", "Analog Left"},
1558 /* Supply for the Analog loopbacks */
1559 {"Right1 Analog Loopback", NULL
, "FM Loop Enable"},
1560 {"Left1 Analog Loopback", NULL
, "FM Loop Enable"},
1561 {"Right2 Analog Loopback", NULL
, "FM Loop Enable"},
1562 {"Left2 Analog Loopback", NULL
, "FM Loop Enable"},
1563 {"Voice Analog Loopback", NULL
, "FM Loop Enable"},
1565 {"Analog R1 Playback Mixer", NULL
, "Right1 Analog Loopback"},
1566 {"Analog L1 Playback Mixer", NULL
, "Left1 Analog Loopback"},
1567 {"Analog R2 Playback Mixer", NULL
, "Right2 Analog Loopback"},
1568 {"Analog L2 Playback Mixer", NULL
, "Left2 Analog Loopback"},
1569 {"Analog Voice Playback Mixer", NULL
, "Voice Analog Loopback"},
1571 /* Digital bypass routes */
1572 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1573 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1574 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1576 {"Digital R2 Playback Mixer", NULL
, "Right Digital Loopback"},
1577 {"Digital L2 Playback Mixer", NULL
, "Left Digital Loopback"},
1578 {"Digital Voice Playback Mixer", NULL
, "Voice Digital Loopback"},
1582 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
1584 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
1585 ARRAY_SIZE(twl4030_dapm_widgets
));
1587 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
1592 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
1593 enum snd_soc_bias_level level
)
1596 case SND_SOC_BIAS_ON
:
1598 case SND_SOC_BIAS_PREPARE
:
1600 case SND_SOC_BIAS_STANDBY
:
1601 if (codec
->bias_level
== SND_SOC_BIAS_OFF
)
1602 twl4030_power_up(codec
);
1604 case SND_SOC_BIAS_OFF
:
1605 twl4030_codec_enable(codec
, 0);
1608 codec
->bias_level
= level
;
1613 static void twl4030_constraints(struct twl4030_priv
*twl4030
,
1614 struct snd_pcm_substream
*mst_substream
)
1616 struct snd_pcm_substream
*slv_substream
;
1618 /* Pick the stream, which need to be constrained */
1619 if (mst_substream
== twl4030
->master_substream
)
1620 slv_substream
= twl4030
->slave_substream
;
1621 else if (mst_substream
== twl4030
->slave_substream
)
1622 slv_substream
= twl4030
->master_substream
;
1623 else /* This should not happen.. */
1626 /* Set the constraints according to the already configured stream */
1627 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1628 SNDRV_PCM_HW_PARAM_RATE
,
1632 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1633 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
,
1634 twl4030
->sample_bits
,
1635 twl4030
->sample_bits
);
1637 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1638 SNDRV_PCM_HW_PARAM_CHANNELS
,
1643 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1644 * capture has to be enabled/disabled. */
1645 static void twl4030_tdm_enable(struct snd_soc_codec
*codec
, int direction
,
1650 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1652 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1653 mask
= TWL4030_ARXL1_VRX_EN
| TWL4030_ARXR1_EN
;
1655 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1662 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1665 static int twl4030_startup(struct snd_pcm_substream
*substream
,
1666 struct snd_soc_dai
*dai
)
1668 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1669 struct snd_soc_device
*socdev
= rtd
->socdev
;
1670 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1671 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1673 if (twl4030
->master_substream
) {
1674 twl4030
->slave_substream
= substream
;
1675 /* The DAI has one configuration for playback and capture, so
1676 * if the DAI has been already configured then constrain this
1677 * substream to match it. */
1678 if (twl4030
->configured
)
1679 twl4030_constraints(twl4030
, twl4030
->master_substream
);
1681 if (!(twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
) &
1682 TWL4030_OPTION_1
)) {
1683 /* In option2 4 channel is not supported, set the
1684 * constraint for the first stream for channels, the
1685 * second stream will 'inherit' this cosntraint */
1686 snd_pcm_hw_constraint_minmax(substream
->runtime
,
1687 SNDRV_PCM_HW_PARAM_CHANNELS
,
1690 twl4030
->master_substream
= substream
;
1696 static void twl4030_shutdown(struct snd_pcm_substream
*substream
,
1697 struct snd_soc_dai
*dai
)
1699 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1700 struct snd_soc_device
*socdev
= rtd
->socdev
;
1701 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1702 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1704 if (twl4030
->master_substream
== substream
)
1705 twl4030
->master_substream
= twl4030
->slave_substream
;
1707 twl4030
->slave_substream
= NULL
;
1709 /* If all streams are closed, or the remaining stream has not yet
1710 * been configured than set the DAI as not configured. */
1711 if (!twl4030
->master_substream
)
1712 twl4030
->configured
= 0;
1713 else if (!twl4030
->master_substream
->runtime
->channels
)
1714 twl4030
->configured
= 0;
1716 /* If the closing substream had 4 channel, do the necessary cleanup */
1717 if (substream
->runtime
->channels
== 4)
1718 twl4030_tdm_enable(codec
, substream
->stream
, 0);
1721 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
1722 struct snd_pcm_hw_params
*params
,
1723 struct snd_soc_dai
*dai
)
1725 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1726 struct snd_soc_device
*socdev
= rtd
->socdev
;
1727 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1728 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1729 u8 mode
, old_mode
, format
, old_format
;
1731 /* If the substream has 4 channel, do the necessary setup */
1732 if (params_channels(params
) == 4) {
1733 format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1734 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
1736 /* Safety check: are we in the correct operating mode and
1737 * the interface is in TDM mode? */
1738 if ((mode
& TWL4030_OPTION_1
) &&
1739 ((format
& TWL4030_AIF_FORMAT
) == TWL4030_AIF_FORMAT_TDM
))
1740 twl4030_tdm_enable(codec
, substream
->stream
, 1);
1745 if (twl4030
->configured
)
1746 /* Ignoring hw_params for already configured DAI */
1750 old_mode
= twl4030_read_reg_cache(codec
,
1751 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
1752 mode
= old_mode
& ~TWL4030_APLL_RATE
;
1754 switch (params_rate(params
)) {
1756 mode
|= TWL4030_APLL_RATE_8000
;
1759 mode
|= TWL4030_APLL_RATE_11025
;
1762 mode
|= TWL4030_APLL_RATE_12000
;
1765 mode
|= TWL4030_APLL_RATE_16000
;
1768 mode
|= TWL4030_APLL_RATE_22050
;
1771 mode
|= TWL4030_APLL_RATE_24000
;
1774 mode
|= TWL4030_APLL_RATE_32000
;
1777 mode
|= TWL4030_APLL_RATE_44100
;
1780 mode
|= TWL4030_APLL_RATE_48000
;
1783 mode
|= TWL4030_APLL_RATE_96000
;
1786 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1787 params_rate(params
));
1791 if (mode
!= old_mode
) {
1792 /* change rate and set CODECPDZ */
1793 twl4030_codec_enable(codec
, 0);
1794 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1795 twl4030_codec_enable(codec
, 1);
1799 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1800 format
= old_format
;
1801 format
&= ~TWL4030_DATA_WIDTH
;
1802 switch (params_format(params
)) {
1803 case SNDRV_PCM_FORMAT_S16_LE
:
1804 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1806 case SNDRV_PCM_FORMAT_S24_LE
:
1807 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1810 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1811 params_format(params
));
1815 if (format
!= old_format
) {
1817 /* clear CODECPDZ before changing format (codec requirement) */
1818 twl4030_codec_enable(codec
, 0);
1821 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1823 /* set CODECPDZ afterwards */
1824 twl4030_codec_enable(codec
, 1);
1827 /* Store the important parameters for the DAI configuration and set
1828 * the DAI as configured */
1829 twl4030
->configured
= 1;
1830 twl4030
->rate
= params_rate(params
);
1831 twl4030
->sample_bits
= hw_param_interval(params
,
1832 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
)->min
;
1833 twl4030
->channels
= params_channels(params
);
1835 /* If both playback and capture streams are open, and one of them
1836 * is setting the hw parameters right now (since we are here), set
1837 * constraints to the other stream to match the current one. */
1838 if (twl4030
->slave_substream
)
1839 twl4030_constraints(twl4030
, substream
);
1844 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1845 int clk_id
, unsigned int freq
, int dir
)
1847 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1848 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1856 dev_err(codec
->dev
, "Unsupported APLL mclk: %u\n", freq
);
1860 if ((freq
/ 1000) != twl4030
->sysclk
) {
1862 "Mismatch in APLL mclk: %u (configured: %u)\n",
1863 freq
, twl4030
->sysclk
* 1000);
1870 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1873 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1874 u8 old_format
, format
;
1877 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1878 format
= old_format
;
1880 /* set master/slave audio interface */
1881 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1882 case SND_SOC_DAIFMT_CBM_CFM
:
1883 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1884 format
&= ~(TWL4030_CLK256FS_EN
);
1886 case SND_SOC_DAIFMT_CBS_CFS
:
1887 format
|= TWL4030_AIF_SLAVE_EN
;
1888 format
|= TWL4030_CLK256FS_EN
;
1894 /* interface format */
1895 format
&= ~TWL4030_AIF_FORMAT
;
1896 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1897 case SND_SOC_DAIFMT_I2S
:
1898 format
|= TWL4030_AIF_FORMAT_CODEC
;
1900 case SND_SOC_DAIFMT_DSP_A
:
1901 format
|= TWL4030_AIF_FORMAT_TDM
;
1907 if (format
!= old_format
) {
1909 /* clear CODECPDZ before changing format (codec requirement) */
1910 twl4030_codec_enable(codec
, 0);
1913 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1915 /* set CODECPDZ afterwards */
1916 twl4030_codec_enable(codec
, 1);
1922 static int twl4030_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
1924 struct snd_soc_codec
*codec
= dai
->codec
;
1925 u8 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1928 reg
|= TWL4030_AIF_TRI_EN
;
1930 reg
&= ~TWL4030_AIF_TRI_EN
;
1932 return twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, reg
);
1935 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1936 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1937 static void twl4030_voice_enable(struct snd_soc_codec
*codec
, int direction
,
1942 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1944 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1945 mask
= TWL4030_ARXL1_VRX_EN
;
1947 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1954 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1957 static int twl4030_voice_startup(struct snd_pcm_substream
*substream
,
1958 struct snd_soc_dai
*dai
)
1960 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1961 struct snd_soc_device
*socdev
= rtd
->socdev
;
1962 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1963 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1966 /* If the system master clock is not 26MHz, the voice PCM interface is
1969 if (twl4030
->sysclk
!= 26000) {
1970 dev_err(codec
->dev
, "The board is configured for %u Hz, while"
1971 "the Voice interface needs 26MHz APLL mclk\n",
1972 twl4030
->sysclk
* 1000);
1976 /* If the codec mode is not option2, the voice PCM interface is not
1979 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
1982 if (mode
!= TWL4030_OPTION_2
) {
1983 printk(KERN_ERR
"TWL4030 voice startup: "
1984 "the codec mode is not option2\n");
1991 static void twl4030_voice_shutdown(struct snd_pcm_substream
*substream
,
1992 struct snd_soc_dai
*dai
)
1994 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1995 struct snd_soc_device
*socdev
= rtd
->socdev
;
1996 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1998 /* Enable voice digital filters */
1999 twl4030_voice_enable(codec
, substream
->stream
, 0);
2002 static int twl4030_voice_hw_params(struct snd_pcm_substream
*substream
,
2003 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
2005 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
2006 struct snd_soc_device
*socdev
= rtd
->socdev
;
2007 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2010 /* Enable voice digital filters */
2011 twl4030_voice_enable(codec
, substream
->stream
, 1);
2014 old_mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
2015 & ~(TWL4030_CODECPDZ
);
2018 switch (params_rate(params
)) {
2020 mode
&= ~(TWL4030_SEL_16K
);
2023 mode
|= TWL4030_SEL_16K
;
2026 printk(KERN_ERR
"TWL4030 voice hw params: unknown rate %d\n",
2027 params_rate(params
));
2031 if (mode
!= old_mode
) {
2032 /* change rate and set CODECPDZ */
2033 twl4030_codec_enable(codec
, 0);
2034 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
2035 twl4030_codec_enable(codec
, 1);
2041 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
2042 int clk_id
, unsigned int freq
, int dir
)
2044 struct snd_soc_codec
*codec
= codec_dai
->codec
;
2045 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
2047 if (freq
!= 26000000) {
2048 dev_err(codec
->dev
, "Unsupported APLL mclk: %u, the Voice"
2049 "interface needs 26MHz APLL mclk\n", freq
);
2052 if ((freq
/ 1000) != twl4030
->sysclk
) {
2054 "Mismatch in APLL mclk: %u (configured: %u)\n",
2055 freq
, twl4030
->sysclk
* 1000);
2061 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
2064 struct snd_soc_codec
*codec
= codec_dai
->codec
;
2065 u8 old_format
, format
;
2068 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
2069 format
= old_format
;
2071 /* set master/slave audio interface */
2072 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
2073 case SND_SOC_DAIFMT_CBM_CFM
:
2074 format
&= ~(TWL4030_VIF_SLAVE_EN
);
2076 case SND_SOC_DAIFMT_CBS_CFS
:
2077 format
|= TWL4030_VIF_SLAVE_EN
;
2083 /* clock inversion */
2084 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
2085 case SND_SOC_DAIFMT_IB_NF
:
2086 format
&= ~(TWL4030_VIF_FORMAT
);
2088 case SND_SOC_DAIFMT_NB_IF
:
2089 format
|= TWL4030_VIF_FORMAT
;
2095 if (format
!= old_format
) {
2096 /* change format and set CODECPDZ */
2097 twl4030_codec_enable(codec
, 0);
2098 twl4030_write(codec
, TWL4030_REG_VOICE_IF
, format
);
2099 twl4030_codec_enable(codec
, 1);
2105 static int twl4030_voice_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
2107 struct snd_soc_codec
*codec
= dai
->codec
;
2108 u8 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
2111 reg
|= TWL4030_VIF_TRI_EN
;
2113 reg
&= ~TWL4030_VIF_TRI_EN
;
2115 return twl4030_write(codec
, TWL4030_REG_VOICE_IF
, reg
);
2118 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2119 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2121 static struct snd_soc_dai_ops twl4030_dai_ops
= {
2122 .startup
= twl4030_startup
,
2123 .shutdown
= twl4030_shutdown
,
2124 .hw_params
= twl4030_hw_params
,
2125 .set_sysclk
= twl4030_set_dai_sysclk
,
2126 .set_fmt
= twl4030_set_dai_fmt
,
2127 .set_tristate
= twl4030_set_tristate
,
2130 static struct snd_soc_dai_ops twl4030_dai_voice_ops
= {
2131 .startup
= twl4030_voice_startup
,
2132 .shutdown
= twl4030_voice_shutdown
,
2133 .hw_params
= twl4030_voice_hw_params
,
2134 .set_sysclk
= twl4030_voice_set_dai_sysclk
,
2135 .set_fmt
= twl4030_voice_set_dai_fmt
,
2136 .set_tristate
= twl4030_voice_set_tristate
,
2139 struct snd_soc_dai twl4030_dai
[] = {
2143 .stream_name
= "HiFi Playback",
2146 .rates
= TWL4030_RATES
| SNDRV_PCM_RATE_96000
,
2147 .formats
= TWL4030_FORMATS
,},
2149 .stream_name
= "Capture",
2152 .rates
= TWL4030_RATES
,
2153 .formats
= TWL4030_FORMATS
,},
2154 .ops
= &twl4030_dai_ops
,
2157 .name
= "twl4030 Voice",
2159 .stream_name
= "Voice Playback",
2162 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
2163 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
2165 .stream_name
= "Capture",
2168 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
2169 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
2170 .ops
= &twl4030_dai_voice_ops
,
2173 EXPORT_SYMBOL_GPL(twl4030_dai
);
2175 static int twl4030_soc_suspend(struct platform_device
*pdev
, pm_message_t state
)
2177 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2178 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2180 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2185 static int twl4030_soc_resume(struct platform_device
*pdev
)
2187 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2188 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2190 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
2194 static struct snd_soc_codec
*twl4030_codec
;
2196 static int twl4030_soc_probe(struct platform_device
*pdev
)
2198 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2199 struct twl4030_setup_data
*setup
= socdev
->codec_data
;
2200 struct snd_soc_codec
*codec
;
2201 struct twl4030_priv
*twl4030
;
2204 BUG_ON(!twl4030_codec
);
2206 codec
= twl4030_codec
;
2207 twl4030
= snd_soc_codec_get_drvdata(codec
);
2208 socdev
->card
->codec
= codec
;
2210 /* Configuration for headset ramp delay from setup data */
2212 unsigned char hs_pop
;
2214 if (setup
->sysclk
!= twl4030
->sysclk
)
2215 dev_warn(&pdev
->dev
,
2216 "Mismatch in APLL mclk: %u (configured: %u)\n",
2217 setup
->sysclk
, twl4030
->sysclk
);
2219 hs_pop
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
2220 hs_pop
&= ~TWL4030_RAMP_DELAY
;
2221 hs_pop
|= (setup
->ramp_delay_value
<< 2);
2222 twl4030_write_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
2226 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
2228 dev_err(&pdev
->dev
, "failed to create pcms\n");
2232 snd_soc_add_controls(codec
, twl4030_snd_controls
,
2233 ARRAY_SIZE(twl4030_snd_controls
));
2234 twl4030_add_widgets(codec
);
2239 static int twl4030_soc_remove(struct platform_device
*pdev
)
2241 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2242 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2244 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2245 snd_soc_free_pcms(socdev
);
2246 snd_soc_dapm_free(socdev
);
2251 static int __devinit
twl4030_codec_probe(struct platform_device
*pdev
)
2253 struct twl4030_codec_audio_data
*pdata
= pdev
->dev
.platform_data
;
2254 struct snd_soc_codec
*codec
;
2255 struct twl4030_priv
*twl4030
;
2259 dev_err(&pdev
->dev
, "platform_data is missing\n");
2263 twl4030
= kzalloc(sizeof(struct twl4030_priv
), GFP_KERNEL
);
2264 if (twl4030
== NULL
) {
2265 dev_err(&pdev
->dev
, "Can not allocate memroy\n");
2269 codec
= &twl4030
->codec
;
2270 snd_soc_codec_set_drvdata(codec
, twl4030
);
2271 codec
->dev
= &pdev
->dev
;
2272 twl4030_dai
[0].dev
= &pdev
->dev
;
2273 twl4030_dai
[1].dev
= &pdev
->dev
;
2275 mutex_init(&codec
->mutex
);
2276 INIT_LIST_HEAD(&codec
->dapm_widgets
);
2277 INIT_LIST_HEAD(&codec
->dapm_paths
);
2279 codec
->name
= "twl4030";
2280 codec
->owner
= THIS_MODULE
;
2281 codec
->read
= twl4030_read_reg_cache
;
2282 codec
->write
= twl4030_write
;
2283 codec
->set_bias_level
= twl4030_set_bias_level
;
2284 codec
->dai
= twl4030_dai
;
2285 codec
->num_dai
= ARRAY_SIZE(twl4030_dai
);
2286 codec
->reg_cache_size
= sizeof(twl4030_reg
);
2287 codec
->reg_cache
= kmemdup(twl4030_reg
, sizeof(twl4030_reg
),
2289 if (codec
->reg_cache
== NULL
) {
2294 platform_set_drvdata(pdev
, twl4030
);
2295 twl4030_codec
= codec
;
2297 /* Set the defaults, and power up the codec */
2298 twl4030
->sysclk
= twl4030_codec_get_mclk() / 1000;
2299 twl4030_init_chip(codec
);
2300 codec
->bias_level
= SND_SOC_BIAS_OFF
;
2301 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
2303 ret
= snd_soc_register_codec(codec
);
2305 dev_err(codec
->dev
, "Failed to register codec: %d\n", ret
);
2309 ret
= snd_soc_register_dais(&twl4030_dai
[0], ARRAY_SIZE(twl4030_dai
));
2311 dev_err(codec
->dev
, "Failed to register DAIs: %d\n", ret
);
2312 snd_soc_unregister_codec(codec
);
2319 twl4030_codec_enable(codec
, 0);
2320 kfree(codec
->reg_cache
);
2326 static int __devexit
twl4030_codec_remove(struct platform_device
*pdev
)
2328 struct twl4030_priv
*twl4030
= platform_get_drvdata(pdev
);
2330 snd_soc_unregister_dais(&twl4030_dai
[0], ARRAY_SIZE(twl4030_dai
));
2331 snd_soc_unregister_codec(&twl4030
->codec
);
2332 kfree(twl4030
->codec
.reg_cache
);
2335 twl4030_codec
= NULL
;
2339 MODULE_ALIAS("platform:twl4030_codec_audio");
2341 static struct platform_driver twl4030_codec_driver
= {
2342 .probe
= twl4030_codec_probe
,
2343 .remove
= __devexit_p(twl4030_codec_remove
),
2345 .name
= "twl4030_codec_audio",
2346 .owner
= THIS_MODULE
,
2350 static int __init
twl4030_modinit(void)
2352 return platform_driver_register(&twl4030_codec_driver
);
2354 module_init(twl4030_modinit
);
2356 static void __exit
twl4030_exit(void)
2358 platform_driver_unregister(&twl4030_codec_driver
);
2360 module_exit(twl4030_exit
);
2362 struct snd_soc_codec_device soc_codec_dev_twl4030
= {
2363 .probe
= twl4030_soc_probe
,
2364 .remove
= twl4030_soc_remove
,
2365 .suspend
= twl4030_soc_suspend
,
2366 .resume
= twl4030_soc_resume
,
2368 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030
);
2370 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2371 MODULE_AUTHOR("Steve Sakoman");
2372 MODULE_LICENSE("GPL");