drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  * Jackie Li<yaodong.li@intel.com>
  25  */
  26 #ifndef __MDFLD_DSI_PKG_SENDER_H__
  27 #define __MDFLD_DSI_PKG_SENDER_H__
  28
  29 #include <linux/kthread.h>
  30
  31 #define MDFLD_MAX_DCS_PARAM     8
  32
  33 struct mdfld_dsi_pkg_sender {
  34         struct drm_device *dev;
  35         struct mdfld_dsi_connector *dsi_connector;
  36         u32 status;
  37         u32 panel_mode;
  38
  39         int pipe;
  40
  41         spinlock_t lock;
  42
  43         u32 pkg_num;
  44
  45         /* Registers */
  46         u32 dpll_reg;
  47         u32 dspcntr_reg;
  48         u32 pipeconf_reg;
  49         u32 pipestat_reg;
  50         u32 dsplinoff_reg;
  51         u32 dspsurf_reg;
  52
  53         u32 mipi_intr_stat_reg;
  54         u32 mipi_lp_gen_data_reg;
  55         u32 mipi_hs_gen_data_reg;
  56         u32 mipi_lp_gen_ctrl_reg;
  57         u32 mipi_hs_gen_ctrl_reg;
  58         u32 mipi_gen_fifo_stat_reg;
  59         u32 mipi_data_addr_reg;
  60         u32 mipi_data_len_reg;
  61         u32 mipi_cmd_addr_reg;
  62         u32 mipi_cmd_len_reg;
  63 };
  64
  65 /* DCS definitions */
  66 #define DCS_SOFT_RESET                  0x01
  67 #define DCS_ENTER_SLEEP_MODE            0x10
  68 #define DCS_EXIT_SLEEP_MODE             0x11
  69 #define DCS_SET_DISPLAY_OFF             0x28
  70 #define DCS_SET_DISPLAY_ON              0x29
  71 #define DCS_SET_COLUMN_ADDRESS          0x2a
  72 #define DCS_SET_PAGE_ADDRESS            0x2b
  73 #define DCS_WRITE_MEM_START             0x2c
  74 #define DCS_SET_TEAR_OFF                0x34
  75 #define DCS_SET_TEAR_ON                 0x35
  76
  77 extern int mdfld_dsi_pkg_sender_init(struct mdfld_dsi_connector *dsi_connector,
  78                                         int pipe);
  79 extern void mdfld_dsi_pkg_sender_destroy(struct mdfld_dsi_pkg_sender *sender);
  80 int mdfld_dsi_send_mcs_short(struct mdfld_dsi_pkg_sender *sender, u8 cmd,
  81                                         u8 param, u8 param_num, bool hs);
  82 int mdfld_dsi_send_mcs_long(struct mdfld_dsi_pkg_sender *sender, u8 *data,
  83                                         u32 len, bool hs);
  84 int mdfld_dsi_send_gen_short(struct mdfld_dsi_pkg_sender *sender, u8 param0,
  85                                         u8 param1, u8 param_num, bool hs);
  86 int mdfld_dsi_send_gen_long(struct mdfld_dsi_pkg_sender *sender, u8 *data,
  87                                         u32 len, bool hs);
  88 /* Read interfaces */
  89 int mdfld_dsi_read_mcs(struct mdfld_dsi_pkg_sender *sender, u8 cmd,
  90                 u32 *data, u16 len, bool hs);
  91
  92 #endif