sound/soc/codecs/wm8737.c

   1 /*
   2  * wm8737.c  --  WM8737 ALSA SoC Audio driver
   3  *
   4  * Copyright 2010 Wolfson Microelectronics plc
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/i2c.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/regulator/consumer.h>
  21 #include <linux/spi/spi.h>
  22 #include <linux/slab.h>
  23 #include <linux/of_device.h>
  24 #include <sound/core.h>
  25 #include <sound/pcm.h>
  26 #include <sound/pcm_params.h>
  27 #include <sound/soc.h>
  28 #include <sound/soc-dapm.h>
  29 #include <sound/initval.h>
  30 #include <sound/tlv.h>
  31
  32 #include "wm8737.h"
  33
  34 #define WM8737_NUM_SUPPLIES 4
  35 static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = {
  36         "DCVDD",
  37         "DBVDD",
  38         "AVDD",
  39         "MVDD",
  40 };
  41
  42 /* codec private data */
  43 struct wm8737_priv {
  44         enum snd_soc_control_type control_type;
  45         struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
  46         unsigned int mclk;
  47 };
  48
  49 static const u16 wm8737_reg[WM8737_REGISTER_COUNT] = {
  50         0x00C3,     /* R0  - Left PGA volume */
  51         0x00C3,     /* R1  - Right PGA volume */
  52         0x0007,     /* R2  - AUDIO path L */
  53         0x0007,     /* R3  - AUDIO path R */
  54         0x0000,     /* R4  - 3D Enhance */
  55         0x0000,     /* R5  - ADC Control */
  56         0x0000,     /* R6  - Power Management */
  57         0x000A,     /* R7  - Audio Format */
  58         0x0000,     /* R8  - Clocking */
  59         0x000F,     /* R9  - MIC Preamp Control */
  60         0x0003,     /* R10 - Misc Bias Control */
  61         0x0000,     /* R11 - Noise Gate */
  62         0x007C,     /* R12 - ALC1 */
  63         0x0000,     /* R13 - ALC2 */
  64         0x0032,     /* R14 - ALC3 */
  65 };
  66
  67 static int wm8737_reset(struct snd_soc_codec *codec)
  68 {
  69         return snd_soc_write(codec, WM8737_RESET, 0);
  70 }
  71
  72 static const unsigned int micboost_tlv[] = {
  73         TLV_DB_RANGE_HEAD(4),
  74         0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0),
  75         1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0),
  76         2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0),
  77         3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0),
  78 };
  79 static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1);
  80 static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0);
  81 static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0);
  82 static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0);
  83 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0);
  84
  85 static const char *micbias_enum_text[] = {
  86         "25%",
  87         "50%",
  88         "75%",
  89         "100%",
  90 };
  91
  92 static const struct soc_enum micbias_enum =
  93         SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 0, 4, micbias_enum_text);
  94
  95 static const char *low_cutoff_text[] = {
  96         "Low", "High"
  97 };
  98
  99 static const struct soc_enum low_3d =
 100         SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 6, 2, low_cutoff_text);
 101
 102 static const char *high_cutoff_text[] = {
 103         "High", "Low"
 104 };
 105
 106 static const struct soc_enum high_3d =
 107         SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 5, 2, high_cutoff_text);
 108
 109 static const char *alc_fn_text[] = {
 110         "Disabled", "Right", "Left", "Stereo"
 111 };
 112
 113 static const struct soc_enum alc_fn =
 114         SOC_ENUM_SINGLE(WM8737_ALC1, 7, 4, alc_fn_text);
 115
 116 static const char *alc_hold_text[] = {
 117         "0", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms",
 118         "170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s",
 119         "10.916s", "21.832s", "43.691s"
 120 };
 121
 122 static const struct soc_enum alc_hold =
 123         SOC_ENUM_SINGLE(WM8737_ALC2, 0, 16, alc_hold_text);
 124
 125 static const char *alc_atk_text[] = {
 126         "8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms",
 127         "1.075s", "2.15s", "4.3s", "8.6s"
 128 };
 129
 130 static const struct soc_enum alc_atk =
 131         SOC_ENUM_SINGLE(WM8737_ALC3, 0, 11, alc_atk_text);
 132
 133 static const char *alc_dcy_text[] = {
 134         "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s",
 135         "4.3s", "8.6s", "17.2s", "34.41s"
 136 };
 137
 138 static const struct soc_enum alc_dcy =
 139         SOC_ENUM_SINGLE(WM8737_ALC3, 4, 11, alc_dcy_text);
 140
 141 static const struct snd_kcontrol_new wm8737_snd_controls[] = {
 142 SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
 143                  6, 3, 0, micboost_tlv),
 144 SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
 145              4, 1, 0),
 146 SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
 147            3, 1, 0),
 148
 149 SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME,
 150                  WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv),
 151 SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
 152            2, 1, 0),
 153
 154 SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0),
 155
 156 SOC_ENUM("Mic PGA Bias", micbias_enum),
 157 SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0),
 158 SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1),
 159 SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0),
 160
 161 SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0),
 162 SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0),
 163 SOC_ENUM("3D Low Cut-off", low_3d),
 164 SOC_ENUM("3D High Cut-off", low_3d),
 165 SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv),
 166
 167 SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0),
 168 SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0,
 169                ng_tlv),
 170
 171 SOC_ENUM("ALC", alc_fn),
 172 SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv),
 173 SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv),
 174 SOC_ENUM("ALC Hold Time", alc_hold),
 175 SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0),
 176 SOC_ENUM("ALC Attack Time", alc_atk),
 177 SOC_ENUM("ALC Decay Time", alc_dcy),
 178 };
 179
 180 static const char *linsel_text[] = {
 181         "LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC",
 182 };
 183
 184 static const struct soc_enum linsel_enum =
 185         SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_L, 7, 4, linsel_text);
 186
 187 static const struct snd_kcontrol_new linsel_mux =
 188         SOC_DAPM_ENUM("LINSEL", linsel_enum);
 189
 190
 191 static const char *rinsel_text[] = {
 192         "RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC",
 193 };
 194
 195 static const struct soc_enum rinsel_enum =
 196         SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_R, 7, 4, rinsel_text);
 197
 198 static const struct snd_kcontrol_new rinsel_mux =
 199         SOC_DAPM_ENUM("RINSEL", rinsel_enum);
 200
 201 static const char *bypass_text[] = {
 202         "Direct", "Preamp"
 203 };
 204
 205 static const struct soc_enum lbypass_enum =
 206         SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 2, 2, bypass_text);
 207
 208 static const struct snd_kcontrol_new lbypass_mux =
 209         SOC_DAPM_ENUM("Left Bypass", lbypass_enum);
 210
 211
 212 static const struct soc_enum rbypass_enum =
 213         SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 3, 2, bypass_text);
 214
 215 static const struct snd_kcontrol_new rbypass_mux =
 216         SOC_DAPM_ENUM("Left Bypass", rbypass_enum);
 217
 218 static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = {
 219 SND_SOC_DAPM_INPUT("LINPUT1"),
 220 SND_SOC_DAPM_INPUT("LINPUT2"),
 221 SND_SOC_DAPM_INPUT("LINPUT3"),
 222 SND_SOC_DAPM_INPUT("RINPUT1"),
 223 SND_SOC_DAPM_INPUT("RINPUT2"),
 224 SND_SOC_DAPM_INPUT("RINPUT3"),
 225 SND_SOC_DAPM_INPUT("LACIN"),
 226 SND_SOC_DAPM_INPUT("RACIN"),
 227
 228 SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux),
 229 SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux),
 230
 231 SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux),
 232 SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux),
 233
 234 SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0),
 235 SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0),
 236
 237 SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0),
 238 SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0),
 239
 240 SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0),
 241 };
 242
 243 static const struct snd_soc_dapm_route intercon[] = {
 244         { "LINSEL", "LINPUT1", "LINPUT1" },
 245         { "LINSEL", "LINPUT2", "LINPUT2" },
 246         { "LINSEL", "LINPUT3", "LINPUT3" },
 247         { "LINSEL", "LINPUT1 DC", "LINPUT1" },
 248
 249         { "RINSEL", "RINPUT1", "RINPUT1" },
 250         { "RINSEL", "RINPUT2", "RINPUT2" },
 251         { "RINSEL", "RINPUT3", "RINPUT3" },
 252         { "RINSEL", "RINPUT1 DC", "RINPUT1" },
 253
 254         { "Left Preamp Mux", "Preamp", "LINSEL" },
 255         { "Left Preamp Mux", "Direct", "LACIN" },
 256
 257         { "Right Preamp Mux", "Preamp", "RINSEL" },
 258         { "Right Preamp Mux", "Direct", "RACIN" },
 259
 260         { "PGAL", NULL, "Left Preamp Mux" },
 261         { "PGAR", NULL, "Right Preamp Mux" },
 262
 263         { "ADCL", NULL, "PGAL" },
 264         { "ADCR", NULL, "PGAR" },
 265
 266         { "AIF", NULL, "ADCL" },
 267         { "AIF", NULL, "ADCR" },
 268 };
 269
 270 static int wm8737_add_widgets(struct snd_soc_codec *codec)
 271 {
 272         struct snd_soc_dapm_context *dapm = &codec->dapm;
 273
 274         snd_soc_dapm_new_controls(dapm, wm8737_dapm_widgets,
 275                                   ARRAY_SIZE(wm8737_dapm_widgets));
 276         snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
 277
 278         return 0;
 279 }
 280
 281 /* codec mclk clock divider coefficients */
 282 static const struct {
 283         u32 mclk;
 284         u32 rate;
 285         u8 usb;
 286         u8 sr;
 287 } coeff_div[] = {
 288         { 12288000,  8000, 0,  0x4 },
 289         { 12288000, 12000, 0,  0x8 },
 290         { 12288000, 16000, 0,  0xa },
 291         { 12288000, 24000, 0, 0x1c },
 292         { 12288000, 32000, 0,  0xc },
 293         { 12288000, 48000, 0,    0 },
 294         { 12288000, 96000, 0,  0xe },
 295
 296         { 11289600,  8000, 0, 0x14 },
 297         { 11289600, 11025, 0, 0x18 },
 298         { 11289600, 22050, 0, 0x1a },
 299         { 11289600, 44100, 0, 0x10 },
 300         { 11289600, 88200, 0, 0x1e },
 301
 302         { 18432000,  8000, 0,  0x5 },
 303         { 18432000, 12000, 0,  0x9 },
 304         { 18432000, 16000, 0,  0xb },
 305         { 18432000, 24000, 0, 0x1b },
 306         { 18432000, 32000, 0,  0xd },
 307         { 18432000, 48000, 0,  0x1 },
 308         { 18432000, 96000, 0, 0x1f },
 309
 310         { 16934400,  8000, 0, 0x15 },
 311         { 16934400, 11025, 0, 0x19 },
 312         { 16934400, 22050, 0, 0x1b },
 313         { 16934400, 44100, 0, 0x11 },
 314         { 16934400, 88200, 0, 0x1f },
 315
 316         { 12000000,  8000, 1,  0x4 },
 317         { 12000000, 11025, 1, 0x19 },
 318         { 12000000, 12000, 1,  0x8 },
 319         { 12000000, 16000, 1,  0xa },
 320         { 12000000, 22050, 1, 0x1b },
 321         { 12000000, 24000, 1, 0x1c },
 322         { 12000000, 32000, 1,  0xc },
 323         { 12000000, 44100, 1, 0x11 },
 324         { 12000000, 48000, 1,  0x0 },
 325         { 12000000, 88200, 1, 0x1f },
 326         { 12000000, 96000, 1,  0xe },
 327 };
 328
 329 static int wm8737_hw_params(struct snd_pcm_substream *substream,
 330                             struct snd_pcm_hw_params *params,
 331                             struct snd_soc_dai *dai)
 332 {
 333         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 334         struct snd_soc_codec *codec = rtd->codec;
 335         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 336         int i;
 337         u16 clocking = 0;
 338         u16 af = 0;
 339
 340         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
 341                 if (coeff_div[i].rate != params_rate(params))
 342                         continue;
 343
 344                 if (coeff_div[i].mclk == wm8737->mclk)
 345                         break;
 346
 347                 if (coeff_div[i].mclk == wm8737->mclk * 2) {
 348                         clocking |= WM8737_CLKDIV2;
 349                         break;
 350                 }
 351         }
 352
 353         if (i == ARRAY_SIZE(coeff_div)) {
 354                 dev_err(codec->dev, "%dHz MCLK can't support %dHz\n",
 355                         wm8737->mclk, params_rate(params));
 356                 return -EINVAL;
 357         }
 358
 359         clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT);
 360
 361         switch (params_format(params)) {
 362         case SNDRV_PCM_FORMAT_S16_LE:
 363                 break;
 364         case SNDRV_PCM_FORMAT_S20_3LE:
 365                 af |= 0x8;
 366                 break;
 367         case SNDRV_PCM_FORMAT_S24_LE:
 368                 af |= 0x10;
 369                 break;
 370         case SNDRV_PCM_FORMAT_S32_LE:
 371                 af |= 0x18;
 372                 break;
 373         default:
 374                 return -EINVAL;
 375         }
 376
 377         snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af);
 378         snd_soc_update_bits(codec, WM8737_CLOCKING,
 379                             WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK,
 380                             clocking);
 381
 382         return 0;
 383 }
 384
 385 static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 386                                  int clk_id, unsigned int freq, int dir)
 387 {
 388         struct snd_soc_codec *codec = codec_dai->codec;
 389         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 390         int i;
 391
 392         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
 393                 if (freq == coeff_div[i].mclk ||
 394                     freq == coeff_div[i].mclk * 2) {
 395                         wm8737->mclk = freq;
 396                         return 0;
 397                 }
 398         }
 399
 400         dev_err(codec->dev, "MCLK rate %dHz not supported\n", freq);
 401
 402         return -EINVAL;
 403 }
 404
 405
 406 static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai,
 407                 unsigned int fmt)
 408 {
 409         struct snd_soc_codec *codec = codec_dai->codec;
 410         u16 af = 0;
 411
 412         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 413         case SND_SOC_DAIFMT_CBM_CFM:
 414                 af |= WM8737_MS;
 415                 break;
 416         case SND_SOC_DAIFMT_CBS_CFS:
 417                 break;
 418         default:
 419                 return -EINVAL;
 420         }
 421
 422         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 423         case SND_SOC_DAIFMT_I2S:
 424                 af |= 0x2;
 425                 break;
 426         case SND_SOC_DAIFMT_RIGHT_J:
 427                 break;
 428         case SND_SOC_DAIFMT_LEFT_J:
 429                 af |= 0x1;
 430                 break;
 431         case SND_SOC_DAIFMT_DSP_A:
 432                 af |= 0x3;
 433                 break;
 434         case SND_SOC_DAIFMT_DSP_B:
 435                 af |= 0x13;
 436                 break;
 437         default:
 438                 return -EINVAL;
 439         }
 440
 441         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 442         case SND_SOC_DAIFMT_NB_NF:
 443                 break;
 444         case SND_SOC_DAIFMT_NB_IF:
 445                 af |= WM8737_LRP;
 446                 break;
 447         default:
 448                 return -EINVAL;
 449         }
 450
 451         snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT,
 452                             WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af);
 453
 454         return 0;
 455 }
 456
 457 static int wm8737_set_bias_level(struct snd_soc_codec *codec,
 458                                  enum snd_soc_bias_level level)
 459 {
 460         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 461         int ret;
 462
 463         switch (level) {
 464         case SND_SOC_BIAS_ON:
 465                 break;
 466
 467         case SND_SOC_BIAS_PREPARE:
 468                 /* VMID at 2*75k */
 469                 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
 470                                     WM8737_VMIDSEL_MASK, 0);
 471                 break;
 472
 473         case SND_SOC_BIAS_STANDBY:
 474                 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
 475                         ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
 476                                                     wm8737->supplies);
 477                         if (ret != 0) {
 478                                 dev_err(codec->dev,
 479                                         "Failed to enable supplies: %d\n",
 480                                         ret);
 481                                 return ret;
 482                         }
 483
 484                         snd_soc_cache_sync(codec);
 485
 486                         /* Fast VMID ramp at 2*2.5k */
 487                         snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
 488                                             WM8737_VMIDSEL_MASK, 0x4);
 489
 490                         /* Bring VMID up */
 491                         snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
 492                                             WM8737_VMID_MASK |
 493                                             WM8737_VREF_MASK,
 494                                             WM8737_VMID_MASK |
 495                                             WM8737_VREF_MASK);
 496
 497                         msleep(500);
 498                 }
 499
 500                 /* VMID at 2*300k */
 501                 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
 502                                     WM8737_VMIDSEL_MASK, 2);
 503
 504                 break;
 505
 506         case SND_SOC_BIAS_OFF:
 507                 snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
 508                                     WM8737_VMID_MASK | WM8737_VREF_MASK, 0);
 509
 510                 regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies),
 511                                        wm8737->supplies);
 512                 break;
 513         }
 514
 515         codec->dapm.bias_level = level;
 516         return 0;
 517 }
 518
 519 #define WM8737_RATES SNDRV_PCM_RATE_8000_96000
 520
 521 #define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 522                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
 523
 524 static const struct snd_soc_dai_ops wm8737_dai_ops = {
 525         .hw_params      = wm8737_hw_params,
 526         .set_sysclk     = wm8737_set_dai_sysclk,
 527         .set_fmt        = wm8737_set_dai_fmt,
 528 };
 529
 530 static struct snd_soc_dai_driver wm8737_dai = {
 531         .name = "wm8737",
 532         .capture = {
 533                 .stream_name = "Capture",
 534                 .channels_min = 2,  /* Mono modes not yet supported */
 535                 .channels_max = 2,
 536                 .rates = WM8737_RATES,
 537                 .formats = WM8737_FORMATS,
 538         },
 539         .ops = &wm8737_dai_ops,
 540 };
 541
 542 #ifdef CONFIG_PM
 543 static int wm8737_suspend(struct snd_soc_codec *codec, pm_message_t state)
 544 {
 545         wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
 546         return 0;
 547 }
 548
 549 static int wm8737_resume(struct snd_soc_codec *codec)
 550 {
 551         wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 552         return 0;
 553 }
 554 #else
 555 #define wm8737_suspend NULL
 556 #define wm8737_resume NULL
 557 #endif
 558
 559 static int wm8737_probe(struct snd_soc_codec *codec)
 560 {
 561         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 562         int ret, i;
 563
 564         ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8737->control_type);
 565         if (ret != 0) {
 566                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
 567                 return ret;
 568         }
 569
 570         for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
 571                 wm8737->supplies[i].supply = wm8737_supply_names[i];
 572
 573         ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8737->supplies),
 574                                  wm8737->supplies);
 575         if (ret != 0) {
 576                 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
 577                 return ret;
 578         }
 579
 580         ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
 581                                     wm8737->supplies);
 582         if (ret != 0) {
 583                 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
 584                 goto err_get;
 585         }
 586
 587         ret = wm8737_reset(codec);
 588         if (ret < 0) {
 589                 dev_err(codec->dev, "Failed to issue reset\n");
 590                 goto err_enable;
 591         }
 592
 593         snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
 594                             WM8737_LVU);
 595         snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
 596                             WM8737_RVU);
 597
 598         wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 599
 600         /* Bias level configuration will have done an extra enable */
 601         regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
 602
 603         snd_soc_add_controls(codec, wm8737_snd_controls,
 604                              ARRAY_SIZE(wm8737_snd_controls));
 605         wm8737_add_widgets(codec);
 606
 607         return 0;
 608
 609 err_enable:
 610         regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
 611 err_get:
 612         regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
 613
 614         return ret;
 615 }
 616
 617 static int wm8737_remove(struct snd_soc_codec *codec)
 618 {
 619         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 620
 621         wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
 622         regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
 623         return 0;
 624 }
 625
 626 static struct snd_soc_codec_driver soc_codec_dev_wm8737 = {
 627         .probe          = wm8737_probe,
 628         .remove         = wm8737_remove,
 629         .suspend        = wm8737_suspend,
 630         .resume         = wm8737_resume,
 631         .set_bias_level = wm8737_set_bias_level,
 632
 633         .reg_cache_size = WM8737_REGISTER_COUNT - 1, /* Skip reset */
 634         .reg_word_size  = sizeof(u16),
 635         .reg_cache_default = wm8737_reg,
 636 };
 637
 638 static const struct of_device_id wm8737_of_match[] = {
 639         { .compatible = "wlf,wm8737", },
 640         { }
 641 };
 642
 643 MODULE_DEVICE_TABLE(of, wm8737_of_match);
 644
 645 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 646 static __devinit int wm8737_i2c_probe(struct i2c_client *i2c,
 647                                       const struct i2c_device_id *id)
 648 {
 649         struct wm8737_priv *wm8737;
 650         int ret;
 651
 652         wm8737 = kzalloc(sizeof(struct wm8737_priv), GFP_KERNEL);
 653         if (wm8737 == NULL)
 654                 return -ENOMEM;
 655
 656         i2c_set_clientdata(i2c, wm8737);
 657         wm8737->control_type = SND_SOC_I2C;
 658
 659         ret =  snd_soc_register_codec(&i2c->dev,
 660                                       &soc_codec_dev_wm8737, &wm8737_dai, 1);
 661         if (ret < 0)
 662                 kfree(wm8737);
 663         return ret;
 664
 665 }
 666
 667 static __devexit int wm8737_i2c_remove(struct i2c_client *client)
 668 {
 669         snd_soc_unregister_codec(&client->dev);
 670         kfree(i2c_get_clientdata(client));
 671         return 0;
 672 }
 673
 674 static const struct i2c_device_id wm8737_i2c_id[] = {
 675         { "wm8737", 0 },
 676         { }
 677 };
 678 MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id);
 679
 680 static struct i2c_driver wm8737_i2c_driver = {
 681         .driver = {
 682                 .name = "wm8737",
 683                 .owner = THIS_MODULE,
 684                 .of_match_table = wm8737_of_match,
 685         },
 686         .probe =    wm8737_i2c_probe,
 687         .remove =   __devexit_p(wm8737_i2c_remove),
 688         .id_table = wm8737_i2c_id,
 689 };
 690 #endif
 691
 692 #if defined(CONFIG_SPI_MASTER)
 693 static int __devinit wm8737_spi_probe(struct spi_device *spi)
 694 {
 695         struct wm8737_priv *wm8737;
 696         int ret;
 697
 698         wm8737 = kzalloc(sizeof(struct wm8737_priv), GFP_KERNEL);
 699         if (wm8737 == NULL)
 700                 return -ENOMEM;
 701
 702         wm8737->control_type = SND_SOC_SPI;
 703         spi_set_drvdata(spi, wm8737);
 704
 705         ret = snd_soc_register_codec(&spi->dev,
 706                                      &soc_codec_dev_wm8737, &wm8737_dai, 1);
 707         if (ret < 0)
 708                 kfree(wm8737);
 709         return ret;
 710 }
 711
 712 static int __devexit wm8737_spi_remove(struct spi_device *spi)
 713 {
 714         snd_soc_unregister_codec(&spi->dev);
 715         kfree(spi_get_drvdata(spi));
 716         return 0;
 717 }
 718
 719 static struct spi_driver wm8737_spi_driver = {
 720         .driver = {
 721                 .name   = "wm8737",
 722                 .owner  = THIS_MODULE,
 723                 .of_match_table = wm8737_of_match,
 724         },
 725         .probe          = wm8737_spi_probe,
 726         .remove         = __devexit_p(wm8737_spi_remove),
 727 };
 728 #endif /* CONFIG_SPI_MASTER */
 729
 730 static int __init wm8737_modinit(void)
 731 {
 732         int ret;
 733 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 734         ret = i2c_add_driver(&wm8737_i2c_driver);
 735         if (ret != 0) {
 736                 printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n",
 737                        ret);
 738         }
 739 #endif
 740 #if defined(CONFIG_SPI_MASTER)
 741         ret = spi_register_driver(&wm8737_spi_driver);
 742         if (ret != 0) {
 743                 printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n",
 744                        ret);
 745         }
 746 #endif
 747         return 0;
 748 }
 749 module_init(wm8737_modinit);
 750
 751 static void __exit wm8737_exit(void)
 752 {
 753 #if defined(CONFIG_SPI_MASTER)
 754         spi_unregister_driver(&wm8737_spi_driver);
 755 #endif
 756 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 757         i2c_del_driver(&wm8737_i2c_driver);
 758 #endif
 759 }
 760 module_exit(wm8737_exit);
 761
 762 MODULE_DESCRIPTION("ASoC WM8737 driver");
 763 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
 764 MODULE_LICENSE("GPL");