drivers/atm/zatm.h

   1 /* drivers/atm/zatm.h - ZeitNet ZN122x device driver declarations */
   2
   3 /* Written 1995-1998 by Werner Almesberger, EPFL LRC/ICA */
   4
   5
   6 #ifndef DRIVER_ATM_ZATM_H
   7 #define DRIVER_ATM_ZATM_H
   8
   9 #include <linux/skbuff.h>
  10 #include <linux/atm.h>
  11 #include <linux/atmdev.h>
  12 #include <linux/sonet.h>
  13 #include <linux/pci.h>
  14
  15
  16 #define DEV_LABEL       "zatm"
  17
  18 #define MAX_AAL5_PDU    10240   /* allocate for AAL5 PDUs of this size */
  19 #define MAX_RX_SIZE_LD  14      /* ceil(log2((MAX_AAL5_PDU+47)/48)) */
  20
  21 #define LOW_MARK        12      /* start adding new buffers if less than 12 */
  22 #define HIGH_MARK       30      /* stop adding buffers after reaching 30 */
  23 #define OFF_CNG_THRES   5       /* threshold for offset changes */
  24
  25 #define RX_SIZE         2       /* RX lookup entry size (in bytes) */
  26 #define NR_POOLS        32      /* number of free buffer pointers */
  27 #define POOL_SIZE       8       /* buffer entry size (in bytes) */
  28 #define NR_SHAPERS      16      /* number of shapers */
  29 #define SHAPER_SIZE     4       /* shaper entry size (in bytes) */
  30 #define VC_SIZE         32      /* VC dsc (TX or RX) size (in bytes) */
  31
  32 #define RING_ENTRIES    32      /* ring entries (without back pointer) */
  33 #define RING_WORDS      4       /* ring element size */
  34 #define RING_SIZE       (sizeof(unsigned long)*(RING_ENTRIES+1)*RING_WORDS)
  35
  36 #define NR_MBX          4       /* four mailboxes */
  37 #define MBX_RX_0        0       /* mailbox indices */
  38 #define MBX_RX_1        1
  39 #define MBX_TX_0        2
  40 #define MBX_TX_1        3
  41
  42 struct zatm_vcc {
  43         /*-------------------------------- RX part */
  44         int rx_chan;                    /* RX channel, 0 if none */
  45         int pool;                       /* free buffer pool */
  46         /*-------------------------------- TX part */
  47         int tx_chan;                    /* TX channel, 0 if none */
  48         int shaper;                     /* shaper, <0 if none */
  49         struct sk_buff_head tx_queue;   /* list of buffers in transit */
  50         wait_queue_head_t tx_wait;      /* for close */
  51         u32 *ring;                      /* transmit ring */
  52         int ring_curr;                  /* current write position */
  53         int txing;                      /* number of transmits in progress */
  54         struct sk_buff_head backlog;    /* list of buffers waiting for ring */
  55 };
  56
  57 struct zatm_dev {
  58         /*-------------------------------- TX part */
  59         int tx_bw;                      /* remaining bandwidth */
  60         u32 free_shapers;               /* bit set */
  61         int ubr;                        /* UBR shaper; -1 if none */
  62         int ubr_ref_cnt;                /* number of VCs using UBR shaper */
  63         /*-------------------------------- RX part */
  64         int pool_ref[NR_POOLS];         /* free buffer pool usage counters */
  65         volatile struct sk_buff *last_free[NR_POOLS];
  66                                         /* last entry in respective pool */
  67         struct sk_buff_head pool[NR_POOLS];/* free buffer pools */
  68         struct zatm_pool_info pool_info[NR_POOLS]; /* pool information */
  69         /*-------------------------------- maps */
  70         struct atm_vcc **tx_map;        /* TX VCCs */
  71         struct atm_vcc **rx_map;        /* RX VCCs */
  72         int chans;                      /* map size, must be 2^n */
  73         /*-------------------------------- mailboxes */
  74         unsigned long mbx_start[NR_MBX];/* start addresses */
  75         dma_addr_t mbx_dma[NR_MBX];
  76         u16 mbx_end[NR_MBX];            /* end offset (in bytes) */
  77         /*-------------------------------- other pointers */
  78         u32 pool_base;                  /* Free buffer pool dsc (word addr) */
  79         /*-------------------------------- ZATM links */
  80         struct atm_dev *more;           /* other ZATM devices */
  81         /*-------------------------------- general information */
  82         int mem;                        /* RAM on board (in bytes) */
  83         int khz;                        /* timer clock */
  84         int copper;                     /* PHY type */
  85         unsigned char irq;              /* IRQ */
  86         unsigned int base;              /* IO base address */
  87         struct pci_dev *pci_dev;        /* PCI stuff */
  88         spinlock_t lock;
  89 };
  90
  91
  92 #define ZATM_DEV(d) ((struct zatm_dev *) (d)->dev_data)
  93 #define ZATM_VCC(d) ((struct zatm_vcc *) (d)->dev_data)
  94
  95
  96 struct zatm_skb_prv {
  97         struct atm_skb_data _;          /* reserved */
  98         u32 *dsc;                       /* pointer to skb's descriptor */
  99 };
 100
 101 #define ZATM_PRV_DSC(skb) (((struct zatm_skb_prv *) (skb)->cb)->dsc)
 102
 103 #endif