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netxen: fix tx timeout recovery
[linux-2.6/libata-dev.git] / drivers / net / netxen / netxen_nic_init.c
blobba62411f35321acb99d215de90a912e15665d420
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * Copyright (C) 2009 - QLogic Corporation.
4 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
19 * MA 02111-1307, USA.
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.
23 *
24 */
25
26 #include <linux/netdevice.h>
27 #include <linux/delay.h>
28 #include "netxen_nic.h"
29 #include "netxen_nic_hw.h"
30
31 struct crb_addr_pair {
32 u32 addr;
33 u32 data;
34 };
35
36 #define NETXEN_MAX_CRB_XFORM 60
37 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
38 #define NETXEN_ADDR_ERROR (0xffffffff)
39
40 #define crb_addr_transform(name) \
41 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
42 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
43
44 #define NETXEN_NIC_XDMA_RESET 0x8000ff
45
46 static void
47 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
48 struct nx_host_rds_ring *rds_ring);
49 static int netxen_p3_has_mn(struct netxen_adapter *adapter);
50
51 static void crb_addr_transform_setup(void)
52 {
53 crb_addr_transform(XDMA);
54 crb_addr_transform(TIMR);
55 crb_addr_transform(SRE);
56 crb_addr_transform(SQN3);
57 crb_addr_transform(SQN2);
58 crb_addr_transform(SQN1);
59 crb_addr_transform(SQN0);
60 crb_addr_transform(SQS3);
61 crb_addr_transform(SQS2);
62 crb_addr_transform(SQS1);
63 crb_addr_transform(SQS0);
64 crb_addr_transform(RPMX7);
65 crb_addr_transform(RPMX6);
66 crb_addr_transform(RPMX5);
67 crb_addr_transform(RPMX4);
68 crb_addr_transform(RPMX3);
69 crb_addr_transform(RPMX2);
70 crb_addr_transform(RPMX1);
71 crb_addr_transform(RPMX0);
72 crb_addr_transform(ROMUSB);
73 crb_addr_transform(SN);
74 crb_addr_transform(QMN);
75 crb_addr_transform(QMS);
76 crb_addr_transform(PGNI);
77 crb_addr_transform(PGND);
78 crb_addr_transform(PGN3);
79 crb_addr_transform(PGN2);
80 crb_addr_transform(PGN1);
81 crb_addr_transform(PGN0);
82 crb_addr_transform(PGSI);
83 crb_addr_transform(PGSD);
84 crb_addr_transform(PGS3);
85 crb_addr_transform(PGS2);
86 crb_addr_transform(PGS1);
87 crb_addr_transform(PGS0);
88 crb_addr_transform(PS);
89 crb_addr_transform(PH);
90 crb_addr_transform(NIU);
91 crb_addr_transform(I2Q);
92 crb_addr_transform(EG);
93 crb_addr_transform(MN);
94 crb_addr_transform(MS);
95 crb_addr_transform(CAS2);
96 crb_addr_transform(CAS1);
97 crb_addr_transform(CAS0);
98 crb_addr_transform(CAM);
99 crb_addr_transform(C2C1);
100 crb_addr_transform(C2C0);
101 crb_addr_transform(SMB);
102 crb_addr_transform(OCM0);
103 crb_addr_transform(I2C0);
104 }
105
106 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
107 {
108 struct netxen_recv_context *recv_ctx;
109 struct nx_host_rds_ring *rds_ring;
110 struct netxen_rx_buffer *rx_buf;
111 int i, ring;
112
113 recv_ctx = &adapter->recv_ctx;
114 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
115 rds_ring = &recv_ctx->rds_rings[ring];
116 for (i = 0; i < rds_ring->num_desc; ++i) {
117 rx_buf = &(rds_ring->rx_buf_arr[i]);
118 if (rx_buf->state == NETXEN_BUFFER_FREE)
119 continue;
120 pci_unmap_single(adapter->pdev,
121 rx_buf->dma,
122 rds_ring->dma_size,
123 PCI_DMA_FROMDEVICE);
124 if (rx_buf->skb != NULL)
125 dev_kfree_skb_any(rx_buf->skb);
126 }
127 }
128 }
129
130 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
131 {
132 struct netxen_cmd_buffer *cmd_buf;
133 struct netxen_skb_frag *buffrag;
134 int i, j;
135 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
136
137 cmd_buf = tx_ring->cmd_buf_arr;
138 for (i = 0; i < tx_ring->num_desc; i++) {
139 buffrag = cmd_buf->frag_array;
140 if (buffrag->dma) {
141 pci_unmap_single(adapter->pdev, buffrag->dma,
142 buffrag->length, PCI_DMA_TODEVICE);
143 buffrag->dma = 0ULL;
144 }
145 for (j = 0; j < cmd_buf->frag_count; j++) {
146 buffrag++;
147 if (buffrag->dma) {
148 pci_unmap_page(adapter->pdev, buffrag->dma,
149 buffrag->length,
150 PCI_DMA_TODEVICE);
151 buffrag->dma = 0ULL;
152 }
153 }
154 if (cmd_buf->skb) {
155 dev_kfree_skb_any(cmd_buf->skb);
156 cmd_buf->skb = NULL;
157 }
158 cmd_buf++;
159 }
160 }
161
162 void netxen_free_sw_resources(struct netxen_adapter *adapter)
163 {
164 struct netxen_recv_context *recv_ctx;
165 struct nx_host_rds_ring *rds_ring;
166 struct nx_host_tx_ring *tx_ring;
167 int ring;
168
169 recv_ctx = &adapter->recv_ctx;
170
171 if (recv_ctx->rds_rings == NULL)
172 goto skip_rds;
173
174 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
175 rds_ring = &recv_ctx->rds_rings[ring];
176 vfree(rds_ring->rx_buf_arr);
177 rds_ring->rx_buf_arr = NULL;
178 }
179 kfree(recv_ctx->rds_rings);
180
181 skip_rds:
182 if (adapter->tx_ring == NULL)
183 return;
184
185 tx_ring = adapter->tx_ring;
186 vfree(tx_ring->cmd_buf_arr);
187 }
188
189 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
190 {
191 struct netxen_recv_context *recv_ctx;
192 struct nx_host_rds_ring *rds_ring;
193 struct nx_host_sds_ring *sds_ring;
194 struct nx_host_tx_ring *tx_ring;
195 struct netxen_rx_buffer *rx_buf;
196 int ring, i, size;
197
198 struct netxen_cmd_buffer *cmd_buf_arr;
199 struct net_device *netdev = adapter->netdev;
200 struct pci_dev *pdev = adapter->pdev;
201
202 size = sizeof(struct nx_host_tx_ring);
203 tx_ring = kzalloc(size, GFP_KERNEL);
204 if (tx_ring == NULL) {
205 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
206 netdev->name);
207 return -ENOMEM;
208 }
209 adapter->tx_ring = tx_ring;
210
211 tx_ring->num_desc = adapter->num_txd;
212 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
213
214 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
215 if (cmd_buf_arr == NULL) {
216 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
217 netdev->name);
218 return -ENOMEM;
219 }
220 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
221 tx_ring->cmd_buf_arr = cmd_buf_arr;
222
223 recv_ctx = &adapter->recv_ctx;
224
225 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
226 rds_ring = kzalloc(size, GFP_KERNEL);
227 if (rds_ring == NULL) {
228 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
229 netdev->name);
230 return -ENOMEM;
231 }
232 recv_ctx->rds_rings = rds_ring;
233
234 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
235 rds_ring = &recv_ctx->rds_rings[ring];
236 switch (ring) {
237 case RCV_RING_NORMAL:
238 rds_ring->num_desc = adapter->num_rxd;
239 if (adapter->ahw.cut_through) {
240 rds_ring->dma_size =
241 NX_CT_DEFAULT_RX_BUF_LEN;
242 rds_ring->skb_size =
243 NX_CT_DEFAULT_RX_BUF_LEN;
244 } else {
245 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
246 rds_ring->dma_size =
247 NX_P3_RX_BUF_MAX_LEN;
248 else
249 rds_ring->dma_size =
250 NX_P2_RX_BUF_MAX_LEN;
251 rds_ring->skb_size =
252 rds_ring->dma_size + NET_IP_ALIGN;
253 }
254 break;
255
256 case RCV_RING_JUMBO:
257 rds_ring->num_desc = adapter->num_jumbo_rxd;
258 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
259 rds_ring->dma_size =
260 NX_P3_RX_JUMBO_BUF_MAX_LEN;
261 else
262 rds_ring->dma_size =
263 NX_P2_RX_JUMBO_BUF_MAX_LEN;
264
265 if (adapter->capabilities & NX_CAP0_HW_LRO)
266 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
267
268 rds_ring->skb_size =
269 rds_ring->dma_size + NET_IP_ALIGN;
270 break;
271
272 case RCV_RING_LRO:
273 rds_ring->num_desc = adapter->num_lro_rxd;
274 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
275 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
276 break;
277
278 }
279 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
280 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
281 if (rds_ring->rx_buf_arr == NULL) {
282 printk(KERN_ERR "%s: Failed to allocate "
283 "rx buffer ring %d\n",
284 netdev->name, ring);
285 /* free whatever was already allocated */
286 goto err_out;
287 }
288 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
289 INIT_LIST_HEAD(&rds_ring->free_list);
290 /*
291 * Now go through all of them, set reference handles
292 * and put them in the queues.
293 */
294 rx_buf = rds_ring->rx_buf_arr;
295 for (i = 0; i < rds_ring->num_desc; i++) {
296 list_add_tail(&rx_buf->list,
297 &rds_ring->free_list);
298 rx_buf->ref_handle = i;
299 rx_buf->state = NETXEN_BUFFER_FREE;
300 rx_buf++;
301 }
302 spin_lock_init(&rds_ring->lock);
303 }
304
305 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
306 sds_ring = &recv_ctx->sds_rings[ring];
307 sds_ring->irq = adapter->msix_entries[ring].vector;
308 sds_ring->adapter = adapter;
309 sds_ring->num_desc = adapter->num_rxd;
310
311 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
312 INIT_LIST_HEAD(&sds_ring->free_list[i]);
313 }
314
315 return 0;
316
317 err_out:
318 netxen_free_sw_resources(adapter);
319 return -ENOMEM;
320 }
321
322 /*
323 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
324 * address to external PCI CRB address.
325 */
326 static u32 netxen_decode_crb_addr(u32 addr)
327 {
328 int i;
329 u32 base_addr, offset, pci_base;
330
331 crb_addr_transform_setup();
332
333 pci_base = NETXEN_ADDR_ERROR;
334 base_addr = addr & 0xfff00000;
335 offset = addr & 0x000fffff;
336
337 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
338 if (crb_addr_xform[i] == base_addr) {
339 pci_base = i << 20;
340 break;
341 }
342 }
343 if (pci_base == NETXEN_ADDR_ERROR)
344 return pci_base;
345 else
346 return (pci_base + offset);
347 }
348
349 #define NETXEN_MAX_ROM_WAIT_USEC 100
350
351 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
352 {
353 long timeout = 0;
354 long done = 0;
355
356 cond_resched();
357
358 while (done == 0) {
359 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
360 done &= 2;
361 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
362 dev_err(&adapter->pdev->dev,
363 "Timeout reached waiting for rom done");
364 return -EIO;
365 }
366 udelay(1);
367 }
368 return 0;
369 }
370
371 static int do_rom_fast_read(struct netxen_adapter *adapter,
372 int addr, int *valp)
373 {
374 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
375 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
376 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
377 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
378 if (netxen_wait_rom_done(adapter)) {
379 printk("Error waiting for rom done\n");
380 return -EIO;
381 }
382 /* reset abyte_cnt and dummy_byte_cnt */
383 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
384 udelay(10);
385 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
386
387 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
388 return 0;
389 }
390
391 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
392 u8 *bytes, size_t size)
393 {
394 int addridx;
395 int ret = 0;
396
397 for (addridx = addr; addridx < (addr + size); addridx += 4) {
398 int v;
399 ret = do_rom_fast_read(adapter, addridx, &v);
400 if (ret != 0)
401 break;
402 *(__le32 *)bytes = cpu_to_le32(v);
403 bytes += 4;
404 }
405
406 return ret;
407 }
408
409 int
410 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
411 u8 *bytes, size_t size)
412 {
413 int ret;
414
415 ret = netxen_rom_lock(adapter);
416 if (ret < 0)
417 return ret;
418
419 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
420
421 netxen_rom_unlock(adapter);
422 return ret;
423 }
424
425 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
426 {
427 int ret;
428
429 if (netxen_rom_lock(adapter) != 0)
430 return -EIO;
431
432 ret = do_rom_fast_read(adapter, addr, valp);
433 netxen_rom_unlock(adapter);
434 return ret;
435 }
436
437 #define NETXEN_BOARDTYPE 0x4008
438 #define NETXEN_BOARDNUM 0x400c
439 #define NETXEN_CHIPNUM 0x4010
440
441 int netxen_pinit_from_rom(struct netxen_adapter *adapter)
442 {
443 int addr, val;
444 int i, n, init_delay = 0;
445 struct crb_addr_pair *buf;
446 unsigned offset;
447 u32 off;
448
449 /* resetall */
450 netxen_rom_lock(adapter);
451 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
452 netxen_rom_unlock(adapter);
453
454 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
455 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
456 (n != 0xcafecafe) ||
457 netxen_rom_fast_read(adapter, 4, &n) != 0) {
458 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
459 "n: %08x\n", netxen_nic_driver_name, n);
460 return -EIO;
461 }
462 offset = n & 0xffffU;
463 n = (n >> 16) & 0xffffU;
464 } else {
465 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
466 !(n & 0x80000000)) {
467 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
468 "n: %08x\n", netxen_nic_driver_name, n);
469 return -EIO;
470 }
471 offset = 1;
472 n &= ~0x80000000;
473 }
474
475 if (n >= 1024) {
476 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
477 " initialized.\n", __func__, n);
478 return -EIO;
479 }
480
481 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
482 if (buf == NULL) {
483 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
484 netxen_nic_driver_name);
485 return -ENOMEM;
486 }
487
488 for (i = 0; i < n; i++) {
489 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
490 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
491 kfree(buf);
492 return -EIO;
493 }
494
495 buf[i].addr = addr;
496 buf[i].data = val;
497
498 }
499
500 for (i = 0; i < n; i++) {
501
502 off = netxen_decode_crb_addr(buf[i].addr);
503 if (off == NETXEN_ADDR_ERROR) {
504 printk(KERN_ERR"CRB init value out of range %x\n",
505 buf[i].addr);
506 continue;
507 }
508 off += NETXEN_PCI_CRBSPACE;
509
510 if (off & 1)
511 continue;
512
513 /* skipping cold reboot MAGIC */
514 if (off == NETXEN_CAM_RAM(0x1fc))
515 continue;
516
517 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
518 if (off == (NETXEN_CRB_I2C0 + 0x1c))
519 continue;
520 /* do not reset PCI */
521 if (off == (ROMUSB_GLB + 0xbc))
522 continue;
523 if (off == (ROMUSB_GLB + 0xa8))
524 continue;
525 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
526 continue;
527 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
528 continue;
529 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
530 continue;
531 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET)
532 continue;
533 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) &&
534 !NX_IS_REVISION_P3P(adapter->ahw.revision_id))
535 buf[i].data = 0x1020;
536 /* skip the function enable register */
537 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
538 continue;
539 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
540 continue;
541 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
542 continue;
543 }
544
545 init_delay = 1;
546 /* After writing this register, HW needs time for CRB */
547 /* to quiet down (else crb_window returns 0xffffffff) */
548 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
549 init_delay = 1000;
550 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
551 /* hold xdma in reset also */
552 buf[i].data = NETXEN_NIC_XDMA_RESET;
553 buf[i].data = 0x8000ff;
554 }
555 }
556
557 NXWR32(adapter, off, buf[i].data);
558
559 msleep(init_delay);
560 }
561 kfree(buf);
562
563 /* disable_peg_cache_all */
564
565 /* unreset_net_cache */
566 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
567 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
568 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
569 }
570
571 /* p2dn replyCount */
572 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
573 /* disable_peg_cache 0 */
574 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
575 /* disable_peg_cache 1 */
576 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
577
578 /* peg_clr_all */
579
580 /* peg_clr 0 */
581 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
582 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
583 /* peg_clr 1 */
584 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
585 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
586 /* peg_clr 2 */
587 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
588 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
589 /* peg_clr 3 */
590 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
591 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
592 return 0;
593 }
594
595 static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section)
596 {
597 uint32_t i;
598 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
599 __le32 entries = cpu_to_le32(directory->num_entries);
600
601 for (i = 0; i < entries; i++) {
602
603 __le32 offs = cpu_to_le32(directory->findex) +
604 (i * cpu_to_le32(directory->entry_size));
605 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
606
607 if (tab_type == section)
608 return (struct uni_table_desc *) &unirom[offs];
609 }
610
611 return NULL;
612 }
613
614 static int
615 nx_set_product_offs(struct netxen_adapter *adapter)
616 {
617 struct uni_table_desc *ptab_descr;
618 const u8 *unirom = adapter->fw->data;
619 uint32_t i;
620 __le32 entries;
621
622 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ?
623 1 : netxen_p3_has_mn(adapter);
624
625 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL);
626 if (ptab_descr == NULL)
627 return -1;
628
629 entries = cpu_to_le32(ptab_descr->num_entries);
630
631 nomn:
632 for (i = 0; i < entries; i++) {
633
634 __le32 flags, file_chiprev, offs;
635 u8 chiprev = adapter->ahw.revision_id;
636 uint32_t flagbit;
637
638 offs = cpu_to_le32(ptab_descr->findex) +
639 (i * cpu_to_le32(ptab_descr->entry_size));
640 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF));
641 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
642 NX_UNI_CHIP_REV_OFF));
643
644 flagbit = mn_present ? 1 : 2;
645
646 if ((chiprev == file_chiprev) &&
647 ((1ULL << flagbit) & flags)) {
648 adapter->file_prd_off = offs;
649 return 0;
650 }
651 }
652
653 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
654 mn_present = 0;
655 goto nomn;
656 }
657
658 return -1;
659 }
660
661
662 static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter,
663 u32 section, u32 idx_offset)
664 {
665 const u8 *unirom = adapter->fw->data;
666 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
667 idx_offset));
668 struct uni_table_desc *tab_desc;
669 __le32 offs;
670
671 tab_desc = nx_get_table_desc(unirom, section);
672
673 if (tab_desc == NULL)
674 return NULL;
675
676 offs = cpu_to_le32(tab_desc->findex) +
677 (cpu_to_le32(tab_desc->entry_size) * idx);
678
679 return (struct uni_data_desc *)&unirom[offs];
680 }
681
682 static u8 *
683 nx_get_bootld_offs(struct netxen_adapter *adapter)
684 {
685 u32 offs = NETXEN_BOOTLD_START;
686
687 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
688 offs = cpu_to_le32((nx_get_data_desc(adapter,
689 NX_UNI_DIR_SECT_BOOTLD,
690 NX_UNI_BOOTLD_IDX_OFF))->findex);
691
692 return (u8 *)&adapter->fw->data[offs];
693 }
694
695 static u8 *
696 nx_get_fw_offs(struct netxen_adapter *adapter)
697 {
698 u32 offs = NETXEN_IMAGE_START;
699
700 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
701 offs = cpu_to_le32((nx_get_data_desc(adapter,
702 NX_UNI_DIR_SECT_FW,
703 NX_UNI_FIRMWARE_IDX_OFF))->findex);
704
705 return (u8 *)&adapter->fw->data[offs];
706 }
707
708 static __le32
709 nx_get_fw_size(struct netxen_adapter *adapter)
710 {
711 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
712 return cpu_to_le32((nx_get_data_desc(adapter,
713 NX_UNI_DIR_SECT_FW,
714 NX_UNI_FIRMWARE_IDX_OFF))->size);
715 else
716 return cpu_to_le32(
717 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]);
718 }
719
720 static __le32
721 nx_get_fw_version(struct netxen_adapter *adapter)
722 {
723 struct uni_data_desc *fw_data_desc;
724 const struct firmware *fw = adapter->fw;
725 __le32 major, minor, sub;
726 const u8 *ver_str;
727 int i, ret = 0;
728
729 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
730
731 fw_data_desc = nx_get_data_desc(adapter,
732 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF);
733 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
734 cpu_to_le32(fw_data_desc->size) - 17;
735
736 for (i = 0; i < 12; i++) {
737 if (!strncmp(&ver_str[i], "REV=", 4)) {
738 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
739 &major, &minor, &sub);
740 break;
741 }
742 }
743
744 if (ret != 3)
745 return 0;
746
747 return major + (minor << 8) + (sub << 16);
748
749 } else
750 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
751 }
752
753 static __le32
754 nx_get_bios_version(struct netxen_adapter *adapter)
755 {
756 const struct firmware *fw = adapter->fw;
757 __le32 bios_ver, prd_off = adapter->file_prd_off;
758
759 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
760 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
761 + NX_UNI_BIOS_VERSION_OFF));
762 return (bios_ver << 24) + ((bios_ver >> 8) & 0xff00) +
763 (bios_ver >> 24);
764 } else
765 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
766
767 }
768
769 int
770 netxen_need_fw_reset(struct netxen_adapter *adapter)
771 {
772 u32 count, old_count;
773 u32 val, version, major, minor, build;
774 int i, timeout;
775 u8 fw_type;
776
777 /* NX2031 firmware doesn't support heartbit */
778 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
779 return 1;
780
781 if (adapter->need_fw_reset)
782 return 1;
783
784 /* last attempt had failed */
785 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
786 return 1;
787
788 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
789
790 for (i = 0; i < 10; i++) {
791
792 timeout = msleep_interruptible(200);
793 if (timeout) {
794 NXWR32(adapter, CRB_CMDPEG_STATE,
795 PHAN_INITIALIZE_FAILED);
796 return -EINTR;
797 }
798
799 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
800 if (count != old_count)
801 break;
802 }
803
804 /* firmware is dead */
805 if (count == old_count)
806 return 1;
807
808 /* check if we have got newer or different file firmware */
809 if (adapter->fw) {
810
811 val = nx_get_fw_version(adapter);
812
813 version = NETXEN_DECODE_VERSION(val);
814
815 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
816 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
817 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
818
819 if (version > NETXEN_VERSION_CODE(major, minor, build))
820 return 1;
821
822 if (version == NETXEN_VERSION_CODE(major, minor, build) &&
823 adapter->fw_type != NX_UNIFIED_ROMIMAGE) {
824
825 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
826 fw_type = (val & 0x4) ?
827 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
828
829 if (adapter->fw_type != fw_type)
830 return 1;
831 }
832 }
833
834 return 0;
835 }
836
837 static char *fw_name[] = {
838 NX_P2_MN_ROMIMAGE_NAME,
839 NX_P3_CT_ROMIMAGE_NAME,
840 NX_P3_MN_ROMIMAGE_NAME,
841 NX_UNIFIED_ROMIMAGE_NAME,
842 NX_FLASH_ROMIMAGE_NAME,
843 };
844
845 int
846 netxen_load_firmware(struct netxen_adapter *adapter)
847 {
848 u64 *ptr64;
849 u32 i, flashaddr, size;
850 const struct firmware *fw = adapter->fw;
851 struct pci_dev *pdev = adapter->pdev;
852
853 dev_info(&pdev->dev, "loading firmware from %s\n",
854 fw_name[adapter->fw_type]);
855
856 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
857 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
858
859 if (fw) {
860 __le64 data;
861
862 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
863
864 ptr64 = (u64 *)nx_get_bootld_offs(adapter);
865 flashaddr = NETXEN_BOOTLD_START;
866
867 for (i = 0; i < size; i++) {
868 data = cpu_to_le64(ptr64[i]);
869
870 if (adapter->pci_mem_write(adapter, flashaddr, data))
871 return -EIO;
872
873 flashaddr += 8;
874 }
875
876 size = (__force u32)nx_get_fw_size(adapter) / 8;
877
878 ptr64 = (u64 *)nx_get_fw_offs(adapter);
879 flashaddr = NETXEN_IMAGE_START;
880
881 for (i = 0; i < size; i++) {
882 data = cpu_to_le64(ptr64[i]);
883
884 if (adapter->pci_mem_write(adapter,
885 flashaddr, data))
886 return -EIO;
887
888 flashaddr += 8;
889 }
890 } else {
891 u64 data;
892 u32 hi, lo;
893
894 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
895 flashaddr = NETXEN_BOOTLD_START;
896
897 for (i = 0; i < size; i++) {
898 if (netxen_rom_fast_read(adapter,
899 flashaddr, (int *)&lo) != 0)
900 return -EIO;
901 if (netxen_rom_fast_read(adapter,
902 flashaddr + 4, (int *)&hi) != 0)
903 return -EIO;
904
905 /* hi, lo are already in host endian byteorder */
906 data = (((u64)hi << 32) | lo);
907
908 if (adapter->pci_mem_write(adapter,
909 flashaddr, data))
910 return -EIO;
911
912 flashaddr += 8;
913 }
914 }
915 msleep(1);
916
917 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) {
918 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020);
919 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e);
920 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
921 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
922 else {
923 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
924 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
925 }
926
927 return 0;
928 }
929
930 static int
931 netxen_validate_firmware(struct netxen_adapter *adapter)
932 {
933 __le32 val;
934 u32 ver, min_ver, bios, min_size;
935 struct pci_dev *pdev = adapter->pdev;
936 const struct firmware *fw = adapter->fw;
937 u8 fw_type = adapter->fw_type;
938
939 if (fw_type == NX_UNIFIED_ROMIMAGE) {
940 if (nx_set_product_offs(adapter))
941 return -EINVAL;
942
943 min_size = NX_UNI_FW_MIN_SIZE;
944 } else {
945 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
946 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
947 return -EINVAL;
948
949 min_size = NX_FW_MIN_SIZE;
950 }
951
952 if (fw->size < min_size)
953 return -EINVAL;
954
955 val = nx_get_fw_version(adapter);
956
957 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
958 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
959 else
960 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
961
962 ver = NETXEN_DECODE_VERSION(val);
963
964 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
965 dev_err(&pdev->dev,
966 "%s: firmware version %d.%d.%d unsupported\n",
967 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
968 return -EINVAL;
969 }
970
971 val = nx_get_bios_version(adapter);
972 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
973 if ((__force u32)val != bios) {
974 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
975 fw_name[fw_type]);
976 return -EINVAL;
977 }
978
979 /* check if flashed firmware is newer */
980 if (netxen_rom_fast_read(adapter,
981 NX_FW_VERSION_OFFSET, (int *)&val))
982 return -EIO;
983 val = NETXEN_DECODE_VERSION(val);
984 if (val > ver) {
985 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
986 fw_name[fw_type]);
987 return -EINVAL;
988 }
989
990 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
991 return 0;
992 }
993
994 static void
995 nx_get_next_fwtype(struct netxen_adapter *adapter)
996 {
997 u8 fw_type;
998
999 switch (adapter->fw_type) {
1000 case NX_UNKNOWN_ROMIMAGE:
1001 fw_type = NX_UNIFIED_ROMIMAGE;
1002 break;
1003
1004 case NX_UNIFIED_ROMIMAGE:
1005 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id))
1006 fw_type = NX_FLASH_ROMIMAGE;
1007 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1008 fw_type = NX_P2_MN_ROMIMAGE;
1009 else if (netxen_p3_has_mn(adapter))
1010 fw_type = NX_P3_MN_ROMIMAGE;
1011 else
1012 fw_type = NX_P3_CT_ROMIMAGE;
1013 break;
1014
1015 case NX_P3_MN_ROMIMAGE:
1016 fw_type = NX_P3_CT_ROMIMAGE;
1017 break;
1018
1019 case NX_P2_MN_ROMIMAGE:
1020 case NX_P3_CT_ROMIMAGE:
1021 default:
1022 fw_type = NX_FLASH_ROMIMAGE;
1023 break;
1024 }
1025
1026 adapter->fw_type = fw_type;
1027 }
1028
1029 static int
1030 netxen_p3_has_mn(struct netxen_adapter *adapter)
1031 {
1032 u32 capability, flashed_ver;
1033 capability = 0;
1034
1035 /* NX2031 always had MN */
1036 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1037 return 1;
1038
1039 netxen_rom_fast_read(adapter,
1040 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
1041 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
1042
1043 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
1044
1045 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
1046 if (capability & NX_PEG_TUNE_MN_PRESENT)
1047 return 1;
1048 }
1049 return 0;
1050 }
1051
1052 void netxen_request_firmware(struct netxen_adapter *adapter)
1053 {
1054 struct pci_dev *pdev = adapter->pdev;
1055 int rc = 0;
1056
1057 adapter->fw_type = NX_UNKNOWN_ROMIMAGE;
1058
1059 next:
1060 nx_get_next_fwtype(adapter);
1061
1062 if (adapter->fw_type == NX_FLASH_ROMIMAGE) {
1063 adapter->fw = NULL;
1064 } else {
1065 rc = request_firmware(&adapter->fw,
1066 fw_name[adapter->fw_type], &pdev->dev);
1067 if (rc != 0)
1068 goto next;
1069
1070 rc = netxen_validate_firmware(adapter);
1071 if (rc != 0) {
1072 release_firmware(adapter->fw);
1073 msleep(1);
1074 goto next;
1075 }
1076 }
1077 }
1078
1079
1080 void
1081 netxen_release_firmware(struct netxen_adapter *adapter)
1082 {
1083 if (adapter->fw)
1084 release_firmware(adapter->fw);
1085 adapter->fw = NULL;
1086 }
1087
1088 int netxen_init_dummy_dma(struct netxen_adapter *adapter)
1089 {
1090 u64 addr;
1091 u32 hi, lo;
1092
1093 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1094 return 0;
1095
1096 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
1097 NETXEN_HOST_DUMMY_DMA_SIZE,
1098 &adapter->dummy_dma.phys_addr);
1099 if (adapter->dummy_dma.addr == NULL) {
1100 dev_err(&adapter->pdev->dev,
1101 "ERROR: Could not allocate dummy DMA memory\n");
1102 return -ENOMEM;
1103 }
1104
1105 addr = (uint64_t) adapter->dummy_dma.phys_addr;
1106 hi = (addr >> 32) & 0xffffffff;
1107 lo = addr & 0xffffffff;
1108
1109 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
1110 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
1111
1112 return 0;
1113 }
1114
1115 /*
1116 * NetXen DMA watchdog control:
1117 *
1118 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
1119 * Bit 1 : disable_request => 1 req disable dma watchdog
1120 * Bit 2 : enable_request => 1 req enable dma watchdog
1121 * Bit 3-31 : unused
1122 */
1123 void netxen_free_dummy_dma(struct netxen_adapter *adapter)
1124 {
1125 int i = 100;
1126 u32 ctrl;
1127
1128 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1129 return;
1130
1131 if (!adapter->dummy_dma.addr)
1132 return;
1133
1134 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1135 if ((ctrl & 0x1) != 0) {
1136 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
1137
1138 while ((ctrl & 0x1) != 0) {
1139
1140 msleep(50);
1141
1142 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1143
1144 if (--i == 0)
1145 break;
1146 };
1147 }
1148
1149 if (i) {
1150 pci_free_consistent(adapter->pdev,
1151 NETXEN_HOST_DUMMY_DMA_SIZE,
1152 adapter->dummy_dma.addr,
1153 adapter->dummy_dma.phys_addr);
1154 adapter->dummy_dma.addr = NULL;
1155 } else
1156 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
1157 }
1158
1159 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
1160 {
1161 u32 val = 0;
1162 int retries = 60;
1163
1164 if (pegtune_val)
1165 return 0;
1166
1167 do {
1168 val = NXRD32(adapter, CRB_CMDPEG_STATE);
1169
1170 switch (val) {
1171 case PHAN_INITIALIZE_COMPLETE:
1172 case PHAN_INITIALIZE_ACK:
1173 return 0;
1174 case PHAN_INITIALIZE_FAILED:
1175 goto out_err;
1176 default:
1177 break;
1178 }
1179
1180 msleep(500);
1181
1182 } while (--retries);
1183
1184 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
1185
1186 out_err:
1187 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
1188 return -EIO;
1189 }
1190
1191 static int
1192 netxen_receive_peg_ready(struct netxen_adapter *adapter)
1193 {
1194 u32 val = 0;
1195 int retries = 2000;
1196
1197 do {
1198 val = NXRD32(adapter, CRB_RCVPEG_STATE);
1199
1200 if (val == PHAN_PEG_RCV_INITIALIZED)
1201 return 0;
1202
1203 msleep(10);
1204
1205 } while (--retries);
1206
1207 if (!retries) {
1208 printk(KERN_ERR "Receive Peg initialization not "
1209 "complete, state: 0x%x.\n", val);
1210 return -EIO;
1211 }
1212
1213 return 0;
1214 }
1215
1216 int netxen_init_firmware(struct netxen_adapter *adapter)
1217 {
1218 int err;
1219
1220 err = netxen_receive_peg_ready(adapter);
1221 if (err)
1222 return err;
1223
1224 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1225 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1226 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1227 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1228
1229 return err;
1230 }
1231
1232 static void
1233 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1234 {
1235 u32 cable_OUI;
1236 u16 cable_len;
1237 u16 link_speed;
1238 u8 link_status, module, duplex, autoneg;
1239 struct net_device *netdev = adapter->netdev;
1240
1241 adapter->has_link_events = 1;
1242
1243 cable_OUI = msg->body[1] & 0xffffffff;
1244 cable_len = (msg->body[1] >> 32) & 0xffff;
1245 link_speed = (msg->body[1] >> 48) & 0xffff;
1246
1247 link_status = msg->body[2] & 0xff;
1248 duplex = (msg->body[2] >> 16) & 0xff;
1249 autoneg = (msg->body[2] >> 24) & 0xff;
1250
1251 module = (msg->body[2] >> 8) & 0xff;
1252 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1253 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1254 netdev->name, cable_OUI, cable_len);
1255 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1256 printk(KERN_INFO "%s: unsupported cable length %d\n",
1257 netdev->name, cable_len);
1258 }
1259
1260 netxen_advert_link_change(adapter, link_status);
1261
1262 /* update link parameters */
1263 if (duplex == LINKEVENT_FULL_DUPLEX)
1264 adapter->link_duplex = DUPLEX_FULL;
1265 else
1266 adapter->link_duplex = DUPLEX_HALF;
1267 adapter->module_type = module;
1268 adapter->link_autoneg = autoneg;
1269 adapter->link_speed = link_speed;
1270 }
1271
1272 static void
1273 netxen_handle_fw_message(int desc_cnt, int index,
1274 struct nx_host_sds_ring *sds_ring)
1275 {
1276 nx_fw_msg_t msg;
1277 struct status_desc *desc;
1278 int i = 0, opcode;
1279
1280 while (desc_cnt > 0 && i < 8) {
1281 desc = &sds_ring->desc_head[index];
1282 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1283 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1284
1285 index = get_next_index(index, sds_ring->num_desc);
1286 desc_cnt--;
1287 }
1288
1289 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1290 switch (opcode) {
1291 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1292 netxen_handle_linkevent(sds_ring->adapter, &msg);
1293 break;
1294 default:
1295 break;
1296 }
1297 }
1298
1299 static int
1300 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1301 struct nx_host_rds_ring *rds_ring,
1302 struct netxen_rx_buffer *buffer)
1303 {
1304 struct sk_buff *skb;
1305 dma_addr_t dma;
1306 struct pci_dev *pdev = adapter->pdev;
1307
1308 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1309 if (!buffer->skb)
1310 return 1;
1311
1312 skb = buffer->skb;
1313
1314 if (!adapter->ahw.cut_through)
1315 skb_reserve(skb, 2);
1316
1317 dma = pci_map_single(pdev, skb->data,
1318 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1319
1320 if (pci_dma_mapping_error(pdev, dma)) {
1321 dev_kfree_skb_any(skb);
1322 buffer->skb = NULL;
1323 return 1;
1324 }
1325
1326 buffer->skb = skb;
1327 buffer->dma = dma;
1328 buffer->state = NETXEN_BUFFER_BUSY;
1329
1330 return 0;
1331 }
1332
1333 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1334 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1335 {
1336 struct netxen_rx_buffer *buffer;
1337 struct sk_buff *skb;
1338
1339 buffer = &rds_ring->rx_buf_arr[index];
1340
1341 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1342 PCI_DMA_FROMDEVICE);
1343
1344 skb = buffer->skb;
1345 if (!skb)
1346 goto no_skb;
1347
1348 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1349 adapter->stats.csummed++;
1350 skb->ip_summed = CHECKSUM_UNNECESSARY;
1351 } else
1352 skb->ip_summed = CHECKSUM_NONE;
1353
1354 skb->dev = adapter->netdev;
1355
1356 buffer->skb = NULL;
1357 no_skb:
1358 buffer->state = NETXEN_BUFFER_FREE;
1359 return skb;
1360 }
1361
1362 static struct netxen_rx_buffer *
1363 netxen_process_rcv(struct netxen_adapter *adapter,
1364 struct nx_host_sds_ring *sds_ring,
1365 int ring, u64 sts_data0)
1366 {
1367 struct net_device *netdev = adapter->netdev;
1368 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1369 struct netxen_rx_buffer *buffer;
1370 struct sk_buff *skb;
1371 struct nx_host_rds_ring *rds_ring;
1372 int index, length, cksum, pkt_offset;
1373
1374 if (unlikely(ring >= adapter->max_rds_rings))
1375 return NULL;
1376
1377 rds_ring = &recv_ctx->rds_rings[ring];
1378
1379 index = netxen_get_sts_refhandle(sts_data0);
1380 if (unlikely(index >= rds_ring->num_desc))
1381 return NULL;
1382
1383 buffer = &rds_ring->rx_buf_arr[index];
1384
1385 length = netxen_get_sts_totallength(sts_data0);
1386 cksum = netxen_get_sts_status(sts_data0);
1387 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1388
1389 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1390 if (!skb)
1391 return buffer;
1392
1393 if (length > rds_ring->skb_size)
1394 skb_put(skb, rds_ring->skb_size);
1395 else
1396 skb_put(skb, length);
1397
1398
1399 if (pkt_offset)
1400 skb_pull(skb, pkt_offset);
1401
1402 skb->truesize = skb->len + sizeof(struct sk_buff);
1403 skb->protocol = eth_type_trans(skb, netdev);
1404
1405 napi_gro_receive(&sds_ring->napi, skb);
1406
1407 adapter->stats.rx_pkts++;
1408 adapter->stats.rxbytes += length;
1409
1410 return buffer;
1411 }
1412
1413 #define TCP_HDR_SIZE 20
1414 #define TCP_TS_OPTION_SIZE 12
1415 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1416
1417 static struct netxen_rx_buffer *
1418 netxen_process_lro(struct netxen_adapter *adapter,
1419 struct nx_host_sds_ring *sds_ring,
1420 int ring, u64 sts_data0, u64 sts_data1)
1421 {
1422 struct net_device *netdev = adapter->netdev;
1423 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1424 struct netxen_rx_buffer *buffer;
1425 struct sk_buff *skb;
1426 struct nx_host_rds_ring *rds_ring;
1427 struct iphdr *iph;
1428 struct tcphdr *th;
1429 bool push, timestamp;
1430 int l2_hdr_offset, l4_hdr_offset;
1431 int index;
1432 u16 lro_length, length, data_offset;
1433 u32 seq_number;
1434
1435 if (unlikely(ring > adapter->max_rds_rings))
1436 return NULL;
1437
1438 rds_ring = &recv_ctx->rds_rings[ring];
1439
1440 index = netxen_get_lro_sts_refhandle(sts_data0);
1441 if (unlikely(index > rds_ring->num_desc))
1442 return NULL;
1443
1444 buffer = &rds_ring->rx_buf_arr[index];
1445
1446 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1447 lro_length = netxen_get_lro_sts_length(sts_data0);
1448 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1449 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1450 push = netxen_get_lro_sts_push_flag(sts_data0);
1451 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1452
1453 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1454 if (!skb)
1455 return buffer;
1456
1457 if (timestamp)
1458 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1459 else
1460 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1461
1462 skb_put(skb, lro_length + data_offset);
1463
1464 skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
1465
1466 skb_pull(skb, l2_hdr_offset);
1467 skb->protocol = eth_type_trans(skb, netdev);
1468
1469 iph = (struct iphdr *)skb->data;
1470 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1471
1472 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1473 iph->tot_len = htons(length);
1474 iph->check = 0;
1475 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1476 th->psh = push;
1477 th->seq = htonl(seq_number);
1478
1479 length = skb->len;
1480
1481 netif_receive_skb(skb);
1482
1483 adapter->stats.lro_pkts++;
1484 adapter->stats.rxbytes += length;
1485
1486 return buffer;
1487 }
1488
1489 #define netxen_merge_rx_buffers(list, head) \
1490 do { list_splice_tail_init(list, head); } while (0);
1491
1492 int
1493 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1494 {
1495 struct netxen_adapter *adapter = sds_ring->adapter;
1496
1497 struct list_head *cur;
1498
1499 struct status_desc *desc;
1500 struct netxen_rx_buffer *rxbuf;
1501
1502 u32 consumer = sds_ring->consumer;
1503
1504 int count = 0;
1505 u64 sts_data0, sts_data1;
1506 int opcode, ring = 0, desc_cnt;
1507
1508 while (count < max) {
1509 desc = &sds_ring->desc_head[consumer];
1510 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1511
1512 if (!(sts_data0 & STATUS_OWNER_HOST))
1513 break;
1514
1515 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
1516
1517 opcode = netxen_get_sts_opcode(sts_data0);
1518
1519 switch (opcode) {
1520 case NETXEN_NIC_RXPKT_DESC:
1521 case NETXEN_OLD_RXPKT_DESC:
1522 case NETXEN_NIC_SYN_OFFLOAD:
1523 ring = netxen_get_sts_type(sts_data0);
1524 rxbuf = netxen_process_rcv(adapter, sds_ring,
1525 ring, sts_data0);
1526 break;
1527 case NETXEN_NIC_LRO_DESC:
1528 ring = netxen_get_lro_sts_type(sts_data0);
1529 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1530 rxbuf = netxen_process_lro(adapter, sds_ring,
1531 ring, sts_data0, sts_data1);
1532 break;
1533 case NETXEN_NIC_RESPONSE_DESC:
1534 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1535 default:
1536 goto skip;
1537 }
1538
1539 WARN_ON(desc_cnt > 1);
1540
1541 if (rxbuf)
1542 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1543
1544 skip:
1545 for (; desc_cnt > 0; desc_cnt--) {
1546 desc = &sds_ring->desc_head[consumer];
1547 desc->status_desc_data[0] =
1548 cpu_to_le64(STATUS_OWNER_PHANTOM);
1549 consumer = get_next_index(consumer, sds_ring->num_desc);
1550 }
1551 count++;
1552 }
1553
1554 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1555 struct nx_host_rds_ring *rds_ring =
1556 &adapter->recv_ctx.rds_rings[ring];
1557
1558 if (!list_empty(&sds_ring->free_list[ring])) {
1559 list_for_each(cur, &sds_ring->free_list[ring]) {
1560 rxbuf = list_entry(cur,
1561 struct netxen_rx_buffer, list);
1562 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1563 }
1564 spin_lock(&rds_ring->lock);
1565 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1566 &rds_ring->free_list);
1567 spin_unlock(&rds_ring->lock);
1568 }
1569
1570 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1571 }
1572
1573 if (count) {
1574 sds_ring->consumer = consumer;
1575 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
1576 }
1577
1578 return count;
1579 }
1580
1581 /* Process Command status ring */
1582 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1583 {
1584 u32 sw_consumer, hw_consumer;
1585 int count = 0, i;
1586 struct netxen_cmd_buffer *buffer;
1587 struct pci_dev *pdev = adapter->pdev;
1588 struct net_device *netdev = adapter->netdev;
1589 struct netxen_skb_frag *frag;
1590 int done = 0;
1591 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1592
1593 if (!spin_trylock(&adapter->tx_clean_lock))
1594 return 1;
1595
1596 sw_consumer = tx_ring->sw_consumer;
1597 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1598
1599 while (sw_consumer != hw_consumer) {
1600 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1601 if (buffer->skb) {
1602 frag = &buffer->frag_array[0];
1603 pci_unmap_single(pdev, frag->dma, frag->length,
1604 PCI_DMA_TODEVICE);
1605 frag->dma = 0ULL;
1606 for (i = 1; i < buffer->frag_count; i++) {
1607 frag++; /* Get the next frag */
1608 pci_unmap_page(pdev, frag->dma, frag->length,
1609 PCI_DMA_TODEVICE);
1610 frag->dma = 0ULL;
1611 }
1612
1613 adapter->stats.xmitfinished++;
1614 dev_kfree_skb_any(buffer->skb);
1615 buffer->skb = NULL;
1616 }
1617
1618 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1619 if (++count >= MAX_STATUS_HANDLE)
1620 break;
1621 }
1622
1623 if (count && netif_running(netdev)) {
1624 tx_ring->sw_consumer = sw_consumer;
1625
1626 smp_mb();
1627
1628 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1629 __netif_tx_lock(tx_ring->txq, smp_processor_id());
1630 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) {
1631 netif_wake_queue(netdev);
1632 adapter->tx_timeo_cnt = 0;
1633 }
1634 __netif_tx_unlock(tx_ring->txq);
1635 }
1636 }
1637 /*
1638 * If everything is freed up to consumer then check if the ring is full
1639 * If the ring is full then check if more needs to be freed and
1640 * schedule the call back again.
1641 *
1642 * This happens when there are 2 CPUs. One could be freeing and the
1643 * other filling it. If the ring is full when we get out of here and
1644 * the card has already interrupted the host then the host can miss the
1645 * interrupt.
1646 *
1647 * There is still a possible race condition and the host could miss an
1648 * interrupt. The card has to take care of this.
1649 */
1650 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1651 done = (sw_consumer == hw_consumer);
1652 spin_unlock(&adapter->tx_clean_lock);
1653
1654 return (done);
1655 }
1656
1657 void
1658 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1659 struct nx_host_rds_ring *rds_ring)
1660 {
1661 struct rcv_desc *pdesc;
1662 struct netxen_rx_buffer *buffer;
1663 int producer, count = 0;
1664 netxen_ctx_msg msg = 0;
1665 struct list_head *head;
1666
1667 producer = rds_ring->producer;
1668
1669 spin_lock(&rds_ring->lock);
1670 head = &rds_ring->free_list;
1671 while (!list_empty(head)) {
1672
1673 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1674
1675 if (!buffer->skb) {
1676 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1677 break;
1678 }
1679
1680 count++;
1681 list_del(&buffer->list);
1682
1683 /* make a rcv descriptor */
1684 pdesc = &rds_ring->desc_head[producer];
1685 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1686 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1687 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1688
1689 producer = get_next_index(producer, rds_ring->num_desc);
1690 }
1691 spin_unlock(&rds_ring->lock);
1692
1693 if (count) {
1694 rds_ring->producer = producer;
1695 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1696 (producer-1) & (rds_ring->num_desc-1));
1697
1698 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1699 /*
1700 * Write a doorbell msg to tell phanmon of change in
1701 * receive ring producer
1702 * Only for firmware version < 4.0.0
1703 */
1704 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1705 netxen_set_msg_privid(msg);
1706 netxen_set_msg_count(msg,
1707 ((producer - 1) &
1708 (rds_ring->num_desc - 1)));
1709 netxen_set_msg_ctxid(msg, adapter->portnum);
1710 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1711 NXWRIO(adapter, DB_NORMALIZE(adapter,
1712 NETXEN_RCV_PRODUCER_OFFSET), msg);
1713 }
1714 }
1715 }
1716
1717 static void
1718 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1719 struct nx_host_rds_ring *rds_ring)
1720 {
1721 struct rcv_desc *pdesc;
1722 struct netxen_rx_buffer *buffer;
1723 int producer, count = 0;
1724 struct list_head *head;
1725
1726 producer = rds_ring->producer;
1727 if (!spin_trylock(&rds_ring->lock))
1728 return;
1729
1730 head = &rds_ring->free_list;
1731 while (!list_empty(head)) {
1732
1733 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1734
1735 if (!buffer->skb) {
1736 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1737 break;
1738 }
1739
1740 count++;
1741 list_del(&buffer->list);
1742
1743 /* make a rcv descriptor */
1744 pdesc = &rds_ring->desc_head[producer];
1745 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1746 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1747 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1748
1749 producer = get_next_index(producer, rds_ring->num_desc);
1750 }
1751
1752 if (count) {
1753 rds_ring->producer = producer;
1754 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1755 (producer - 1) & (rds_ring->num_desc - 1));
1756 }
1757 spin_unlock(&rds_ring->lock);
1758 }
1759
1760 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1761 {
1762 memset(&adapter->stats, 0, sizeof(adapter->stats));
1763 return;
1764 }
1765
Linux 2.6 libata-dev (mirror)