3 * Copyright IBM Corporation 2001, 2005, 2006
4 * Copyright Dave Engebretsen & Todd Inglett 2001
5 * Copyright Linas Vepstas 2005, 2006
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/list.h>
27 #include <linux/pci.h>
28 #include <linux/proc_fs.h>
29 #include <linux/rbtree.h>
30 #include <linux/seq_file.h>
31 #include <linux/spinlock.h>
32 #include <linux/export.h>
35 #include <linux/atomic.h>
37 #include <asm/eeh_event.h>
39 #include <asm/machdep.h>
40 #include <asm/ppc-pci.h>
45 * EEH, or "Extended Error Handling" is a PCI bridge technology for
46 * dealing with PCI bus errors that can't be dealt with within the
47 * usual PCI framework, except by check-stopping the CPU. Systems
48 * that are designed for high-availability/reliability cannot afford
49 * to crash due to a "mere" PCI error, thus the need for EEH.
50 * An EEH-capable bridge operates by converting a detected error
51 * into a "slot freeze", taking the PCI adapter off-line, making
52 * the slot behave, from the OS'es point of view, as if the slot
53 * were "empty": all reads return 0xff's and all writes are silently
54 * ignored. EEH slot isolation events can be triggered by parity
55 * errors on the address or data busses (e.g. during posted writes),
56 * which in turn might be caused by low voltage on the bus, dust,
57 * vibration, humidity, radioactivity or plain-old failed hardware.
59 * Note, however, that one of the leading causes of EEH slot
60 * freeze events are buggy device drivers, buggy device microcode,
61 * or buggy device hardware. This is because any attempt by the
62 * device to bus-master data to a memory address that is not
63 * assigned to the device will trigger a slot freeze. (The idea
64 * is to prevent devices-gone-wild from corrupting system memory).
65 * Buggy hardware/drivers will have a miserable time co-existing
68 * Ideally, a PCI device driver, when suspecting that an isolation
69 * event has occurred (e.g. by reading 0xff's), will then ask EEH
70 * whether this is the case, and then take appropriate steps to
71 * reset the PCI slot, the PCI device, and then resume operations.
72 * However, until that day, the checking is done here, with the
73 * eeh_check_failure() routine embedded in the MMIO macros. If
74 * the slot is found to be isolated, an "EEH Event" is synthesized
75 * and sent out for processing.
78 /* If a device driver keeps reading an MMIO register in an interrupt
79 * handler after a slot isolation event, it might be broken.
80 * This sets the threshold for how many read attempts we allow
81 * before printing an error message.
83 #define EEH_MAX_FAILS 2100000
85 /* Time to wait for a PCI slot to report status, in milliseconds */
86 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
89 static int ibm_set_eeh_option
;
90 static int ibm_set_slot_reset
;
91 static int ibm_read_slot_reset_state
;
92 static int ibm_read_slot_reset_state2
;
93 static int ibm_slot_error_detail
;
94 static int ibm_get_config_addr_info
;
95 static int ibm_get_config_addr_info2
;
96 static int ibm_configure_bridge
;
97 static int ibm_configure_pe
;
99 int eeh_subsystem_enabled
;
100 EXPORT_SYMBOL(eeh_subsystem_enabled
);
102 /* Lock to avoid races due to multiple reports of an error */
103 static DEFINE_RAW_SPINLOCK(confirm_error_lock
);
105 /* Buffer for reporting slot-error-detail rtas calls. Its here
106 * in BSS, and not dynamically alloced, so that it ends up in
107 * RMO where RTAS can access it.
109 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
110 static DEFINE_SPINLOCK(slot_errbuf_lock
);
111 static int eeh_error_buf_size
;
113 /* Buffer for reporting pci register dumps. Its here in BSS, and
114 * not dynamically alloced, so that it ends up in RMO where RTAS
117 #define EEH_PCI_REGS_LOG_LEN 4096
118 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
120 /* System monitoring statistics */
121 static unsigned long no_device
;
122 static unsigned long no_dn
;
123 static unsigned long no_cfg_addr
;
124 static unsigned long ignored_check
;
125 static unsigned long total_mmio_ffs
;
126 static unsigned long false_positives
;
127 static unsigned long slot_resets
;
129 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
131 /* --------------------------------------------------------------- */
132 /* Below lies the EEH event infrastructure */
134 static void rtas_slot_error_detail(struct pci_dn
*pdn
, int severity
,
135 char *driver_log
, size_t loglen
)
141 /* Log the error with the rtas logger */
142 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
143 memset(slot_errbuf
, 0, eeh_error_buf_size
);
145 /* Use PE configuration address, if present */
146 config_addr
= pdn
->eeh_config_addr
;
147 if (pdn
->eeh_pe_config_addr
)
148 config_addr
= pdn
->eeh_pe_config_addr
;
150 rc
= rtas_call(ibm_slot_error_detail
,
151 8, 1, NULL
, config_addr
,
152 BUID_HI(pdn
->phb
->buid
),
153 BUID_LO(pdn
->phb
->buid
),
154 virt_to_phys(driver_log
), loglen
,
155 virt_to_phys(slot_errbuf
),
160 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
161 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
165 * gather_pci_data - copy assorted PCI config space registers to buff
166 * @pdn: device to report data for
167 * @buf: point to buffer in which to log
168 * @len: amount of room in buffer
170 * This routine captures assorted PCI configuration space data,
171 * and puts them into a buffer for RTAS error logging.
173 static size_t gather_pci_data(struct pci_dn
*pdn
, char * buf
, size_t len
)
175 struct pci_dev
*dev
= pdn
->pcidev
;
180 n
+= scnprintf(buf
+n
, len
-n
, "%s\n", pdn
->node
->full_name
);
181 printk(KERN_WARNING
"EEH: of node=%s\n", pdn
->node
->full_name
);
183 rtas_read_config(pdn
, PCI_VENDOR_ID
, 4, &cfg
);
184 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
185 printk(KERN_WARNING
"EEH: PCI device/vendor: %08x\n", cfg
);
187 rtas_read_config(pdn
, PCI_COMMAND
, 4, &cfg
);
188 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
189 printk(KERN_WARNING
"EEH: PCI cmd/status register: %08x\n", cfg
);
192 printk(KERN_WARNING
"EEH: no PCI device for this of node\n");
196 /* Gather bridge-specific registers */
197 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
198 rtas_read_config(pdn
, PCI_SEC_STATUS
, 2, &cfg
);
199 n
+= scnprintf(buf
+n
, len
-n
, "sec stat:%x\n", cfg
);
200 printk(KERN_WARNING
"EEH: Bridge secondary status: %04x\n", cfg
);
202 rtas_read_config(pdn
, PCI_BRIDGE_CONTROL
, 2, &cfg
);
203 n
+= scnprintf(buf
+n
, len
-n
, "brdg ctl:%x\n", cfg
);
204 printk(KERN_WARNING
"EEH: Bridge control: %04x\n", cfg
);
207 /* Dump out the PCI-X command and status regs */
208 cap
= pci_find_capability(dev
, PCI_CAP_ID_PCIX
);
210 rtas_read_config(pdn
, cap
, 4, &cfg
);
211 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
212 printk(KERN_WARNING
"EEH: PCI-X cmd: %08x\n", cfg
);
214 rtas_read_config(pdn
, cap
+4, 4, &cfg
);
215 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
216 printk(KERN_WARNING
"EEH: PCI-X status: %08x\n", cfg
);
219 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
220 cap
= pci_find_capability(dev
, PCI_CAP_ID_EXP
);
222 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
224 "EEH: PCI-E capabilities and status follow:\n");
226 for (i
=0; i
<=8; i
++) {
227 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
228 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
229 printk(KERN_WARNING
"EEH: PCI-E %02x: %08x\n", i
, cfg
);
232 cap
= pci_find_ext_capability(dev
, PCI_EXT_CAP_ID_ERR
);
234 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
236 "EEH: PCI-E AER capability register set follows:\n");
238 for (i
=0; i
<14; i
++) {
239 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
240 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
241 printk(KERN_WARNING
"EEH: PCI-E AER %02x: %08x\n", i
, cfg
);
246 /* Gather status on devices under the bridge */
247 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
248 struct device_node
*dn
;
250 for_each_child_of_node(pdn
->node
, dn
) {
253 n
+= gather_pci_data(pdn
, buf
+n
, len
-n
);
260 void eeh_slot_error_detail(struct pci_dn
*pdn
, int severity
)
265 rtas_pci_enable(pdn
, EEH_THAW_MMIO
);
266 rtas_configure_bridge(pdn
);
267 eeh_restore_bars(pdn
);
268 loglen
= gather_pci_data(pdn
, pci_regs_buf
, EEH_PCI_REGS_LOG_LEN
);
270 rtas_slot_error_detail(pdn
, severity
, pci_regs_buf
, loglen
);
274 * read_slot_reset_state - Read the reset state of a device node's slot
275 * @dn: device node to read
276 * @rets: array to return results in
278 static int read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
283 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
284 token
= ibm_read_slot_reset_state2
;
287 token
= ibm_read_slot_reset_state
;
288 rets
[2] = 0; /* fake PE Unavailable info */
292 /* Use PE configuration address, if present */
293 config_addr
= pdn
->eeh_config_addr
;
294 if (pdn
->eeh_pe_config_addr
)
295 config_addr
= pdn
->eeh_pe_config_addr
;
297 return rtas_call(token
, 3, outputs
, rets
, config_addr
,
298 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
302 * eeh_wait_for_slot_status - returns error status of slot
303 * @pdn pci device node
304 * @max_wait_msecs maximum number to millisecs to wait
306 * Return negative value if a permanent error, else return
307 * Partition Endpoint (PE) status value.
309 * If @max_wait_msecs is positive, then this routine will
310 * sleep until a valid status can be obtained, or until
311 * the max allowed wait time is exceeded, in which case
315 eeh_wait_for_slot_status(struct pci_dn
*pdn
, int max_wait_msecs
)
322 rc
= read_slot_reset_state(pdn
, rets
);
324 if (rets
[1] == 0) return -1; /* EEH is not supported */
326 if (rets
[0] != 5) return rets
[0]; /* return actual status */
328 if (rets
[2] == 0) return -1; /* permanently unavailable */
330 if (max_wait_msecs
<= 0) break;
335 "EEH: Firmware returned bad wait value=%d\n", mwait
);
337 } else if (mwait
> 300*1000) {
339 "EEH: Firmware is taking too long, time=%d\n", mwait
);
342 max_wait_msecs
-= mwait
;
346 printk(KERN_WARNING
"EEH: Timed out waiting for slot status\n");
351 * eeh_token_to_phys - convert EEH address token to phys address
352 * @token i/o token, should be address in the form 0xA....
354 static inline unsigned long eeh_token_to_phys(unsigned long token
)
359 ptep
= find_linux_pte(init_mm
.pgd
, token
);
362 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
364 return pa
| (token
& (PAGE_SIZE
-1));
368 * Return the "partitionable endpoint" (pe) under which this device lies
370 struct device_node
* find_device_pe(struct device_node
*dn
)
372 while ((dn
->parent
) && PCI_DN(dn
->parent
) &&
373 (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
379 /** Mark all devices that are children of this device as failed.
380 * Mark the device driver too, so that it can see the failure
381 * immediately; this is critical, since some drivers poll
382 * status registers in interrupts ... If a driver is polling,
383 * and the slot is frozen, then the driver can deadlock in
384 * an interrupt context, which is bad.
387 static void __eeh_mark_slot(struct device_node
*parent
, int mode_flag
)
389 struct device_node
*dn
;
391 for_each_child_of_node(parent
, dn
) {
393 /* Mark the pci device driver too */
394 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
396 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
398 if (dev
&& dev
->driver
)
399 dev
->error_state
= pci_channel_io_frozen
;
401 __eeh_mark_slot(dn
, mode_flag
);
406 void eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
409 dn
= find_device_pe (dn
);
411 /* Back up one, since config addrs might be shared */
412 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
415 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
417 /* Mark the pci device too */
418 dev
= PCI_DN(dn
)->pcidev
;
420 dev
->error_state
= pci_channel_io_frozen
;
422 __eeh_mark_slot(dn
, mode_flag
);
425 static void __eeh_clear_slot(struct device_node
*parent
, int mode_flag
)
427 struct device_node
*dn
;
429 for_each_child_of_node(parent
, dn
) {
431 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
432 PCI_DN(dn
)->eeh_check_count
= 0;
433 __eeh_clear_slot(dn
, mode_flag
);
438 void eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
441 raw_spin_lock_irqsave(&confirm_error_lock
, flags
);
443 dn
= find_device_pe (dn
);
445 /* Back up one, since config addrs might be shared */
446 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
449 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
450 PCI_DN(dn
)->eeh_check_count
= 0;
451 __eeh_clear_slot(dn
, mode_flag
);
452 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
455 void __eeh_set_pe_freset(struct device_node
*parent
, unsigned int *freset
)
457 struct device_node
*dn
;
459 for_each_child_of_node(parent
, dn
) {
462 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
464 if (dev
&& dev
->driver
)
465 *freset
|= dev
->needs_freset
;
467 __eeh_set_pe_freset(dn
, freset
);
472 void eeh_set_pe_freset(struct device_node
*dn
, unsigned int *freset
)
475 dn
= find_device_pe(dn
);
477 /* Back up one, since config addrs might be shared */
478 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
481 dev
= PCI_DN(dn
)->pcidev
;
483 *freset
|= dev
->needs_freset
;
485 __eeh_set_pe_freset(dn
, freset
);
489 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
491 * @dev pci device, if known
493 * Check for an EEH failure for the given device node. Call this
494 * routine if the result of a read was all 0xff's and you want to
495 * find out if this is due to an EEH slot freeze. This routine
496 * will query firmware for the EEH status.
498 * Returns 0 if there has not been an EEH error; otherwise returns
499 * a non-zero value and queues up a slot isolation event notification.
501 * It is safe to call this routine in an interrupt context.
503 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
510 const char *location
;
514 if (!eeh_subsystem_enabled
)
521 dn
= find_device_pe(dn
);
524 /* Access to IO BARs might get this far and still not want checking. */
525 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
526 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
528 pr_debug("EEH: Ignored check (%x) for %s %s\n",
529 pdn
->eeh_mode
, eeh_pci_name(dev
), dn
->full_name
);
533 if (!pdn
->eeh_config_addr
&& !pdn
->eeh_pe_config_addr
) {
538 /* If we already have a pending isolation event for this
539 * slot, we know it's bad already, we don't need to check.
540 * Do this checking under a lock; as multiple PCI devices
541 * in one slot might report errors simultaneously, and we
542 * only want one error recovery routine running.
544 raw_spin_lock_irqsave(&confirm_error_lock
, flags
);
546 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
547 pdn
->eeh_check_count
++;
548 if (pdn
->eeh_check_count
% EEH_MAX_FAILS
== 0) {
549 location
= of_get_property(dn
, "ibm,loc-code", NULL
);
550 printk (KERN_ERR
"EEH: %d reads ignored for recovering device at "
551 "location=%s driver=%s pci addr=%s\n",
552 pdn
->eeh_check_count
, location
,
553 dev
->driver
->name
, eeh_pci_name(dev
));
554 printk (KERN_ERR
"EEH: Might be infinite loop in %s driver\n",
562 * Now test for an EEH failure. This is VERY expensive.
563 * Note that the eeh_config_addr may be a parent device
564 * in the case of a device behind a bridge, or it may be
565 * function zero of a multi-function device.
566 * In any case they must share a common PHB.
568 ret
= read_slot_reset_state(pdn
, rets
);
570 /* If the call to firmware failed, punt */
572 printk(KERN_WARNING
"EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
575 pdn
->eeh_false_positives
++;
580 /* Note that config-io to empty slots may fail;
581 * they are empty when they don't have children. */
582 if ((rets
[0] == 5) && (rets
[2] == 0) && (dn
->child
== NULL
)) {
584 pdn
->eeh_false_positives
++;
589 /* If EEH is not supported on this device, punt. */
591 printk(KERN_WARNING
"EEH: event on unsupported device, rc=%d dn=%s\n",
594 pdn
->eeh_false_positives
++;
599 /* If not the kind of error we know about, punt. */
600 if (rets
[0] != 1 && rets
[0] != 2 && rets
[0] != 4 && rets
[0] != 5) {
602 pdn
->eeh_false_positives
++;
609 /* Avoid repeated reports of this failure, including problems
610 * with other functions on this device, and functions under
612 eeh_mark_slot (dn
, EEH_MODE_ISOLATED
);
613 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
615 eeh_send_failure_event (dn
, dev
);
617 /* Most EEH events are due to device driver bugs. Having
618 * a stack trace will help the device-driver authors figure
619 * out what happened. So print that out. */
624 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
628 EXPORT_SYMBOL_GPL(eeh_dn_check_failure
);
631 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
632 * @token i/o token, should be address in the form 0xA....
633 * @val value, should be all 1's (XXX why do we need this arg??)
635 * Check for an EEH failure at the given token address. Call this
636 * routine if the result of a read was all 0xff's and you want to
637 * find out if this is due to an EEH slot freeze event. This routine
638 * will query firmware for the EEH status.
640 * Note this routine is safe to call in an interrupt context.
642 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
646 struct device_node
*dn
;
648 /* Finding the phys addr + pci device; this is pretty quick. */
649 addr
= eeh_token_to_phys((unsigned long __force
) token
);
650 dev
= pci_get_device_by_addr(addr
);
656 dn
= pci_device_to_OF_node(dev
);
657 eeh_dn_check_failure (dn
, dev
);
663 EXPORT_SYMBOL(eeh_check_failure
);
665 /* ------------------------------------------------------------- */
666 /* The code below deals with error recovery */
669 * rtas_pci_enable - enable MMIO or DMA transfers for this slot
670 * @pdn pci device node
674 rtas_pci_enable(struct pci_dn
*pdn
, int function
)
679 /* Use PE configuration address, if present */
680 config_addr
= pdn
->eeh_config_addr
;
681 if (pdn
->eeh_pe_config_addr
)
682 config_addr
= pdn
->eeh_pe_config_addr
;
684 rc
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
686 BUID_HI(pdn
->phb
->buid
),
687 BUID_LO(pdn
->phb
->buid
),
691 printk(KERN_WARNING
"EEH: Unexpected state change %d, err=%d dn=%s\n",
692 function
, rc
, pdn
->node
->full_name
);
694 rc
= eeh_wait_for_slot_status (pdn
, PCI_BUS_RESET_WAIT_MSEC
);
695 if ((rc
== 4) && (function
== EEH_THAW_MMIO
))
702 * rtas_pci_slot_reset - raises/lowers the pci #RST line
703 * @pdn pci device node
704 * @state: 1/0 to raise/lower the #RST
706 * Clear the EEH-frozen condition on a slot. This routine
707 * asserts the PCI #RST line if the 'state' argument is '1',
708 * and drops the #RST line if 'state is '0'. This routine is
709 * safe to call in an interrupt context.
714 rtas_pci_slot_reset(struct pci_dn
*pdn
, int state
)
722 printk (KERN_WARNING
"EEH: in slot reset, device node %s has no phb\n",
723 pdn
->node
->full_name
);
727 /* Use PE configuration address, if present */
728 config_addr
= pdn
->eeh_config_addr
;
729 if (pdn
->eeh_pe_config_addr
)
730 config_addr
= pdn
->eeh_pe_config_addr
;
732 rc
= rtas_call(ibm_set_slot_reset
, 4, 1, NULL
,
734 BUID_HI(pdn
->phb
->buid
),
735 BUID_LO(pdn
->phb
->buid
),
738 /* Fundamental-reset not supported on this PE, try hot-reset */
739 if (rc
== -8 && state
== 3) {
740 rc
= rtas_call(ibm_set_slot_reset
, 4, 1, NULL
,
742 BUID_HI(pdn
->phb
->buid
),
743 BUID_LO(pdn
->phb
->buid
), 1);
746 "EEH: Unable to reset the failed slot,"
748 rc
, pdn
->node
->full_name
);
753 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
754 * @dev: pci device struct
755 * @state: reset state to enter
760 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
762 struct device_node
*dn
= pci_device_to_OF_node(dev
);
763 struct pci_dn
*pdn
= PCI_DN(dn
);
766 case pcie_deassert_reset
:
767 rtas_pci_slot_reset(pdn
, 0);
770 rtas_pci_slot_reset(pdn
, 1);
772 case pcie_warm_reset
:
773 rtas_pci_slot_reset(pdn
, 3);
783 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
784 * @pdn: pci device node to be reset.
787 static void __rtas_set_slot_reset(struct pci_dn
*pdn
)
789 unsigned int freset
= 0;
791 /* Determine type of EEH reset required for
792 * Partitionable Endpoint, a hot-reset (1)
793 * or a fundamental reset (3).
794 * A fundamental reset required by any device under
795 * Partitionable Endpoint trumps hot-reset.
797 eeh_set_pe_freset(pdn
->node
, &freset
);
800 rtas_pci_slot_reset(pdn
, 3);
802 rtas_pci_slot_reset(pdn
, 1);
804 /* The PCI bus requires that the reset be held high for at least
805 * a 100 milliseconds. We wait a bit longer 'just in case'. */
807 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
808 msleep (PCI_BUS_RST_HOLD_TIME_MSEC
);
810 /* We might get hit with another EEH freeze as soon as the
811 * pci slot reset line is dropped. Make sure we don't miss
812 * these, and clear the flag now. */
813 eeh_clear_slot (pdn
->node
, EEH_MODE_ISOLATED
);
815 rtas_pci_slot_reset (pdn
, 0);
817 /* After a PCI slot has been reset, the PCI Express spec requires
818 * a 1.5 second idle time for the bus to stabilize, before starting
820 #define PCI_BUS_SETTLE_TIME_MSEC 1800
821 msleep (PCI_BUS_SETTLE_TIME_MSEC
);
824 int rtas_set_slot_reset(struct pci_dn
*pdn
)
828 /* Take three shots at resetting the bus */
829 for (i
=0; i
<3; i
++) {
830 __rtas_set_slot_reset(pdn
);
832 rc
= eeh_wait_for_slot_status(pdn
, PCI_BUS_RESET_WAIT_MSEC
);
837 printk(KERN_ERR
"EEH: unrecoverable slot failure %s\n",
838 pdn
->node
->full_name
);
841 printk(KERN_ERR
"EEH: bus reset %d failed on slot %s, rc=%d\n",
842 i
+1, pdn
->node
->full_name
, rc
);
848 /* ------------------------------------------------------- */
849 /** Save and restore of PCI BARs
851 * Although firmware will set up BARs during boot, it doesn't
852 * set up device BAR's after a device reset, although it will,
853 * if requested, set up bridge configuration. Thus, we need to
854 * configure the PCI devices ourselves.
858 * __restore_bars - Restore the Base Address Registers
859 * @pdn: pci device node
861 * Loads the PCI configuration space base address registers,
862 * the expansion ROM base address, the latency timer, and etc.
863 * from the saved values in the device node.
865 static inline void __restore_bars (struct pci_dn
*pdn
)
870 if (NULL
==pdn
->phb
) return;
871 for (i
=4; i
<10; i
++) {
872 rtas_write_config(pdn
, i
*4, 4, pdn
->config_space
[i
]);
875 /* 12 == Expansion ROM Address */
876 rtas_write_config(pdn
, 12*4, 4, pdn
->config_space
[12]);
878 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
879 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
881 rtas_write_config (pdn
, PCI_CACHE_LINE_SIZE
, 1,
882 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
884 rtas_write_config (pdn
, PCI_LATENCY_TIMER
, 1,
885 SAVED_BYTE(PCI_LATENCY_TIMER
));
887 /* max latency, min grant, interrupt pin and line */
888 rtas_write_config(pdn
, 15*4, 4, pdn
->config_space
[15]);
890 /* Restore PERR & SERR bits, some devices require it,
891 don't touch the other command bits */
892 rtas_read_config(pdn
, PCI_COMMAND
, 4, &cmd
);
893 if (pdn
->config_space
[1] & PCI_COMMAND_PARITY
)
894 cmd
|= PCI_COMMAND_PARITY
;
896 cmd
&= ~PCI_COMMAND_PARITY
;
897 if (pdn
->config_space
[1] & PCI_COMMAND_SERR
)
898 cmd
|= PCI_COMMAND_SERR
;
900 cmd
&= ~PCI_COMMAND_SERR
;
901 rtas_write_config(pdn
, PCI_COMMAND
, 4, cmd
);
905 * eeh_restore_bars - restore the PCI config space info
907 * This routine performs a recursive walk to the children
908 * of this device as well.
910 void eeh_restore_bars(struct pci_dn
*pdn
)
912 struct device_node
*dn
;
916 if ((pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) && !IS_BRIDGE(pdn
->class_code
))
917 __restore_bars (pdn
);
919 for_each_child_of_node(pdn
->node
, dn
)
920 eeh_restore_bars (PCI_DN(dn
));
924 * eeh_save_bars - save device bars
926 * Save the values of the device bars. Unlike the restore
927 * routine, this routine is *not* recursive. This is because
928 * PCI devices are added individually; but, for the restore,
929 * an entire slot is reset at a time.
931 static void eeh_save_bars(struct pci_dn
*pdn
)
938 for (i
= 0; i
< 16; i
++)
939 rtas_read_config(pdn
, i
* 4, 4, &pdn
->config_space
[i
]);
943 rtas_configure_bridge(struct pci_dn
*pdn
)
949 /* Use PE configuration address, if present */
950 config_addr
= pdn
->eeh_config_addr
;
951 if (pdn
->eeh_pe_config_addr
)
952 config_addr
= pdn
->eeh_pe_config_addr
;
954 /* Use new configure-pe function, if supported */
955 if (ibm_configure_pe
!= RTAS_UNKNOWN_SERVICE
)
956 token
= ibm_configure_pe
;
958 token
= ibm_configure_bridge
;
960 rc
= rtas_call(token
, 3, 1, NULL
,
962 BUID_HI(pdn
->phb
->buid
),
963 BUID_LO(pdn
->phb
->buid
));
965 printk (KERN_WARNING
"EEH: Unable to configure device bridge (%d) for %s\n",
966 rc
, pdn
->node
->full_name
);
970 /* ------------------------------------------------------------- */
971 /* The code below deals with enabling EEH for devices during the
972 * early boot sequence. EEH must be enabled before any PCI probing
978 struct eeh_early_enable_info
{
979 unsigned int buid_hi
;
980 unsigned int buid_lo
;
983 static int get_pe_addr (int config_addr
,
984 struct eeh_early_enable_info
*info
)
986 unsigned int rets
[3];
989 /* Use latest config-addr token on power6 */
990 if (ibm_get_config_addr_info2
!= RTAS_UNKNOWN_SERVICE
) {
991 /* Make sure we have a PE in hand */
992 ret
= rtas_call (ibm_get_config_addr_info2
, 4, 2, rets
,
993 config_addr
, info
->buid_hi
, info
->buid_lo
, 1);
994 if (ret
|| (rets
[0]==0))
997 ret
= rtas_call (ibm_get_config_addr_info2
, 4, 2, rets
,
998 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
1004 /* Use older config-addr token on power5 */
1005 if (ibm_get_config_addr_info
!= RTAS_UNKNOWN_SERVICE
) {
1006 ret
= rtas_call (ibm_get_config_addr_info
, 4, 2, rets
,
1007 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
1015 /* Enable eeh for the given device node. */
1016 static void *early_enable_eeh(struct device_node
*dn
, void *data
)
1018 unsigned int rets
[3];
1019 struct eeh_early_enable_info
*info
= data
;
1021 const u32
*class_code
= of_get_property(dn
, "class-code", NULL
);
1022 const u32
*vendor_id
= of_get_property(dn
, "vendor-id", NULL
);
1023 const u32
*device_id
= of_get_property(dn
, "device-id", NULL
);
1026 struct pci_dn
*pdn
= PCI_DN(dn
);
1028 pdn
->class_code
= 0;
1030 pdn
->eeh_check_count
= 0;
1031 pdn
->eeh_freeze_count
= 0;
1032 pdn
->eeh_false_positives
= 0;
1034 if (!of_device_is_available(dn
))
1037 /* Ignore bad nodes. */
1038 if (!class_code
|| !vendor_id
|| !device_id
)
1041 /* There is nothing to check on PCI to ISA bridges */
1042 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
1043 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
1046 pdn
->class_code
= *class_code
;
1048 /* Ok... see if this device supports EEH. Some do, some don't,
1049 * and the only way to find out is to check each and every one. */
1050 regs
= of_get_property(dn
, "reg", NULL
);
1052 /* First register entry is addr (00BBSS00) */
1053 /* Try to enable eeh */
1054 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
1055 regs
[0], info
->buid_hi
, info
->buid_lo
,
1060 pdn
->eeh_config_addr
= regs
[0];
1062 /* If the newer, better, ibm,get-config-addr-info is supported,
1063 * then use that instead. */
1064 pdn
->eeh_pe_config_addr
= get_pe_addr(pdn
->eeh_config_addr
, info
);
1066 /* Some older systems (Power4) allow the
1067 * ibm,set-eeh-option call to succeed even on nodes
1068 * where EEH is not supported. Verify support
1070 ret
= read_slot_reset_state(pdn
, rets
);
1071 if ((ret
== 0) && (rets
[1] == 1))
1076 eeh_subsystem_enabled
= 1;
1077 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
1079 pr_debug("EEH: %s: eeh enabled, config=%x pe_config=%x\n",
1080 dn
->full_name
, pdn
->eeh_config_addr
,
1081 pdn
->eeh_pe_config_addr
);
1084 /* This device doesn't support EEH, but it may have an
1085 * EEH parent, in which case we mark it as supported. */
1086 if (dn
->parent
&& PCI_DN(dn
->parent
)
1087 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
1088 /* Parent supports EEH. */
1089 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
1090 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
1095 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
1104 * Initialize EEH by trying to enable it for all of the adapters in the system.
1105 * As a side effect we can determine here if eeh is supported at all.
1106 * Note that we leave EEH on so failed config cycles won't cause a machine
1107 * check. If a user turns off EEH for a particular adapter they are really
1108 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
1109 * grant access to a slot if EEH isn't enabled, and so we always enable
1110 * EEH for all slots/all devices.
1112 * The eeh-force-off option disables EEH checking globally, for all slots.
1113 * Even if force-off is set, the EEH hardware is still enabled, so that
1114 * newer systems can boot.
1116 void __init
eeh_init(void)
1118 struct device_node
*phb
, *np
;
1119 struct eeh_early_enable_info info
;
1121 raw_spin_lock_init(&confirm_error_lock
);
1122 spin_lock_init(&slot_errbuf_lock
);
1124 np
= of_find_node_by_path("/rtas");
1128 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
1129 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
1130 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
1131 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
1132 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
1133 ibm_get_config_addr_info
= rtas_token("ibm,get-config-addr-info");
1134 ibm_get_config_addr_info2
= rtas_token("ibm,get-config-addr-info2");
1135 ibm_configure_bridge
= rtas_token ("ibm,configure-bridge");
1136 ibm_configure_pe
= rtas_token("ibm,configure-pe");
1138 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
1141 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
1142 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
1143 eeh_error_buf_size
= 1024;
1145 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
1146 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
1147 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
1148 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
1151 /* Enable EEH for all adapters. Note that eeh requires buid's */
1152 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
1153 phb
= of_find_node_by_name(phb
, "pci")) {
1156 buid
= get_phb_buid(phb
);
1157 if (buid
== 0 || PCI_DN(phb
) == NULL
)
1160 info
.buid_lo
= BUID_LO(buid
);
1161 info
.buid_hi
= BUID_HI(buid
);
1162 traverse_pci_devices(phb
, early_enable_eeh
, &info
);
1165 if (eeh_subsystem_enabled
)
1166 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
1168 printk(KERN_WARNING
"EEH: No capable adapters found\n");
1172 * eeh_add_device_early - enable EEH for the indicated device_node
1173 * @dn: device node for which to set up EEH
1175 * This routine must be used to perform EEH initialization for PCI
1176 * devices that were added after system boot (e.g. hotplug, dlpar).
1177 * This routine must be called before any i/o is performed to the
1178 * adapter (inluding any config-space i/o).
1179 * Whether this actually enables EEH or not for this device depends
1180 * on the CEC architecture, type of the device, on earlier boot
1181 * command-line arguments & etc.
1183 static void eeh_add_device_early(struct device_node
*dn
)
1185 struct pci_controller
*phb
;
1186 struct eeh_early_enable_info info
;
1188 if (!dn
|| !PCI_DN(dn
))
1190 phb
= PCI_DN(dn
)->phb
;
1192 /* USB Bus children of PCI devices will not have BUID's */
1193 if (NULL
== phb
|| 0 == phb
->buid
)
1196 info
.buid_hi
= BUID_HI(phb
->buid
);
1197 info
.buid_lo
= BUID_LO(phb
->buid
);
1198 early_enable_eeh(dn
, &info
);
1201 void eeh_add_device_tree_early(struct device_node
*dn
)
1203 struct device_node
*sib
;
1205 for_each_child_of_node(dn
, sib
)
1206 eeh_add_device_tree_early(sib
);
1207 eeh_add_device_early(dn
);
1209 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
1212 * eeh_add_device_late - perform EEH initialization for the indicated pci device
1213 * @dev: pci device for which to set up EEH
1215 * This routine must be used to complete EEH initialization for PCI
1216 * devices that were added after system boot (e.g. hotplug, dlpar).
1218 static void eeh_add_device_late(struct pci_dev
*dev
)
1220 struct device_node
*dn
;
1223 if (!dev
|| !eeh_subsystem_enabled
)
1226 pr_debug("EEH: Adding device %s\n", pci_name(dev
));
1228 dn
= pci_device_to_OF_node(dev
);
1230 if (pdn
->pcidev
== dev
) {
1231 pr_debug("EEH: Already referenced !\n");
1234 WARN_ON(pdn
->pcidev
);
1239 pci_addr_cache_insert_device(dev
);
1240 eeh_sysfs_add_device(dev
);
1243 void eeh_add_device_tree_late(struct pci_bus
*bus
)
1245 struct pci_dev
*dev
;
1247 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1248 eeh_add_device_late(dev
);
1249 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1250 struct pci_bus
*subbus
= dev
->subordinate
;
1252 eeh_add_device_tree_late(subbus
);
1256 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
1259 * eeh_remove_device - undo EEH setup for the indicated pci device
1260 * @dev: pci device to be removed
1262 * This routine should be called when a device is removed from
1263 * a running system (e.g. by hotplug or dlpar). It unregisters
1264 * the PCI device from the EEH subsystem. I/O errors affecting
1265 * this device will no longer be detected after this call; thus,
1266 * i/o errors affecting this slot may leave this device unusable.
1268 static void eeh_remove_device(struct pci_dev
*dev
)
1270 struct device_node
*dn
;
1271 if (!dev
|| !eeh_subsystem_enabled
)
1274 /* Unregister the device with the EEH/PCI address search system */
1275 pr_debug("EEH: Removing device %s\n", pci_name(dev
));
1277 dn
= pci_device_to_OF_node(dev
);
1278 if (PCI_DN(dn
)->pcidev
== NULL
) {
1279 pr_debug("EEH: Not referenced !\n");
1282 PCI_DN(dn
)->pcidev
= NULL
;
1285 pci_addr_cache_remove_device(dev
);
1286 eeh_sysfs_remove_device(dev
);
1289 void eeh_remove_bus_device(struct pci_dev
*dev
)
1291 struct pci_bus
*bus
= dev
->subordinate
;
1292 struct pci_dev
*child
, *tmp
;
1294 eeh_remove_device(dev
);
1296 if (bus
&& dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1297 list_for_each_entry_safe(child
, tmp
, &bus
->devices
, bus_list
)
1298 eeh_remove_bus_device(child
);
1301 EXPORT_SYMBOL_GPL(eeh_remove_bus_device
);
1303 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1305 if (0 == eeh_subsystem_enabled
) {
1306 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1307 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs
);
1309 seq_printf(m
, "EEH Subsystem is enabled\n");
1312 "no device node=%ld\n"
1313 "no config address=%ld\n"
1314 "check not wanted=%ld\n"
1315 "eeh_total_mmio_ffs=%ld\n"
1316 "eeh_false_positives=%ld\n"
1317 "eeh_slot_resets=%ld\n",
1318 no_device
, no_dn
, no_cfg_addr
,
1319 ignored_check
, total_mmio_ffs
,
1327 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1329 return single_open(file
, proc_eeh_show
, NULL
);
1332 static const struct file_operations proc_eeh_operations
= {
1333 .open
= proc_eeh_open
,
1335 .llseek
= seq_lseek
,
1336 .release
= single_release
,
1339 static int __init
eeh_init_proc(void)
1341 if (machine_is(pseries
))
1342 proc_create("ppc64/eeh", 0, NULL
, &proc_eeh_operations
);
1345 __initcall(eeh_init_proc
);