arch/arm/mm/fault-armv.c

   1 /*
   2  *  linux/arch/arm/mm/fault-armv.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Modifications for ARM processor (c) 1995-2002 Russell King
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #include <linux/module.h>
  12 #include <linux/sched.h>
  13 #include <linux/kernel.h>
  14 #include <linux/mm.h>
  15 #include <linux/bitops.h>
  16 #include <linux/vmalloc.h>
  17 #include <linux/init.h>
  18 #include <linux/pagemap.h>
  19 #include <linux/gfp.h>
  20
  21 #include <asm/bugs.h>
  22 #include <asm/cacheflush.h>
  23 #include <asm/cachetype.h>
  24 #include <asm/pgtable.h>
  25 #include <asm/tlbflush.h>
  26
  27 #include "mm.h"
  28
  29 static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE;
  30
  31 #if __LINUX_ARM_ARCH__ < 6
  32 /*
  33  * We take the easy way out of this problem - we make the
  34  * PTE uncacheable.  However, we leave the write buffer on.
  35  *
  36  * Note that the pte lock held when calling update_mmu_cache must also
  37  * guard the pte (somewhere else in the same mm) that we modify here.
  38  * Therefore those configurations which might call adjust_pte (those
  39  * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock.
  40  */
  41 static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address,
  42         unsigned long pfn, pte_t *ptep)
  43 {
  44         pte_t entry = *ptep;
  45         int ret;
  46
  47         /*
  48          * If this page is present, it's actually being shared.
  49          */
  50         ret = pte_present(entry);
  51
  52         /*
  53          * If this page isn't present, or is already setup to
  54          * fault (ie, is old), we can safely ignore any issues.
  55          */
  56         if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
  57                 flush_cache_page(vma, address, pfn);
  58                 outer_flush_range((pfn << PAGE_SHIFT),
  59                                   (pfn << PAGE_SHIFT) + PAGE_SIZE);
  60                 pte_val(entry) &= ~L_PTE_MT_MASK;
  61                 pte_val(entry) |= shared_pte_mask;
  62                 set_pte_at(vma->vm_mm, address, ptep, entry);
  63                 flush_tlb_page(vma, address);
  64         }
  65
  66         return ret;
  67 }
  68
  69 static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
  70         unsigned long pfn)
  71 {
  72         spinlock_t *ptl;
  73         pgd_t *pgd;
  74         pmd_t *pmd;
  75         pte_t *pte;
  76         int ret;
  77
  78         pgd = pgd_offset(vma->vm_mm, address);
  79         if (pgd_none_or_clear_bad(pgd))
  80                 return 0;
  81
  82         pmd = pmd_offset(pgd, address);
  83         if (pmd_none_or_clear_bad(pmd))
  84                 return 0;
  85
  86         /*
  87          * This is called while another page table is mapped, so we
  88          * must use the nested version.  This also means we need to
  89          * open-code the spin-locking.
  90          */
  91         ptl = pte_lockptr(vma->vm_mm, pmd);
  92         pte = pte_offset_map_nested(pmd, address);
  93         spin_lock(ptl);
  94
  95         ret = do_adjust_pte(vma, address, pfn, pte);
  96
  97         spin_unlock(ptl);
  98         pte_unmap_nested(pte);
  99
 100         return ret;
 101 }
 102
 103 static void
 104 make_coherent(struct address_space *mapping, struct vm_area_struct *vma,
 105         unsigned long addr, pte_t *ptep, unsigned long pfn)
 106 {
 107         struct mm_struct *mm = vma->vm_mm;
 108         struct vm_area_struct *mpnt;
 109         struct prio_tree_iter iter;
 110         unsigned long offset;
 111         pgoff_t pgoff;
 112         int aliases = 0;
 113
 114         pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
 115
 116         /*
 117          * If we have any shared mappings that are in the same mm
 118          * space, then we need to handle them specially to maintain
 119          * cache coherency.
 120          */
 121         flush_dcache_mmap_lock(mapping);
 122         vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
 123                 /*
 124                  * If this VMA is not in our MM, we can ignore it.
 125                  * Note that we intentionally mask out the VMA
 126                  * that we are fixing up.
 127                  */
 128                 if (mpnt->vm_mm != mm || mpnt == vma)
 129                         continue;
 130                 if (!(mpnt->vm_flags & VM_MAYSHARE))
 131                         continue;
 132                 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
 133                 aliases += adjust_pte(mpnt, mpnt->vm_start + offset, pfn);
 134         }
 135         flush_dcache_mmap_unlock(mapping);
 136         if (aliases)
 137                 do_adjust_pte(vma, addr, pfn, ptep);
 138 }
 139
 140 /*
 141  * Take care of architecture specific things when placing a new PTE into
 142  * a page table, or changing an existing PTE.  Basically, there are two
 143  * things that we need to take care of:
 144  *
 145  *  1. If PG_dcache_clean is not set for the page, we need to ensure
 146  *     that any cache entries for the kernels virtual memory
 147  *     range are written back to the page.
 148  *  2. If we have multiple shared mappings of the same space in
 149  *     an object, we need to deal with the cache aliasing issues.
 150  *
 151  * Note that the pte lock will be held.
 152  */
 153 void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
 154         pte_t *ptep)
 155 {
 156         unsigned long pfn = pte_pfn(*ptep);
 157         struct address_space *mapping;
 158         struct page *page;
 159
 160         if (!pfn_valid(pfn))
 161                 return;
 162
 163         /*
 164          * The zero page is never written to, so never has any dirty
 165          * cache lines, and therefore never needs to be flushed.
 166          */
 167         page = pfn_to_page(pfn);
 168         if (page == ZERO_PAGE(0))
 169                 return;
 170
 171         mapping = page_mapping(page);
 172         if (!test_and_set_bit(PG_dcache_clean, &page->flags))
 173                 __flush_dcache_page(mapping, page);
 174         if (mapping) {
 175                 if (cache_is_vivt())
 176                         make_coherent(mapping, vma, addr, ptep, pfn);
 177                 else if (vma->vm_flags & VM_EXEC)
 178                         __flush_icache_all();
 179         }
 180 }
 181 #endif  /* __LINUX_ARM_ARCH__ < 6 */
 182
 183 /*
 184  * Check whether the write buffer has physical address aliasing
 185  * issues.  If it has, we need to avoid them for the case where
 186  * we have several shared mappings of the same object in user
 187  * space.
 188  */
 189 static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
 190 {
 191         register unsigned long zero = 0, one = 1, val;
 192
 193         local_irq_disable();
 194         mb();
 195         *p1 = one;
 196         mb();
 197         *p2 = zero;
 198         mb();
 199         val = *p1;
 200         mb();
 201         local_irq_enable();
 202         return val != zero;
 203 }
 204
 205 void __init check_writebuffer_bugs(void)
 206 {
 207         struct page *page;
 208         const char *reason;
 209         unsigned long v = 1;
 210
 211         printk(KERN_INFO "CPU: Testing write buffer coherency: ");
 212
 213         page = alloc_page(GFP_KERNEL);
 214         if (page) {
 215                 unsigned long *p1, *p2;
 216                 pgprot_t prot = __pgprot_modify(PAGE_KERNEL,
 217                                         L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE);
 218
 219                 p1 = vmap(&page, 1, VM_IOREMAP, prot);
 220                 p2 = vmap(&page, 1, VM_IOREMAP, prot);
 221
 222                 if (p1 && p2) {
 223                         v = check_writebuffer(p1, p2);
 224                         reason = "enabling work-around";
 225                 } else {
 226                         reason = "unable to map memory\n";
 227                 }
 228
 229                 vunmap(p1);
 230                 vunmap(p2);
 231                 put_page(page);
 232         } else {
 233                 reason = "unable to grab page\n";
 234         }
 235
 236         if (v) {
 237                 printk("failed, %s\n", reason);
 238                 shared_pte_mask = L_PTE_MT_UNCACHED;
 239         } else {
 240                 printk("ok\n");
 241         }
 242 }