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Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel...
[linux-2.6/libata-dev.git] / drivers / gpu / drm / i915 / intel_sdvo.c
blobc275bf0fa36db86a09d861a7e17457c2c103dd4e
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
53
54
55 static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63 };
64
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
67 struct intel_sdvo {
68 struct intel_encoder base;
69
70 struct i2c_adapter *i2c;
71 u8 slave_addr;
72
73 struct i2c_adapter ddc;
74
75 /* Register for the SDVO device: SDVOB or SDVOC */
76 uint32_t sdvo_reg;
77
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
80
81 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
85 struct intel_sdvo_caps caps;
86
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
89
90 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
96 /*
97 * Hotplug activation bits for this device
98 */
99 uint16_t hotplug_active;
100
101 /**
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
116 /* On different gens SDVOB is at different places. */
117 bool is_sdvob;
118
119 /* This is for current tv format name */
120 int tv_format_index;
121
122 /**
123 * This is set if we treat the device as HDMI, instead of DVI.
124 */
125 bool is_hdmi;
126 bool has_hdmi_monitor;
127 bool has_hdmi_audio;
128
129 /**
130 * This is set if we detect output of sdvo device as LVDS and
131 * have a valid fixed mode to use with the panel.
132 */
133 bool is_lvds;
134
135 /**
136 * This is sdvo fixed pannel mode pointer
137 */
138 struct drm_display_mode *sdvo_lvds_fixed_mode;
139
140 /* DDC bus used by this SDVO encoder */
141 uint8_t ddc_bus;
142
143 /*
144 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
145 */
146 uint8_t dtd_sdvo_flags;
147 };
148
149 struct intel_sdvo_connector {
150 struct intel_connector base;
151
152 /* Mark the type of connector */
153 uint16_t output_flag;
154
155 enum hdmi_force_audio force_audio;
156
157 /* This contains all current supported TV format */
158 u8 tv_format_supported[TV_FORMAT_NUM];
159 int format_supported_num;
160 struct drm_property *tv_format;
161
162 /* add the property for the SDVO-TV */
163 struct drm_property *left;
164 struct drm_property *right;
165 struct drm_property *top;
166 struct drm_property *bottom;
167 struct drm_property *hpos;
168 struct drm_property *vpos;
169 struct drm_property *contrast;
170 struct drm_property *saturation;
171 struct drm_property *hue;
172 struct drm_property *sharpness;
173 struct drm_property *flicker_filter;
174 struct drm_property *flicker_filter_adaptive;
175 struct drm_property *flicker_filter_2d;
176 struct drm_property *tv_chroma_filter;
177 struct drm_property *tv_luma_filter;
178 struct drm_property *dot_crawl;
179
180 /* add the property for the SDVO-TV/LVDS */
181 struct drm_property *brightness;
182
183 /* Add variable to record current setting for the above property */
184 u32 left_margin, right_margin, top_margin, bottom_margin;
185
186 /* this is to get the range of margin.*/
187 u32 max_hscan, max_vscan;
188 u32 max_hpos, cur_hpos;
189 u32 max_vpos, cur_vpos;
190 u32 cur_brightness, max_brightness;
191 u32 cur_contrast, max_contrast;
192 u32 cur_saturation, max_saturation;
193 u32 cur_hue, max_hue;
194 u32 cur_sharpness, max_sharpness;
195 u32 cur_flicker_filter, max_flicker_filter;
196 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
197 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
198 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
199 u32 cur_tv_luma_filter, max_tv_luma_filter;
200 u32 cur_dot_crawl, max_dot_crawl;
201 };
202
203 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
204 {
205 return container_of(encoder, struct intel_sdvo, base.base);
206 }
207
208 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
209 {
210 return container_of(intel_attached_encoder(connector),
211 struct intel_sdvo, base);
212 }
213
214 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
215 {
216 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
217 }
218
219 static bool
220 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
221 static bool
222 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector,
224 int type);
225 static bool
226 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
227 struct intel_sdvo_connector *intel_sdvo_connector);
228
229 /**
230 * Writes the SDVOB or SDVOC with the given value, but always writes both
231 * SDVOB and SDVOC to work around apparent hardware issues (according to
232 * comments in the BIOS).
233 */
234 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
235 {
236 struct drm_device *dev = intel_sdvo->base.base.dev;
237 struct drm_i915_private *dev_priv = dev->dev_private;
238 u32 bval = val, cval = val;
239 int i;
240
241 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
242 I915_WRITE(intel_sdvo->sdvo_reg, val);
243 I915_READ(intel_sdvo->sdvo_reg);
244 return;
245 }
246
247 if (intel_sdvo->sdvo_reg == SDVOB) {
248 cval = I915_READ(SDVOC);
249 } else {
250 bval = I915_READ(SDVOB);
251 }
252 /*
253 * Write the registers twice for luck. Sometimes,
254 * writing them only once doesn't appear to 'stick'.
255 * The BIOS does this too. Yay, magic
256 */
257 for (i = 0; i < 2; i++)
258 {
259 I915_WRITE(SDVOB, bval);
260 I915_READ(SDVOB);
261 I915_WRITE(SDVOC, cval);
262 I915_READ(SDVOC);
263 }
264 }
265
266 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
267 {
268 struct i2c_msg msgs[] = {
269 {
270 .addr = intel_sdvo->slave_addr,
271 .flags = 0,
272 .len = 1,
273 .buf = &addr,
274 },
275 {
276 .addr = intel_sdvo->slave_addr,
277 .flags = I2C_M_RD,
278 .len = 1,
279 .buf = ch,
280 }
281 };
282 int ret;
283
284 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
285 return true;
286
287 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
288 return false;
289 }
290
291 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
292 /** Mapping of command numbers to names, for debug output */
293 static const struct _sdvo_cmd_name {
294 u8 cmd;
295 const char *name;
296 } sdvo_cmd_names[] = {
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
340
341 /* Add the op code for SDVO enhancements */
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
386
387 /* HDMI op code */
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
408 };
409
410 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
411
412 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
413 const void *args, int args_len)
414 {
415 int i;
416
417 DRM_DEBUG_KMS("%s: W: %02X ",
418 SDVO_NAME(intel_sdvo), cmd);
419 for (i = 0; i < args_len; i++)
420 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
421 for (; i < 8; i++)
422 DRM_LOG_KMS(" ");
423 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
424 if (cmd == sdvo_cmd_names[i].cmd) {
425 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
426 break;
427 }
428 }
429 if (i == ARRAY_SIZE(sdvo_cmd_names))
430 DRM_LOG_KMS("(%02X)", cmd);
431 DRM_LOG_KMS("\n");
432 }
433
434 static const char *cmd_status_names[] = {
435 "Power on",
436 "Success",
437 "Not supported",
438 "Invalid arg",
439 "Pending",
440 "Target not specified",
441 "Scaling not supported"
442 };
443
444 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
445 const void *args, int args_len)
446 {
447 u8 *buf, status;
448 struct i2c_msg *msgs;
449 int i, ret = true;
450
451 /* Would be simpler to allocate both in one go ? */
452 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
453 if (!buf)
454 return false;
455
456 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
457 if (!msgs) {
458 kfree(buf);
459 return false;
460 }
461
462 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
463
464 for (i = 0; i < args_len; i++) {
465 msgs[i].addr = intel_sdvo->slave_addr;
466 msgs[i].flags = 0;
467 msgs[i].len = 2;
468 msgs[i].buf = buf + 2 *i;
469 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
470 buf[2*i + 1] = ((u8*)args)[i];
471 }
472 msgs[i].addr = intel_sdvo->slave_addr;
473 msgs[i].flags = 0;
474 msgs[i].len = 2;
475 msgs[i].buf = buf + 2*i;
476 buf[2*i + 0] = SDVO_I2C_OPCODE;
477 buf[2*i + 1] = cmd;
478
479 /* the following two are to read the response */
480 status = SDVO_I2C_CMD_STATUS;
481 msgs[i+1].addr = intel_sdvo->slave_addr;
482 msgs[i+1].flags = 0;
483 msgs[i+1].len = 1;
484 msgs[i+1].buf = &status;
485
486 msgs[i+2].addr = intel_sdvo->slave_addr;
487 msgs[i+2].flags = I2C_M_RD;
488 msgs[i+2].len = 1;
489 msgs[i+2].buf = &status;
490
491 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
492 if (ret < 0) {
493 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
494 ret = false;
495 goto out;
496 }
497 if (ret != i+3) {
498 /* failure in I2C transfer */
499 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
500 ret = false;
501 }
502
503 out:
504 kfree(msgs);
505 kfree(buf);
506 return ret;
507 }
508
509 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
510 void *response, int response_len)
511 {
512 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
513 u8 status;
514 int i;
515
516 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
517
518 /*
519 * The documentation states that all commands will be
520 * processed within 15µs, and that we need only poll
521 * the status byte a maximum of 3 times in order for the
522 * command to be complete.
523 *
524 * Check 5 times in case the hardware failed to read the docs.
525 *
526 * Also beware that the first response by many devices is to
527 * reply PENDING and stall for time. TVs are notorious for
528 * requiring longer than specified to complete their replies.
529 * Originally (in the DDX long ago), the delay was only ever 15ms
530 * with an additional delay of 30ms applied for TVs added later after
531 * many experiments. To accommodate both sets of delays, we do a
532 * sequence of slow checks if the device is falling behind and fails
533 * to reply within 5*15µs.
534 */
535 if (!intel_sdvo_read_byte(intel_sdvo,
536 SDVO_I2C_CMD_STATUS,
537 &status))
538 goto log_fail;
539
540 while (status == SDVO_CMD_STATUS_PENDING && --retry) {
541 if (retry < 10)
542 msleep(15);
543 else
544 udelay(15);
545
546 if (!intel_sdvo_read_byte(intel_sdvo,
547 SDVO_I2C_CMD_STATUS,
548 &status))
549 goto log_fail;
550 }
551
552 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
553 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
554 else
555 DRM_LOG_KMS("(??? %d)", status);
556
557 if (status != SDVO_CMD_STATUS_SUCCESS)
558 goto log_fail;
559
560 /* Read the command response */
561 for (i = 0; i < response_len; i++) {
562 if (!intel_sdvo_read_byte(intel_sdvo,
563 SDVO_I2C_RETURN_0 + i,
564 &((u8 *)response)[i]))
565 goto log_fail;
566 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
567 }
568 DRM_LOG_KMS("\n");
569 return true;
570
571 log_fail:
572 DRM_LOG_KMS("... failed\n");
573 return false;
574 }
575
576 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
577 {
578 if (mode->clock >= 100000)
579 return 1;
580 else if (mode->clock >= 50000)
581 return 2;
582 else
583 return 4;
584 }
585
586 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
587 u8 ddc_bus)
588 {
589 /* This must be the immediately preceding write before the i2c xfer */
590 return intel_sdvo_write_cmd(intel_sdvo,
591 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
592 &ddc_bus, 1);
593 }
594
595 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
596 {
597 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
598 return false;
599
600 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
601 }
602
603 static bool
604 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
605 {
606 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
607 return false;
608
609 return intel_sdvo_read_response(intel_sdvo, value, len);
610 }
611
612 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
613 {
614 struct intel_sdvo_set_target_input_args targets = {0};
615 return intel_sdvo_set_value(intel_sdvo,
616 SDVO_CMD_SET_TARGET_INPUT,
617 &targets, sizeof(targets));
618 }
619
620 /**
621 * Return whether each input is trained.
622 *
623 * This function is making an assumption about the layout of the response,
624 * which should be checked against the docs.
625 */
626 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
627 {
628 struct intel_sdvo_get_trained_inputs_response response;
629
630 BUILD_BUG_ON(sizeof(response) != 1);
631 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
632 &response, sizeof(response)))
633 return false;
634
635 *input_1 = response.input0_trained;
636 *input_2 = response.input1_trained;
637 return true;
638 }
639
640 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
641 u16 outputs)
642 {
643 return intel_sdvo_set_value(intel_sdvo,
644 SDVO_CMD_SET_ACTIVE_OUTPUTS,
645 &outputs, sizeof(outputs));
646 }
647
648 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
649 u16 *outputs)
650 {
651 return intel_sdvo_get_value(intel_sdvo,
652 SDVO_CMD_GET_ACTIVE_OUTPUTS,
653 outputs, sizeof(*outputs));
654 }
655
656 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
657 int mode)
658 {
659 u8 state = SDVO_ENCODER_STATE_ON;
660
661 switch (mode) {
662 case DRM_MODE_DPMS_ON:
663 state = SDVO_ENCODER_STATE_ON;
664 break;
665 case DRM_MODE_DPMS_STANDBY:
666 state = SDVO_ENCODER_STATE_STANDBY;
667 break;
668 case DRM_MODE_DPMS_SUSPEND:
669 state = SDVO_ENCODER_STATE_SUSPEND;
670 break;
671 case DRM_MODE_DPMS_OFF:
672 state = SDVO_ENCODER_STATE_OFF;
673 break;
674 }
675
676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
678 }
679
680 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
681 int *clock_min,
682 int *clock_max)
683 {
684 struct intel_sdvo_pixel_clock_range clocks;
685
686 BUILD_BUG_ON(sizeof(clocks) != 4);
687 if (!intel_sdvo_get_value(intel_sdvo,
688 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
689 &clocks, sizeof(clocks)))
690 return false;
691
692 /* Convert the values from units of 10 kHz to kHz. */
693 *clock_min = clocks.min * 10;
694 *clock_max = clocks.max * 10;
695 return true;
696 }
697
698 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
699 u16 outputs)
700 {
701 return intel_sdvo_set_value(intel_sdvo,
702 SDVO_CMD_SET_TARGET_OUTPUT,
703 &outputs, sizeof(outputs));
704 }
705
706 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
707 struct intel_sdvo_dtd *dtd)
708 {
709 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
710 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
711 }
712
713 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
714 struct intel_sdvo_dtd *dtd)
715 {
716 return intel_sdvo_set_timing(intel_sdvo,
717 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
718 }
719
720 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
721 struct intel_sdvo_dtd *dtd)
722 {
723 return intel_sdvo_set_timing(intel_sdvo,
724 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
725 }
726
727 static bool
728 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
729 uint16_t clock,
730 uint16_t width,
731 uint16_t height)
732 {
733 struct intel_sdvo_preferred_input_timing_args args;
734
735 memset(&args, 0, sizeof(args));
736 args.clock = clock;
737 args.width = width;
738 args.height = height;
739 args.interlace = 0;
740
741 if (intel_sdvo->is_lvds &&
742 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
743 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
744 args.scaled = 1;
745
746 return intel_sdvo_set_value(intel_sdvo,
747 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
748 &args, sizeof(args));
749 }
750
751 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
752 struct intel_sdvo_dtd *dtd)
753 {
754 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
755 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
756 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
757 &dtd->part1, sizeof(dtd->part1)) &&
758 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
759 &dtd->part2, sizeof(dtd->part2));
760 }
761
762 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
763 {
764 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
765 }
766
767 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
768 const struct drm_display_mode *mode)
769 {
770 uint16_t width, height;
771 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
772 uint16_t h_sync_offset, v_sync_offset;
773 int mode_clock;
774
775 width = mode->hdisplay;
776 height = mode->vdisplay;
777
778 /* do some mode translations */
779 h_blank_len = mode->htotal - mode->hdisplay;
780 h_sync_len = mode->hsync_end - mode->hsync_start;
781
782 v_blank_len = mode->vtotal - mode->vdisplay;
783 v_sync_len = mode->vsync_end - mode->vsync_start;
784
785 h_sync_offset = mode->hsync_start - mode->hdisplay;
786 v_sync_offset = mode->vsync_start - mode->vdisplay;
787
788 mode_clock = mode->clock;
789 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
790 mode_clock /= 10;
791 dtd->part1.clock = mode_clock;
792
793 dtd->part1.h_active = width & 0xff;
794 dtd->part1.h_blank = h_blank_len & 0xff;
795 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
796 ((h_blank_len >> 8) & 0xf);
797 dtd->part1.v_active = height & 0xff;
798 dtd->part1.v_blank = v_blank_len & 0xff;
799 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
800 ((v_blank_len >> 8) & 0xf);
801
802 dtd->part2.h_sync_off = h_sync_offset & 0xff;
803 dtd->part2.h_sync_width = h_sync_len & 0xff;
804 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
805 (v_sync_len & 0xf);
806 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
807 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
808 ((v_sync_len & 0x30) >> 4);
809
810 dtd->part2.dtd_flags = 0x18;
811 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
812 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
813 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
814 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
815 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
816 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
817
818 dtd->part2.sdvo_flags = 0;
819 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
820 dtd->part2.reserved = 0;
821 }
822
823 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
824 const struct intel_sdvo_dtd *dtd)
825 {
826 mode->hdisplay = dtd->part1.h_active;
827 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
828 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
829 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
830 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
831 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
832 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
833 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
834
835 mode->vdisplay = dtd->part1.v_active;
836 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
837 mode->vsync_start = mode->vdisplay;
838 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
839 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
840 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
841 mode->vsync_end = mode->vsync_start +
842 (dtd->part2.v_sync_off_width & 0xf);
843 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
844 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
845 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
846
847 mode->clock = dtd->part1.clock * 10;
848
849 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
850 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
851 mode->flags |= DRM_MODE_FLAG_INTERLACE;
852 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
853 mode->flags |= DRM_MODE_FLAG_PHSYNC;
854 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
855 mode->flags |= DRM_MODE_FLAG_PVSYNC;
856 }
857
858 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
859 {
860 struct intel_sdvo_encode encode;
861
862 BUILD_BUG_ON(sizeof(encode) != 2);
863 return intel_sdvo_get_value(intel_sdvo,
864 SDVO_CMD_GET_SUPP_ENCODE,
865 &encode, sizeof(encode));
866 }
867
868 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
869 uint8_t mode)
870 {
871 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
872 }
873
874 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
875 uint8_t mode)
876 {
877 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
878 }
879
880 #if 0
881 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
882 {
883 int i, j;
884 uint8_t set_buf_index[2];
885 uint8_t av_split;
886 uint8_t buf_size;
887 uint8_t buf[48];
888 uint8_t *pos;
889
890 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
891
892 for (i = 0; i <= av_split; i++) {
893 set_buf_index[0] = i; set_buf_index[1] = 0;
894 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
895 set_buf_index, 2);
896 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
897 intel_sdvo_read_response(encoder, &buf_size, 1);
898
899 pos = buf;
900 for (j = 0; j <= buf_size; j += 8) {
901 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
902 NULL, 0);
903 intel_sdvo_read_response(encoder, pos, 8);
904 pos += 8;
905 }
906 }
907 }
908 #endif
909
910 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
911 unsigned if_index, uint8_t tx_rate,
912 uint8_t *data, unsigned length)
913 {
914 uint8_t set_buf_index[2] = { if_index, 0 };
915 uint8_t hbuf_size, tmp[8];
916 int i;
917
918 if (!intel_sdvo_set_value(intel_sdvo,
919 SDVO_CMD_SET_HBUF_INDEX,
920 set_buf_index, 2))
921 return false;
922
923 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
924 &hbuf_size, 1))
925 return false;
926
927 /* Buffer size is 0 based, hooray! */
928 hbuf_size++;
929
930 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
931 if_index, length, hbuf_size);
932
933 for (i = 0; i < hbuf_size; i += 8) {
934 memset(tmp, 0, 8);
935 if (i < length)
936 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
937
938 if (!intel_sdvo_set_value(intel_sdvo,
939 SDVO_CMD_SET_HBUF_DATA,
940 tmp, 8))
941 return false;
942 }
943
944 return intel_sdvo_set_value(intel_sdvo,
945 SDVO_CMD_SET_HBUF_TXRATE,
946 &tx_rate, 1);
947 }
948
949 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
950 {
951 struct dip_infoframe avi_if = {
952 .type = DIP_TYPE_AVI,
953 .ver = DIP_VERSION_AVI,
954 .len = DIP_LEN_AVI,
955 };
956 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
957
958 intel_dip_infoframe_csum(&avi_if);
959
960 /* sdvo spec says that the ecc is handled by the hw, and it looks like
961 * we must not send the ecc field, either. */
962 memcpy(sdvo_data, &avi_if, 3);
963 sdvo_data[3] = avi_if.checksum;
964 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
965
966 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
967 SDVO_HBUF_TX_VSYNC,
968 sdvo_data, sizeof(sdvo_data));
969 }
970
971 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
972 {
973 struct intel_sdvo_tv_format format;
974 uint32_t format_map;
975
976 format_map = 1 << intel_sdvo->tv_format_index;
977 memset(&format, 0, sizeof(format));
978 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
979
980 BUILD_BUG_ON(sizeof(format) != 6);
981 return intel_sdvo_set_value(intel_sdvo,
982 SDVO_CMD_SET_TV_FORMAT,
983 &format, sizeof(format));
984 }
985
986 static bool
987 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
988 const struct drm_display_mode *mode)
989 {
990 struct intel_sdvo_dtd output_dtd;
991
992 if (!intel_sdvo_set_target_output(intel_sdvo,
993 intel_sdvo->attached_output))
994 return false;
995
996 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
997 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
998 return false;
999
1000 return true;
1001 }
1002
1003 /* Asks the sdvo controller for the preferred input mode given the output mode.
1004 * Unfortunately we have to set up the full output mode to do that. */
1005 static bool
1006 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1007 const struct drm_display_mode *mode,
1008 struct drm_display_mode *adjusted_mode)
1009 {
1010 struct intel_sdvo_dtd input_dtd;
1011
1012 /* Reset the input timing to the screen. Assume always input 0. */
1013 if (!intel_sdvo_set_target_input(intel_sdvo))
1014 return false;
1015
1016 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1017 mode->clock / 10,
1018 mode->hdisplay,
1019 mode->vdisplay))
1020 return false;
1021
1022 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1023 &input_dtd))
1024 return false;
1025
1026 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1027 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1028
1029 return true;
1030 }
1031
1032 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1033 const struct drm_display_mode *mode,
1034 struct drm_display_mode *adjusted_mode)
1035 {
1036 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1037 int multiplier;
1038
1039 /* We need to construct preferred input timings based on our
1040 * output timings. To do that, we have to set the output
1041 * timings, even though this isn't really the right place in
1042 * the sequence to do it. Oh well.
1043 */
1044 if (intel_sdvo->is_tv) {
1045 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1046 return false;
1047
1048 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1049 mode,
1050 adjusted_mode);
1051 } else if (intel_sdvo->is_lvds) {
1052 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1053 intel_sdvo->sdvo_lvds_fixed_mode))
1054 return false;
1055
1056 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1057 mode,
1058 adjusted_mode);
1059 }
1060
1061 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1062 * SDVO device will factor out the multiplier during mode_set.
1063 */
1064 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1065 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1066
1067 return true;
1068 }
1069
1070 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1071 struct drm_display_mode *mode,
1072 struct drm_display_mode *adjusted_mode)
1073 {
1074 struct drm_device *dev = encoder->dev;
1075 struct drm_i915_private *dev_priv = dev->dev_private;
1076 struct drm_crtc *crtc = encoder->crtc;
1077 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1078 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1079 u32 sdvox;
1080 struct intel_sdvo_in_out_map in_out;
1081 struct intel_sdvo_dtd input_dtd, output_dtd;
1082 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1083 int rate;
1084
1085 if (!mode)
1086 return;
1087
1088 /* First, set the input mapping for the first input to our controlled
1089 * output. This is only correct if we're a single-input device, in
1090 * which case the first input is the output from the appropriate SDVO
1091 * channel on the motherboard. In a two-input device, the first input
1092 * will be SDVOB and the second SDVOC.
1093 */
1094 in_out.in0 = intel_sdvo->attached_output;
1095 in_out.in1 = 0;
1096
1097 intel_sdvo_set_value(intel_sdvo,
1098 SDVO_CMD_SET_IN_OUT_MAP,
1099 &in_out, sizeof(in_out));
1100
1101 /* Set the output timings to the screen */
1102 if (!intel_sdvo_set_target_output(intel_sdvo,
1103 intel_sdvo->attached_output))
1104 return;
1105
1106 /* lvds has a special fixed output timing. */
1107 if (intel_sdvo->is_lvds)
1108 intel_sdvo_get_dtd_from_mode(&output_dtd,
1109 intel_sdvo->sdvo_lvds_fixed_mode);
1110 else
1111 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1112 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1113 DRM_INFO("Setting output timings on %s failed\n",
1114 SDVO_NAME(intel_sdvo));
1115
1116 /* Set the input timing to the screen. Assume always input 0. */
1117 if (!intel_sdvo_set_target_input(intel_sdvo))
1118 return;
1119
1120 if (intel_sdvo->has_hdmi_monitor) {
1121 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1122 intel_sdvo_set_colorimetry(intel_sdvo,
1123 SDVO_COLORIMETRY_RGB256);
1124 intel_sdvo_set_avi_infoframe(intel_sdvo);
1125 } else
1126 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1127
1128 if (intel_sdvo->is_tv &&
1129 !intel_sdvo_set_tv_format(intel_sdvo))
1130 return;
1131
1132 /* We have tried to get input timing in mode_fixup, and filled into
1133 * adjusted_mode.
1134 */
1135 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1136 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1137 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1138 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1139 DRM_INFO("Setting input timings on %s failed\n",
1140 SDVO_NAME(intel_sdvo));
1141
1142 switch (pixel_multiplier) {
1143 default:
1144 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1145 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1146 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1147 }
1148 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1149 return;
1150
1151 /* Set the SDVO control regs. */
1152 if (INTEL_INFO(dev)->gen >= 4) {
1153 /* The real mode polarity is set by the SDVO commands, using
1154 * struct intel_sdvo_dtd. */
1155 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1156 if (intel_sdvo->is_hdmi)
1157 sdvox |= intel_sdvo->color_range;
1158 if (INTEL_INFO(dev)->gen < 5)
1159 sdvox |= SDVO_BORDER_ENABLE;
1160 } else {
1161 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1162 switch (intel_sdvo->sdvo_reg) {
1163 case SDVOB:
1164 sdvox &= SDVOB_PRESERVE_MASK;
1165 break;
1166 case SDVOC:
1167 sdvox &= SDVOC_PRESERVE_MASK;
1168 break;
1169 }
1170 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1171 }
1172
1173 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1174 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1175 else
1176 sdvox |= TRANSCODER(intel_crtc->pipe);
1177
1178 if (intel_sdvo->has_hdmi_audio)
1179 sdvox |= SDVO_AUDIO_ENABLE;
1180
1181 if (INTEL_INFO(dev)->gen >= 4) {
1182 /* done in crtc_mode_set as the dpll_md reg must be written early */
1183 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1184 /* done in crtc_mode_set as it lives inside the dpll register */
1185 } else {
1186 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1187 }
1188
1189 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1190 INTEL_INFO(dev)->gen < 5)
1191 sdvox |= SDVO_STALL_SELECT;
1192 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1193 }
1194
1195 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1196 {
1197 struct intel_sdvo_connector *intel_sdvo_connector =
1198 to_intel_sdvo_connector(&connector->base);
1199 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1200 u16 active_outputs;
1201
1202 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1203
1204 if (active_outputs & intel_sdvo_connector->output_flag)
1205 return true;
1206 else
1207 return false;
1208 }
1209
1210 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1211 enum pipe *pipe)
1212 {
1213 struct drm_device *dev = encoder->base.dev;
1214 struct drm_i915_private *dev_priv = dev->dev_private;
1215 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1216 u32 tmp;
1217
1218 tmp = I915_READ(intel_sdvo->sdvo_reg);
1219
1220 if (!(tmp & SDVO_ENABLE))
1221 return false;
1222
1223 if (HAS_PCH_CPT(dev))
1224 *pipe = PORT_TO_PIPE_CPT(tmp);
1225 else
1226 *pipe = PORT_TO_PIPE(tmp);
1227
1228 return true;
1229 }
1230
1231 static void intel_disable_sdvo(struct intel_encoder *encoder)
1232 {
1233 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1234 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1235 u32 temp;
1236
1237 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1238 if (0)
1239 intel_sdvo_set_encoder_power_state(intel_sdvo,
1240 DRM_MODE_DPMS_OFF);
1241
1242 temp = I915_READ(intel_sdvo->sdvo_reg);
1243 if ((temp & SDVO_ENABLE) != 0) {
1244 /* HW workaround for IBX, we need to move the port to
1245 * transcoder A before disabling it. */
1246 if (HAS_PCH_IBX(encoder->base.dev)) {
1247 struct drm_crtc *crtc = encoder->base.crtc;
1248 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1249
1250 if (temp & SDVO_PIPE_B_SELECT) {
1251 temp &= ~SDVO_PIPE_B_SELECT;
1252 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1253 POSTING_READ(intel_sdvo->sdvo_reg);
1254
1255 /* Again we need to write this twice. */
1256 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1257 POSTING_READ(intel_sdvo->sdvo_reg);
1258
1259 /* Transcoder selection bits only update
1260 * effectively on vblank. */
1261 if (crtc)
1262 intel_wait_for_vblank(encoder->base.dev, pipe);
1263 else
1264 msleep(50);
1265 }
1266 }
1267
1268 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1269 }
1270 }
1271
1272 static void intel_enable_sdvo(struct intel_encoder *encoder)
1273 {
1274 struct drm_device *dev = encoder->base.dev;
1275 struct drm_i915_private *dev_priv = dev->dev_private;
1276 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1277 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1278 u32 temp;
1279 bool input1, input2;
1280 int i;
1281 u8 status;
1282
1283 temp = I915_READ(intel_sdvo->sdvo_reg);
1284 if ((temp & SDVO_ENABLE) == 0) {
1285 /* HW workaround for IBX, we need to move the port
1286 * to transcoder A before disabling it. */
1287 if (HAS_PCH_IBX(dev)) {
1288 struct drm_crtc *crtc = encoder->base.crtc;
1289 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1290
1291 /* Restore the transcoder select bit. */
1292 if (pipe == PIPE_B)
1293 temp |= SDVO_PIPE_B_SELECT;
1294 }
1295
1296 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1297 }
1298 for (i = 0; i < 2; i++)
1299 intel_wait_for_vblank(dev, intel_crtc->pipe);
1300
1301 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1302 /* Warn if the device reported failure to sync.
1303 * A lot of SDVO devices fail to notify of sync, but it's
1304 * a given it the status is a success, we succeeded.
1305 */
1306 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1307 DRM_DEBUG_KMS("First %s output reported failure to "
1308 "sync\n", SDVO_NAME(intel_sdvo));
1309 }
1310
1311 if (0)
1312 intel_sdvo_set_encoder_power_state(intel_sdvo,
1313 DRM_MODE_DPMS_ON);
1314 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1315 }
1316
1317 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1318 {
1319 struct drm_crtc *crtc;
1320 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1321
1322 /* dvo supports only 2 dpms states. */
1323 if (mode != DRM_MODE_DPMS_ON)
1324 mode = DRM_MODE_DPMS_OFF;
1325
1326 if (mode == connector->dpms)
1327 return;
1328
1329 connector->dpms = mode;
1330
1331 /* Only need to change hw state when actually enabled */
1332 crtc = intel_sdvo->base.base.crtc;
1333 if (!crtc) {
1334 intel_sdvo->base.connectors_active = false;
1335 return;
1336 }
1337
1338 if (mode != DRM_MODE_DPMS_ON) {
1339 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1340 if (0)
1341 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1342
1343 intel_sdvo->base.connectors_active = false;
1344
1345 intel_crtc_update_dpms(crtc);
1346 } else {
1347 intel_sdvo->base.connectors_active = true;
1348
1349 intel_crtc_update_dpms(crtc);
1350
1351 if (0)
1352 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1353 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1354 }
1355
1356 intel_modeset_check_state(connector->dev);
1357 }
1358
1359 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1360 struct drm_display_mode *mode)
1361 {
1362 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1363
1364 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1365 return MODE_NO_DBLESCAN;
1366
1367 if (intel_sdvo->pixel_clock_min > mode->clock)
1368 return MODE_CLOCK_LOW;
1369
1370 if (intel_sdvo->pixel_clock_max < mode->clock)
1371 return MODE_CLOCK_HIGH;
1372
1373 if (intel_sdvo->is_lvds) {
1374 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1375 return MODE_PANEL;
1376
1377 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1378 return MODE_PANEL;
1379 }
1380
1381 return MODE_OK;
1382 }
1383
1384 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1385 {
1386 BUILD_BUG_ON(sizeof(*caps) != 8);
1387 if (!intel_sdvo_get_value(intel_sdvo,
1388 SDVO_CMD_GET_DEVICE_CAPS,
1389 caps, sizeof(*caps)))
1390 return false;
1391
1392 DRM_DEBUG_KMS("SDVO capabilities:\n"
1393 " vendor_id: %d\n"
1394 " device_id: %d\n"
1395 " device_rev_id: %d\n"
1396 " sdvo_version_major: %d\n"
1397 " sdvo_version_minor: %d\n"
1398 " sdvo_inputs_mask: %d\n"
1399 " smooth_scaling: %d\n"
1400 " sharp_scaling: %d\n"
1401 " up_scaling: %d\n"
1402 " down_scaling: %d\n"
1403 " stall_support: %d\n"
1404 " output_flags: %d\n",
1405 caps->vendor_id,
1406 caps->device_id,
1407 caps->device_rev_id,
1408 caps->sdvo_version_major,
1409 caps->sdvo_version_minor,
1410 caps->sdvo_inputs_mask,
1411 caps->smooth_scaling,
1412 caps->sharp_scaling,
1413 caps->up_scaling,
1414 caps->down_scaling,
1415 caps->stall_support,
1416 caps->output_flags);
1417
1418 return true;
1419 }
1420
1421 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1422 {
1423 struct drm_device *dev = intel_sdvo->base.base.dev;
1424 uint16_t hotplug;
1425
1426 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1427 * on the line. */
1428 if (IS_I945G(dev) || IS_I945GM(dev))
1429 return 0;
1430
1431 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1432 &hotplug, sizeof(hotplug)))
1433 return 0;
1434
1435 return hotplug;
1436 }
1437
1438 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1439 {
1440 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1441
1442 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1443 &intel_sdvo->hotplug_active, 2);
1444 }
1445
1446 static bool
1447 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1448 {
1449 /* Is there more than one type of output? */
1450 return hweight16(intel_sdvo->caps.output_flags) > 1;
1451 }
1452
1453 static struct edid *
1454 intel_sdvo_get_edid(struct drm_connector *connector)
1455 {
1456 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1457 return drm_get_edid(connector, &sdvo->ddc);
1458 }
1459
1460 /* Mac mini hack -- use the same DDC as the analog connector */
1461 static struct edid *
1462 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1463 {
1464 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1465
1466 return drm_get_edid(connector,
1467 intel_gmbus_get_adapter(dev_priv,
1468 dev_priv->crt_ddc_pin));
1469 }
1470
1471 static enum drm_connector_status
1472 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1473 {
1474 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1475 enum drm_connector_status status;
1476 struct edid *edid;
1477
1478 edid = intel_sdvo_get_edid(connector);
1479
1480 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1481 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1482
1483 /*
1484 * Don't use the 1 as the argument of DDC bus switch to get
1485 * the EDID. It is used for SDVO SPD ROM.
1486 */
1487 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1488 intel_sdvo->ddc_bus = ddc;
1489 edid = intel_sdvo_get_edid(connector);
1490 if (edid)
1491 break;
1492 }
1493 /*
1494 * If we found the EDID on the other bus,
1495 * assume that is the correct DDC bus.
1496 */
1497 if (edid == NULL)
1498 intel_sdvo->ddc_bus = saved_ddc;
1499 }
1500
1501 /*
1502 * When there is no edid and no monitor is connected with VGA
1503 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1504 */
1505 if (edid == NULL)
1506 edid = intel_sdvo_get_analog_edid(connector);
1507
1508 status = connector_status_unknown;
1509 if (edid != NULL) {
1510 /* DDC bus is shared, match EDID to connector type */
1511 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1512 status = connector_status_connected;
1513 if (intel_sdvo->is_hdmi) {
1514 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1515 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1516 }
1517 } else
1518 status = connector_status_disconnected;
1519 kfree(edid);
1520 }
1521
1522 if (status == connector_status_connected) {
1523 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1524 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1525 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1526 }
1527
1528 return status;
1529 }
1530
1531 static bool
1532 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1533 struct edid *edid)
1534 {
1535 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1536 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1537
1538 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1539 connector_is_digital, monitor_is_digital);
1540 return connector_is_digital == monitor_is_digital;
1541 }
1542
1543 static enum drm_connector_status
1544 intel_sdvo_detect(struct drm_connector *connector, bool force)
1545 {
1546 uint16_t response;
1547 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1548 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1549 enum drm_connector_status ret;
1550
1551 if (!intel_sdvo_get_value(intel_sdvo,
1552 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1553 &response, 2))
1554 return connector_status_unknown;
1555
1556 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1557 response & 0xff, response >> 8,
1558 intel_sdvo_connector->output_flag);
1559
1560 if (response == 0)
1561 return connector_status_disconnected;
1562
1563 intel_sdvo->attached_output = response;
1564
1565 intel_sdvo->has_hdmi_monitor = false;
1566 intel_sdvo->has_hdmi_audio = false;
1567
1568 if ((intel_sdvo_connector->output_flag & response) == 0)
1569 ret = connector_status_disconnected;
1570 else if (IS_TMDS(intel_sdvo_connector))
1571 ret = intel_sdvo_tmds_sink_detect(connector);
1572 else {
1573 struct edid *edid;
1574
1575 /* if we have an edid check it matches the connection */
1576 edid = intel_sdvo_get_edid(connector);
1577 if (edid == NULL)
1578 edid = intel_sdvo_get_analog_edid(connector);
1579 if (edid != NULL) {
1580 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1581 edid))
1582 ret = connector_status_connected;
1583 else
1584 ret = connector_status_disconnected;
1585
1586 kfree(edid);
1587 } else
1588 ret = connector_status_connected;
1589 }
1590
1591 /* May update encoder flag for like clock for SDVO TV, etc.*/
1592 if (ret == connector_status_connected) {
1593 intel_sdvo->is_tv = false;
1594 intel_sdvo->is_lvds = false;
1595 intel_sdvo->base.needs_tv_clock = false;
1596
1597 if (response & SDVO_TV_MASK) {
1598 intel_sdvo->is_tv = true;
1599 intel_sdvo->base.needs_tv_clock = true;
1600 }
1601 if (response & SDVO_LVDS_MASK)
1602 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1603 }
1604
1605 return ret;
1606 }
1607
1608 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1609 {
1610 struct edid *edid;
1611
1612 /* set the bus switch and get the modes */
1613 edid = intel_sdvo_get_edid(connector);
1614
1615 /*
1616 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1617 * link between analog and digital outputs. So, if the regular SDVO
1618 * DDC fails, check to see if the analog output is disconnected, in
1619 * which case we'll look there for the digital DDC data.
1620 */
1621 if (edid == NULL)
1622 edid = intel_sdvo_get_analog_edid(connector);
1623
1624 if (edid != NULL) {
1625 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1626 edid)) {
1627 drm_mode_connector_update_edid_property(connector, edid);
1628 drm_add_edid_modes(connector, edid);
1629 }
1630
1631 kfree(edid);
1632 }
1633 }
1634
1635 /*
1636 * Set of SDVO TV modes.
1637 * Note! This is in reply order (see loop in get_tv_modes).
1638 * XXX: all 60Hz refresh?
1639 */
1640 static const struct drm_display_mode sdvo_tv_modes[] = {
1641 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1642 416, 0, 200, 201, 232, 233, 0,
1643 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1644 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1645 416, 0, 240, 241, 272, 273, 0,
1646 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1647 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1648 496, 0, 300, 301, 332, 333, 0,
1649 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1650 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1651 736, 0, 350, 351, 382, 383, 0,
1652 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1653 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1654 736, 0, 400, 401, 432, 433, 0,
1655 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1656 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1657 736, 0, 480, 481, 512, 513, 0,
1658 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1659 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1660 800, 0, 480, 481, 512, 513, 0,
1661 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1662 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1663 800, 0, 576, 577, 608, 609, 0,
1664 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1665 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1666 816, 0, 350, 351, 382, 383, 0,
1667 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1668 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1669 816, 0, 400, 401, 432, 433, 0,
1670 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1671 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1672 816, 0, 480, 481, 512, 513, 0,
1673 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1674 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1675 816, 0, 540, 541, 572, 573, 0,
1676 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1677 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1678 816, 0, 576, 577, 608, 609, 0,
1679 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1680 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1681 864, 0, 576, 577, 608, 609, 0,
1682 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1683 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1684 896, 0, 600, 601, 632, 633, 0,
1685 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1686 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1687 928, 0, 624, 625, 656, 657, 0,
1688 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1689 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1690 1016, 0, 766, 767, 798, 799, 0,
1691 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1692 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1693 1120, 0, 768, 769, 800, 801, 0,
1694 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1695 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1696 1376, 0, 1024, 1025, 1056, 1057, 0,
1697 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1698 };
1699
1700 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1701 {
1702 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1703 struct intel_sdvo_sdtv_resolution_request tv_res;
1704 uint32_t reply = 0, format_map = 0;
1705 int i;
1706
1707 /* Read the list of supported input resolutions for the selected TV
1708 * format.
1709 */
1710 format_map = 1 << intel_sdvo->tv_format_index;
1711 memcpy(&tv_res, &format_map,
1712 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1713
1714 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1715 return;
1716
1717 BUILD_BUG_ON(sizeof(tv_res) != 3);
1718 if (!intel_sdvo_write_cmd(intel_sdvo,
1719 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1720 &tv_res, sizeof(tv_res)))
1721 return;
1722 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1723 return;
1724
1725 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1726 if (reply & (1 << i)) {
1727 struct drm_display_mode *nmode;
1728 nmode = drm_mode_duplicate(connector->dev,
1729 &sdvo_tv_modes[i]);
1730 if (nmode)
1731 drm_mode_probed_add(connector, nmode);
1732 }
1733 }
1734
1735 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1736 {
1737 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1738 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1739 struct drm_display_mode *newmode;
1740
1741 /*
1742 * Attempt to get the mode list from DDC.
1743 * Assume that the preferred modes are
1744 * arranged in priority order.
1745 */
1746 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1747 if (list_empty(&connector->probed_modes) == false)
1748 goto end;
1749
1750 /* Fetch modes from VBT */
1751 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1752 newmode = drm_mode_duplicate(connector->dev,
1753 dev_priv->sdvo_lvds_vbt_mode);
1754 if (newmode != NULL) {
1755 /* Guarantee the mode is preferred */
1756 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1757 DRM_MODE_TYPE_DRIVER);
1758 drm_mode_probed_add(connector, newmode);
1759 }
1760 }
1761
1762 end:
1763 list_for_each_entry(newmode, &connector->probed_modes, head) {
1764 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1765 intel_sdvo->sdvo_lvds_fixed_mode =
1766 drm_mode_duplicate(connector->dev, newmode);
1767
1768 intel_sdvo->is_lvds = true;
1769 break;
1770 }
1771 }
1772
1773 }
1774
1775 static int intel_sdvo_get_modes(struct drm_connector *connector)
1776 {
1777 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1778
1779 if (IS_TV(intel_sdvo_connector))
1780 intel_sdvo_get_tv_modes(connector);
1781 else if (IS_LVDS(intel_sdvo_connector))
1782 intel_sdvo_get_lvds_modes(connector);
1783 else
1784 intel_sdvo_get_ddc_modes(connector);
1785
1786 return !list_empty(&connector->probed_modes);
1787 }
1788
1789 static void
1790 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1791 {
1792 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1793 struct drm_device *dev = connector->dev;
1794
1795 if (intel_sdvo_connector->left)
1796 drm_property_destroy(dev, intel_sdvo_connector->left);
1797 if (intel_sdvo_connector->right)
1798 drm_property_destroy(dev, intel_sdvo_connector->right);
1799 if (intel_sdvo_connector->top)
1800 drm_property_destroy(dev, intel_sdvo_connector->top);
1801 if (intel_sdvo_connector->bottom)
1802 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1803 if (intel_sdvo_connector->hpos)
1804 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1805 if (intel_sdvo_connector->vpos)
1806 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1807 if (intel_sdvo_connector->saturation)
1808 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1809 if (intel_sdvo_connector->contrast)
1810 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1811 if (intel_sdvo_connector->hue)
1812 drm_property_destroy(dev, intel_sdvo_connector->hue);
1813 if (intel_sdvo_connector->sharpness)
1814 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1815 if (intel_sdvo_connector->flicker_filter)
1816 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1817 if (intel_sdvo_connector->flicker_filter_2d)
1818 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1819 if (intel_sdvo_connector->flicker_filter_adaptive)
1820 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1821 if (intel_sdvo_connector->tv_luma_filter)
1822 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1823 if (intel_sdvo_connector->tv_chroma_filter)
1824 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1825 if (intel_sdvo_connector->dot_crawl)
1826 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1827 if (intel_sdvo_connector->brightness)
1828 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1829 }
1830
1831 static void intel_sdvo_destroy(struct drm_connector *connector)
1832 {
1833 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1834
1835 if (intel_sdvo_connector->tv_format)
1836 drm_property_destroy(connector->dev,
1837 intel_sdvo_connector->tv_format);
1838
1839 intel_sdvo_destroy_enhance_property(connector);
1840 drm_sysfs_connector_remove(connector);
1841 drm_connector_cleanup(connector);
1842 kfree(intel_sdvo_connector);
1843 }
1844
1845 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1846 {
1847 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1848 struct edid *edid;
1849 bool has_audio = false;
1850
1851 if (!intel_sdvo->is_hdmi)
1852 return false;
1853
1854 edid = intel_sdvo_get_edid(connector);
1855 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1856 has_audio = drm_detect_monitor_audio(edid);
1857 kfree(edid);
1858
1859 return has_audio;
1860 }
1861
1862 static int
1863 intel_sdvo_set_property(struct drm_connector *connector,
1864 struct drm_property *property,
1865 uint64_t val)
1866 {
1867 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1868 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1869 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1870 uint16_t temp_value;
1871 uint8_t cmd;
1872 int ret;
1873
1874 ret = drm_object_property_set_value(&connector->base, property, val);
1875 if (ret)
1876 return ret;
1877
1878 if (property == dev_priv->force_audio_property) {
1879 int i = val;
1880 bool has_audio;
1881
1882 if (i == intel_sdvo_connector->force_audio)
1883 return 0;
1884
1885 intel_sdvo_connector->force_audio = i;
1886
1887 if (i == HDMI_AUDIO_AUTO)
1888 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1889 else
1890 has_audio = (i == HDMI_AUDIO_ON);
1891
1892 if (has_audio == intel_sdvo->has_hdmi_audio)
1893 return 0;
1894
1895 intel_sdvo->has_hdmi_audio = has_audio;
1896 goto done;
1897 }
1898
1899 if (property == dev_priv->broadcast_rgb_property) {
1900 if (val == !!intel_sdvo->color_range)
1901 return 0;
1902
1903 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1904 goto done;
1905 }
1906
1907 #define CHECK_PROPERTY(name, NAME) \
1908 if (intel_sdvo_connector->name == property) { \
1909 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1910 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1911 cmd = SDVO_CMD_SET_##NAME; \
1912 intel_sdvo_connector->cur_##name = temp_value; \
1913 goto set_value; \
1914 }
1915
1916 if (property == intel_sdvo_connector->tv_format) {
1917 if (val >= TV_FORMAT_NUM)
1918 return -EINVAL;
1919
1920 if (intel_sdvo->tv_format_index ==
1921 intel_sdvo_connector->tv_format_supported[val])
1922 return 0;
1923
1924 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1925 goto done;
1926 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1927 temp_value = val;
1928 if (intel_sdvo_connector->left == property) {
1929 drm_object_property_set_value(&connector->base,
1930 intel_sdvo_connector->right, val);
1931 if (intel_sdvo_connector->left_margin == temp_value)
1932 return 0;
1933
1934 intel_sdvo_connector->left_margin = temp_value;
1935 intel_sdvo_connector->right_margin = temp_value;
1936 temp_value = intel_sdvo_connector->max_hscan -
1937 intel_sdvo_connector->left_margin;
1938 cmd = SDVO_CMD_SET_OVERSCAN_H;
1939 goto set_value;
1940 } else if (intel_sdvo_connector->right == property) {
1941 drm_object_property_set_value(&connector->base,
1942 intel_sdvo_connector->left, val);
1943 if (intel_sdvo_connector->right_margin == temp_value)
1944 return 0;
1945
1946 intel_sdvo_connector->left_margin = temp_value;
1947 intel_sdvo_connector->right_margin = temp_value;
1948 temp_value = intel_sdvo_connector->max_hscan -
1949 intel_sdvo_connector->left_margin;
1950 cmd = SDVO_CMD_SET_OVERSCAN_H;
1951 goto set_value;
1952 } else if (intel_sdvo_connector->top == property) {
1953 drm_object_property_set_value(&connector->base,
1954 intel_sdvo_connector->bottom, val);
1955 if (intel_sdvo_connector->top_margin == temp_value)
1956 return 0;
1957
1958 intel_sdvo_connector->top_margin = temp_value;
1959 intel_sdvo_connector->bottom_margin = temp_value;
1960 temp_value = intel_sdvo_connector->max_vscan -
1961 intel_sdvo_connector->top_margin;
1962 cmd = SDVO_CMD_SET_OVERSCAN_V;
1963 goto set_value;
1964 } else if (intel_sdvo_connector->bottom == property) {
1965 drm_object_property_set_value(&connector->base,
1966 intel_sdvo_connector->top, val);
1967 if (intel_sdvo_connector->bottom_margin == temp_value)
1968 return 0;
1969
1970 intel_sdvo_connector->top_margin = temp_value;
1971 intel_sdvo_connector->bottom_margin = temp_value;
1972 temp_value = intel_sdvo_connector->max_vscan -
1973 intel_sdvo_connector->top_margin;
1974 cmd = SDVO_CMD_SET_OVERSCAN_V;
1975 goto set_value;
1976 }
1977 CHECK_PROPERTY(hpos, HPOS)
1978 CHECK_PROPERTY(vpos, VPOS)
1979 CHECK_PROPERTY(saturation, SATURATION)
1980 CHECK_PROPERTY(contrast, CONTRAST)
1981 CHECK_PROPERTY(hue, HUE)
1982 CHECK_PROPERTY(brightness, BRIGHTNESS)
1983 CHECK_PROPERTY(sharpness, SHARPNESS)
1984 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1985 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1986 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1987 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1988 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1989 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1990 }
1991
1992 return -EINVAL; /* unknown property */
1993
1994 set_value:
1995 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1996 return -EIO;
1997
1998
1999 done:
2000 if (intel_sdvo->base.base.crtc) {
2001 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
2002 intel_set_mode(crtc, &crtc->mode,
2003 crtc->x, crtc->y, crtc->fb);
2004 }
2005
2006 return 0;
2007 #undef CHECK_PROPERTY
2008 }
2009
2010 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
2011 .mode_fixup = intel_sdvo_mode_fixup,
2012 .mode_set = intel_sdvo_mode_set,
2013 .disable = intel_encoder_noop,
2014 };
2015
2016 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2017 .dpms = intel_sdvo_dpms,
2018 .detect = intel_sdvo_detect,
2019 .fill_modes = drm_helper_probe_single_connector_modes,
2020 .set_property = intel_sdvo_set_property,
2021 .destroy = intel_sdvo_destroy,
2022 };
2023
2024 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2025 .get_modes = intel_sdvo_get_modes,
2026 .mode_valid = intel_sdvo_mode_valid,
2027 .best_encoder = intel_best_encoder,
2028 };
2029
2030 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2031 {
2032 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
2033
2034 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2035 drm_mode_destroy(encoder->dev,
2036 intel_sdvo->sdvo_lvds_fixed_mode);
2037
2038 i2c_del_adapter(&intel_sdvo->ddc);
2039 intel_encoder_destroy(encoder);
2040 }
2041
2042 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2043 .destroy = intel_sdvo_enc_destroy,
2044 };
2045
2046 static void
2047 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2048 {
2049 uint16_t mask = 0;
2050 unsigned int num_bits;
2051
2052 /* Make a mask of outputs less than or equal to our own priority in the
2053 * list.
2054 */
2055 switch (sdvo->controlled_output) {
2056 case SDVO_OUTPUT_LVDS1:
2057 mask |= SDVO_OUTPUT_LVDS1;
2058 case SDVO_OUTPUT_LVDS0:
2059 mask |= SDVO_OUTPUT_LVDS0;
2060 case SDVO_OUTPUT_TMDS1:
2061 mask |= SDVO_OUTPUT_TMDS1;
2062 case SDVO_OUTPUT_TMDS0:
2063 mask |= SDVO_OUTPUT_TMDS0;
2064 case SDVO_OUTPUT_RGB1:
2065 mask |= SDVO_OUTPUT_RGB1;
2066 case SDVO_OUTPUT_RGB0:
2067 mask |= SDVO_OUTPUT_RGB0;
2068 break;
2069 }
2070
2071 /* Count bits to find what number we are in the priority list. */
2072 mask &= sdvo->caps.output_flags;
2073 num_bits = hweight16(mask);
2074 /* If more than 3 outputs, default to DDC bus 3 for now. */
2075 if (num_bits > 3)
2076 num_bits = 3;
2077
2078 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2079 sdvo->ddc_bus = 1 << num_bits;
2080 }
2081
2082 /**
2083 * Choose the appropriate DDC bus for control bus switch command for this
2084 * SDVO output based on the controlled output.
2085 *
2086 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2087 * outputs, then LVDS outputs.
2088 */
2089 static void
2090 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2091 struct intel_sdvo *sdvo, u32 reg)
2092 {
2093 struct sdvo_device_mapping *mapping;
2094
2095 if (sdvo->is_sdvob)
2096 mapping = &(dev_priv->sdvo_mappings[0]);
2097 else
2098 mapping = &(dev_priv->sdvo_mappings[1]);
2099
2100 if (mapping->initialized)
2101 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2102 else
2103 intel_sdvo_guess_ddc_bus(sdvo);
2104 }
2105
2106 static void
2107 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2108 struct intel_sdvo *sdvo, u32 reg)
2109 {
2110 struct sdvo_device_mapping *mapping;
2111 u8 pin;
2112
2113 if (sdvo->is_sdvob)
2114 mapping = &dev_priv->sdvo_mappings[0];
2115 else
2116 mapping = &dev_priv->sdvo_mappings[1];
2117
2118 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2119 pin = mapping->i2c_pin;
2120 else
2121 pin = GMBUS_PORT_DPB;
2122
2123 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2124
2125 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2126 * our code totally fails once we start using gmbus. Hence fall back to
2127 * bit banging for now. */
2128 intel_gmbus_force_bit(sdvo->i2c, true);
2129 }
2130
2131 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2132 static void
2133 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2134 {
2135 intel_gmbus_force_bit(sdvo->i2c, false);
2136 }
2137
2138 static bool
2139 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2140 {
2141 return intel_sdvo_check_supp_encode(intel_sdvo);
2142 }
2143
2144 static u8
2145 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2146 {
2147 struct drm_i915_private *dev_priv = dev->dev_private;
2148 struct sdvo_device_mapping *my_mapping, *other_mapping;
2149
2150 if (sdvo->is_sdvob) {
2151 my_mapping = &dev_priv->sdvo_mappings[0];
2152 other_mapping = &dev_priv->sdvo_mappings[1];
2153 } else {
2154 my_mapping = &dev_priv->sdvo_mappings[1];
2155 other_mapping = &dev_priv->sdvo_mappings[0];
2156 }
2157
2158 /* If the BIOS described our SDVO device, take advantage of it. */
2159 if (my_mapping->slave_addr)
2160 return my_mapping->slave_addr;
2161
2162 /* If the BIOS only described a different SDVO device, use the
2163 * address that it isn't using.
2164 */
2165 if (other_mapping->slave_addr) {
2166 if (other_mapping->slave_addr == 0x70)
2167 return 0x72;
2168 else
2169 return 0x70;
2170 }
2171
2172 /* No SDVO device info is found for another DVO port,
2173 * so use mapping assumption we had before BIOS parsing.
2174 */
2175 if (sdvo->is_sdvob)
2176 return 0x70;
2177 else
2178 return 0x72;
2179 }
2180
2181 static void
2182 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2183 struct intel_sdvo *encoder)
2184 {
2185 drm_connector_init(encoder->base.base.dev,
2186 &connector->base.base,
2187 &intel_sdvo_connector_funcs,
2188 connector->base.base.connector_type);
2189
2190 drm_connector_helper_add(&connector->base.base,
2191 &intel_sdvo_connector_helper_funcs);
2192
2193 connector->base.base.interlace_allowed = 1;
2194 connector->base.base.doublescan_allowed = 0;
2195 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2196 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2197
2198 intel_connector_attach_encoder(&connector->base, &encoder->base);
2199 drm_sysfs_connector_add(&connector->base.base);
2200 }
2201
2202 static void
2203 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2204 {
2205 struct drm_device *dev = connector->base.base.dev;
2206
2207 intel_attach_force_audio_property(&connector->base.base);
2208 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2209 intel_attach_broadcast_rgb_property(&connector->base.base);
2210 }
2211
2212 static bool
2213 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2214 {
2215 struct drm_encoder *encoder = &intel_sdvo->base.base;
2216 struct drm_connector *connector;
2217 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2218 struct intel_connector *intel_connector;
2219 struct intel_sdvo_connector *intel_sdvo_connector;
2220
2221 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2222 if (!intel_sdvo_connector)
2223 return false;
2224
2225 if (device == 0) {
2226 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2227 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2228 } else if (device == 1) {
2229 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2230 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2231 }
2232
2233 intel_connector = &intel_sdvo_connector->base;
2234 connector = &intel_connector->base;
2235 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2236 intel_sdvo_connector->output_flag) {
2237 connector->polled = DRM_CONNECTOR_POLL_HPD;
2238 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2239 /* Some SDVO devices have one-shot hotplug interrupts.
2240 * Ensure that they get re-enabled when an interrupt happens.
2241 */
2242 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2243 intel_sdvo_enable_hotplug(intel_encoder);
2244 } else {
2245 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2246 }
2247 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2248 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2249
2250 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2251 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2252 intel_sdvo->is_hdmi = true;
2253 }
2254
2255 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2256 if (intel_sdvo->is_hdmi)
2257 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2258
2259 return true;
2260 }
2261
2262 static bool
2263 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2264 {
2265 struct drm_encoder *encoder = &intel_sdvo->base.base;
2266 struct drm_connector *connector;
2267 struct intel_connector *intel_connector;
2268 struct intel_sdvo_connector *intel_sdvo_connector;
2269
2270 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2271 if (!intel_sdvo_connector)
2272 return false;
2273
2274 intel_connector = &intel_sdvo_connector->base;
2275 connector = &intel_connector->base;
2276 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2277 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2278
2279 intel_sdvo->controlled_output |= type;
2280 intel_sdvo_connector->output_flag = type;
2281
2282 intel_sdvo->is_tv = true;
2283 intel_sdvo->base.needs_tv_clock = true;
2284
2285 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2286
2287 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2288 goto err;
2289
2290 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2291 goto err;
2292
2293 return true;
2294
2295 err:
2296 intel_sdvo_destroy(connector);
2297 return false;
2298 }
2299
2300 static bool
2301 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2302 {
2303 struct drm_encoder *encoder = &intel_sdvo->base.base;
2304 struct drm_connector *connector;
2305 struct intel_connector *intel_connector;
2306 struct intel_sdvo_connector *intel_sdvo_connector;
2307
2308 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2309 if (!intel_sdvo_connector)
2310 return false;
2311
2312 intel_connector = &intel_sdvo_connector->base;
2313 connector = &intel_connector->base;
2314 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2315 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2316 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2317
2318 if (device == 0) {
2319 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2320 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2321 } else if (device == 1) {
2322 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2323 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2324 }
2325
2326 intel_sdvo_connector_init(intel_sdvo_connector,
2327 intel_sdvo);
2328 return true;
2329 }
2330
2331 static bool
2332 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2333 {
2334 struct drm_encoder *encoder = &intel_sdvo->base.base;
2335 struct drm_connector *connector;
2336 struct intel_connector *intel_connector;
2337 struct intel_sdvo_connector *intel_sdvo_connector;
2338
2339 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2340 if (!intel_sdvo_connector)
2341 return false;
2342
2343 intel_connector = &intel_sdvo_connector->base;
2344 connector = &intel_connector->base;
2345 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2346 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2347
2348 if (device == 0) {
2349 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2350 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2351 } else if (device == 1) {
2352 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2353 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2354 }
2355
2356 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2357 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2358 goto err;
2359
2360 return true;
2361
2362 err:
2363 intel_sdvo_destroy(connector);
2364 return false;
2365 }
2366
2367 static bool
2368 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2369 {
2370 intel_sdvo->is_tv = false;
2371 intel_sdvo->base.needs_tv_clock = false;
2372 intel_sdvo->is_lvds = false;
2373
2374 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2375
2376 if (flags & SDVO_OUTPUT_TMDS0)
2377 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2378 return false;
2379
2380 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2381 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2382 return false;
2383
2384 /* TV has no XXX1 function block */
2385 if (flags & SDVO_OUTPUT_SVID0)
2386 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2387 return false;
2388
2389 if (flags & SDVO_OUTPUT_CVBS0)
2390 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2391 return false;
2392
2393 if (flags & SDVO_OUTPUT_YPRPB0)
2394 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2395 return false;
2396
2397 if (flags & SDVO_OUTPUT_RGB0)
2398 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2399 return false;
2400
2401 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2402 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2403 return false;
2404
2405 if (flags & SDVO_OUTPUT_LVDS0)
2406 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2407 return false;
2408
2409 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2410 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2411 return false;
2412
2413 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2414 unsigned char bytes[2];
2415
2416 intel_sdvo->controlled_output = 0;
2417 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2418 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2419 SDVO_NAME(intel_sdvo),
2420 bytes[0], bytes[1]);
2421 return false;
2422 }
2423 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2424
2425 return true;
2426 }
2427
2428 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2429 {
2430 struct drm_device *dev = intel_sdvo->base.base.dev;
2431 struct drm_connector *connector, *tmp;
2432
2433 list_for_each_entry_safe(connector, tmp,
2434 &dev->mode_config.connector_list, head) {
2435 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2436 intel_sdvo_destroy(connector);
2437 }
2438 }
2439
2440 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2441 struct intel_sdvo_connector *intel_sdvo_connector,
2442 int type)
2443 {
2444 struct drm_device *dev = intel_sdvo->base.base.dev;
2445 struct intel_sdvo_tv_format format;
2446 uint32_t format_map, i;
2447
2448 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2449 return false;
2450
2451 BUILD_BUG_ON(sizeof(format) != 6);
2452 if (!intel_sdvo_get_value(intel_sdvo,
2453 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2454 &format, sizeof(format)))
2455 return false;
2456
2457 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2458
2459 if (format_map == 0)
2460 return false;
2461
2462 intel_sdvo_connector->format_supported_num = 0;
2463 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2464 if (format_map & (1 << i))
2465 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2466
2467
2468 intel_sdvo_connector->tv_format =
2469 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2470 "mode", intel_sdvo_connector->format_supported_num);
2471 if (!intel_sdvo_connector->tv_format)
2472 return false;
2473
2474 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2475 drm_property_add_enum(
2476 intel_sdvo_connector->tv_format, i,
2477 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2478
2479 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2480 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2481 intel_sdvo_connector->tv_format, 0);
2482 return true;
2483
2484 }
2485
2486 #define ENHANCEMENT(name, NAME) do { \
2487 if (enhancements.name) { \
2488 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2489 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2490 return false; \
2491 intel_sdvo_connector->max_##name = data_value[0]; \
2492 intel_sdvo_connector->cur_##name = response; \
2493 intel_sdvo_connector->name = \
2494 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2495 if (!intel_sdvo_connector->name) return false; \
2496 drm_object_attach_property(&connector->base, \
2497 intel_sdvo_connector->name, \
2498 intel_sdvo_connector->cur_##name); \
2499 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2500 data_value[0], data_value[1], response); \
2501 } \
2502 } while (0)
2503
2504 static bool
2505 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2506 struct intel_sdvo_connector *intel_sdvo_connector,
2507 struct intel_sdvo_enhancements_reply enhancements)
2508 {
2509 struct drm_device *dev = intel_sdvo->base.base.dev;
2510 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2511 uint16_t response, data_value[2];
2512
2513 /* when horizontal overscan is supported, Add the left/right property */
2514 if (enhancements.overscan_h) {
2515 if (!intel_sdvo_get_value(intel_sdvo,
2516 SDVO_CMD_GET_MAX_OVERSCAN_H,
2517 &data_value, 4))
2518 return false;
2519
2520 if (!intel_sdvo_get_value(intel_sdvo,
2521 SDVO_CMD_GET_OVERSCAN_H,
2522 &response, 2))
2523 return false;
2524
2525 intel_sdvo_connector->max_hscan = data_value[0];
2526 intel_sdvo_connector->left_margin = data_value[0] - response;
2527 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2528 intel_sdvo_connector->left =
2529 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2530 if (!intel_sdvo_connector->left)
2531 return false;
2532
2533 drm_object_attach_property(&connector->base,
2534 intel_sdvo_connector->left,
2535 intel_sdvo_connector->left_margin);
2536
2537 intel_sdvo_connector->right =
2538 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2539 if (!intel_sdvo_connector->right)
2540 return false;
2541
2542 drm_object_attach_property(&connector->base,
2543 intel_sdvo_connector->right,
2544 intel_sdvo_connector->right_margin);
2545 DRM_DEBUG_KMS("h_overscan: max %d, "
2546 "default %d, current %d\n",
2547 data_value[0], data_value[1], response);
2548 }
2549
2550 if (enhancements.overscan_v) {
2551 if (!intel_sdvo_get_value(intel_sdvo,
2552 SDVO_CMD_GET_MAX_OVERSCAN_V,
2553 &data_value, 4))
2554 return false;
2555
2556 if (!intel_sdvo_get_value(intel_sdvo,
2557 SDVO_CMD_GET_OVERSCAN_V,
2558 &response, 2))
2559 return false;
2560
2561 intel_sdvo_connector->max_vscan = data_value[0];
2562 intel_sdvo_connector->top_margin = data_value[0] - response;
2563 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2564 intel_sdvo_connector->top =
2565 drm_property_create_range(dev, 0,
2566 "top_margin", 0, data_value[0]);
2567 if (!intel_sdvo_connector->top)
2568 return false;
2569
2570 drm_object_attach_property(&connector->base,
2571 intel_sdvo_connector->top,
2572 intel_sdvo_connector->top_margin);
2573
2574 intel_sdvo_connector->bottom =
2575 drm_property_create_range(dev, 0,
2576 "bottom_margin", 0, data_value[0]);
2577 if (!intel_sdvo_connector->bottom)
2578 return false;
2579
2580 drm_object_attach_property(&connector->base,
2581 intel_sdvo_connector->bottom,
2582 intel_sdvo_connector->bottom_margin);
2583 DRM_DEBUG_KMS("v_overscan: max %d, "
2584 "default %d, current %d\n",
2585 data_value[0], data_value[1], response);
2586 }
2587
2588 ENHANCEMENT(hpos, HPOS);
2589 ENHANCEMENT(vpos, VPOS);
2590 ENHANCEMENT(saturation, SATURATION);
2591 ENHANCEMENT(contrast, CONTRAST);
2592 ENHANCEMENT(hue, HUE);
2593 ENHANCEMENT(sharpness, SHARPNESS);
2594 ENHANCEMENT(brightness, BRIGHTNESS);
2595 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2596 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2597 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2598 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2599 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2600
2601 if (enhancements.dot_crawl) {
2602 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2603 return false;
2604
2605 intel_sdvo_connector->max_dot_crawl = 1;
2606 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2607 intel_sdvo_connector->dot_crawl =
2608 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2609 if (!intel_sdvo_connector->dot_crawl)
2610 return false;
2611
2612 drm_object_attach_property(&connector->base,
2613 intel_sdvo_connector->dot_crawl,
2614 intel_sdvo_connector->cur_dot_crawl);
2615 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2616 }
2617
2618 return true;
2619 }
2620
2621 static bool
2622 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2623 struct intel_sdvo_connector *intel_sdvo_connector,
2624 struct intel_sdvo_enhancements_reply enhancements)
2625 {
2626 struct drm_device *dev = intel_sdvo->base.base.dev;
2627 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2628 uint16_t response, data_value[2];
2629
2630 ENHANCEMENT(brightness, BRIGHTNESS);
2631
2632 return true;
2633 }
2634 #undef ENHANCEMENT
2635
2636 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2637 struct intel_sdvo_connector *intel_sdvo_connector)
2638 {
2639 union {
2640 struct intel_sdvo_enhancements_reply reply;
2641 uint16_t response;
2642 } enhancements;
2643
2644 BUILD_BUG_ON(sizeof(enhancements) != 2);
2645
2646 enhancements.response = 0;
2647 intel_sdvo_get_value(intel_sdvo,
2648 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2649 &enhancements, sizeof(enhancements));
2650 if (enhancements.response == 0) {
2651 DRM_DEBUG_KMS("No enhancement is supported\n");
2652 return true;
2653 }
2654
2655 if (IS_TV(intel_sdvo_connector))
2656 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2657 else if (IS_LVDS(intel_sdvo_connector))
2658 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2659 else
2660 return true;
2661 }
2662
2663 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2664 struct i2c_msg *msgs,
2665 int num)
2666 {
2667 struct intel_sdvo *sdvo = adapter->algo_data;
2668
2669 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2670 return -EIO;
2671
2672 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2673 }
2674
2675 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2676 {
2677 struct intel_sdvo *sdvo = adapter->algo_data;
2678 return sdvo->i2c->algo->functionality(sdvo->i2c);
2679 }
2680
2681 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2682 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2683 .functionality = intel_sdvo_ddc_proxy_func
2684 };
2685
2686 static bool
2687 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2688 struct drm_device *dev)
2689 {
2690 sdvo->ddc.owner = THIS_MODULE;
2691 sdvo->ddc.class = I2C_CLASS_DDC;
2692 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2693 sdvo->ddc.dev.parent = &dev->pdev->dev;
2694 sdvo->ddc.algo_data = sdvo;
2695 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2696
2697 return i2c_add_adapter(&sdvo->ddc) == 0;
2698 }
2699
2700 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2701 {
2702 struct drm_i915_private *dev_priv = dev->dev_private;
2703 struct intel_encoder *intel_encoder;
2704 struct intel_sdvo *intel_sdvo;
2705 u32 hotplug_mask;
2706 int i;
2707
2708 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2709 if (!intel_sdvo)
2710 return false;
2711
2712 intel_sdvo->sdvo_reg = sdvo_reg;
2713 intel_sdvo->is_sdvob = is_sdvob;
2714 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2715 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2716 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2717 goto err_i2c_bus;
2718
2719 /* encoder type will be decided later */
2720 intel_encoder = &intel_sdvo->base;
2721 intel_encoder->type = INTEL_OUTPUT_SDVO;
2722 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2723
2724 /* Read the regs to test if we can talk to the device */
2725 for (i = 0; i < 0x40; i++) {
2726 u8 byte;
2727
2728 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2729 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2730 SDVO_NAME(intel_sdvo));
2731 goto err;
2732 }
2733 }
2734
2735 hotplug_mask = 0;
2736 if (IS_G4X(dev)) {
2737 hotplug_mask = intel_sdvo->is_sdvob ?
2738 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2739 } else if (IS_GEN4(dev)) {
2740 hotplug_mask = intel_sdvo->is_sdvob ?
2741 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2742 } else {
2743 hotplug_mask = intel_sdvo->is_sdvob ?
2744 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2745 }
2746
2747 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2748
2749 intel_encoder->disable = intel_disable_sdvo;
2750 intel_encoder->enable = intel_enable_sdvo;
2751 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2752
2753 /* In default case sdvo lvds is false */
2754 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2755 goto err;
2756
2757 if (intel_sdvo_output_setup(intel_sdvo,
2758 intel_sdvo->caps.output_flags) != true) {
2759 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2760 SDVO_NAME(intel_sdvo));
2761 /* Output_setup can leave behind connectors! */
2762 goto err_output;
2763 }
2764
2765 /*
2766 * Cloning SDVO with anything is often impossible, since the SDVO
2767 * encoder can request a special input timing mode. And even if that's
2768 * not the case we have evidence that cloning a plain unscaled mode with
2769 * VGA doesn't really work. Furthermore the cloning flags are way too
2770 * simplistic anyway to express such constraints, so just give up on
2771 * cloning for SDVO encoders.
2772 */
2773 intel_sdvo->base.cloneable = false;
2774
2775 /* Only enable the hotplug irq if we need it, to work around noisy
2776 * hotplug lines.
2777 */
2778 if (intel_sdvo->hotplug_active)
2779 dev_priv->hotplug_supported_mask |= hotplug_mask;
2780
2781 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2782
2783 /* Set the input timing to the screen. Assume always input 0. */
2784 if (!intel_sdvo_set_target_input(intel_sdvo))
2785 goto err_output;
2786
2787 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2788 &intel_sdvo->pixel_clock_min,
2789 &intel_sdvo->pixel_clock_max))
2790 goto err_output;
2791
2792 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2793 "clock range %dMHz - %dMHz, "
2794 "input 1: %c, input 2: %c, "
2795 "output 1: %c, output 2: %c\n",
2796 SDVO_NAME(intel_sdvo),
2797 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2798 intel_sdvo->caps.device_rev_id,
2799 intel_sdvo->pixel_clock_min / 1000,
2800 intel_sdvo->pixel_clock_max / 1000,
2801 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2802 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2803 /* check currently supported outputs */
2804 intel_sdvo->caps.output_flags &
2805 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2806 intel_sdvo->caps.output_flags &
2807 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2808 return true;
2809
2810 err_output:
2811 intel_sdvo_output_cleanup(intel_sdvo);
2812
2813 err:
2814 drm_encoder_cleanup(&intel_encoder->base);
2815 i2c_del_adapter(&intel_sdvo->ddc);
2816 err_i2c_bus:
2817 intel_sdvo_unselect_i2c_bus(intel_sdvo);
2818 kfree(intel_sdvo);
2819
2820 return false;
2821 }
Linux 2.6 libata-dev (mirror)