2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base
;
48 bool force_hotplug_required
;
52 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
54 return container_of(intel_attached_encoder(connector
),
55 struct intel_crt
, base
);
58 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
60 return container_of(encoder
, struct intel_crt
, base
);
63 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
66 struct drm_device
*dev
= encoder
->base
.dev
;
67 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
68 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
71 tmp
= I915_READ(crt
->adpa_reg
);
73 if (!(tmp
& ADPA_DAC_ENABLE
))
77 *pipe
= PORT_TO_PIPE_CPT(tmp
);
79 *pipe
= PORT_TO_PIPE(tmp
);
84 static void intel_disable_crt(struct intel_encoder
*encoder
)
86 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
87 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
90 temp
= I915_READ(crt
->adpa_reg
);
91 temp
&= ~(ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
92 temp
&= ~ADPA_DAC_ENABLE
;
93 I915_WRITE(crt
->adpa_reg
, temp
);
96 static void intel_enable_crt(struct intel_encoder
*encoder
)
98 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
99 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
102 temp
= I915_READ(crt
->adpa_reg
);
103 temp
|= ADPA_DAC_ENABLE
;
104 I915_WRITE(crt
->adpa_reg
, temp
);
107 /* Note: The caller is required to filter out dpms modes not supported by the
109 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
111 struct drm_device
*dev
= encoder
->base
.dev
;
112 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
113 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
116 temp
= I915_READ(crt
->adpa_reg
);
117 temp
&= ~(ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
118 temp
&= ~ADPA_DAC_ENABLE
;
121 case DRM_MODE_DPMS_ON
:
122 temp
|= ADPA_DAC_ENABLE
;
124 case DRM_MODE_DPMS_STANDBY
:
125 temp
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
127 case DRM_MODE_DPMS_SUSPEND
:
128 temp
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
130 case DRM_MODE_DPMS_OFF
:
131 temp
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
135 I915_WRITE(crt
->adpa_reg
, temp
);
138 static void intel_crt_dpms(struct drm_connector
*connector
, int mode
)
140 struct drm_device
*dev
= connector
->dev
;
141 struct intel_encoder
*encoder
= intel_attached_encoder(connector
);
142 struct drm_crtc
*crtc
;
145 /* PCH platforms and VLV only support on/off. */
146 if (INTEL_INFO(dev
)->gen
>= 5 && mode
!= DRM_MODE_DPMS_ON
)
147 mode
= DRM_MODE_DPMS_OFF
;
149 if (mode
== connector
->dpms
)
152 old_dpms
= connector
->dpms
;
153 connector
->dpms
= mode
;
155 /* Only need to change hw state when actually enabled */
156 crtc
= encoder
->base
.crtc
;
158 encoder
->connectors_active
= false;
162 /* We need the pipe to run for anything but OFF. */
163 if (mode
== DRM_MODE_DPMS_OFF
)
164 encoder
->connectors_active
= false;
166 encoder
->connectors_active
= true;
168 if (mode
< old_dpms
) {
169 /* From off to on, enable the pipe first. */
170 intel_crtc_update_dpms(crtc
);
172 intel_crt_set_dpms(encoder
, mode
);
174 intel_crt_set_dpms(encoder
, mode
);
176 intel_crtc_update_dpms(crtc
);
179 intel_modeset_check_state(connector
->dev
);
182 static int intel_crt_mode_valid(struct drm_connector
*connector
,
183 struct drm_display_mode
*mode
)
185 struct drm_device
*dev
= connector
->dev
;
188 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
189 return MODE_NO_DBLESCAN
;
191 if (mode
->clock
< 25000)
192 return MODE_CLOCK_LOW
;
198 if (mode
->clock
> max_clock
)
199 return MODE_CLOCK_HIGH
;
201 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
202 if (HAS_PCH_LPT(dev
) &&
203 (ironlake_get_lanes_required(mode
->clock
, 270000, 24) > 2))
204 return MODE_CLOCK_HIGH
;
209 static bool intel_crt_mode_fixup(struct drm_encoder
*encoder
,
210 const struct drm_display_mode
*mode
,
211 struct drm_display_mode
*adjusted_mode
)
216 static void intel_crt_mode_set(struct drm_encoder
*encoder
,
217 struct drm_display_mode
*mode
,
218 struct drm_display_mode
*adjusted_mode
)
221 struct drm_device
*dev
= encoder
->dev
;
222 struct drm_crtc
*crtc
= encoder
->crtc
;
223 struct intel_crt
*crt
=
224 intel_encoder_to_crt(to_intel_encoder(encoder
));
225 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
226 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
229 if (HAS_PCH_SPLIT(dev
))
230 adpa
= ADPA_HOTPLUG_BITS
;
234 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
235 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
236 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
237 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
239 /* For CPT allow 3 pipe config, for others just use A or B */
240 if (HAS_PCH_LPT(dev
))
241 ; /* Those bits don't exist here */
242 else if (HAS_PCH_CPT(dev
))
243 adpa
|= PORT_TRANS_SEL_CPT(intel_crtc
->pipe
);
244 else if (intel_crtc
->pipe
== 0)
245 adpa
|= ADPA_PIPE_A_SELECT
;
247 adpa
|= ADPA_PIPE_B_SELECT
;
249 if (!HAS_PCH_SPLIT(dev
))
250 I915_WRITE(BCLRPAT(intel_crtc
->pipe
), 0);
252 I915_WRITE(crt
->adpa_reg
, adpa
);
255 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
257 struct drm_device
*dev
= connector
->dev
;
258 struct intel_crt
*crt
= intel_attached_crt(connector
);
259 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
263 /* The first time through, trigger an explicit detection cycle */
264 if (crt
->force_hotplug_required
) {
265 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
268 crt
->force_hotplug_required
= 0;
270 save_adpa
= adpa
= I915_READ(PCH_ADPA
);
271 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
273 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
275 adpa
&= ~ADPA_DAC_ENABLE
;
277 I915_WRITE(PCH_ADPA
, adpa
);
279 if (wait_for((I915_READ(PCH_ADPA
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
281 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
284 I915_WRITE(PCH_ADPA
, save_adpa
);
285 POSTING_READ(PCH_ADPA
);
289 /* Check the status to see if both blue and green are on now */
290 adpa
= I915_READ(PCH_ADPA
);
291 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
295 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
300 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
302 struct drm_device
*dev
= connector
->dev
;
303 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
308 save_adpa
= adpa
= I915_READ(ADPA
);
309 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
311 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
313 I915_WRITE(ADPA
, adpa
);
315 if (wait_for((I915_READ(ADPA
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
317 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
318 I915_WRITE(ADPA
, save_adpa
);
321 /* Check the status to see if both blue and green are on now */
322 adpa
= I915_READ(ADPA
);
323 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
328 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
330 /* FIXME: debug force function and remove */
337 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
339 * Not for i915G/i915GM
341 * \return true if CRT is connected.
342 * \return false if CRT is disconnected.
344 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
346 struct drm_device
*dev
= connector
->dev
;
347 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
348 u32 hotplug_en
, orig
, stat
;
352 if (HAS_PCH_SPLIT(dev
))
353 return intel_ironlake_crt_detect_hotplug(connector
);
355 if (IS_VALLEYVIEW(dev
))
356 return valleyview_crt_detect_hotplug(connector
);
359 * On 4 series desktop, CRT detect sequence need to be done twice
360 * to get a reliable result.
363 if (IS_G4X(dev
) && !IS_GM45(dev
))
367 hotplug_en
= orig
= I915_READ(PORT_HOTPLUG_EN
);
368 hotplug_en
|= CRT_HOTPLUG_FORCE_DETECT
;
370 for (i
= 0; i
< tries
; i
++) {
371 /* turn on the FORCE_DETECT */
372 I915_WRITE(PORT_HOTPLUG_EN
, hotplug_en
);
373 /* wait for FORCE_DETECT to go off */
374 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
375 CRT_HOTPLUG_FORCE_DETECT
) == 0,
377 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
380 stat
= I915_READ(PORT_HOTPLUG_STAT
);
381 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
384 /* clear the interrupt we just generated, if any */
385 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
387 /* and put the bits back */
388 I915_WRITE(PORT_HOTPLUG_EN
, orig
);
393 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
394 struct i2c_adapter
*i2c
)
398 edid
= drm_get_edid(connector
, i2c
);
400 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
401 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
402 intel_gmbus_force_bit(i2c
, true);
403 edid
= drm_get_edid(connector
, i2c
);
404 intel_gmbus_force_bit(i2c
, false);
410 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
411 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
412 struct i2c_adapter
*adapter
)
417 edid
= intel_crt_get_edid(connector
, adapter
);
421 ret
= intel_connector_update_modes(connector
, edid
);
427 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
429 struct intel_crt
*crt
= intel_attached_crt(connector
);
430 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
432 struct i2c_adapter
*i2c
;
434 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
436 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->crt_ddc_pin
);
437 edid
= intel_crt_get_edid(connector
, i2c
);
440 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
443 * This may be a DVI-I connector with a shared DDC
444 * link between analog and digital outputs, so we
445 * have to check the EDID input spec of the attached device.
448 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
452 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
454 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
462 static enum drm_connector_status
463 intel_crt_load_detect(struct intel_crt
*crt
)
465 struct drm_device
*dev
= crt
->base
.base
.dev
;
466 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
467 uint32_t pipe
= to_intel_crtc(crt
->base
.base
.crtc
)->pipe
;
468 uint32_t save_bclrpat
;
469 uint32_t save_vtotal
;
470 uint32_t vtotal
, vactive
;
472 uint32_t vblank
, vblank_start
, vblank_end
;
474 uint32_t bclrpat_reg
;
478 uint32_t pipeconf_reg
;
479 uint32_t pipe_dsl_reg
;
481 enum drm_connector_status status
;
483 DRM_DEBUG_KMS("starting load-detect on CRT\n");
485 bclrpat_reg
= BCLRPAT(pipe
);
486 vtotal_reg
= VTOTAL(pipe
);
487 vblank_reg
= VBLANK(pipe
);
488 vsync_reg
= VSYNC(pipe
);
489 pipeconf_reg
= PIPECONF(pipe
);
490 pipe_dsl_reg
= PIPEDSL(pipe
);
492 save_bclrpat
= I915_READ(bclrpat_reg
);
493 save_vtotal
= I915_READ(vtotal_reg
);
494 vblank
= I915_READ(vblank_reg
);
496 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
497 vactive
= (save_vtotal
& 0x7ff) + 1;
499 vblank_start
= (vblank
& 0xfff) + 1;
500 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
502 /* Set the border color to purple. */
503 I915_WRITE(bclrpat_reg
, 0x500050);
506 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
507 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
508 POSTING_READ(pipeconf_reg
);
509 /* Wait for next Vblank to substitue
510 * border color for Color info */
511 intel_wait_for_vblank(dev
, pipe
);
512 st00
= I915_READ8(VGA_MSR_WRITE
);
513 status
= ((st00
& (1 << 4)) != 0) ?
514 connector_status_connected
:
515 connector_status_disconnected
;
517 I915_WRITE(pipeconf_reg
, pipeconf
);
519 bool restore_vblank
= false;
523 * If there isn't any border, add some.
524 * Yes, this will flicker
526 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
527 uint32_t vsync
= I915_READ(vsync_reg
);
528 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
530 vblank_start
= vsync_start
;
531 I915_WRITE(vblank_reg
,
533 ((vblank_end
- 1) << 16));
534 restore_vblank
= true;
536 /* sample in the vertical border, selecting the larger one */
537 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
538 vsample
= (vblank_start
+ vactive
) >> 1;
540 vsample
= (vtotal
+ vblank_end
) >> 1;
543 * Wait for the border to be displayed
545 while (I915_READ(pipe_dsl_reg
) >= vactive
)
547 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
550 * Watch ST00 for an entire scanline
556 /* Read the ST00 VGA status register */
557 st00
= I915_READ8(VGA_MSR_WRITE
);
560 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
562 /* restore vblank if necessary */
564 I915_WRITE(vblank_reg
, vblank
);
566 * If more than 3/4 of the scanline detected a monitor,
567 * then it is assumed to be present. This works even on i830,
568 * where there isn't any way to force the border color across
571 status
= detect
* 4 > count
* 3 ?
572 connector_status_connected
:
573 connector_status_disconnected
;
576 /* Restore previous settings */
577 I915_WRITE(bclrpat_reg
, save_bclrpat
);
582 static enum drm_connector_status
583 intel_crt_detect(struct drm_connector
*connector
, bool force
)
585 struct drm_device
*dev
= connector
->dev
;
586 struct intel_crt
*crt
= intel_attached_crt(connector
);
587 enum drm_connector_status status
;
588 struct intel_load_detect_pipe tmp
;
590 if (I915_HAS_HOTPLUG(dev
)) {
591 /* We can not rely on the HPD pin always being correctly wired
592 * up, for example many KVM do not pass it through, and so
593 * only trust an assertion that the monitor is connected.
595 if (intel_crt_detect_hotplug(connector
)) {
596 DRM_DEBUG_KMS("CRT detected via hotplug\n");
597 return connector_status_connected
;
599 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
602 if (intel_crt_detect_ddc(connector
))
603 return connector_status_connected
;
605 /* Load detection is broken on HPD capable machines. Whoever wants a
606 * broken monitor (without edid) to work behind a broken kvm (that fails
607 * to have the right resistors for HP detection) needs to fix this up.
608 * For now just bail out. */
609 if (I915_HAS_HOTPLUG(dev
))
610 return connector_status_disconnected
;
613 return connector
->status
;
615 /* for pre-945g platforms use load detect */
616 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
)) {
617 if (intel_crt_detect_ddc(connector
))
618 status
= connector_status_connected
;
620 status
= intel_crt_load_detect(crt
);
621 intel_release_load_detect_pipe(connector
, &tmp
);
623 status
= connector_status_unknown
;
628 static void intel_crt_destroy(struct drm_connector
*connector
)
630 drm_sysfs_connector_remove(connector
);
631 drm_connector_cleanup(connector
);
635 static int intel_crt_get_modes(struct drm_connector
*connector
)
637 struct drm_device
*dev
= connector
->dev
;
638 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
640 struct i2c_adapter
*i2c
;
642 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->crt_ddc_pin
);
643 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
644 if (ret
|| !IS_G4X(dev
))
647 /* Try to probe digital port for output in DVI-I -> VGA mode. */
648 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PORT_DPB
);
649 return intel_crt_ddc_get_modes(connector
, i2c
);
652 static int intel_crt_set_property(struct drm_connector
*connector
,
653 struct drm_property
*property
,
659 static void intel_crt_reset(struct drm_connector
*connector
)
661 struct drm_device
*dev
= connector
->dev
;
662 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
663 struct intel_crt
*crt
= intel_attached_crt(connector
);
665 if (HAS_PCH_SPLIT(dev
)) {
668 adpa
= I915_READ(PCH_ADPA
);
669 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
670 adpa
|= ADPA_HOTPLUG_BITS
;
671 I915_WRITE(PCH_ADPA
, adpa
);
672 POSTING_READ(PCH_ADPA
);
674 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa
);
675 crt
->force_hotplug_required
= 1;
681 * Routines for controlling stuff on the analog port
684 static const struct drm_encoder_helper_funcs crt_encoder_funcs
= {
685 .mode_fixup
= intel_crt_mode_fixup
,
686 .mode_set
= intel_crt_mode_set
,
687 .disable
= intel_encoder_noop
,
690 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
691 .reset
= intel_crt_reset
,
692 .dpms
= intel_crt_dpms
,
693 .detect
= intel_crt_detect
,
694 .fill_modes
= drm_helper_probe_single_connector_modes
,
695 .destroy
= intel_crt_destroy
,
696 .set_property
= intel_crt_set_property
,
699 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
700 .mode_valid
= intel_crt_mode_valid
,
701 .get_modes
= intel_crt_get_modes
,
702 .best_encoder
= intel_best_encoder
,
705 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
706 .destroy
= intel_encoder_destroy
,
709 static int __init
intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
711 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
715 static const struct dmi_system_id intel_no_crt
[] = {
717 .callback
= intel_no_crt_dmi_callback
,
720 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
721 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
727 void intel_crt_init(struct drm_device
*dev
)
729 struct drm_connector
*connector
;
730 struct intel_crt
*crt
;
731 struct intel_connector
*intel_connector
;
732 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
734 /* Skip machines without VGA that falsely report hotplug events */
735 if (dmi_check_system(intel_no_crt
))
738 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
742 intel_connector
= kzalloc(sizeof(struct intel_connector
), GFP_KERNEL
);
743 if (!intel_connector
) {
748 connector
= &intel_connector
->base
;
749 drm_connector_init(dev
, &intel_connector
->base
,
750 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
752 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
753 DRM_MODE_ENCODER_DAC
);
755 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
757 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
758 crt
->base
.cloneable
= true;
760 crt
->base
.crtc_mask
= (1 << 0);
762 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
765 connector
->interlace_allowed
= 0;
767 connector
->interlace_allowed
= 1;
768 connector
->doublescan_allowed
= 0;
770 if (HAS_PCH_SPLIT(dev
))
771 crt
->adpa_reg
= PCH_ADPA
;
772 else if (IS_VALLEYVIEW(dev
))
773 crt
->adpa_reg
= VLV_ADPA
;
775 crt
->adpa_reg
= ADPA
;
777 crt
->base
.disable
= intel_disable_crt
;
778 crt
->base
.enable
= intel_enable_crt
;
780 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
782 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
783 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
785 drm_encoder_helper_add(&crt
->base
.base
, &crt_encoder_funcs
);
786 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
788 drm_sysfs_connector_add(connector
);
790 if (I915_HAS_HOTPLUG(dev
))
791 connector
->polled
= DRM_CONNECTOR_POLL_HPD
;
793 connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
796 * Configure the automatic hotplug detection stuff
798 crt
->force_hotplug_required
= 0;
800 dev_priv
->hotplug_supported_mask
|= CRT_HOTPLUG_INT_STATUS
;
803 * TODO: find a proper way to discover whether we need to set the
804 * polarity reversal bit or not, instead of relying on the BIOS.
806 if (HAS_PCH_LPT(dev
))
807 dev_priv
->fdi_rx_polarity_reversed
=
808 !!(I915_READ(_FDI_RXA_CTL
) & FDI_RX_POLARITY_REVERSED_LPT
);