3 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
5 * Copyright © 2005 Agere Systems Inc.
9 *------------------------------------------------------------------------------
11 * et1310_rx.c - Routines used to perform data reception
13 *------------------------------------------------------------------------------
17 * This software is provided subject to the following terms and conditions,
18 * which you should read carefully before using the software. Using this
19 * software indicates your acceptance of these terms and conditions. If you do
20 * not agree with these terms and conditions, do not use the software.
22 * Copyright © 2005 Agere Systems Inc.
23 * All rights reserved.
25 * Redistribution and use in source or binary forms, with or without
26 * modifications, are permitted provided that the following conditions are met:
28 * . Redistributions of source code must retain the above copyright notice, this
29 * list of conditions and the following Disclaimer as comments in the code as
30 * well as in the documentation and/or other materials provided with the
33 * . Redistributions in binary form must reproduce the above copyright notice,
34 * this list of conditions and the following Disclaimer in the documentation
35 * and/or other materials provided with the distribution.
37 * . Neither the name of Agere Systems Inc. nor the names of the contributors
38 * may be used to endorse or promote products derived from this software
39 * without specific prior written permission.
43 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
44 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
45 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
46 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
47 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
48 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
49 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
50 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
51 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
53 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
58 #include "et131x_version.h"
59 #include "et131x_defs.h"
61 #include <linux/pci.h>
62 #include <linux/init.h>
63 #include <linux/module.h>
64 #include <linux/types.h>
65 #include <linux/kernel.h>
67 #include <linux/sched.h>
68 #include <linux/ptrace.h>
69 #include <linux/slab.h>
70 #include <linux/ctype.h>
71 #include <linux/string.h>
72 #include <linux/timer.h>
73 #include <linux/interrupt.h>
75 #include <linux/delay.h>
77 #include <linux/bitops.h>
78 #include <asm/system.h>
80 #include <linux/netdevice.h>
81 #include <linux/etherdevice.h>
82 #include <linux/skbuff.h>
83 #include <linux/if_arp.h>
84 #include <linux/ioport.h>
86 #include "et1310_phy.h"
87 #include "et1310_pm.h"
88 #include "et1310_jagcore.h"
90 #include "et131x_adapter.h"
91 #include "et131x_initpci.h"
93 #include "et1310_rx.h"
96 void nic_return_rfd(struct et131x_adapter
*etdev
, PMP_RFD pMpRfd
);
99 * et131x_rx_dma_memory_alloc
100 * @adapter: pointer to our private adapter structure
102 * Returns 0 on success and errno on failure (as defined in errno.h)
104 * Allocates Free buffer ring 1 for sure, free buffer ring 0 if required,
105 * and the Packet Status Ring.
107 int et131x_rx_dma_memory_alloc(struct et131x_adapter
*adapter
)
111 u32 pktStatRingSize
, FBRChunkSize
;
114 /* Setup some convenience pointers */
115 rx_ring
= (RX_RING_t
*) &adapter
->RxRing
;
117 /* Alloc memory for the lookup table */
119 rx_ring
->Fbr
[0] = kmalloc(sizeof(FBRLOOKUPTABLE
), GFP_KERNEL
);
122 rx_ring
->Fbr
[1] = kmalloc(sizeof(FBRLOOKUPTABLE
), GFP_KERNEL
);
124 /* The first thing we will do is configure the sizes of the buffer
125 * rings. These will change based on jumbo packet support. Larger
126 * jumbo packets increases the size of each entry in FBR0, and the
127 * number of entries in FBR0, while at the same time decreasing the
128 * number of entries in FBR1.
130 * FBR1 holds "large" frames, FBR0 holds "small" frames. If FBR1
131 * entries are huge in order to accomodate a "jumbo" frame, then it
132 * will have less entries. Conversely, FBR1 will now be relied upon
133 * to carry more "normal" frames, thus it's entry size also increases
134 * and the number of entries goes up too (since it now carries
135 * "small" + "regular" packets.
137 * In this scheme, we try to maintain 512 entries between the two
138 * rings. Also, FBR1 remains a constant size - when it's size doubles
139 * the number of entries halves. FBR0 increases in size, however.
142 if (adapter
->RegistryJumboPacket
< 2048) {
144 rx_ring
->Fbr0BufferSize
= 256;
145 rx_ring
->Fbr0NumEntries
= 512;
147 rx_ring
->Fbr1BufferSize
= 2048;
148 rx_ring
->Fbr1NumEntries
= 512;
149 } else if (adapter
->RegistryJumboPacket
< 4096) {
151 rx_ring
->Fbr0BufferSize
= 512;
152 rx_ring
->Fbr0NumEntries
= 1024;
154 rx_ring
->Fbr1BufferSize
= 4096;
155 rx_ring
->Fbr1NumEntries
= 512;
158 rx_ring
->Fbr0BufferSize
= 1024;
159 rx_ring
->Fbr0NumEntries
= 768;
161 rx_ring
->Fbr1BufferSize
= 16384;
162 rx_ring
->Fbr1NumEntries
= 128;
166 adapter
->RxRing
.PsrNumEntries
= adapter
->RxRing
.Fbr0NumEntries
+
167 adapter
->RxRing
.Fbr1NumEntries
;
169 adapter
->RxRing
.PsrNumEntries
= adapter
->RxRing
.Fbr1NumEntries
;
172 /* Allocate an area of memory for Free Buffer Ring 1 */
173 bufsize
= (sizeof(FBR_DESC_t
) * rx_ring
->Fbr1NumEntries
) + 0xfff;
174 rx_ring
->pFbr1RingVa
= pci_alloc_consistent(adapter
->pdev
,
176 &rx_ring
->pFbr1RingPa
);
177 if (!rx_ring
->pFbr1RingVa
) {
178 dev_err(&adapter
->pdev
->dev
,
179 "Cannot alloc memory for Free Buffer Ring 1\n");
183 /* Save physical address
185 * NOTE: pci_alloc_consistent(), used above to alloc DMA regions,
186 * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
187 * are ever returned, make sure the high part is retrieved here
188 * before storing the adjusted address.
190 rx_ring
->Fbr1Realpa
= rx_ring
->pFbr1RingPa
;
192 /* Align Free Buffer Ring 1 on a 4K boundary */
193 et131x_align_allocated_memory(adapter
,
194 &rx_ring
->Fbr1Realpa
,
195 &rx_ring
->Fbr1offset
, 0x0FFF);
197 rx_ring
->pFbr1RingVa
= (void *)((uint8_t *) rx_ring
->pFbr1RingVa
+
198 rx_ring
->Fbr1offset
);
201 /* Allocate an area of memory for Free Buffer Ring 0 */
202 bufsize
= (sizeof(FBR_DESC_t
) * rx_ring
->Fbr0NumEntries
) + 0xfff;
203 rx_ring
->pFbr0RingVa
= pci_alloc_consistent(adapter
->pdev
,
205 &rx_ring
->pFbr0RingPa
);
206 if (!rx_ring
->pFbr0RingVa
) {
207 dev_err(&adapter
->pdev
->dev
,
208 "Cannot alloc memory for Free Buffer Ring 0\n");
212 /* Save physical address
214 * NOTE: pci_alloc_consistent(), used above to alloc DMA regions,
215 * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
216 * are ever returned, make sure the high part is retrieved here before
217 * storing the adjusted address.
219 rx_ring
->Fbr0Realpa
= rx_ring
->pFbr0RingPa
;
221 /* Align Free Buffer Ring 0 on a 4K boundary */
222 et131x_align_allocated_memory(adapter
,
223 &rx_ring
->Fbr0Realpa
,
224 &rx_ring
->Fbr0offset
, 0x0FFF);
226 rx_ring
->pFbr0RingVa
= (void *)((uint8_t *) rx_ring
->pFbr0RingVa
+
227 rx_ring
->Fbr0offset
);
230 for (i
= 0; i
< (rx_ring
->Fbr1NumEntries
/ FBR_CHUNKS
);
236 /* This code allocates an area of memory big enough for N
237 * free buffers + (buffer_size - 1) so that the buffers can
238 * be aligned on 4k boundaries. If each buffer were aligned
239 * to a buffer_size boundary, the effect would be to double
240 * the size of FBR0. By allocating N buffers at once, we
241 * reduce this overhead.
243 if (rx_ring
->Fbr1BufferSize
> 4096)
246 Fbr1Align
= rx_ring
->Fbr1BufferSize
;
249 (FBR_CHUNKS
* rx_ring
->Fbr1BufferSize
) + Fbr1Align
- 1;
250 rx_ring
->Fbr1MemVa
[i
] =
251 pci_alloc_consistent(adapter
->pdev
, FBRChunkSize
,
252 &rx_ring
->Fbr1MemPa
[i
]);
254 if (!rx_ring
->Fbr1MemVa
[i
]) {
255 dev_err(&adapter
->pdev
->dev
,
256 "Could not alloc memory\n");
260 /* See NOTE in "Save Physical Address" comment above */
261 Fbr1TempPa
= rx_ring
->Fbr1MemPa
[i
];
263 et131x_align_allocated_memory(adapter
,
265 &Fbr1Offset
, (Fbr1Align
- 1));
267 for (j
= 0; j
< FBR_CHUNKS
; j
++) {
268 u32 index
= (i
* FBR_CHUNKS
) + j
;
270 /* Save the Virtual address of this index for quick
273 rx_ring
->Fbr
[1]->Va
[index
] =
274 (uint8_t *) rx_ring
->Fbr1MemVa
[i
] +
275 (j
* rx_ring
->Fbr1BufferSize
) + Fbr1Offset
;
277 /* now store the physical address in the descriptor
278 * so the device can access it
280 rx_ring
->Fbr
[1]->PAHigh
[index
] =
281 (u32
) (Fbr1TempPa
>> 32);
282 rx_ring
->Fbr
[1]->PALow
[index
] = (u32
) Fbr1TempPa
;
284 Fbr1TempPa
+= rx_ring
->Fbr1BufferSize
;
286 rx_ring
->Fbr
[1]->Buffer1
[index
] =
287 rx_ring
->Fbr
[1]->Va
[index
];
288 rx_ring
->Fbr
[1]->Buffer2
[index
] =
289 rx_ring
->Fbr
[1]->Va
[index
] - 4;
294 /* Same for FBR0 (if in use) */
295 for (i
= 0; i
< (rx_ring
->Fbr0NumEntries
/ FBR_CHUNKS
);
300 FBRChunkSize
= ((FBR_CHUNKS
+ 1) * rx_ring
->Fbr0BufferSize
) - 1;
301 rx_ring
->Fbr0MemVa
[i
] =
302 pci_alloc_consistent(adapter
->pdev
, FBRChunkSize
,
303 &rx_ring
->Fbr0MemPa
[i
]);
305 if (!rx_ring
->Fbr0MemVa
[i
]) {
306 dev_err(&adapter
->pdev
->dev
,
307 "Could not alloc memory\n");
311 /* See NOTE in "Save Physical Address" comment above */
312 Fbr0TempPa
= rx_ring
->Fbr0MemPa
[i
];
314 et131x_align_allocated_memory(adapter
,
317 rx_ring
->Fbr0BufferSize
- 1);
319 for (j
= 0; j
< FBR_CHUNKS
; j
++) {
320 u32 index
= (i
* FBR_CHUNKS
) + j
;
322 rx_ring
->Fbr
[0]->Va
[index
] =
323 (uint8_t *) rx_ring
->Fbr0MemVa
[i
] +
324 (j
* rx_ring
->Fbr0BufferSize
) + Fbr0Offset
;
326 rx_ring
->Fbr
[0]->PAHigh
[index
] =
327 (u32
) (Fbr0TempPa
>> 32);
328 rx_ring
->Fbr
[0]->PALow
[index
] = (u32
) Fbr0TempPa
;
330 Fbr0TempPa
+= rx_ring
->Fbr0BufferSize
;
332 rx_ring
->Fbr
[0]->Buffer1
[index
] =
333 rx_ring
->Fbr
[0]->Va
[index
];
334 rx_ring
->Fbr
[0]->Buffer2
[index
] =
335 rx_ring
->Fbr
[0]->Va
[index
] - 4;
340 /* Allocate an area of memory for FIFO of Packet Status ring entries */
342 sizeof(PKT_STAT_DESC_t
) * adapter
->RxRing
.PsrNumEntries
;
344 rx_ring
->pPSRingVa
= pci_alloc_consistent(adapter
->pdev
,
346 &rx_ring
->pPSRingPa
);
348 if (!rx_ring
->pPSRingVa
) {
349 dev_err(&adapter
->pdev
->dev
,
350 "Cannot alloc memory for Packet Status Ring\n");
353 printk("PSR %lx\n", (unsigned long) rx_ring
->pPSRingPa
);
356 * NOTE : pci_alloc_consistent(), used above to alloc DMA regions,
357 * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
358 * are ever returned, make sure the high part is retrieved here before
359 * storing the adjusted address.
362 /* Allocate an area of memory for writeback of status information */
363 rx_ring
->pRxStatusVa
= pci_alloc_consistent(adapter
->pdev
,
364 sizeof(RX_STATUS_BLOCK_t
),
365 &rx_ring
->pRxStatusPa
);
366 if (!rx_ring
->pRxStatusVa
) {
367 dev_err(&adapter
->pdev
->dev
,
368 "Cannot alloc memory for Status Block\n");
371 rx_ring
->NumRfd
= NIC_DEFAULT_NUM_RFD
;
372 printk("PRS %lx\n", (unsigned long)rx_ring
->pRxStatusPa
);
375 * pci_pool_create initializes a lookaside list. After successful
376 * creation, nonpaged fixed-size blocks can be allocated from and
377 * freed to the lookaside list.
378 * RFDs will be allocated from this pool.
380 rx_ring
->RecvLookaside
= kmem_cache_create(adapter
->netdev
->name
,
387 adapter
->Flags
|= fMP_ADAPTER_RECV_LOOKASIDE
;
389 /* The RFDs are going to be put on lists later on, so initialize the
392 INIT_LIST_HEAD(&rx_ring
->RecvList
);
393 INIT_LIST_HEAD(&rx_ring
->RecvPendingList
);
398 * et131x_rx_dma_memory_free - Free all memory allocated within this module.
399 * @adapter: pointer to our private adapter structure
401 void et131x_rx_dma_memory_free(struct et131x_adapter
*adapter
)
409 /* Setup some convenience pointers */
410 rx_ring
= (RX_RING_t
*) &adapter
->RxRing
;
412 /* Free RFDs and associated packet descriptors */
413 WARN_ON(rx_ring
->nReadyRecv
!= rx_ring
->NumRfd
);
415 while (!list_empty(&rx_ring
->RecvList
)) {
416 rfd
= (MP_RFD
*) list_entry(rx_ring
->RecvList
.next
,
419 list_del(&rfd
->list_node
);
420 et131x_rfd_resources_free(adapter
, rfd
);
423 while (!list_empty(&rx_ring
->RecvPendingList
)) {
424 rfd
= (MP_RFD
*) list_entry(rx_ring
->RecvPendingList
.next
,
426 list_del(&rfd
->list_node
);
427 et131x_rfd_resources_free(adapter
, rfd
);
430 /* Free Free Buffer Ring 1 */
431 if (rx_ring
->pFbr1RingVa
) {
432 /* First the packet memory */
433 for (index
= 0; index
<
434 (rx_ring
->Fbr1NumEntries
/ FBR_CHUNKS
); index
++) {
435 if (rx_ring
->Fbr1MemVa
[index
]) {
438 if (rx_ring
->Fbr1BufferSize
> 4096)
441 Fbr1Align
= rx_ring
->Fbr1BufferSize
;
444 (rx_ring
->Fbr1BufferSize
* FBR_CHUNKS
) +
447 pci_free_consistent(adapter
->pdev
,
449 rx_ring
->Fbr1MemVa
[index
],
450 rx_ring
->Fbr1MemPa
[index
]);
452 rx_ring
->Fbr1MemVa
[index
] = NULL
;
456 /* Now the FIFO itself */
457 rx_ring
->pFbr1RingVa
= (void *)((uint8_t *)
458 rx_ring
->pFbr1RingVa
- rx_ring
->Fbr1offset
);
461 (sizeof(FBR_DESC_t
) * rx_ring
->Fbr1NumEntries
) + 0xfff;
463 pci_free_consistent(adapter
->pdev
,
465 rx_ring
->pFbr1RingVa
, rx_ring
->pFbr1RingPa
);
467 rx_ring
->pFbr1RingVa
= NULL
;
471 /* Now the same for Free Buffer Ring 0 */
472 if (rx_ring
->pFbr0RingVa
) {
473 /* First the packet memory */
474 for (index
= 0; index
<
475 (rx_ring
->Fbr0NumEntries
/ FBR_CHUNKS
); index
++) {
476 if (rx_ring
->Fbr0MemVa
[index
]) {
478 (rx_ring
->Fbr0BufferSize
*
479 (FBR_CHUNKS
+ 1)) - 1;
481 pci_free_consistent(adapter
->pdev
,
483 rx_ring
->Fbr0MemVa
[index
],
484 rx_ring
->Fbr0MemPa
[index
]);
486 rx_ring
->Fbr0MemVa
[index
] = NULL
;
490 /* Now the FIFO itself */
491 rx_ring
->pFbr0RingVa
= (void *)((uint8_t *)
492 rx_ring
->pFbr0RingVa
- rx_ring
->Fbr0offset
);
495 (sizeof(FBR_DESC_t
) * rx_ring
->Fbr0NumEntries
) + 0xfff;
497 pci_free_consistent(adapter
->pdev
,
499 rx_ring
->pFbr0RingVa
, rx_ring
->pFbr0RingPa
);
501 rx_ring
->pFbr0RingVa
= NULL
;
505 /* Free Packet Status Ring */
506 if (rx_ring
->pPSRingVa
) {
508 sizeof(PKT_STAT_DESC_t
) * adapter
->RxRing
.PsrNumEntries
;
510 pci_free_consistent(adapter
->pdev
, pktStatRingSize
,
511 rx_ring
->pPSRingVa
, rx_ring
->pPSRingPa
);
513 rx_ring
->pPSRingVa
= NULL
;
516 /* Free area of memory for the writeback of status information */
517 if (rx_ring
->pRxStatusVa
) {
518 pci_free_consistent(adapter
->pdev
,
519 sizeof(RX_STATUS_BLOCK_t
),
520 rx_ring
->pRxStatusVa
, rx_ring
->pRxStatusPa
);
522 rx_ring
->pRxStatusVa
= NULL
;
525 /* Free receive buffer pool */
527 /* Free receive packet pool */
529 /* Destroy the lookaside (RFD) pool */
530 if (adapter
->Flags
& fMP_ADAPTER_RECV_LOOKASIDE
) {
531 kmem_cache_destroy(rx_ring
->RecvLookaside
);
532 adapter
->Flags
&= ~fMP_ADAPTER_RECV_LOOKASIDE
;
535 /* Free the FBR Lookup Table */
537 kfree(rx_ring
->Fbr
[0]);
540 kfree(rx_ring
->Fbr
[1]);
543 rx_ring
->nReadyRecv
= 0;
547 * et131x_init_recv - Initialize receive data structures.
548 * @adapter: pointer to our private adapter structure
550 * Returns 0 on success and errno on failure (as defined in errno.h)
552 int et131x_init_recv(struct et131x_adapter
*adapter
)
554 int status
= -ENOMEM
;
558 RX_RING_t
*rx_ring
= NULL
;
560 /* Setup some convenience pointers */
561 rx_ring
= (RX_RING_t
*) &adapter
->RxRing
;
564 for (rfdct
= 0; rfdct
< rx_ring
->NumRfd
; rfdct
++) {
565 rfd
= (MP_RFD
*) kmem_cache_alloc(rx_ring
->RecvLookaside
,
566 GFP_ATOMIC
| GFP_DMA
);
569 dev_err(&adapter
->pdev
->dev
,
570 "Couldn't alloc RFD out of kmem_cache\n");
575 status
= et131x_rfd_resources_alloc(adapter
, rfd
);
577 dev_err(&adapter
->pdev
->dev
,
578 "Couldn't alloc packet for RFD\n");
579 kmem_cache_free(rx_ring
->RecvLookaside
, rfd
);
583 /* Add this RFD to the RecvList */
584 list_add_tail(&rfd
->list_node
, &rx_ring
->RecvList
);
586 /* Increment both the available RFD's, and the total RFD's. */
587 rx_ring
->nReadyRecv
++;
591 if (numrfd
> NIC_MIN_NUM_RFD
)
594 rx_ring
->NumRfd
= numrfd
;
597 kmem_cache_free(rx_ring
->RecvLookaside
, rfd
);
598 dev_err(&adapter
->pdev
->dev
,
599 "Allocation problems in et131x_init_recv\n");
605 * et131x_rfd_resources_alloc
606 * @adapter: pointer to our private adapter structure
607 * @rfd: pointer to a RFD
609 * Returns 0 on success and errno on failure (as defined in errno.h)
611 int et131x_rfd_resources_alloc(struct et131x_adapter
*adapter
, MP_RFD
*rfd
)
619 * et131x_rfd_resources_free - Free the packet allocated for the given RFD
620 * @adapter: pointer to our private adapter structure
621 * @rfd: pointer to a RFD
623 void et131x_rfd_resources_free(struct et131x_adapter
*adapter
, MP_RFD
*rfd
)
626 kmem_cache_free(adapter
->RxRing
.RecvLookaside
, rfd
);
630 * ConfigRxDmaRegs - Start of Rx_DMA init sequence
631 * @etdev: pointer to our adapter structure
633 void ConfigRxDmaRegs(struct et131x_adapter
*etdev
)
635 struct _RXDMA_t __iomem
*rx_dma
= &etdev
->regs
->rxdma
;
636 struct _rx_ring_t
*rx_local
= &etdev
->RxRing
;
637 PFBR_DESC_t fbr_entry
;
639 RXDMA_PSR_NUM_DES_t psr_num_des
;
642 /* Halt RXDMA to perform the reconfigure. */
643 et131x_rx_dma_disable(etdev
);
645 /* Load the completion writeback physical address
647 * NOTE : pci_alloc_consistent(), used above to alloc DMA regions,
648 * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
649 * are ever returned, make sure the high part is retrieved here
650 * before storing the adjusted address.
652 writel((u32
) ((u64
)rx_local
->pRxStatusPa
>> 32),
653 &rx_dma
->dma_wb_base_hi
);
654 writel((u32
) rx_local
->pRxStatusPa
, &rx_dma
->dma_wb_base_lo
);
656 memset(rx_local
->pRxStatusVa
, 0, sizeof(RX_STATUS_BLOCK_t
));
658 /* Set the address and parameters of the packet status ring into the
661 writel((u32
) ((u64
)rx_local
->pPSRingPa
>> 32),
662 &rx_dma
->psr_base_hi
);
663 writel((u32
) rx_local
->pPSRingPa
, &rx_dma
->psr_base_lo
);
664 writel(rx_local
->PsrNumEntries
- 1, &rx_dma
->psr_num_des
.value
);
665 writel(0, &rx_dma
->psr_full_offset
.value
);
667 psr_num_des
.value
= readl(&rx_dma
->psr_num_des
.value
);
668 writel((psr_num_des
.bits
.psr_ndes
* LO_MARK_PERCENT_FOR_PSR
) / 100,
669 &rx_dma
->psr_min_des
.value
);
671 spin_lock_irqsave(&etdev
->RcvLock
, flags
);
673 /* These local variables track the PSR in the adapter structure */
674 rx_local
->local_psr_full
.bits
.psr_full
= 0;
675 rx_local
->local_psr_full
.bits
.psr_full_wrap
= 0;
677 /* Now's the best time to initialize FBR1 contents */
678 fbr_entry
= (PFBR_DESC_t
) rx_local
->pFbr1RingVa
;
679 for (entry
= 0; entry
< rx_local
->Fbr1NumEntries
; entry
++) {
680 fbr_entry
->addr_hi
= rx_local
->Fbr
[1]->PAHigh
[entry
];
681 fbr_entry
->addr_lo
= rx_local
->Fbr
[1]->PALow
[entry
];
682 fbr_entry
->word2
.bits
.bi
= entry
;
686 /* Set the address and parameters of Free buffer ring 1 (and 0 if
687 * required) into the 1310's registers
689 writel((u32
) (rx_local
->Fbr1Realpa
>> 32), &rx_dma
->fbr1_base_hi
);
690 writel((u32
) rx_local
->Fbr1Realpa
, &rx_dma
->fbr1_base_lo
);
691 writel(rx_local
->Fbr1NumEntries
- 1, &rx_dma
->fbr1_num_des
.value
);
692 writel(ET_DMA10_WRAP
, &rx_dma
->fbr1_full_offset
);
694 /* This variable tracks the free buffer ring 1 full position, so it
695 * has to match the above.
697 rx_local
->local_Fbr1_full
= ET_DMA10_WRAP
;
698 writel(((rx_local
->Fbr1NumEntries
* LO_MARK_PERCENT_FOR_RX
) / 100) - 1,
699 &rx_dma
->fbr1_min_des
.value
);
702 /* Now's the best time to initialize FBR0 contents */
703 fbr_entry
= (PFBR_DESC_t
) rx_local
->pFbr0RingVa
;
704 for (entry
= 0; entry
< rx_local
->Fbr0NumEntries
; entry
++) {
705 fbr_entry
->addr_hi
= rx_local
->Fbr
[0]->PAHigh
[entry
];
706 fbr_entry
->addr_lo
= rx_local
->Fbr
[0]->PALow
[entry
];
707 fbr_entry
->word2
.bits
.bi
= entry
;
711 writel((u32
) (rx_local
->Fbr0Realpa
>> 32), &rx_dma
->fbr0_base_hi
);
712 writel((u32
) rx_local
->Fbr0Realpa
, &rx_dma
->fbr0_base_lo
);
713 writel(rx_local
->Fbr0NumEntries
- 1, &rx_dma
->fbr0_num_des
.value
);
714 writel(ET_DMA10_WRAP
, &rx_dma
->fbr0_full_offset
);
716 /* This variable tracks the free buffer ring 0 full position, so it
717 * has to match the above.
719 rx_local
->local_Fbr0_full
= ET_DMA10_WRAP
;
720 writel(((rx_local
->Fbr0NumEntries
* LO_MARK_PERCENT_FOR_RX
) / 100) - 1,
721 &rx_dma
->fbr0_min_des
.value
);
724 /* Program the number of packets we will receive before generating an
726 * For version B silicon, this value gets updated once autoneg is
729 writel(PARM_RX_NUM_BUFS_DEF
, &rx_dma
->num_pkt_done
.value
);
731 /* The "time_done" is not working correctly to coalesce interrupts
732 * after a given time period, but rather is giving us an interrupt
733 * regardless of whether we have received packets.
734 * This value gets updated once autoneg is complete.
736 writel(PARM_RX_TIME_INT_DEF
, &rx_dma
->max_pkt_time
.value
);
738 spin_unlock_irqrestore(&etdev
->RcvLock
, flags
);
742 * SetRxDmaTimer - Set the heartbeat timer according to line rate.
743 * @etdev: pointer to our adapter structure
745 void SetRxDmaTimer(struct et131x_adapter
*etdev
)
747 /* For version B silicon, we do not use the RxDMA timer for 10 and 100
748 * Mbits/s line rates. We do not enable and RxDMA interrupt coalescing.
750 if ((etdev
->linkspeed
== TRUEPHY_SPEED_100MBPS
) ||
751 (etdev
->linkspeed
== TRUEPHY_SPEED_10MBPS
)) {
752 writel(0, &etdev
->regs
->rxdma
.max_pkt_time
.value
);
753 writel(1, &etdev
->regs
->rxdma
.num_pkt_done
.value
);
758 * et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310
759 * @etdev: pointer to our adapter structure
761 void et131x_rx_dma_disable(struct et131x_adapter
*etdev
)
765 /* Setup the receive dma configuration register */
766 writel(0x00002001, &etdev
->regs
->rxdma
.csr
.value
);
767 csr
.value
= readl(&etdev
->regs
->rxdma
.csr
.value
);
768 if (csr
.bits
.halt_status
!= 1) {
770 csr
.value
= readl(&etdev
->regs
->rxdma
.csr
.value
);
771 if (csr
.bits
.halt_status
!= 1)
772 dev_err(&etdev
->pdev
->dev
,
773 "RX Dma failed to enter halt state. CSR 0x%08x\n",
779 * et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310.
780 * @etdev: pointer to our adapter structure
782 void et131x_rx_dma_enable(struct et131x_adapter
*etdev
)
784 /* Setup the receive dma configuration register for normal operation */
785 RXDMA_CSR_t csr
= { 0 };
787 csr
.bits
.fbr1_enable
= 1;
788 if (etdev
->RxRing
.Fbr1BufferSize
== 4096)
789 csr
.bits
.fbr1_size
= 1;
790 else if (etdev
->RxRing
.Fbr1BufferSize
== 8192)
791 csr
.bits
.fbr1_size
= 2;
792 else if (etdev
->RxRing
.Fbr1BufferSize
== 16384)
793 csr
.bits
.fbr1_size
= 3;
795 csr
.bits
.fbr0_enable
= 1;
796 if (etdev
->RxRing
.Fbr0BufferSize
== 256)
797 csr
.bits
.fbr0_size
= 1;
798 else if (etdev
->RxRing
.Fbr0BufferSize
== 512)
799 csr
.bits
.fbr0_size
= 2;
800 else if (etdev
->RxRing
.Fbr0BufferSize
== 1024)
801 csr
.bits
.fbr0_size
= 3;
803 writel(csr
.value
, &etdev
->regs
->rxdma
.csr
.value
);
805 csr
.value
= readl(&etdev
->regs
->rxdma
.csr
.value
);
806 if (csr
.bits
.halt_status
!= 0) {
808 csr
.value
= readl(&etdev
->regs
->rxdma
.csr
.value
);
809 if (csr
.bits
.halt_status
!= 0) {
810 dev_err(&etdev
->pdev
->dev
,
811 "RX Dma failed to exit halt state. CSR 0x%08x\n",
818 * nic_rx_pkts - Checks the hardware for available packets
819 * @etdev: pointer to our adapter
821 * Returns rfd, a pointer to our MPRFD.
823 * Checks the hardware for available packets, using completion ring
824 * If packets are available, it gets an RFD from the RecvList, attaches
825 * the packet to it, puts the RFD in the RecvPendList, and also returns
826 * the pointer to the RFD.
828 PMP_RFD
nic_rx_pkts(struct et131x_adapter
*etdev
)
830 struct _rx_ring_t
*rx_local
= &etdev
->RxRing
;
831 PRX_STATUS_BLOCK_t status
;
832 PPKT_STAT_DESC_t psr
;
837 struct list_head
*element
;
841 PKT_STAT_DESC_WORD0_t Word0
;
843 /* RX Status block is written by the DMA engine prior to every
844 * interrupt. It contains the next to be used entry in the Packet
845 * Status Ring, and also the two Free Buffer rings.
847 status
= (PRX_STATUS_BLOCK_t
) rx_local
->pRxStatusVa
;
849 if (status
->Word1
.bits
.PSRoffset
==
850 rx_local
->local_psr_full
.bits
.psr_full
&&
851 status
->Word1
.bits
.PSRwrap
==
852 rx_local
->local_psr_full
.bits
.psr_full_wrap
) {
853 /* Looks like this ring is not updated yet */
857 /* The packet status ring indicates that data is available. */
858 psr
= (PPKT_STAT_DESC_t
) (rx_local
->pPSRingVa
) +
859 rx_local
->local_psr_full
.bits
.psr_full
;
861 /* Grab any information that is required once the PSR is
862 * advanced, since we can no longer rely on the memory being
865 len
= psr
->word1
.bits
.length
;
866 rindex
= (uint8_t) psr
->word1
.bits
.ri
;
867 bindex
= (uint16_t) psr
->word1
.bits
.bi
;
870 /* Indicate that we have used this PSR entry. */
871 if (++rx_local
->local_psr_full
.bits
.psr_full
>
872 rx_local
->PsrNumEntries
- 1) {
873 rx_local
->local_psr_full
.bits
.psr_full
= 0;
874 rx_local
->local_psr_full
.bits
.psr_full_wrap
^= 1;
877 writel(rx_local
->local_psr_full
.value
,
878 &etdev
->regs
->rxdma
.psr_full_offset
.value
);
889 bindex
> rx_local
->Fbr0NumEntries
- 1) ||
891 bindex
> rx_local
->Fbr1NumEntries
- 1))
894 bindex
> rx_local
->Fbr1NumEntries
- 1)
897 /* Illegal buffer or ring index cannot be used by S/W*/
898 dev_err(&etdev
->pdev
->dev
,
899 "NICRxPkts PSR Entry %d indicates "
900 "length of %d and/or bad bi(%d)\n",
901 rx_local
->local_psr_full
.bits
.psr_full
,
906 /* Get and fill the RFD. */
907 spin_lock_irqsave(&etdev
->RcvLock
, flags
);
910 element
= rx_local
->RecvList
.next
;
911 rfd
= (PMP_RFD
) list_entry(element
, MP_RFD
, list_node
);
914 spin_unlock_irqrestore(&etdev
->RcvLock
, flags
);
918 list_del(&rfd
->list_node
);
919 rx_local
->nReadyRecv
--;
921 spin_unlock_irqrestore(&etdev
->RcvLock
, flags
);
923 rfd
->bufferindex
= bindex
;
924 rfd
->ringindex
= rindex
;
926 /* In V1 silicon, there is a bug which screws up filtering of
927 * runt packets. Therefore runt packet filtering is disabled
928 * in the MAC and the packets are dropped here. They are
931 if (len
< (NIC_MIN_PACKET_SIZE
+ 4)) {
932 etdev
->Stats
.other_errors
++;
937 if (etdev
->ReplicaPhyLoopbk
== 1) {
938 buf
= rx_local
->Fbr
[rindex
]->Va
[bindex
];
940 if (memcmp(&buf
[6], &etdev
->CurrentAddress
[0],
942 if (memcmp(&buf
[42], "Replica packet",
944 etdev
->ReplicaPhyLoopbkPF
= 1;
949 /* Determine if this is a multicast packet coming in */
950 if ((Word0
.value
& ALCATEL_MULTICAST_PKT
) &&
951 !(Word0
.value
& ALCATEL_BROADCAST_PKT
)) {
952 /* Promiscuous mode and Multicast mode are
953 * not mutually exclusive as was first
954 * thought. I guess Promiscuous is just
955 * considered a super-set of the other
956 * filters. Generally filter is 0x2b when in
959 if ((etdev
->PacketFilter
& ET131X_PACKET_TYPE_MULTICAST
)
960 && !(etdev
->PacketFilter
& ET131X_PACKET_TYPE_PROMISCUOUS
)
961 && !(etdev
->PacketFilter
& ET131X_PACKET_TYPE_ALL_MULTICAST
)) {
962 buf
= rx_local
->Fbr
[rindex
]->
965 /* Loop through our list to see if the
966 * destination address of this packet
967 * matches one in our list.
970 i
< etdev
->MCAddressCount
;
983 etdev
->MCList
[i
][5]) {
988 /* If our index is equal to the number
989 * of Multicast address we have, then
990 * this means we did not find this
991 * packet's matching address in our
992 * list. Set the PacketSize to zero,
993 * so we free our RFD when we return
994 * from this function.
996 if (i
== etdev
->MCAddressCount
)
1001 etdev
->Stats
.multircv
++;
1002 } else if (Word0
.value
& ALCATEL_BROADCAST_PKT
)
1003 etdev
->Stats
.brdcstrcv
++;
1005 /* Not sure what this counter measures in
1006 * promiscuous mode. Perhaps we should check
1007 * the MAC address to see if it is directed
1008 * to us in promiscuous mode.
1010 etdev
->Stats
.unircv
++;
1014 struct sk_buff
*skb
= NULL
;
1016 /* rfd->PacketSize = len - 4; */
1017 rfd
->PacketSize
= len
;
1019 skb
= dev_alloc_skb(rfd
->PacketSize
+ 2);
1021 dev_err(&etdev
->pdev
->dev
,
1022 "Couldn't alloc an SKB for Rx\n");
1026 etdev
->net_stats
.rx_bytes
+= rfd
->PacketSize
;
1028 memcpy(skb_put(skb
, rfd
->PacketSize
),
1029 rx_local
->Fbr
[rindex
]->Va
[bindex
],
1032 skb
->dev
= etdev
->netdev
;
1033 skb
->protocol
= eth_type_trans(skb
, etdev
->netdev
);
1034 skb
->ip_summed
= CHECKSUM_NONE
;
1038 rfd
->PacketSize
= 0;
1041 nic_return_rfd(etdev
, rfd
);
1046 * et131x_reset_recv - Reset the receive list
1047 * @etdev: pointer to our adapter
1049 * Assumption, Rcv spinlock has been acquired.
1051 void et131x_reset_recv(struct et131x_adapter
*etdev
)
1054 struct list_head
*element
;
1056 WARN_ON(list_empty(&etdev
->RxRing
.RecvList
));
1058 /* Take all the RFD's from the pending list, and stick them on the
1061 while (!list_empty(&etdev
->RxRing
.RecvPendingList
)) {
1062 element
= etdev
->RxRing
.RecvPendingList
.next
;
1064 rfd
= (PMP_RFD
) list_entry(element
, MP_RFD
, list_node
);
1066 list_move_tail(&rfd
->list_node
, &etdev
->RxRing
.RecvList
);
1071 * et131x_handle_recv_interrupt - Interrupt handler for receive processing
1072 * @etdev: pointer to our adapter
1074 * Assumption, Rcv spinlock has been acquired.
1076 void et131x_handle_recv_interrupt(struct et131x_adapter
*etdev
)
1079 struct sk_buff
*packets
[NUM_PACKETS_HANDLED
];
1080 PMP_RFD freed
[NUM_PACKETS_HANDLED
];
1085 /* Process up to available RFD's */
1086 while (count
< NUM_PACKETS_HANDLED
) {
1087 if (list_empty(&etdev
->RxRing
.RecvList
)) {
1088 WARN_ON(etdev
->RxRing
.nReadyRecv
!= 0);
1093 rfd
= nic_rx_pkts(etdev
);
1098 /* Do not receive any packets until a filter has been set.
1099 * Do not receive any packets until we have link.
1100 * If length is zero, return the RFD in order to advance the
1103 if (!etdev
->PacketFilter
||
1104 !(etdev
->Flags
& fMP_ADAPTER_LINK_DETECTION
) ||
1105 rfd
->PacketSize
== 0) {
1109 /* Increment the number of packets we received */
1110 etdev
->Stats
.ipackets
++;
1112 /* Set the status on the packet, either resources or success */
1113 if (etdev
->RxRing
.nReadyRecv
>= RFD_LOW_WATER_MARK
) {
1114 /* Put this RFD on the pending list
1116 * NOTE: nic_rx_pkts() above is already returning the
1117 * RFD to the RecvList, so don't additionally do that
1119 * Besides, we don't really need (at this point) the
1120 * pending list anyway.
1126 dev_warn(&etdev
->pdev
->dev
,
1127 "RFD's are running out\n");
1130 packets
[count
] = rfd
->Packet
;
1134 if (count
== NUM_PACKETS_HANDLED
|| !done
) {
1135 etdev
->RxRing
.UnfinishedReceives
= true;
1136 writel(PARM_TX_TIME_INT_DEF
* NANO_IN_A_MICRO
,
1137 &etdev
->regs
->global
.watchdog_timer
);
1139 /* Watchdog timer will disable itself if appropriate. */
1140 etdev
->RxRing
.UnfinishedReceives
= false;
1143 static inline u32
bump_fbr(u32
*fbr
, u32 limit
)
1147 /* This works for all cases where limit < 1024. The 1023 case
1148 works because 1023++ is 1024 which means the if condition is not
1149 taken but the carry of the bit into the wrap bit toggles the wrap
1151 if ((v
& ET_DMA10_MASK
) > limit
) {
1152 v
&= ~ET_DMA10_MASK
;
1155 /* For the 1023 case */
1156 v
&= (ET_DMA10_MASK
|ET_DMA10_WRAP
);
1162 * NICReturnRFD - Recycle a RFD and put it back onto the receive list
1163 * @etdev: pointer to our adapter
1164 * @rfd: pointer to the RFD
1166 void nic_return_rfd(struct et131x_adapter
*etdev
, PMP_RFD rfd
)
1168 struct _rx_ring_t
*rx_local
= &etdev
->RxRing
;
1169 struct _RXDMA_t __iomem
*rx_dma
= &etdev
->regs
->rxdma
;
1170 uint16_t bi
= rfd
->bufferindex
;
1171 uint8_t ri
= rfd
->ringindex
;
1172 unsigned long flags
;
1174 /* We don't use any of the OOB data besides status. Otherwise, we
1175 * need to clean up OOB data
1179 (ri
== 0 && bi
< rx_local
->Fbr0NumEntries
) ||
1181 (ri
== 1 && bi
< rx_local
->Fbr1NumEntries
)) {
1182 spin_lock_irqsave(&etdev
->FbrLock
, flags
);
1186 (PFBR_DESC_t
) (rx_local
->pFbr1RingVa
) +
1187 INDEX10(rx_local
->local_Fbr1_full
);
1189 /* Handle the Free Buffer Ring advancement here. Write
1190 * the PA / Buffer Index for the returned buffer into
1191 * the oldest (next to be freed)FBR entry
1193 next
->addr_hi
= rx_local
->Fbr
[1]->PAHigh
[bi
];
1194 next
->addr_lo
= rx_local
->Fbr
[1]->PALow
[bi
];
1195 next
->word2
.value
= bi
;
1197 writel(bump_fbr(&rx_local
->local_Fbr1_full
,
1198 rx_local
->Fbr1NumEntries
- 1),
1199 &rx_dma
->fbr1_full_offset
);
1204 (PFBR_DESC_t
) rx_local
->pFbr0RingVa
+
1205 INDEX10(rx_local
->local_Fbr0_full
);
1207 /* Handle the Free Buffer Ring advancement here. Write
1208 * the PA / Buffer Index for the returned buffer into
1209 * the oldest (next to be freed) FBR entry
1211 next
->addr_hi
= rx_local
->Fbr
[0]->PAHigh
[bi
];
1212 next
->addr_lo
= rx_local
->Fbr
[0]->PALow
[bi
];
1213 next
->word2
.value
= bi
;
1215 writel(bump_fbr(&rx_local
->local_Fbr0_full
,
1216 rx_local
->Fbr0NumEntries
- 1),
1217 &rx_dma
->fbr0_full_offset
);
1220 spin_unlock_irqrestore(&etdev
->FbrLock
, flags
);
1222 dev_err(&etdev
->pdev
->dev
,
1223 "NICReturnRFD illegal Buffer Index returned\n");
1226 /* The processing on this RFD is done, so put it back on the tail of
1229 spin_lock_irqsave(&etdev
->RcvLock
, flags
);
1230 list_add_tail(&rfd
->list_node
, &rx_local
->RecvList
);
1231 rx_local
->nReadyRecv
++;
1232 spin_unlock_irqrestore(&etdev
->RcvLock
, flags
);
1234 WARN_ON(rx_local
->nReadyRecv
> rx_local
->NumRfd
);