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drivers/net: use dev_get_drvdata
[linux-2.6/libata-dev.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
blobeb89752aff730060fe30549efac5e58b48134b69
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118 /* allow CTS-to-self if possible. this is relevant only for
119 * 5000, but will not damage 4965 */
120 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
121
122 ret = iwl_check_rxon_cmd(priv);
123 if (ret) {
124 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
125 return -EINVAL;
126 }
127
128 /* If we don't need to send a full RXON, we can use
129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
130 * and other flags for the current radio configuration. */
131 if (!iwl_full_rxon_required(priv)) {
132 ret = iwl_send_rxon_assoc(priv);
133 if (ret) {
134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
135 return ret;
136 }
137
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
139 return 0;
140 }
141
142 /* station table will be cleared */
143 priv->assoc_station_added = 0;
144
145 /* If we are currently associated and the new config requires
146 * an RXON_ASSOC and the new config wants the associated mask enabled,
147 * we must clear the associated from the active configuration
148 * before we apply the new config */
149 if (iwl_is_associated(priv) && new_assoc) {
150 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152
153 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
154 sizeof(struct iwl_rxon_cmd),
155 &priv->active_rxon);
156
157 /* If the mask clearing failed then we set
158 * active_rxon back to what it was previously */
159 if (ret) {
160 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
161 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
162 return ret;
163 }
164 }
165
166 IWL_DEBUG_INFO(priv, "Sending RXON\n"
167 "* with%s RXON_FILTER_ASSOC_MSK\n"
168 "* channel = %d\n"
169 "* bssid = %pM\n",
170 (new_assoc ? "" : "out"),
171 le16_to_cpu(priv->staging_rxon.channel),
172 priv->staging_rxon.bssid_addr);
173
174 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
175
176 /* Apply the new configuration
177 * RXON unassoc clears the station table in uCode, send it before
178 * we add the bcast station. If assoc bit is set, we will send RXON
179 * after having added the bcast and bssid station.
180 */
181 if (!new_assoc) {
182 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
183 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
184 if (ret) {
185 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
186 return ret;
187 }
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
189 }
190
191 priv->cfg->ops->smgmt->clear_station_table(priv);
192
193 priv->start_calib = 0;
194
195 /* Add the broadcast address so we can send broadcast frames */
196 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
197 IWL_INVALID_STATION) {
198 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
199 return -EIO;
200 }
201
202 /* If we have set the ASSOC_MSK and we are in BSS mode then
203 * add the IWL_AP_ID to the station rate table */
204 if (new_assoc) {
205 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
206 ret = iwl_rxon_add_station(priv,
207 priv->active_rxon.bssid_addr, 1);
208 if (ret == IWL_INVALID_STATION) {
209 IWL_ERR(priv,
210 "Error adding AP address for TX.\n");
211 return -EIO;
212 }
213 priv->assoc_station_added = 1;
214 if (priv->default_wep_key &&
215 iwl_send_static_wepkey_cmd(priv, 0))
216 IWL_ERR(priv,
217 "Could not send WEP static key.\n");
218 }
219
220 /* Apply the new configuration
221 * RXON assoc doesn't clear the station table in uCode,
222 */
223 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
224 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
225 if (ret) {
226 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
227 return ret;
228 }
229 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
230 }
231
232 iwl_init_sensitivity(priv);
233
234 /* If we issue a new RXON command which required a tune then we must
235 * send a new TXPOWER command or we won't be able to Tx any frames */
236 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
237 if (ret) {
238 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
239 return ret;
240 }
241
242 return 0;
243 }
244
245 void iwl_update_chain_flags(struct iwl_priv *priv)
246 {
247
248 if (priv->cfg->ops->hcmd->set_rxon_chain)
249 priv->cfg->ops->hcmd->set_rxon_chain(priv);
250 iwlcore_commit_rxon(priv);
251 }
252
253 static void iwl_clear_free_frames(struct iwl_priv *priv)
254 {
255 struct list_head *element;
256
257 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
258 priv->frames_count);
259
260 while (!list_empty(&priv->free_frames)) {
261 element = priv->free_frames.next;
262 list_del(element);
263 kfree(list_entry(element, struct iwl_frame, list));
264 priv->frames_count--;
265 }
266
267 if (priv->frames_count) {
268 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
269 priv->frames_count);
270 priv->frames_count = 0;
271 }
272 }
273
274 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
275 {
276 struct iwl_frame *frame;
277 struct list_head *element;
278 if (list_empty(&priv->free_frames)) {
279 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
280 if (!frame) {
281 IWL_ERR(priv, "Could not allocate frame!\n");
282 return NULL;
283 }
284
285 priv->frames_count++;
286 return frame;
287 }
288
289 element = priv->free_frames.next;
290 list_del(element);
291 return list_entry(element, struct iwl_frame, list);
292 }
293
294 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
295 {
296 memset(frame, 0, sizeof(*frame));
297 list_add(&frame->list, &priv->free_frames);
298 }
299
300 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
301 struct ieee80211_hdr *hdr,
302 int left)
303 {
304 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
305 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
306 (priv->iw_mode != NL80211_IFTYPE_AP)))
307 return 0;
308
309 if (priv->ibss_beacon->len > left)
310 return 0;
311
312 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
313
314 return priv->ibss_beacon->len;
315 }
316
317 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
318 struct iwl_frame *frame, u8 rate)
319 {
320 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
321 unsigned int frame_size;
322
323 tx_beacon_cmd = &frame->u.beacon;
324 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
325
326 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
327 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
328
329 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
330 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
331
332 BUG_ON(frame_size > MAX_MPDU_SIZE);
333 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
334
335 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
336 tx_beacon_cmd->tx.rate_n_flags =
337 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
338 else
339 tx_beacon_cmd->tx.rate_n_flags =
340 iwl_hw_set_rate_n_flags(rate, 0);
341
342 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
343 TX_CMD_FLG_TSF_MSK |
344 TX_CMD_FLG_STA_RATE_MSK;
345
346 return sizeof(*tx_beacon_cmd) + frame_size;
347 }
348 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
349 {
350 struct iwl_frame *frame;
351 unsigned int frame_size;
352 int rc;
353 u8 rate;
354
355 frame = iwl_get_free_frame(priv);
356
357 if (!frame) {
358 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
359 "command.\n");
360 return -ENOMEM;
361 }
362
363 rate = iwl_rate_get_lowest_plcp(priv);
364
365 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
366
367 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
368 &frame->u.cmd[0]);
369
370 iwl_free_frame(priv, frame);
371
372 return rc;
373 }
374
375 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
376 {
377 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
378
379 dma_addr_t addr = get_unaligned_le32(&tb->lo);
380 if (sizeof(dma_addr_t) > sizeof(u32))
381 addr |=
382 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
383
384 return addr;
385 }
386
387 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
388 {
389 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
390
391 return le16_to_cpu(tb->hi_n_len) >> 4;
392 }
393
394 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
395 dma_addr_t addr, u16 len)
396 {
397 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
398 u16 hi_n_len = len << 4;
399
400 put_unaligned_le32(addr, &tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
403
404 tb->hi_n_len = cpu_to_le16(hi_n_len);
405
406 tfd->num_tbs = idx + 1;
407 }
408
409 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
410 {
411 return tfd->num_tbs & 0x1f;
412 }
413
414 /**
415 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
416 * @priv - driver private data
417 * @txq - tx queue
418 *
419 * Does NOT advance any TFD circular buffer read/write indexes
420 * Does NOT free the TFD itself (which is within circular buffer)
421 */
422 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
423 {
424 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
425 struct iwl_tfd *tfd;
426 struct pci_dev *dev = priv->pci_dev;
427 int index = txq->q.read_ptr;
428 int i;
429 int num_tbs;
430
431 tfd = &tfd_tmp[index];
432
433 /* Sanity check on number of chunks */
434 num_tbs = iwl_tfd_get_num_tbs(tfd);
435
436 if (num_tbs >= IWL_NUM_OF_TBS) {
437 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
438 /* @todo issue fatal error, it is quite serious situation */
439 return;
440 }
441
442 /* Unmap tx_cmd */
443 if (num_tbs)
444 pci_unmap_single(dev,
445 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
446 pci_unmap_len(&txq->cmd[index]->meta, len),
447 PCI_DMA_BIDIRECTIONAL);
448
449 /* Unmap chunks, if any. */
450 for (i = 1; i < num_tbs; i++) {
451 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
452 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
453
454 if (txq->txb) {
455 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
456 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
457 }
458 }
459 }
460
461 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
462 struct iwl_tx_queue *txq,
463 dma_addr_t addr, u16 len,
464 u8 reset, u8 pad)
465 {
466 struct iwl_queue *q;
467 struct iwl_tfd *tfd, *tfd_tmp;
468 u32 num_tbs;
469
470 q = &txq->q;
471 tfd_tmp = (struct iwl_tfd *)txq->tfds;
472 tfd = &tfd_tmp[q->write_ptr];
473
474 if (reset)
475 memset(tfd, 0, sizeof(*tfd));
476
477 num_tbs = iwl_tfd_get_num_tbs(tfd);
478
479 /* Each TFD can point to a maximum 20 Tx buffers */
480 if (num_tbs >= IWL_NUM_OF_TBS) {
481 IWL_ERR(priv, "Error can not send more than %d chunks\n",
482 IWL_NUM_OF_TBS);
483 return -EINVAL;
484 }
485
486 BUG_ON(addr & ~DMA_BIT_MASK(36));
487 if (unlikely(addr & ~IWL_TX_DMA_MASK))
488 IWL_ERR(priv, "Unaligned address = %llx\n",
489 (unsigned long long)addr);
490
491 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
492
493 return 0;
494 }
495
496 /*
497 * Tell nic where to find circular buffer of Tx Frame Descriptors for
498 * given Tx queue, and enable the DMA channel used for that queue.
499 *
500 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
501 * channels supported in hardware.
502 */
503 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504 struct iwl_tx_queue *txq)
505 {
506 int ret;
507 unsigned long flags;
508 int txq_id = txq->q.id;
509
510 spin_lock_irqsave(&priv->lock, flags);
511 ret = iwl_grab_nic_access(priv);
512 if (ret) {
513 spin_unlock_irqrestore(&priv->lock, flags);
514 return ret;
515 }
516
517 /* Circular buffer (TFD queue in DRAM) physical base address */
518 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
519 txq->q.dma_addr >> 8);
520
521 iwl_release_nic_access(priv);
522 spin_unlock_irqrestore(&priv->lock, flags);
523
524 return 0;
525 }
526
527
528 /******************************************************************************
529 *
530 * Misc. internal state and helper functions
531 *
532 ******************************************************************************/
533
534 #define MAX_UCODE_BEACON_INTERVAL 4096
535
536 static u16 iwl_adjust_beacon_interval(u16 beacon_val)
537 {
538 u16 new_val = 0;
539 u16 beacon_factor = 0;
540
541 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
542 / MAX_UCODE_BEACON_INTERVAL;
543 new_val = beacon_val / beacon_factor;
544
545 if (!new_val)
546 new_val = MAX_UCODE_BEACON_INTERVAL;
547
548 return new_val;
549 }
550
551 static void iwl_setup_rxon_timing(struct iwl_priv *priv)
552 {
553 u64 tsf;
554 s32 interval_tm, rem;
555 unsigned long flags;
556 struct ieee80211_conf *conf = NULL;
557 u16 beacon_int = 0;
558
559 conf = ieee80211_get_hw_conf(priv->hw);
560
561 spin_lock_irqsave(&priv->lock, flags);
562 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
563 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
564
565 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
566 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
567 priv->rxon_timing.atim_window = 0;
568 } else {
569 beacon_int = iwl_adjust_beacon_interval(
570 priv->vif->bss_conf.beacon_int);
571
572 /* TODO: we need to get atim_window from upper stack
573 * for now we set to 0 */
574 priv->rxon_timing.atim_window = 0;
575 }
576
577 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
578
579 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
580 interval_tm = beacon_int * 1024;
581 rem = do_div(tsf, interval_tm);
582 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
583
584 spin_unlock_irqrestore(&priv->lock, flags);
585 IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
586 le16_to_cpu(priv->rxon_timing.beacon_interval),
587 le32_to_cpu(priv->rxon_timing.beacon_init_val),
588 le16_to_cpu(priv->rxon_timing.atim_window));
589 }
590
591 /******************************************************************************
592 *
593 * Generic RX handler implementations
594 *
595 ******************************************************************************/
596 static void iwl_rx_reply_alive(struct iwl_priv *priv,
597 struct iwl_rx_mem_buffer *rxb)
598 {
599 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
600 struct iwl_alive_resp *palive;
601 struct delayed_work *pwork;
602
603 palive = &pkt->u.alive_frame;
604
605 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
606 "0x%01X 0x%01X\n",
607 palive->is_valid, palive->ver_type,
608 palive->ver_subtype);
609
610 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
611 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
612 memcpy(&priv->card_alive_init,
613 &pkt->u.alive_frame,
614 sizeof(struct iwl_init_alive_resp));
615 pwork = &priv->init_alive_start;
616 } else {
617 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
618 memcpy(&priv->card_alive, &pkt->u.alive_frame,
619 sizeof(struct iwl_alive_resp));
620 pwork = &priv->alive_start;
621 }
622
623 /* We delay the ALIVE response by 5ms to
624 * give the HW RF Kill time to activate... */
625 if (palive->is_valid == UCODE_VALID_OK)
626 queue_delayed_work(priv->workqueue, pwork,
627 msecs_to_jiffies(5));
628 else
629 IWL_WARN(priv, "uCode did not respond OK.\n");
630 }
631
632 static void iwl_bg_beacon_update(struct work_struct *work)
633 {
634 struct iwl_priv *priv =
635 container_of(work, struct iwl_priv, beacon_update);
636 struct sk_buff *beacon;
637
638 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
639 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
640
641 if (!beacon) {
642 IWL_ERR(priv, "update beacon failed\n");
643 return;
644 }
645
646 mutex_lock(&priv->mutex);
647 /* new beacon skb is allocated every time; dispose previous.*/
648 if (priv->ibss_beacon)
649 dev_kfree_skb(priv->ibss_beacon);
650
651 priv->ibss_beacon = beacon;
652 mutex_unlock(&priv->mutex);
653
654 iwl_send_beacon_cmd(priv);
655 }
656
657 /**
658 * iwl_bg_statistics_periodic - Timer callback to queue statistics
659 *
660 * This callback is provided in order to send a statistics request.
661 *
662 * This timer function is continually reset to execute within
663 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
664 * was received. We need to ensure we receive the statistics in order
665 * to update the temperature used for calibrating the TXPOWER.
666 */
667 static void iwl_bg_statistics_periodic(unsigned long data)
668 {
669 struct iwl_priv *priv = (struct iwl_priv *)data;
670
671 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
672 return;
673
674 /* dont send host command if rf-kill is on */
675 if (!iwl_is_ready_rf(priv))
676 return;
677
678 iwl_send_statistics_request(priv, CMD_ASYNC);
679 }
680
681 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
682 struct iwl_rx_mem_buffer *rxb)
683 {
684 #ifdef CONFIG_IWLWIFI_DEBUG
685 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
686 struct iwl4965_beacon_notif *beacon =
687 (struct iwl4965_beacon_notif *)pkt->u.raw;
688 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
689
690 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
691 "tsf %d %d rate %d\n",
692 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
693 beacon->beacon_notify_hdr.failure_frame,
694 le32_to_cpu(beacon->ibss_mgr_status),
695 le32_to_cpu(beacon->high_tsf),
696 le32_to_cpu(beacon->low_tsf), rate);
697 #endif
698
699 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
700 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
701 queue_work(priv->workqueue, &priv->beacon_update);
702 }
703
704 /* Handle notification from uCode that card's power state is changing
705 * due to software, hardware, or critical temperature RFKILL */
706 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
707 struct iwl_rx_mem_buffer *rxb)
708 {
709 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
710 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
711 unsigned long status = priv->status;
712
713 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
714 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
715 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
716
717 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
718 RF_CARD_DISABLED)) {
719
720 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
721 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
722
723 if (!iwl_grab_nic_access(priv)) {
724 iwl_write_direct32(
725 priv, HBUS_TARG_MBX_C,
726 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
727
728 iwl_release_nic_access(priv);
729 }
730
731 if (!(flags & RXON_CARD_DISABLED)) {
732 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
733 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
734 if (!iwl_grab_nic_access(priv)) {
735 iwl_write_direct32(
736 priv, HBUS_TARG_MBX_C,
737 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
738
739 iwl_release_nic_access(priv);
740 }
741 }
742
743 if (flags & RF_CARD_DISABLED) {
744 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
745 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
746 iwl_read32(priv, CSR_UCODE_DRV_GP1);
747 if (!iwl_grab_nic_access(priv))
748 iwl_release_nic_access(priv);
749 }
750 }
751
752 if (flags & HW_CARD_DISABLED)
753 set_bit(STATUS_RF_KILL_HW, &priv->status);
754 else
755 clear_bit(STATUS_RF_KILL_HW, &priv->status);
756
757
758 if (flags & SW_CARD_DISABLED)
759 set_bit(STATUS_RF_KILL_SW, &priv->status);
760 else
761 clear_bit(STATUS_RF_KILL_SW, &priv->status);
762
763 if (!(flags & RXON_CARD_DISABLED))
764 iwl_scan_cancel(priv);
765
766 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
767 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
768 (test_bit(STATUS_RF_KILL_SW, &status) !=
769 test_bit(STATUS_RF_KILL_SW, &priv->status)))
770 queue_work(priv->workqueue, &priv->rf_kill);
771 else
772 wake_up_interruptible(&priv->wait_command_queue);
773 }
774
775 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
776 {
777 int ret;
778 unsigned long flags;
779
780 spin_lock_irqsave(&priv->lock, flags);
781 ret = iwl_grab_nic_access(priv);
782 if (ret)
783 goto err;
784
785 if (src == IWL_PWR_SRC_VAUX) {
786 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
787 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
788 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
789 ~APMG_PS_CTRL_MSK_PWR_SRC);
790 } else {
791 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
792 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
793 ~APMG_PS_CTRL_MSK_PWR_SRC);
794 }
795
796 iwl_release_nic_access(priv);
797 err:
798 spin_unlock_irqrestore(&priv->lock, flags);
799 return ret;
800 }
801
802 /**
803 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
804 *
805 * Setup the RX handlers for each of the reply types sent from the uCode
806 * to the host.
807 *
808 * This function chains into the hardware specific files for them to setup
809 * any hardware specific handlers as well.
810 */
811 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
812 {
813 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
814 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
815 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
816 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
817 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
818 iwl_rx_pm_debug_statistics_notif;
819 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
820
821 /*
822 * The same handler is used for both the REPLY to a discrete
823 * statistics request from the host as well as for the periodic
824 * statistics notifications (after received beacons) from the uCode.
825 */
826 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
827 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
828
829 iwl_setup_spectrum_handlers(priv);
830 iwl_setup_rx_scan_handlers(priv);
831
832 /* status change handler */
833 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
834
835 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
836 iwl_rx_missed_beacon_notif;
837 /* Rx handlers */
838 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
839 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
840 /* block ack */
841 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
842 /* Set up hardware specific Rx handlers */
843 priv->cfg->ops->lib->rx_handler_setup(priv);
844 }
845
846 /**
847 * iwl_rx_handle - Main entry function for receiving responses from uCode
848 *
849 * Uses the priv->rx_handlers callback function array to invoke
850 * the appropriate handlers, including command responses,
851 * frame-received notifications, and other notifications.
852 */
853 void iwl_rx_handle(struct iwl_priv *priv)
854 {
855 struct iwl_rx_mem_buffer *rxb;
856 struct iwl_rx_packet *pkt;
857 struct iwl_rx_queue *rxq = &priv->rxq;
858 u32 r, i;
859 int reclaim;
860 unsigned long flags;
861 u8 fill_rx = 0;
862 u32 count = 8;
863
864 /* uCode's read index (stored in shared DRAM) indicates the last Rx
865 * buffer that the driver may process (last buffer filled by ucode). */
866 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
867 i = rxq->read;
868
869 /* Rx interrupt, but nothing sent from uCode */
870 if (i == r)
871 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
872
873 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
874 fill_rx = 1;
875
876 while (i != r) {
877 rxb = rxq->queue[i];
878
879 /* If an RXB doesn't have a Rx queue slot associated with it,
880 * then a bug has been introduced in the queue refilling
881 * routines -- catch it here */
882 BUG_ON(rxb == NULL);
883
884 rxq->queue[i] = NULL;
885
886 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
887 priv->hw_params.rx_buf_size + 256,
888 PCI_DMA_FROMDEVICE);
889 pkt = (struct iwl_rx_packet *)rxb->skb->data;
890
891 /* Reclaim a command buffer only if this packet is a response
892 * to a (driver-originated) command.
893 * If the packet (e.g. Rx frame) originated from uCode,
894 * there is no command buffer to reclaim.
895 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
896 * but apparently a few don't get set; catch them here. */
897 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
898 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
899 (pkt->hdr.cmd != REPLY_RX) &&
900 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
901 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
902 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
903 (pkt->hdr.cmd != REPLY_TX);
904
905 /* Based on type of command response or notification,
906 * handle those that need handling via function in
907 * rx_handlers table. See iwl_setup_rx_handlers() */
908 if (priv->rx_handlers[pkt->hdr.cmd]) {
909 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
910 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
911 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
912 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
913 } else {
914 /* No handling needed */
915 IWL_DEBUG_RX(priv,
916 "r %d i %d No handler needed for %s, 0x%02x\n",
917 r, i, get_cmd_string(pkt->hdr.cmd),
918 pkt->hdr.cmd);
919 }
920
921 if (reclaim) {
922 /* Invoke any callbacks, transfer the skb to caller, and
923 * fire off the (possibly) blocking iwl_send_cmd()
924 * as we reclaim the driver command queue */
925 if (rxb && rxb->skb)
926 iwl_tx_cmd_complete(priv, rxb);
927 else
928 IWL_WARN(priv, "Claim null rxb?\n");
929 }
930
931 /* For now we just don't re-use anything. We can tweak this
932 * later to try and re-use notification packets and SKBs that
933 * fail to Rx correctly */
934 if (rxb->skb != NULL) {
935 priv->alloc_rxb_skb--;
936 dev_kfree_skb_any(rxb->skb);
937 rxb->skb = NULL;
938 }
939
940 spin_lock_irqsave(&rxq->lock, flags);
941 list_add_tail(&rxb->list, &priv->rxq.rx_used);
942 spin_unlock_irqrestore(&rxq->lock, flags);
943 i = (i + 1) & RX_QUEUE_MASK;
944 /* If there are a lot of unused frames,
945 * restock the Rx queue so ucode wont assert. */
946 if (fill_rx) {
947 count++;
948 if (count >= 8) {
949 priv->rxq.read = i;
950 iwl_rx_queue_restock(priv);
951 count = 0;
952 }
953 }
954 }
955
956 /* Backtrack one entry */
957 priv->rxq.read = i;
958 iwl_rx_queue_restock(priv);
959 }
960
961 /* call this function to flush any scheduled tasklet */
962 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
963 {
964 /* wait to make sure we flush pending tasklet*/
965 synchronize_irq(priv->pci_dev->irq);
966 tasklet_kill(&priv->irq_tasklet);
967 }
968
969 static void iwl_irq_tasklet(struct iwl_priv *priv)
970 {
971 u32 inta, handled = 0;
972 u32 inta_fh;
973 unsigned long flags;
974 #ifdef CONFIG_IWLWIFI_DEBUG
975 u32 inta_mask;
976 #endif
977
978 spin_lock_irqsave(&priv->lock, flags);
979
980 /* Ack/clear/reset pending uCode interrupts.
981 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
982 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
983 inta = iwl_read32(priv, CSR_INT);
984 iwl_write32(priv, CSR_INT, inta);
985
986 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
987 * Any new interrupts that happen after this, either while we're
988 * in this tasklet, or later, will show up in next ISR/tasklet. */
989 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
990 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
991
992 #ifdef CONFIG_IWLWIFI_DEBUG
993 if (priv->debug_level & IWL_DL_ISR) {
994 /* just for debug */
995 inta_mask = iwl_read32(priv, CSR_INT_MASK);
996 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
997 inta, inta_mask, inta_fh);
998 }
999 #endif
1000
1001 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1002 * atomic, make sure that inta covers all the interrupts that
1003 * we've discovered, even if FH interrupt came in just after
1004 * reading CSR_INT. */
1005 if (inta_fh & CSR49_FH_INT_RX_MASK)
1006 inta |= CSR_INT_BIT_FH_RX;
1007 if (inta_fh & CSR49_FH_INT_TX_MASK)
1008 inta |= CSR_INT_BIT_FH_TX;
1009
1010 /* Now service all interrupt bits discovered above. */
1011 if (inta & CSR_INT_BIT_HW_ERR) {
1012 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1013
1014 /* Tell the device to stop sending interrupts */
1015 iwl_disable_interrupts(priv);
1016
1017 priv->isr_stats.hw++;
1018 iwl_irq_handle_error(priv);
1019
1020 handled |= CSR_INT_BIT_HW_ERR;
1021
1022 spin_unlock_irqrestore(&priv->lock, flags);
1023
1024 return;
1025 }
1026
1027 #ifdef CONFIG_IWLWIFI_DEBUG
1028 if (priv->debug_level & (IWL_DL_ISR)) {
1029 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1030 if (inta & CSR_INT_BIT_SCD) {
1031 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1032 "the frame/frames.\n");
1033 priv->isr_stats.sch++;
1034 }
1035
1036 /* Alive notification via Rx interrupt will do the real work */
1037 if (inta & CSR_INT_BIT_ALIVE) {
1038 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1039 priv->isr_stats.alive++;
1040 }
1041 }
1042 #endif
1043 /* Safely ignore these bits for debug checks below */
1044 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1045
1046 /* HW RF KILL switch toggled */
1047 if (inta & CSR_INT_BIT_RF_KILL) {
1048 int hw_rf_kill = 0;
1049 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1050 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1051 hw_rf_kill = 1;
1052
1053 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1054 hw_rf_kill ? "disable radio" : "enable radio");
1055
1056 priv->isr_stats.rfkill++;
1057
1058 /* driver only loads ucode once setting the interface up.
1059 * the driver allows loading the ucode even if the radio
1060 * is killed. Hence update the killswitch state here. The
1061 * rfkill handler will care about restarting if needed.
1062 */
1063 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1064 if (hw_rf_kill)
1065 set_bit(STATUS_RF_KILL_HW, &priv->status);
1066 else
1067 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1068 queue_work(priv->workqueue, &priv->rf_kill);
1069 }
1070
1071 handled |= CSR_INT_BIT_RF_KILL;
1072 }
1073
1074 /* Chip got too hot and stopped itself */
1075 if (inta & CSR_INT_BIT_CT_KILL) {
1076 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1077 priv->isr_stats.ctkill++;
1078 handled |= CSR_INT_BIT_CT_KILL;
1079 }
1080
1081 /* Error detected by uCode */
1082 if (inta & CSR_INT_BIT_SW_ERR) {
1083 IWL_ERR(priv, "Microcode SW error detected. "
1084 " Restarting 0x%X.\n", inta);
1085 priv->isr_stats.sw++;
1086 priv->isr_stats.sw_err = inta;
1087 iwl_irq_handle_error(priv);
1088 handled |= CSR_INT_BIT_SW_ERR;
1089 }
1090
1091 /* uCode wakes up after power-down sleep */
1092 if (inta & CSR_INT_BIT_WAKEUP) {
1093 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1094 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1095 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1096 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1097 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1098 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1099 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1100 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1101
1102 priv->isr_stats.wakeup++;
1103
1104 handled |= CSR_INT_BIT_WAKEUP;
1105 }
1106
1107 /* All uCode command responses, including Tx command responses,
1108 * Rx "responses" (frame-received notification), and other
1109 * notifications from uCode come through here*/
1110 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1111 iwl_rx_handle(priv);
1112 priv->isr_stats.rx++;
1113 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1114 }
1115
1116 if (inta & CSR_INT_BIT_FH_TX) {
1117 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1118 priv->isr_stats.tx++;
1119 handled |= CSR_INT_BIT_FH_TX;
1120 /* FH finished to write, send event */
1121 priv->ucode_write_complete = 1;
1122 wake_up_interruptible(&priv->wait_command_queue);
1123 }
1124
1125 if (inta & ~handled) {
1126 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1127 priv->isr_stats.unhandled++;
1128 }
1129
1130 if (inta & ~CSR_INI_SET_MASK) {
1131 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1132 inta & ~CSR_INI_SET_MASK);
1133 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1134 }
1135
1136 /* Re-enable all interrupts */
1137 /* only Re-enable if diabled by irq */
1138 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1139 iwl_enable_interrupts(priv);
1140
1141 #ifdef CONFIG_IWLWIFI_DEBUG
1142 if (priv->debug_level & (IWL_DL_ISR)) {
1143 inta = iwl_read32(priv, CSR_INT);
1144 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1145 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1146 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1147 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1148 }
1149 #endif
1150 spin_unlock_irqrestore(&priv->lock, flags);
1151 }
1152
1153
1154 /******************************************************************************
1155 *
1156 * uCode download functions
1157 *
1158 ******************************************************************************/
1159
1160 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1161 {
1162 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1163 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1164 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1165 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1166 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1167 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1168 }
1169
1170 static void iwl_nic_start(struct iwl_priv *priv)
1171 {
1172 /* Remove all resets to allow NIC to operate */
1173 iwl_write32(priv, CSR_RESET, 0);
1174 }
1175
1176
1177 /**
1178 * iwl_read_ucode - Read uCode images from disk file.
1179 *
1180 * Copy into buffers for card to fetch via bus-mastering
1181 */
1182 static int iwl_read_ucode(struct iwl_priv *priv)
1183 {
1184 struct iwl_ucode *ucode;
1185 int ret = -EINVAL, index;
1186 const struct firmware *ucode_raw;
1187 const char *name_pre = priv->cfg->fw_name_pre;
1188 const unsigned int api_max = priv->cfg->ucode_api_max;
1189 const unsigned int api_min = priv->cfg->ucode_api_min;
1190 char buf[25];
1191 u8 *src;
1192 size_t len;
1193 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1194
1195 /* Ask kernel firmware_class module to get the boot firmware off disk.
1196 * request_firmware() is synchronous, file is in memory on return. */
1197 for (index = api_max; index >= api_min; index--) {
1198 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1199 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1200 if (ret < 0) {
1201 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1202 buf, ret);
1203 if (ret == -ENOENT)
1204 continue;
1205 else
1206 goto error;
1207 } else {
1208 if (index < api_max)
1209 IWL_ERR(priv, "Loaded firmware %s, "
1210 "which is deprecated. "
1211 "Please use API v%u instead.\n",
1212 buf, api_max);
1213
1214 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1215 buf, ucode_raw->size);
1216 break;
1217 }
1218 }
1219
1220 if (ret < 0)
1221 goto error;
1222
1223 /* Make sure that we got at least our header! */
1224 if (ucode_raw->size < sizeof(*ucode)) {
1225 IWL_ERR(priv, "File size way too small!\n");
1226 ret = -EINVAL;
1227 goto err_release;
1228 }
1229
1230 /* Data from ucode file: header followed by uCode images */
1231 ucode = (void *)ucode_raw->data;
1232
1233 priv->ucode_ver = le32_to_cpu(ucode->ver);
1234 api_ver = IWL_UCODE_API(priv->ucode_ver);
1235 inst_size = le32_to_cpu(ucode->inst_size);
1236 data_size = le32_to_cpu(ucode->data_size);
1237 init_size = le32_to_cpu(ucode->init_size);
1238 init_data_size = le32_to_cpu(ucode->init_data_size);
1239 boot_size = le32_to_cpu(ucode->boot_size);
1240
1241 /* api_ver should match the api version forming part of the
1242 * firmware filename ... but we don't check for that and only rely
1243 * on the API version read from firmware header from here on forward */
1244
1245 if (api_ver < api_min || api_ver > api_max) {
1246 IWL_ERR(priv, "Driver unable to support your firmware API. "
1247 "Driver supports v%u, firmware is v%u.\n",
1248 api_max, api_ver);
1249 priv->ucode_ver = 0;
1250 ret = -EINVAL;
1251 goto err_release;
1252 }
1253 if (api_ver != api_max)
1254 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1255 "got v%u. New firmware can be obtained "
1256 "from http://www.intellinuxwireless.org.\n",
1257 api_max, api_ver);
1258
1259 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1260 IWL_UCODE_MAJOR(priv->ucode_ver),
1261 IWL_UCODE_MINOR(priv->ucode_ver),
1262 IWL_UCODE_API(priv->ucode_ver),
1263 IWL_UCODE_SERIAL(priv->ucode_ver));
1264
1265 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1266 priv->ucode_ver);
1267 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1268 inst_size);
1269 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1270 data_size);
1271 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1272 init_size);
1273 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1274 init_data_size);
1275 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1276 boot_size);
1277
1278 /* Verify size of file vs. image size info in file's header */
1279 if (ucode_raw->size < sizeof(*ucode) +
1280 inst_size + data_size + init_size +
1281 init_data_size + boot_size) {
1282
1283 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
1284 (int)ucode_raw->size);
1285 ret = -EINVAL;
1286 goto err_release;
1287 }
1288
1289 /* Verify that uCode images will fit in card's SRAM */
1290 if (inst_size > priv->hw_params.max_inst_size) {
1291 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1292 inst_size);
1293 ret = -EINVAL;
1294 goto err_release;
1295 }
1296
1297 if (data_size > priv->hw_params.max_data_size) {
1298 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1299 data_size);
1300 ret = -EINVAL;
1301 goto err_release;
1302 }
1303 if (init_size > priv->hw_params.max_inst_size) {
1304 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1305 init_size);
1306 ret = -EINVAL;
1307 goto err_release;
1308 }
1309 if (init_data_size > priv->hw_params.max_data_size) {
1310 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1311 init_data_size);
1312 ret = -EINVAL;
1313 goto err_release;
1314 }
1315 if (boot_size > priv->hw_params.max_bsm_size) {
1316 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1317 boot_size);
1318 ret = -EINVAL;
1319 goto err_release;
1320 }
1321
1322 /* Allocate ucode buffers for card's bus-master loading ... */
1323
1324 /* Runtime instructions and 2 copies of data:
1325 * 1) unmodified from disk
1326 * 2) backup cache for save/restore during power-downs */
1327 priv->ucode_code.len = inst_size;
1328 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1329
1330 priv->ucode_data.len = data_size;
1331 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1332
1333 priv->ucode_data_backup.len = data_size;
1334 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1335
1336 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1337 !priv->ucode_data_backup.v_addr)
1338 goto err_pci_alloc;
1339
1340 /* Initialization instructions and data */
1341 if (init_size && init_data_size) {
1342 priv->ucode_init.len = init_size;
1343 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1344
1345 priv->ucode_init_data.len = init_data_size;
1346 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1347
1348 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1349 goto err_pci_alloc;
1350 }
1351
1352 /* Bootstrap (instructions only, no data) */
1353 if (boot_size) {
1354 priv->ucode_boot.len = boot_size;
1355 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1356
1357 if (!priv->ucode_boot.v_addr)
1358 goto err_pci_alloc;
1359 }
1360
1361 /* Copy images into buffers for card's bus-master reads ... */
1362
1363 /* Runtime instructions (first block of data in file) */
1364 src = &ucode->data[0];
1365 len = priv->ucode_code.len;
1366 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1367 memcpy(priv->ucode_code.v_addr, src, len);
1368 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1369 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1370
1371 /* Runtime data (2nd block)
1372 * NOTE: Copy into backup buffer will be done in iwl_up() */
1373 src = &ucode->data[inst_size];
1374 len = priv->ucode_data.len;
1375 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1376 memcpy(priv->ucode_data.v_addr, src, len);
1377 memcpy(priv->ucode_data_backup.v_addr, src, len);
1378
1379 /* Initialization instructions (3rd block) */
1380 if (init_size) {
1381 src = &ucode->data[inst_size + data_size];
1382 len = priv->ucode_init.len;
1383 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1384 len);
1385 memcpy(priv->ucode_init.v_addr, src, len);
1386 }
1387
1388 /* Initialization data (4th block) */
1389 if (init_data_size) {
1390 src = &ucode->data[inst_size + data_size + init_size];
1391 len = priv->ucode_init_data.len;
1392 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1393 len);
1394 memcpy(priv->ucode_init_data.v_addr, src, len);
1395 }
1396
1397 /* Bootstrap instructions (5th block) */
1398 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1399 len = priv->ucode_boot.len;
1400 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1401 memcpy(priv->ucode_boot.v_addr, src, len);
1402
1403 /* We have our copies now, allow OS release its copies */
1404 release_firmware(ucode_raw);
1405 return 0;
1406
1407 err_pci_alloc:
1408 IWL_ERR(priv, "failed to allocate pci memory\n");
1409 ret = -ENOMEM;
1410 iwl_dealloc_ucode_pci(priv);
1411
1412 err_release:
1413 release_firmware(ucode_raw);
1414
1415 error:
1416 return ret;
1417 }
1418
1419 /**
1420 * iwl_alive_start - called after REPLY_ALIVE notification received
1421 * from protocol/runtime uCode (initialization uCode's
1422 * Alive gets handled by iwl_init_alive_start()).
1423 */
1424 static void iwl_alive_start(struct iwl_priv *priv)
1425 {
1426 int ret = 0;
1427
1428 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1429
1430 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1431 /* We had an error bringing up the hardware, so take it
1432 * all the way back down so we can try again */
1433 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1434 goto restart;
1435 }
1436
1437 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1438 * This is a paranoid check, because we would not have gotten the
1439 * "runtime" alive if code weren't properly loaded. */
1440 if (iwl_verify_ucode(priv)) {
1441 /* Runtime instruction load was bad;
1442 * take it all the way back down so we can try again */
1443 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1444 goto restart;
1445 }
1446
1447 priv->cfg->ops->smgmt->clear_station_table(priv);
1448 ret = priv->cfg->ops->lib->alive_notify(priv);
1449 if (ret) {
1450 IWL_WARN(priv,
1451 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1452 goto restart;
1453 }
1454
1455 /* After the ALIVE response, we can send host commands to the uCode */
1456 set_bit(STATUS_ALIVE, &priv->status);
1457
1458 if (iwl_is_rfkill(priv))
1459 return;
1460
1461 ieee80211_wake_queues(priv->hw);
1462
1463 priv->active_rate = priv->rates_mask;
1464 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1465
1466 if (iwl_is_associated(priv)) {
1467 struct iwl_rxon_cmd *active_rxon =
1468 (struct iwl_rxon_cmd *)&priv->active_rxon;
1469 /* apply any changes in staging */
1470 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1471 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1472 } else {
1473 /* Initialize our rx_config data */
1474 iwl_connection_init_rx_config(priv, priv->iw_mode);
1475
1476 if (priv->cfg->ops->hcmd->set_rxon_chain)
1477 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1478
1479 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1480 }
1481
1482 /* Configure Bluetooth device coexistence support */
1483 iwl_send_bt_config(priv);
1484
1485 iwl_reset_run_time_calib(priv);
1486
1487 /* Configure the adapter for unassociated operation */
1488 iwlcore_commit_rxon(priv);
1489
1490 /* At this point, the NIC is initialized and operational */
1491 iwl_rf_kill_ct_config(priv);
1492
1493 iwl_leds_register(priv);
1494
1495 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1496 set_bit(STATUS_READY, &priv->status);
1497 wake_up_interruptible(&priv->wait_command_queue);
1498
1499 iwl_power_update_mode(priv, 1);
1500
1501 /* reassociate for ADHOC mode */
1502 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1503 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1504 priv->vif);
1505 if (beacon)
1506 iwl_mac_beacon_update(priv->hw, beacon);
1507 }
1508
1509
1510 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1511 iwl_set_mode(priv, priv->iw_mode);
1512
1513 return;
1514
1515 restart:
1516 queue_work(priv->workqueue, &priv->restart);
1517 }
1518
1519 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1520
1521 static void __iwl_down(struct iwl_priv *priv)
1522 {
1523 unsigned long flags;
1524 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1525
1526 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1527
1528 if (!exit_pending)
1529 set_bit(STATUS_EXIT_PENDING, &priv->status);
1530
1531 iwl_leds_unregister(priv);
1532
1533 priv->cfg->ops->smgmt->clear_station_table(priv);
1534
1535 /* Unblock any waiting calls */
1536 wake_up_interruptible_all(&priv->wait_command_queue);
1537
1538 /* Wipe out the EXIT_PENDING status bit if we are not actually
1539 * exiting the module */
1540 if (!exit_pending)
1541 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1542
1543 /* stop and reset the on-board processor */
1544 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1545
1546 /* tell the device to stop sending interrupts */
1547 spin_lock_irqsave(&priv->lock, flags);
1548 iwl_disable_interrupts(priv);
1549 spin_unlock_irqrestore(&priv->lock, flags);
1550 iwl_synchronize_irq(priv);
1551
1552 if (priv->mac80211_registered)
1553 ieee80211_stop_queues(priv->hw);
1554
1555 /* If we have not previously called iwl_init() then
1556 * clear all bits but the RF Kill bits and return */
1557 if (!iwl_is_init(priv)) {
1558 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1559 STATUS_RF_KILL_HW |
1560 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1561 STATUS_RF_KILL_SW |
1562 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1563 STATUS_GEO_CONFIGURED |
1564 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1565 STATUS_EXIT_PENDING;
1566 goto exit;
1567 }
1568
1569 /* ...otherwise clear out all the status bits but the RF Kill
1570 * bits and continue taking the NIC down. */
1571 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1572 STATUS_RF_KILL_HW |
1573 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1574 STATUS_RF_KILL_SW |
1575 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1576 STATUS_GEO_CONFIGURED |
1577 test_bit(STATUS_FW_ERROR, &priv->status) <<
1578 STATUS_FW_ERROR |
1579 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1580 STATUS_EXIT_PENDING;
1581
1582 spin_lock_irqsave(&priv->lock, flags);
1583 iwl_clear_bit(priv, CSR_GP_CNTRL,
1584 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1585 spin_unlock_irqrestore(&priv->lock, flags);
1586
1587 iwl_txq_ctx_stop(priv);
1588 iwl_rxq_stop(priv);
1589
1590 spin_lock_irqsave(&priv->lock, flags);
1591 if (!iwl_grab_nic_access(priv)) {
1592 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1593 APMG_CLK_VAL_DMA_CLK_RQT);
1594 iwl_release_nic_access(priv);
1595 }
1596 spin_unlock_irqrestore(&priv->lock, flags);
1597
1598 udelay(5);
1599
1600 /* FIXME: apm_ops.suspend(priv) */
1601 if (exit_pending)
1602 priv->cfg->ops->lib->apm_ops.stop(priv);
1603 else
1604 priv->cfg->ops->lib->apm_ops.reset(priv);
1605 exit:
1606 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1607
1608 if (priv->ibss_beacon)
1609 dev_kfree_skb(priv->ibss_beacon);
1610 priv->ibss_beacon = NULL;
1611
1612 /* clear out any free frames */
1613 iwl_clear_free_frames(priv);
1614 }
1615
1616 static void iwl_down(struct iwl_priv *priv)
1617 {
1618 mutex_lock(&priv->mutex);
1619 __iwl_down(priv);
1620 mutex_unlock(&priv->mutex);
1621
1622 iwl_cancel_deferred_work(priv);
1623 }
1624
1625 #define MAX_HW_RESTARTS 5
1626
1627 static int __iwl_up(struct iwl_priv *priv)
1628 {
1629 int i;
1630 int ret;
1631
1632 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1633 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1634 return -EIO;
1635 }
1636
1637 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1638 IWL_ERR(priv, "ucode not available for device bringup\n");
1639 return -EIO;
1640 }
1641
1642 /* If platform's RF_KILL switch is NOT set to KILL */
1643 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1644 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1645 else
1646 set_bit(STATUS_RF_KILL_HW, &priv->status);
1647
1648 if (iwl_is_rfkill(priv)) {
1649 iwl_enable_interrupts(priv);
1650 IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
1651 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
1652 return 0;
1653 }
1654
1655 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1656
1657 ret = iwl_hw_nic_init(priv);
1658 if (ret) {
1659 IWL_ERR(priv, "Unable to init nic\n");
1660 return ret;
1661 }
1662
1663 /* make sure rfkill handshake bits are cleared */
1664 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1665 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1666 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1667
1668 /* clear (again), then enable host interrupts */
1669 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1670 iwl_enable_interrupts(priv);
1671
1672 /* really make sure rfkill handshake bits are cleared */
1673 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1674 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1675
1676 /* Copy original ucode data image from disk into backup cache.
1677 * This will be used to initialize the on-board processor's
1678 * data SRAM for a clean start when the runtime program first loads. */
1679 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
1680 priv->ucode_data.len);
1681
1682 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1683
1684 priv->cfg->ops->smgmt->clear_station_table(priv);
1685
1686 /* load bootstrap state machine,
1687 * load bootstrap program into processor's memory,
1688 * prepare to load the "initialize" uCode */
1689 ret = priv->cfg->ops->lib->load_ucode(priv);
1690
1691 if (ret) {
1692 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1693 ret);
1694 continue;
1695 }
1696
1697 /* start card; "initialize" will load runtime ucode */
1698 iwl_nic_start(priv);
1699
1700 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
1701
1702 return 0;
1703 }
1704
1705 set_bit(STATUS_EXIT_PENDING, &priv->status);
1706 __iwl_down(priv);
1707 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1708
1709 /* tried to restart and config the device for as long as our
1710 * patience could withstand */
1711 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
1712 return -EIO;
1713 }
1714
1715
1716 /*****************************************************************************
1717 *
1718 * Workqueue callbacks
1719 *
1720 *****************************************************************************/
1721
1722 static void iwl_bg_init_alive_start(struct work_struct *data)
1723 {
1724 struct iwl_priv *priv =
1725 container_of(data, struct iwl_priv, init_alive_start.work);
1726
1727 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1728 return;
1729
1730 mutex_lock(&priv->mutex);
1731 priv->cfg->ops->lib->init_alive_start(priv);
1732 mutex_unlock(&priv->mutex);
1733 }
1734
1735 static void iwl_bg_alive_start(struct work_struct *data)
1736 {
1737 struct iwl_priv *priv =
1738 container_of(data, struct iwl_priv, alive_start.work);
1739
1740 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1741 return;
1742
1743 mutex_lock(&priv->mutex);
1744 iwl_alive_start(priv);
1745 mutex_unlock(&priv->mutex);
1746 }
1747
1748 static void iwl_bg_run_time_calib_work(struct work_struct *work)
1749 {
1750 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1751 run_time_calib_work);
1752
1753 mutex_lock(&priv->mutex);
1754
1755 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1756 test_bit(STATUS_SCANNING, &priv->status)) {
1757 mutex_unlock(&priv->mutex);
1758 return;
1759 }
1760
1761 if (priv->start_calib) {
1762 iwl_chain_noise_calibration(priv, &priv->statistics);
1763
1764 iwl_sensitivity_calibration(priv, &priv->statistics);
1765 }
1766
1767 mutex_unlock(&priv->mutex);
1768 return;
1769 }
1770
1771 static void iwl_bg_up(struct work_struct *data)
1772 {
1773 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
1774
1775 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1776 return;
1777
1778 mutex_lock(&priv->mutex);
1779 __iwl_up(priv);
1780 mutex_unlock(&priv->mutex);
1781 iwl_rfkill_set_hw_state(priv);
1782 }
1783
1784 static void iwl_bg_restart(struct work_struct *data)
1785 {
1786 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
1787
1788 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1789 return;
1790
1791 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
1792 mutex_lock(&priv->mutex);
1793 priv->vif = NULL;
1794 priv->is_open = 0;
1795 mutex_unlock(&priv->mutex);
1796 iwl_down(priv);
1797 ieee80211_restart_hw(priv->hw);
1798 } else {
1799 iwl_down(priv);
1800 queue_work(priv->workqueue, &priv->up);
1801 }
1802 }
1803
1804 static void iwl_bg_rx_replenish(struct work_struct *data)
1805 {
1806 struct iwl_priv *priv =
1807 container_of(data, struct iwl_priv, rx_replenish);
1808
1809 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1810 return;
1811
1812 mutex_lock(&priv->mutex);
1813 iwl_rx_replenish(priv);
1814 mutex_unlock(&priv->mutex);
1815 }
1816
1817 #define IWL_DELAY_NEXT_SCAN (HZ*2)
1818
1819 void iwl_post_associate(struct iwl_priv *priv)
1820 {
1821 struct ieee80211_conf *conf = NULL;
1822 int ret = 0;
1823 unsigned long flags;
1824
1825 if (priv->iw_mode == NL80211_IFTYPE_AP) {
1826 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
1827 return;
1828 }
1829
1830 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
1831 priv->assoc_id, priv->active_rxon.bssid_addr);
1832
1833
1834 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1835 return;
1836
1837
1838 if (!priv->vif || !priv->is_open)
1839 return;
1840
1841 iwl_scan_cancel_timeout(priv, 200);
1842
1843 conf = ieee80211_get_hw_conf(priv->hw);
1844
1845 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1846 iwlcore_commit_rxon(priv);
1847
1848 iwl_setup_rxon_timing(priv);
1849 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
1850 sizeof(priv->rxon_timing), &priv->rxon_timing);
1851 if (ret)
1852 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
1853 "Attempting to continue.\n");
1854
1855 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1856
1857 iwl_set_rxon_ht(priv, &priv->current_ht_config);
1858
1859 if (priv->cfg->ops->hcmd->set_rxon_chain)
1860 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1861
1862 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
1863
1864 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
1865 priv->assoc_id, priv->beacon_int);
1866
1867 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
1868 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1869 else
1870 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1871
1872 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
1873 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1874 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1875 else
1876 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1877
1878 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1879 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1880
1881 }
1882
1883 iwlcore_commit_rxon(priv);
1884
1885 switch (priv->iw_mode) {
1886 case NL80211_IFTYPE_STATION:
1887 break;
1888
1889 case NL80211_IFTYPE_ADHOC:
1890
1891 /* assume default assoc id */
1892 priv->assoc_id = 1;
1893
1894 iwl_rxon_add_station(priv, priv->bssid, 0);
1895 iwl_send_beacon_cmd(priv);
1896
1897 break;
1898
1899 default:
1900 IWL_ERR(priv, "%s Should not be called in %d mode\n",
1901 __func__, priv->iw_mode);
1902 break;
1903 }
1904
1905 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1906 priv->assoc_station_added = 1;
1907
1908 spin_lock_irqsave(&priv->lock, flags);
1909 iwl_activate_qos(priv, 0);
1910 spin_unlock_irqrestore(&priv->lock, flags);
1911
1912 /* the chain noise calibration will enabled PM upon completion
1913 * If chain noise has already been run, then we need to enable
1914 * power management here */
1915 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
1916 iwl_power_update_mode(priv, 0);
1917
1918 /* Enable Rx differential gain and sensitivity calibrations */
1919 iwl_chain_noise_reset(priv);
1920 priv->start_calib = 1;
1921
1922 }
1923
1924 /*****************************************************************************
1925 *
1926 * mac80211 entry point functions
1927 *
1928 *****************************************************************************/
1929
1930 #define UCODE_READY_TIMEOUT (4 * HZ)
1931
1932 static int iwl_mac_start(struct ieee80211_hw *hw)
1933 {
1934 struct iwl_priv *priv = hw->priv;
1935 int ret;
1936
1937 IWL_DEBUG_MAC80211(priv, "enter\n");
1938
1939 /* we should be verifying the device is ready to be opened */
1940 mutex_lock(&priv->mutex);
1941
1942 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
1943 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
1944 * ucode filename and max sizes are card-specific. */
1945
1946 if (!priv->ucode_code.len) {
1947 ret = iwl_read_ucode(priv);
1948 if (ret) {
1949 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
1950 mutex_unlock(&priv->mutex);
1951 return ret;
1952 }
1953 }
1954
1955 ret = __iwl_up(priv);
1956
1957 mutex_unlock(&priv->mutex);
1958
1959 iwl_rfkill_set_hw_state(priv);
1960
1961 if (ret)
1962 return ret;
1963
1964 if (iwl_is_rfkill(priv))
1965 goto out;
1966
1967 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
1968
1969 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
1970 * mac80211 will not be run successfully. */
1971 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
1972 test_bit(STATUS_READY, &priv->status),
1973 UCODE_READY_TIMEOUT);
1974 if (!ret) {
1975 if (!test_bit(STATUS_READY, &priv->status)) {
1976 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
1977 jiffies_to_msecs(UCODE_READY_TIMEOUT));
1978 return -ETIMEDOUT;
1979 }
1980 }
1981
1982 out:
1983 priv->is_open = 1;
1984 IWL_DEBUG_MAC80211(priv, "leave\n");
1985 return 0;
1986 }
1987
1988 static void iwl_mac_stop(struct ieee80211_hw *hw)
1989 {
1990 struct iwl_priv *priv = hw->priv;
1991
1992 IWL_DEBUG_MAC80211(priv, "enter\n");
1993
1994 if (!priv->is_open)
1995 return;
1996
1997 priv->is_open = 0;
1998
1999 if (iwl_is_ready_rf(priv)) {
2000 /* stop mac, cancel any scan request and clear
2001 * RXON_FILTER_ASSOC_MSK BIT
2002 */
2003 mutex_lock(&priv->mutex);
2004 iwl_scan_cancel_timeout(priv, 100);
2005 mutex_unlock(&priv->mutex);
2006 }
2007
2008 iwl_down(priv);
2009
2010 flush_workqueue(priv->workqueue);
2011
2012 /* enable interrupts again in order to receive rfkill changes */
2013 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2014 iwl_enable_interrupts(priv);
2015
2016 IWL_DEBUG_MAC80211(priv, "leave\n");
2017 }
2018
2019 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2020 {
2021 struct iwl_priv *priv = hw->priv;
2022
2023 IWL_DEBUG_MACDUMP(priv, "enter\n");
2024
2025 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2026 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2027
2028 if (iwl_tx_skb(priv, skb))
2029 dev_kfree_skb_any(skb);
2030
2031 IWL_DEBUG_MACDUMP(priv, "leave\n");
2032 return NETDEV_TX_OK;
2033 }
2034
2035 void iwl_config_ap(struct iwl_priv *priv)
2036 {
2037 int ret = 0;
2038 unsigned long flags;
2039
2040 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2041 return;
2042
2043 /* The following should be done only at AP bring up */
2044 if (!iwl_is_associated(priv)) {
2045
2046 /* RXON - unassoc (to set timing command) */
2047 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2048 iwlcore_commit_rxon(priv);
2049
2050 /* RXON Timing */
2051 iwl_setup_rxon_timing(priv);
2052 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2053 sizeof(priv->rxon_timing), &priv->rxon_timing);
2054 if (ret)
2055 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2056 "Attempting to continue.\n");
2057
2058 if (priv->cfg->ops->hcmd->set_rxon_chain)
2059 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2060
2061 /* FIXME: what should be the assoc_id for AP? */
2062 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2063 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2064 priv->staging_rxon.flags |=
2065 RXON_FLG_SHORT_PREAMBLE_MSK;
2066 else
2067 priv->staging_rxon.flags &=
2068 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2069
2070 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2071 if (priv->assoc_capability &
2072 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2073 priv->staging_rxon.flags |=
2074 RXON_FLG_SHORT_SLOT_MSK;
2075 else
2076 priv->staging_rxon.flags &=
2077 ~RXON_FLG_SHORT_SLOT_MSK;
2078
2079 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2080 priv->staging_rxon.flags &=
2081 ~RXON_FLG_SHORT_SLOT_MSK;
2082 }
2083 /* restore RXON assoc */
2084 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2085 iwlcore_commit_rxon(priv);
2086 spin_lock_irqsave(&priv->lock, flags);
2087 iwl_activate_qos(priv, 1);
2088 spin_unlock_irqrestore(&priv->lock, flags);
2089 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2090 }
2091 iwl_send_beacon_cmd(priv);
2092
2093 /* FIXME - we need to add code here to detect a totally new
2094 * configuration, reset the AP, unassoc, rxon timing, assoc,
2095 * clear sta table, add BCAST sta... */
2096 }
2097
2098 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2099 struct ieee80211_key_conf *keyconf, const u8 *addr,
2100 u32 iv32, u16 *phase1key)
2101 {
2102
2103 struct iwl_priv *priv = hw->priv;
2104 IWL_DEBUG_MAC80211(priv, "enter\n");
2105
2106 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2107
2108 IWL_DEBUG_MAC80211(priv, "leave\n");
2109 }
2110
2111 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2112 struct ieee80211_vif *vif,
2113 struct ieee80211_sta *sta,
2114 struct ieee80211_key_conf *key)
2115 {
2116 struct iwl_priv *priv = hw->priv;
2117 const u8 *addr;
2118 int ret;
2119 u8 sta_id;
2120 bool is_default_wep_key = false;
2121
2122 IWL_DEBUG_MAC80211(priv, "enter\n");
2123
2124 if (priv->hw_params.sw_crypto) {
2125 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2126 return -EOPNOTSUPP;
2127 }
2128 addr = sta ? sta->addr : iwl_bcast_addr;
2129 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
2130 if (sta_id == IWL_INVALID_STATION) {
2131 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2132 addr);
2133 return -EINVAL;
2134
2135 }
2136
2137 mutex_lock(&priv->mutex);
2138 iwl_scan_cancel_timeout(priv, 100);
2139 mutex_unlock(&priv->mutex);
2140
2141 /* If we are getting WEP group key and we didn't receive any key mapping
2142 * so far, we are in legacy wep mode (group key only), otherwise we are
2143 * in 1X mode.
2144 * In legacy wep mode, we use another host command to the uCode */
2145 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2146 priv->iw_mode != NL80211_IFTYPE_AP) {
2147 if (cmd == SET_KEY)
2148 is_default_wep_key = !priv->key_mapping_key;
2149 else
2150 is_default_wep_key =
2151 (key->hw_key_idx == HW_KEY_DEFAULT);
2152 }
2153
2154 switch (cmd) {
2155 case SET_KEY:
2156 if (is_default_wep_key)
2157 ret = iwl_set_default_wep_key(priv, key);
2158 else
2159 ret = iwl_set_dynamic_key(priv, key, sta_id);
2160
2161 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2162 break;
2163 case DISABLE_KEY:
2164 if (is_default_wep_key)
2165 ret = iwl_remove_default_wep_key(priv, key);
2166 else
2167 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2168
2169 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2170 break;
2171 default:
2172 ret = -EINVAL;
2173 }
2174
2175 IWL_DEBUG_MAC80211(priv, "leave\n");
2176
2177 return ret;
2178 }
2179
2180 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2181 enum ieee80211_ampdu_mlme_action action,
2182 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2183 {
2184 struct iwl_priv *priv = hw->priv;
2185 int ret;
2186
2187 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2188 sta->addr, tid);
2189
2190 if (!(priv->cfg->sku & IWL_SKU_N))
2191 return -EACCES;
2192
2193 switch (action) {
2194 case IEEE80211_AMPDU_RX_START:
2195 IWL_DEBUG_HT(priv, "start Rx\n");
2196 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2197 case IEEE80211_AMPDU_RX_STOP:
2198 IWL_DEBUG_HT(priv, "stop Rx\n");
2199 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2200 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2201 return 0;
2202 else
2203 return ret;
2204 case IEEE80211_AMPDU_TX_START:
2205 IWL_DEBUG_HT(priv, "start Tx\n");
2206 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2207 case IEEE80211_AMPDU_TX_STOP:
2208 IWL_DEBUG_HT(priv, "stop Tx\n");
2209 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2210 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2211 return 0;
2212 else
2213 return ret;
2214 default:
2215 IWL_DEBUG_HT(priv, "unknown\n");
2216 return -EINVAL;
2217 break;
2218 }
2219 return 0;
2220 }
2221
2222 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2223 struct ieee80211_low_level_stats *stats)
2224 {
2225 struct iwl_priv *priv = hw->priv;
2226
2227 priv = hw->priv;
2228 IWL_DEBUG_MAC80211(priv, "enter\n");
2229 IWL_DEBUG_MAC80211(priv, "leave\n");
2230
2231 return 0;
2232 }
2233
2234 /*****************************************************************************
2235 *
2236 * sysfs attributes
2237 *
2238 *****************************************************************************/
2239
2240 #ifdef CONFIG_IWLWIFI_DEBUG
2241
2242 /*
2243 * The following adds a new attribute to the sysfs representation
2244 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2245 * used for controlling the debug level.
2246 *
2247 * See the level definitions in iwl for details.
2248 */
2249
2250 static ssize_t show_debug_level(struct device *d,
2251 struct device_attribute *attr, char *buf)
2252 {
2253 struct iwl_priv *priv = dev_get_drvdata(d);
2254
2255 return sprintf(buf, "0x%08X\n", priv->debug_level);
2256 }
2257 static ssize_t store_debug_level(struct device *d,
2258 struct device_attribute *attr,
2259 const char *buf, size_t count)
2260 {
2261 struct iwl_priv *priv = dev_get_drvdata(d);
2262 unsigned long val;
2263 int ret;
2264
2265 ret = strict_strtoul(buf, 0, &val);
2266 if (ret)
2267 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2268 else
2269 priv->debug_level = val;
2270
2271 return strnlen(buf, count);
2272 }
2273
2274 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2275 show_debug_level, store_debug_level);
2276
2277
2278 #endif /* CONFIG_IWLWIFI_DEBUG */
2279
2280
2281 static ssize_t show_version(struct device *d,
2282 struct device_attribute *attr, char *buf)
2283 {
2284 struct iwl_priv *priv = dev_get_drvdata(d);
2285 struct iwl_alive_resp *palive = &priv->card_alive;
2286 ssize_t pos = 0;
2287 u16 eeprom_ver;
2288
2289 if (palive->is_valid)
2290 pos += sprintf(buf + pos,
2291 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2292 "fw type: 0x%01X 0x%01X\n",
2293 palive->ucode_major, palive->ucode_minor,
2294 palive->sw_rev[0], palive->sw_rev[1],
2295 palive->ver_type, palive->ver_subtype);
2296 else
2297 pos += sprintf(buf + pos, "fw not loaded\n");
2298
2299 if (priv->eeprom) {
2300 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2301 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
2302 eeprom_ver);
2303 } else {
2304 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2305 }
2306
2307 return pos;
2308 }
2309
2310 static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2311
2312 static ssize_t show_temperature(struct device *d,
2313 struct device_attribute *attr, char *buf)
2314 {
2315 struct iwl_priv *priv = dev_get_drvdata(d);
2316
2317 if (!iwl_is_alive(priv))
2318 return -EAGAIN;
2319
2320 return sprintf(buf, "%d\n", priv->temperature);
2321 }
2322
2323 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2324
2325 static ssize_t show_tx_power(struct device *d,
2326 struct device_attribute *attr, char *buf)
2327 {
2328 struct iwl_priv *priv = dev_get_drvdata(d);
2329
2330 if (!iwl_is_ready_rf(priv))
2331 return sprintf(buf, "off\n");
2332 else
2333 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2334 }
2335
2336 static ssize_t store_tx_power(struct device *d,
2337 struct device_attribute *attr,
2338 const char *buf, size_t count)
2339 {
2340 struct iwl_priv *priv = dev_get_drvdata(d);
2341 unsigned long val;
2342 int ret;
2343
2344 ret = strict_strtoul(buf, 10, &val);
2345 if (ret)
2346 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2347 else
2348 iwl_set_tx_power(priv, val, false);
2349
2350 return count;
2351 }
2352
2353 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2354
2355 static ssize_t show_flags(struct device *d,
2356 struct device_attribute *attr, char *buf)
2357 {
2358 struct iwl_priv *priv = dev_get_drvdata(d);
2359
2360 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2361 }
2362
2363 static ssize_t store_flags(struct device *d,
2364 struct device_attribute *attr,
2365 const char *buf, size_t count)
2366 {
2367 struct iwl_priv *priv = dev_get_drvdata(d);
2368 unsigned long val;
2369 u32 flags;
2370 int ret = strict_strtoul(buf, 0, &val);
2371 if (ret)
2372 return ret;
2373 flags = (u32)val;
2374
2375 mutex_lock(&priv->mutex);
2376 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2377 /* Cancel any currently running scans... */
2378 if (iwl_scan_cancel_timeout(priv, 100))
2379 IWL_WARN(priv, "Could not cancel scan.\n");
2380 else {
2381 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2382 priv->staging_rxon.flags = cpu_to_le32(flags);
2383 iwlcore_commit_rxon(priv);
2384 }
2385 }
2386 mutex_unlock(&priv->mutex);
2387
2388 return count;
2389 }
2390
2391 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2392
2393 static ssize_t show_filter_flags(struct device *d,
2394 struct device_attribute *attr, char *buf)
2395 {
2396 struct iwl_priv *priv = dev_get_drvdata(d);
2397
2398 return sprintf(buf, "0x%04X\n",
2399 le32_to_cpu(priv->active_rxon.filter_flags));
2400 }
2401
2402 static ssize_t store_filter_flags(struct device *d,
2403 struct device_attribute *attr,
2404 const char *buf, size_t count)
2405 {
2406 struct iwl_priv *priv = dev_get_drvdata(d);
2407 unsigned long val;
2408 u32 filter_flags;
2409 int ret = strict_strtoul(buf, 0, &val);
2410 if (ret)
2411 return ret;
2412 filter_flags = (u32)val;
2413
2414 mutex_lock(&priv->mutex);
2415 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2416 /* Cancel any currently running scans... */
2417 if (iwl_scan_cancel_timeout(priv, 100))
2418 IWL_WARN(priv, "Could not cancel scan.\n");
2419 else {
2420 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2421 "0x%04X\n", filter_flags);
2422 priv->staging_rxon.filter_flags =
2423 cpu_to_le32(filter_flags);
2424 iwlcore_commit_rxon(priv);
2425 }
2426 }
2427 mutex_unlock(&priv->mutex);
2428
2429 return count;
2430 }
2431
2432 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2433 store_filter_flags);
2434
2435 static ssize_t store_power_level(struct device *d,
2436 struct device_attribute *attr,
2437 const char *buf, size_t count)
2438 {
2439 struct iwl_priv *priv = dev_get_drvdata(d);
2440 int ret;
2441 unsigned long mode;
2442
2443
2444 mutex_lock(&priv->mutex);
2445
2446 ret = strict_strtoul(buf, 10, &mode);
2447 if (ret)
2448 goto out;
2449
2450 ret = iwl_power_set_user_mode(priv, mode);
2451 if (ret) {
2452 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
2453 goto out;
2454 }
2455 ret = count;
2456
2457 out:
2458 mutex_unlock(&priv->mutex);
2459 return ret;
2460 }
2461
2462 static ssize_t show_power_level(struct device *d,
2463 struct device_attribute *attr, char *buf)
2464 {
2465 struct iwl_priv *priv = dev_get_drvdata(d);
2466 int mode = priv->power_data.user_power_setting;
2467 int level = priv->power_data.power_mode;
2468 char *p = buf;
2469
2470 p += sprintf(p, "INDEX:%d\t", level);
2471 p += sprintf(p, "USER:%d\n", mode);
2472 return p - buf + 1;
2473 }
2474
2475 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
2476 store_power_level);
2477
2478 static ssize_t show_qos(struct device *d,
2479 struct device_attribute *attr, char *buf)
2480 {
2481 struct iwl_priv *priv = dev_get_drvdata(d);
2482 char *p = buf;
2483 int q;
2484
2485 for (q = 0; q < AC_NUM; q++) {
2486 p += sprintf(p, "\tcw_min\tcw_max\taifsn\ttxop\n");
2487 p += sprintf(p, "AC[%d]\t%u\t%u\t%u\t%u\n", q,
2488 priv->qos_data.def_qos_parm.ac[q].cw_min,
2489 priv->qos_data.def_qos_parm.ac[q].cw_max,
2490 priv->qos_data.def_qos_parm.ac[q].aifsn,
2491 priv->qos_data.def_qos_parm.ac[q].edca_txop);
2492 }
2493
2494 return p - buf + 1;
2495 }
2496
2497 static DEVICE_ATTR(qos, S_IRUGO, show_qos, NULL);
2498
2499 static ssize_t show_statistics(struct device *d,
2500 struct device_attribute *attr, char *buf)
2501 {
2502 struct iwl_priv *priv = dev_get_drvdata(d);
2503 u32 size = sizeof(struct iwl_notif_statistics);
2504 u32 len = 0, ofs = 0;
2505 u8 *data = (u8 *)&priv->statistics;
2506 int rc = 0;
2507
2508 if (!iwl_is_alive(priv))
2509 return -EAGAIN;
2510
2511 mutex_lock(&priv->mutex);
2512 rc = iwl_send_statistics_request(priv, 0);
2513 mutex_unlock(&priv->mutex);
2514
2515 if (rc) {
2516 len = sprintf(buf,
2517 "Error sending statistics request: 0x%08X\n", rc);
2518 return len;
2519 }
2520
2521 while (size && (PAGE_SIZE - len)) {
2522 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2523 PAGE_SIZE - len, 1);
2524 len = strlen(buf);
2525 if (PAGE_SIZE - len)
2526 buf[len++] = '\n';
2527
2528 ofs += 16;
2529 size -= min(size, 16U);
2530 }
2531
2532 return len;
2533 }
2534
2535 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2536
2537
2538 /*****************************************************************************
2539 *
2540 * driver setup and teardown
2541 *
2542 *****************************************************************************/
2543
2544 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2545 {
2546 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2547
2548 init_waitqueue_head(&priv->wait_command_queue);
2549
2550 INIT_WORK(&priv->up, iwl_bg_up);
2551 INIT_WORK(&priv->restart, iwl_bg_restart);
2552 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2553 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
2554 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2555 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2556 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2557 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2558
2559 iwl_setup_scan_deferred_work(priv);
2560
2561 if (priv->cfg->ops->lib->setup_deferred_work)
2562 priv->cfg->ops->lib->setup_deferred_work(priv);
2563
2564 init_timer(&priv->statistics_periodic);
2565 priv->statistics_periodic.data = (unsigned long)priv;
2566 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2567
2568 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2569 iwl_irq_tasklet, (unsigned long)priv);
2570 }
2571
2572 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2573 {
2574 if (priv->cfg->ops->lib->cancel_deferred_work)
2575 priv->cfg->ops->lib->cancel_deferred_work(priv);
2576
2577 cancel_delayed_work_sync(&priv->init_alive_start);
2578 cancel_delayed_work(&priv->scan_check);
2579 cancel_delayed_work(&priv->alive_start);
2580 cancel_work_sync(&priv->beacon_update);
2581 del_timer_sync(&priv->statistics_periodic);
2582 }
2583
2584 static struct attribute *iwl_sysfs_entries[] = {
2585 &dev_attr_flags.attr,
2586 &dev_attr_filter_flags.attr,
2587 &dev_attr_power_level.attr,
2588 &dev_attr_statistics.attr,
2589 &dev_attr_temperature.attr,
2590 &dev_attr_tx_power.attr,
2591 #ifdef CONFIG_IWLWIFI_DEBUG
2592 &dev_attr_debug_level.attr,
2593 #endif
2594 &dev_attr_version.attr,
2595 &dev_attr_qos.attr,
2596 NULL
2597 };
2598
2599 static struct attribute_group iwl_attribute_group = {
2600 .name = NULL, /* put in device directory */
2601 .attrs = iwl_sysfs_entries,
2602 };
2603
2604 static struct ieee80211_ops iwl_hw_ops = {
2605 .tx = iwl_mac_tx,
2606 .start = iwl_mac_start,
2607 .stop = iwl_mac_stop,
2608 .add_interface = iwl_mac_add_interface,
2609 .remove_interface = iwl_mac_remove_interface,
2610 .config = iwl_mac_config,
2611 .configure_filter = iwl_configure_filter,
2612 .set_key = iwl_mac_set_key,
2613 .update_tkip_key = iwl_mac_update_tkip_key,
2614 .get_stats = iwl_mac_get_stats,
2615 .get_tx_stats = iwl_mac_get_tx_stats,
2616 .conf_tx = iwl_mac_conf_tx,
2617 .reset_tsf = iwl_mac_reset_tsf,
2618 .bss_info_changed = iwl_bss_info_changed,
2619 .ampdu_action = iwl_mac_ampdu_action,
2620 .hw_scan = iwl_mac_hw_scan
2621 };
2622
2623 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2624 {
2625 int err = 0;
2626 struct iwl_priv *priv;
2627 struct ieee80211_hw *hw;
2628 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2629 unsigned long flags;
2630 u16 pci_cmd;
2631
2632 /************************
2633 * 1. Allocating HW data
2634 ************************/
2635
2636 /* Disabling hardware scan means that mac80211 will perform scans
2637 * "the hard way", rather than using device's scan. */
2638 if (cfg->mod_params->disable_hw_scan) {
2639 if (cfg->mod_params->debug & IWL_DL_INFO)
2640 dev_printk(KERN_DEBUG, &(pdev->dev),
2641 "Disabling hw_scan\n");
2642 iwl_hw_ops.hw_scan = NULL;
2643 }
2644
2645 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2646 if (!hw) {
2647 err = -ENOMEM;
2648 goto out;
2649 }
2650 priv = hw->priv;
2651 /* At this point both hw and priv are allocated. */
2652
2653 SET_IEEE80211_DEV(hw, &pdev->dev);
2654
2655 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2656 priv->cfg = cfg;
2657 priv->pci_dev = pdev;
2658
2659 #ifdef CONFIG_IWLWIFI_DEBUG
2660 priv->debug_level = priv->cfg->mod_params->debug;
2661 atomic_set(&priv->restrict_refcnt, 0);
2662 #endif
2663
2664 /**************************
2665 * 2. Initializing PCI bus
2666 **************************/
2667 if (pci_enable_device(pdev)) {
2668 err = -ENODEV;
2669 goto out_ieee80211_free_hw;
2670 }
2671
2672 pci_set_master(pdev);
2673
2674 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2675 if (!err)
2676 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2677 if (err) {
2678 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2679 if (!err)
2680 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2681 /* both attempts failed: */
2682 if (err) {
2683 IWL_WARN(priv, "No suitable DMA available.\n");
2684 goto out_pci_disable_device;
2685 }
2686 }
2687
2688 err = pci_request_regions(pdev, DRV_NAME);
2689 if (err)
2690 goto out_pci_disable_device;
2691
2692 pci_set_drvdata(pdev, priv);
2693
2694
2695 /***********************
2696 * 3. Read REV register
2697 ***********************/
2698 priv->hw_base = pci_iomap(pdev, 0, 0);
2699 if (!priv->hw_base) {
2700 err = -ENODEV;
2701 goto out_pci_release_regions;
2702 }
2703
2704 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2705 (unsigned long long) pci_resource_len(pdev, 0));
2706 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2707
2708 iwl_hw_detect(priv);
2709 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2710 priv->cfg->name, priv->hw_rev);
2711
2712 /* We disable the RETRY_TIMEOUT register (0x41) to keep
2713 * PCI Tx retries from interfering with C3 CPU state */
2714 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2715
2716 /* amp init */
2717 err = priv->cfg->ops->lib->apm_ops.init(priv);
2718 if (err < 0) {
2719 IWL_ERR(priv, "Failed to init APMG\n");
2720 goto out_iounmap;
2721 }
2722 /*****************
2723 * 4. Read EEPROM
2724 *****************/
2725 /* Read the EEPROM */
2726 err = iwl_eeprom_init(priv);
2727 if (err) {
2728 IWL_ERR(priv, "Unable to init EEPROM\n");
2729 goto out_iounmap;
2730 }
2731 err = iwl_eeprom_check_version(priv);
2732 if (err)
2733 goto out_free_eeprom;
2734
2735 /* extract MAC Address */
2736 iwl_eeprom_get_mac(priv, priv->mac_addr);
2737 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
2738 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2739
2740 /************************
2741 * 5. Setup HW constants
2742 ************************/
2743 if (iwl_set_hw_params(priv)) {
2744 IWL_ERR(priv, "failed to set hw parameters\n");
2745 goto out_free_eeprom;
2746 }
2747
2748 /*******************
2749 * 6. Setup priv
2750 *******************/
2751
2752 err = iwl_init_drv(priv);
2753 if (err)
2754 goto out_free_eeprom;
2755 /* At this point both hw and priv are initialized. */
2756
2757 /********************
2758 * 7. Setup services
2759 ********************/
2760 spin_lock_irqsave(&priv->lock, flags);
2761 iwl_disable_interrupts(priv);
2762 spin_unlock_irqrestore(&priv->lock, flags);
2763
2764 pci_enable_msi(priv->pci_dev);
2765
2766 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
2767 DRV_NAME, priv);
2768 if (err) {
2769 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
2770 goto out_disable_msi;
2771 }
2772 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
2773 if (err) {
2774 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2775 goto out_free_irq;
2776 }
2777
2778 iwl_setup_deferred_work(priv);
2779 iwl_setup_rx_handlers(priv);
2780
2781 /**********************************
2782 * 8. Setup and register mac80211
2783 **********************************/
2784
2785 /* enable interrupts if needed: hw bug w/a */
2786 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2787 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2788 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2789 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2790 }
2791
2792 iwl_enable_interrupts(priv);
2793
2794 err = iwl_setup_mac(priv);
2795 if (err)
2796 goto out_remove_sysfs;
2797
2798 err = iwl_dbgfs_register(priv, DRV_NAME);
2799 if (err)
2800 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2801
2802 /* If platform's RF_KILL switch is NOT set to KILL */
2803 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2804 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2805 else
2806 set_bit(STATUS_RF_KILL_HW, &priv->status);
2807
2808 err = iwl_rfkill_init(priv);
2809 if (err)
2810 IWL_ERR(priv, "Unable to initialize RFKILL system. "
2811 "Ignoring error: %d\n", err);
2812 else
2813 iwl_rfkill_set_hw_state(priv);
2814
2815 iwl_power_initialize(priv);
2816 return 0;
2817
2818 out_remove_sysfs:
2819 destroy_workqueue(priv->workqueue);
2820 priv->workqueue = NULL;
2821 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
2822 out_free_irq:
2823 free_irq(priv->pci_dev->irq, priv);
2824 out_disable_msi:
2825 pci_disable_msi(priv->pci_dev);
2826 iwl_uninit_drv(priv);
2827 out_free_eeprom:
2828 iwl_eeprom_free(priv);
2829 out_iounmap:
2830 pci_iounmap(pdev, priv->hw_base);
2831 out_pci_release_regions:
2832 pci_set_drvdata(pdev, NULL);
2833 pci_release_regions(pdev);
2834 out_pci_disable_device:
2835 pci_disable_device(pdev);
2836 out_ieee80211_free_hw:
2837 ieee80211_free_hw(priv->hw);
2838 out:
2839 return err;
2840 }
2841
2842 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
2843 {
2844 struct iwl_priv *priv = pci_get_drvdata(pdev);
2845 unsigned long flags;
2846
2847 if (!priv)
2848 return;
2849
2850 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
2851
2852 iwl_dbgfs_unregister(priv);
2853 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
2854
2855 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
2856 * to be called and iwl_down since we are removing the device
2857 * we need to set STATUS_EXIT_PENDING bit.
2858 */
2859 set_bit(STATUS_EXIT_PENDING, &priv->status);
2860 if (priv->mac80211_registered) {
2861 ieee80211_unregister_hw(priv->hw);
2862 priv->mac80211_registered = 0;
2863 } else {
2864 iwl_down(priv);
2865 }
2866
2867 /* make sure we flush any pending irq or
2868 * tasklet for the driver
2869 */
2870 spin_lock_irqsave(&priv->lock, flags);
2871 iwl_disable_interrupts(priv);
2872 spin_unlock_irqrestore(&priv->lock, flags);
2873
2874 iwl_synchronize_irq(priv);
2875
2876 iwl_rfkill_unregister(priv);
2877 iwl_dealloc_ucode_pci(priv);
2878
2879 if (priv->rxq.bd)
2880 iwl_rx_queue_free(priv, &priv->rxq);
2881 iwl_hw_txq_ctx_free(priv);
2882
2883 priv->cfg->ops->smgmt->clear_station_table(priv);
2884 iwl_eeprom_free(priv);
2885
2886
2887 /*netif_stop_queue(dev); */
2888 flush_workqueue(priv->workqueue);
2889
2890 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
2891 * priv->workqueue... so we can't take down the workqueue
2892 * until now... */
2893 destroy_workqueue(priv->workqueue);
2894 priv->workqueue = NULL;
2895
2896 free_irq(priv->pci_dev->irq, priv);
2897 pci_disable_msi(priv->pci_dev);
2898 pci_iounmap(pdev, priv->hw_base);
2899 pci_release_regions(pdev);
2900 pci_disable_device(pdev);
2901 pci_set_drvdata(pdev, NULL);
2902
2903 iwl_uninit_drv(priv);
2904
2905 if (priv->ibss_beacon)
2906 dev_kfree_skb(priv->ibss_beacon);
2907
2908 ieee80211_free_hw(priv->hw);
2909 }
2910
2911
2912 /*****************************************************************************
2913 *
2914 * driver and module entry point
2915 *
2916 *****************************************************************************/
2917
2918 /* Hardware specific file defines the PCI IDs table for that hardware module */
2919 static struct pci_device_id iwl_hw_card_ids[] = {
2920 #ifdef CONFIG_IWL4965
2921 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
2922 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
2923 #endif /* CONFIG_IWL4965 */
2924 #ifdef CONFIG_IWL5000
2925 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
2926 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
2927 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
2928 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
2929 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
2930 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
2931 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
2932 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
2933 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
2934 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
2935 /* 5350 WiFi/WiMax */
2936 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
2937 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
2938 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
2939 /* 5150 Wifi/WiMax */
2940 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
2941 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
2942 /* 6000/6050 Series */
2943 {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
2944 {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
2945 {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
2946 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
2947 {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000_2agn_cfg)},
2948 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
2949 {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000_2agn_cfg)},
2950 {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
2951 {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
2952 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
2953 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
2954 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
2955 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
2956 /* 1000 Series WiFi */
2957 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
2958 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
2959 #endif /* CONFIG_IWL5000 */
2960
2961 {0}
2962 };
2963 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
2964
2965 static struct pci_driver iwl_driver = {
2966 .name = DRV_NAME,
2967 .id_table = iwl_hw_card_ids,
2968 .probe = iwl_pci_probe,
2969 .remove = __devexit_p(iwl_pci_remove),
2970 #ifdef CONFIG_PM
2971 .suspend = iwl_pci_suspend,
2972 .resume = iwl_pci_resume,
2973 #endif
2974 };
2975
2976 static int __init iwl_init(void)
2977 {
2978
2979 int ret;
2980 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
2981 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
2982
2983 ret = iwlagn_rate_control_register();
2984 if (ret) {
2985 printk(KERN_ERR DRV_NAME
2986 "Unable to register rate control algorithm: %d\n", ret);
2987 return ret;
2988 }
2989
2990 ret = pci_register_driver(&iwl_driver);
2991 if (ret) {
2992 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
2993 goto error_register;
2994 }
2995
2996 return ret;
2997
2998 error_register:
2999 iwlagn_rate_control_unregister();
3000 return ret;
3001 }
3002
3003 static void __exit iwl_exit(void)
3004 {
3005 pci_unregister_driver(&iwl_driver);
3006 iwlagn_rate_control_unregister();
3007 }
3008
3009 module_exit(iwl_exit);
3010 module_init(iwl_init);
Linux 2.6 libata-dev (mirror)