2 * edac_mc kernel module
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
10 * (c) 2012-2013 - Mauro Carvalho Chehab <mchehab@redhat.com>
11 * The entire API were re-written, and ported to use struct device
15 #include <linux/ctype.h>
16 #include <linux/slab.h>
17 #include <linux/edac.h>
18 #include <linux/bug.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/uaccess.h>
22 #include "edac_core.h"
23 #include "edac_module.h"
25 /* MC EDAC Controls, setable by module parameter, and sysfs */
26 static int edac_mc_log_ue
= 1;
27 static int edac_mc_log_ce
= 1;
28 static int edac_mc_panic_on_ue
;
29 static int edac_mc_poll_msec
= 1000;
31 /* Getter functions for above */
32 int edac_mc_get_log_ue(void)
34 return edac_mc_log_ue
;
37 int edac_mc_get_log_ce(void)
39 return edac_mc_log_ce
;
42 int edac_mc_get_panic_on_ue(void)
44 return edac_mc_panic_on_ue
;
47 /* this is temporary */
48 int edac_mc_get_poll_msec(void)
50 return edac_mc_poll_msec
;
53 static int edac_set_poll_msec(const char *val
, struct kernel_param
*kp
)
61 ret
= strict_strtol(val
, 0, &l
);
62 if (ret
== -EINVAL
|| ((int)l
!= l
))
64 *((int *)kp
->arg
) = l
;
66 /* notify edac_mc engine to reset the poll period */
67 edac_mc_reset_delay_period(l
);
72 /* Parameter declarations for above */
73 module_param(edac_mc_panic_on_ue
, int, 0644);
74 MODULE_PARM_DESC(edac_mc_panic_on_ue
, "Panic on uncorrected error: 0=off 1=on");
75 module_param(edac_mc_log_ue
, int, 0644);
76 MODULE_PARM_DESC(edac_mc_log_ue
,
77 "Log uncorrectable error to console: 0=off 1=on");
78 module_param(edac_mc_log_ce
, int, 0644);
79 MODULE_PARM_DESC(edac_mc_log_ce
,
80 "Log correctable error to console: 0=off 1=on");
81 module_param_call(edac_mc_poll_msec
, edac_set_poll_msec
, param_get_int
,
82 &edac_mc_poll_msec
, 0644);
83 MODULE_PARM_DESC(edac_mc_poll_msec
, "Polling period in milliseconds");
85 static struct device
*mci_pdev
;
88 * various constants for Memory Controllers
90 static const char *mem_types
[] = {
91 [MEM_EMPTY
] = "Empty",
92 [MEM_RESERVED
] = "Reserved",
93 [MEM_UNKNOWN
] = "Unknown",
97 [MEM_SDR
] = "Unbuffered-SDR",
98 [MEM_RDR
] = "Registered-SDR",
99 [MEM_DDR
] = "Unbuffered-DDR",
100 [MEM_RDDR
] = "Registered-DDR",
102 [MEM_DDR2
] = "Unbuffered-DDR2",
103 [MEM_FB_DDR2
] = "FullyBuffered-DDR2",
104 [MEM_RDDR2
] = "Registered-DDR2",
106 [MEM_DDR3
] = "Unbuffered-DDR3",
107 [MEM_RDDR3
] = "Registered-DDR3"
110 static const char *dev_types
[] = {
111 [DEV_UNKNOWN
] = "Unknown",
121 static const char *edac_caps
[] = {
122 [EDAC_UNKNOWN
] = "Unknown",
123 [EDAC_NONE
] = "None",
124 [EDAC_RESERVED
] = "Reserved",
125 [EDAC_PARITY
] = "PARITY",
127 [EDAC_SECDED
] = "SECDED",
128 [EDAC_S2ECD2ED
] = "S2ECD2ED",
129 [EDAC_S4ECD4ED
] = "S4ECD4ED",
130 [EDAC_S8ECD8ED
] = "S8ECD8ED",
131 [EDAC_S16ECD16ED
] = "S16ECD16ED"
134 #ifdef CONFIG_EDAC_LEGACY_SYSFS
136 * EDAC sysfs CSROW data structures and methods
139 #define to_csrow(k) container_of(k, struct csrow_info, dev)
142 * We need it to avoid namespace conflicts between the legacy API
143 * and the per-dimm/per-rank one
145 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
146 static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
148 struct dev_ch_attribute
{
149 struct device_attribute attr
;
153 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
154 struct dev_ch_attribute dev_attr_legacy_##_name = \
155 { __ATTR(_name, _mode, _show, _store), (_var) }
157 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
159 /* Set of more default csrow<id> attribute show/store functions */
160 static ssize_t
csrow_ue_count_show(struct device
*dev
,
161 struct device_attribute
*mattr
, char *data
)
163 struct csrow_info
*csrow
= to_csrow(dev
);
165 return sprintf(data
, "%u\n", csrow
->ue_count
);
168 static ssize_t
csrow_ce_count_show(struct device
*dev
,
169 struct device_attribute
*mattr
, char *data
)
171 struct csrow_info
*csrow
= to_csrow(dev
);
173 return sprintf(data
, "%u\n", csrow
->ce_count
);
176 static ssize_t
csrow_size_show(struct device
*dev
,
177 struct device_attribute
*mattr
, char *data
)
179 struct csrow_info
*csrow
= to_csrow(dev
);
183 for (i
= 0; i
< csrow
->nr_channels
; i
++)
184 nr_pages
+= csrow
->channels
[i
]->dimm
->nr_pages
;
185 return sprintf(data
, "%u\n", PAGES_TO_MiB(nr_pages
));
188 static ssize_t
csrow_mem_type_show(struct device
*dev
,
189 struct device_attribute
*mattr
, char *data
)
191 struct csrow_info
*csrow
= to_csrow(dev
);
193 return sprintf(data
, "%s\n", mem_types
[csrow
->channels
[0]->dimm
->mtype
]);
196 static ssize_t
csrow_dev_type_show(struct device
*dev
,
197 struct device_attribute
*mattr
, char *data
)
199 struct csrow_info
*csrow
= to_csrow(dev
);
201 return sprintf(data
, "%s\n", dev_types
[csrow
->channels
[0]->dimm
->dtype
]);
204 static ssize_t
csrow_edac_mode_show(struct device
*dev
,
205 struct device_attribute
*mattr
,
208 struct csrow_info
*csrow
= to_csrow(dev
);
210 return sprintf(data
, "%s\n", edac_caps
[csrow
->channels
[0]->dimm
->edac_mode
]);
213 /* show/store functions for DIMM Label attributes */
214 static ssize_t
channel_dimm_label_show(struct device
*dev
,
215 struct device_attribute
*mattr
,
218 struct csrow_info
*csrow
= to_csrow(dev
);
219 unsigned chan
= to_channel(mattr
);
220 struct rank_info
*rank
= csrow
->channels
[chan
];
222 /* if field has not been initialized, there is nothing to send */
223 if (!rank
->dimm
->label
[0])
226 return snprintf(data
, EDAC_MC_LABEL_LEN
, "%s\n",
230 static ssize_t
channel_dimm_label_store(struct device
*dev
,
231 struct device_attribute
*mattr
,
232 const char *data
, size_t count
)
234 struct csrow_info
*csrow
= to_csrow(dev
);
235 unsigned chan
= to_channel(mattr
);
236 struct rank_info
*rank
= csrow
->channels
[chan
];
238 ssize_t max_size
= 0;
240 max_size
= min((ssize_t
) count
, (ssize_t
) EDAC_MC_LABEL_LEN
- 1);
241 strncpy(rank
->dimm
->label
, data
, max_size
);
242 rank
->dimm
->label
[max_size
] = '\0';
247 /* show function for dynamic chX_ce_count attribute */
248 static ssize_t
channel_ce_count_show(struct device
*dev
,
249 struct device_attribute
*mattr
, char *data
)
251 struct csrow_info
*csrow
= to_csrow(dev
);
252 unsigned chan
= to_channel(mattr
);
253 struct rank_info
*rank
= csrow
->channels
[chan
];
255 return sprintf(data
, "%u\n", rank
->ce_count
);
258 /* cwrow<id>/attribute files */
259 DEVICE_ATTR_LEGACY(size_mb
, S_IRUGO
, csrow_size_show
, NULL
);
260 DEVICE_ATTR_LEGACY(dev_type
, S_IRUGO
, csrow_dev_type_show
, NULL
);
261 DEVICE_ATTR_LEGACY(mem_type
, S_IRUGO
, csrow_mem_type_show
, NULL
);
262 DEVICE_ATTR_LEGACY(edac_mode
, S_IRUGO
, csrow_edac_mode_show
, NULL
);
263 DEVICE_ATTR_LEGACY(ue_count
, S_IRUGO
, csrow_ue_count_show
, NULL
);
264 DEVICE_ATTR_LEGACY(ce_count
, S_IRUGO
, csrow_ce_count_show
, NULL
);
266 /* default attributes of the CSROW<id> object */
267 static struct attribute
*csrow_attrs
[] = {
268 &dev_attr_legacy_dev_type
.attr
,
269 &dev_attr_legacy_mem_type
.attr
,
270 &dev_attr_legacy_edac_mode
.attr
,
271 &dev_attr_legacy_size_mb
.attr
,
272 &dev_attr_legacy_ue_count
.attr
,
273 &dev_attr_legacy_ce_count
.attr
,
277 static struct attribute_group csrow_attr_grp
= {
278 .attrs
= csrow_attrs
,
281 static const struct attribute_group
*csrow_attr_groups
[] = {
286 static void csrow_attr_release(struct device
*dev
)
288 struct csrow_info
*csrow
= container_of(dev
, struct csrow_info
, dev
);
290 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev
));
294 static struct device_type csrow_attr_type
= {
295 .groups
= csrow_attr_groups
,
296 .release
= csrow_attr_release
,
300 * possible dynamic channel DIMM Label attribute files
304 #define EDAC_NR_CHANNELS 6
306 DEVICE_CHANNEL(ch0_dimm_label
, S_IRUGO
| S_IWUSR
,
307 channel_dimm_label_show
, channel_dimm_label_store
, 0);
308 DEVICE_CHANNEL(ch1_dimm_label
, S_IRUGO
| S_IWUSR
,
309 channel_dimm_label_show
, channel_dimm_label_store
, 1);
310 DEVICE_CHANNEL(ch2_dimm_label
, S_IRUGO
| S_IWUSR
,
311 channel_dimm_label_show
, channel_dimm_label_store
, 2);
312 DEVICE_CHANNEL(ch3_dimm_label
, S_IRUGO
| S_IWUSR
,
313 channel_dimm_label_show
, channel_dimm_label_store
, 3);
314 DEVICE_CHANNEL(ch4_dimm_label
, S_IRUGO
| S_IWUSR
,
315 channel_dimm_label_show
, channel_dimm_label_store
, 4);
316 DEVICE_CHANNEL(ch5_dimm_label
, S_IRUGO
| S_IWUSR
,
317 channel_dimm_label_show
, channel_dimm_label_store
, 5);
319 /* Total possible dynamic DIMM Label attribute file table */
320 static struct device_attribute
*dynamic_csrow_dimm_attr
[] = {
321 &dev_attr_legacy_ch0_dimm_label
.attr
,
322 &dev_attr_legacy_ch1_dimm_label
.attr
,
323 &dev_attr_legacy_ch2_dimm_label
.attr
,
324 &dev_attr_legacy_ch3_dimm_label
.attr
,
325 &dev_attr_legacy_ch4_dimm_label
.attr
,
326 &dev_attr_legacy_ch5_dimm_label
.attr
329 /* possible dynamic channel ce_count attribute files */
330 DEVICE_CHANNEL(ch0_ce_count
, S_IRUGO
| S_IWUSR
,
331 channel_ce_count_show
, NULL
, 0);
332 DEVICE_CHANNEL(ch1_ce_count
, S_IRUGO
| S_IWUSR
,
333 channel_ce_count_show
, NULL
, 1);
334 DEVICE_CHANNEL(ch2_ce_count
, S_IRUGO
| S_IWUSR
,
335 channel_ce_count_show
, NULL
, 2);
336 DEVICE_CHANNEL(ch3_ce_count
, S_IRUGO
| S_IWUSR
,
337 channel_ce_count_show
, NULL
, 3);
338 DEVICE_CHANNEL(ch4_ce_count
, S_IRUGO
| S_IWUSR
,
339 channel_ce_count_show
, NULL
, 4);
340 DEVICE_CHANNEL(ch5_ce_count
, S_IRUGO
| S_IWUSR
,
341 channel_ce_count_show
, NULL
, 5);
343 /* Total possible dynamic ce_count attribute file table */
344 static struct device_attribute
*dynamic_csrow_ce_count_attr
[] = {
345 &dev_attr_legacy_ch0_ce_count
.attr
,
346 &dev_attr_legacy_ch1_ce_count
.attr
,
347 &dev_attr_legacy_ch2_ce_count
.attr
,
348 &dev_attr_legacy_ch3_ce_count
.attr
,
349 &dev_attr_legacy_ch4_ce_count
.attr
,
350 &dev_attr_legacy_ch5_ce_count
.attr
353 static inline int nr_pages_per_csrow(struct csrow_info
*csrow
)
355 int chan
, nr_pages
= 0;
357 for (chan
= 0; chan
< csrow
->nr_channels
; chan
++)
358 nr_pages
+= csrow
->channels
[chan
]->dimm
->nr_pages
;
363 /* Create a CSROW object under specifed edac_mc_device */
364 static int edac_create_csrow_object(struct mem_ctl_info
*mci
,
365 struct csrow_info
*csrow
, int index
)
369 if (csrow
->nr_channels
>= EDAC_NR_CHANNELS
)
372 csrow
->dev
.type
= &csrow_attr_type
;
373 csrow
->dev
.bus
= &mci
->bus
;
374 device_initialize(&csrow
->dev
);
375 csrow
->dev
.parent
= &mci
->dev
;
377 dev_set_name(&csrow
->dev
, "csrow%d", index
);
378 dev_set_drvdata(&csrow
->dev
, csrow
);
380 edac_dbg(0, "creating (virtual) csrow node %s\n",
381 dev_name(&csrow
->dev
));
383 err
= device_add(&csrow
->dev
);
387 for (chan
= 0; chan
< csrow
->nr_channels
; chan
++) {
388 /* Only expose populated DIMMs */
389 if (!csrow
->channels
[chan
]->dimm
->nr_pages
)
391 err
= device_create_file(&csrow
->dev
,
392 dynamic_csrow_dimm_attr
[chan
]);
395 err
= device_create_file(&csrow
->dev
,
396 dynamic_csrow_ce_count_attr
[chan
]);
398 device_remove_file(&csrow
->dev
,
399 dynamic_csrow_dimm_attr
[chan
]);
407 for (--chan
; chan
>= 0; chan
--) {
408 device_remove_file(&csrow
->dev
,
409 dynamic_csrow_dimm_attr
[chan
]);
410 device_remove_file(&csrow
->dev
,
411 dynamic_csrow_ce_count_attr
[chan
]);
413 put_device(&csrow
->dev
);
418 /* Create a CSROW object under specifed edac_mc_device */
419 static int edac_create_csrow_objects(struct mem_ctl_info
*mci
)
422 struct csrow_info
*csrow
;
424 for (i
= 0; i
< mci
->nr_csrows
; i
++) {
425 csrow
= mci
->csrows
[i
];
426 if (!nr_pages_per_csrow(csrow
))
428 err
= edac_create_csrow_object(mci
, mci
->csrows
[i
], i
);
431 "failure: create csrow objects for csrow %d\n",
439 for (--i
; i
>= 0; i
--) {
440 csrow
= mci
->csrows
[i
];
441 if (!nr_pages_per_csrow(csrow
))
443 for (chan
= csrow
->nr_channels
- 1; chan
>= 0; chan
--) {
444 if (!csrow
->channels
[chan
]->dimm
->nr_pages
)
446 device_remove_file(&csrow
->dev
,
447 dynamic_csrow_dimm_attr
[chan
]);
448 device_remove_file(&csrow
->dev
,
449 dynamic_csrow_ce_count_attr
[chan
]);
451 put_device(&mci
->csrows
[i
]->dev
);
457 static void edac_delete_csrow_objects(struct mem_ctl_info
*mci
)
460 struct csrow_info
*csrow
;
462 for (i
= mci
->nr_csrows
- 1; i
>= 0; i
--) {
463 csrow
= mci
->csrows
[i
];
464 if (!nr_pages_per_csrow(csrow
))
466 for (chan
= csrow
->nr_channels
- 1; chan
>= 0; chan
--) {
467 if (!csrow
->channels
[chan
]->dimm
->nr_pages
)
469 edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
471 device_remove_file(&csrow
->dev
,
472 dynamic_csrow_dimm_attr
[chan
]);
473 device_remove_file(&csrow
->dev
,
474 dynamic_csrow_ce_count_attr
[chan
]);
476 device_unregister(&mci
->csrows
[i
]->dev
);
482 * Per-dimm (or per-rank) devices
485 #define to_dimm(k) container_of(k, struct dimm_info, dev)
487 /* show/store functions for DIMM Label attributes */
488 static ssize_t
dimmdev_location_show(struct device
*dev
,
489 struct device_attribute
*mattr
, char *data
)
491 struct dimm_info
*dimm
= to_dimm(dev
);
493 return edac_dimm_info_location(dimm
, data
, PAGE_SIZE
);
496 static ssize_t
dimmdev_label_show(struct device
*dev
,
497 struct device_attribute
*mattr
, char *data
)
499 struct dimm_info
*dimm
= to_dimm(dev
);
501 /* if field has not been initialized, there is nothing to send */
505 return snprintf(data
, EDAC_MC_LABEL_LEN
, "%s\n", dimm
->label
);
508 static ssize_t
dimmdev_label_store(struct device
*dev
,
509 struct device_attribute
*mattr
,
513 struct dimm_info
*dimm
= to_dimm(dev
);
515 ssize_t max_size
= 0;
517 max_size
= min((ssize_t
) count
, (ssize_t
) EDAC_MC_LABEL_LEN
- 1);
518 strncpy(dimm
->label
, data
, max_size
);
519 dimm
->label
[max_size
] = '\0';
524 static ssize_t
dimmdev_size_show(struct device
*dev
,
525 struct device_attribute
*mattr
, char *data
)
527 struct dimm_info
*dimm
= to_dimm(dev
);
529 return sprintf(data
, "%u\n", PAGES_TO_MiB(dimm
->nr_pages
));
532 static ssize_t
dimmdev_mem_type_show(struct device
*dev
,
533 struct device_attribute
*mattr
, char *data
)
535 struct dimm_info
*dimm
= to_dimm(dev
);
537 return sprintf(data
, "%s\n", mem_types
[dimm
->mtype
]);
540 static ssize_t
dimmdev_dev_type_show(struct device
*dev
,
541 struct device_attribute
*mattr
, char *data
)
543 struct dimm_info
*dimm
= to_dimm(dev
);
545 return sprintf(data
, "%s\n", dev_types
[dimm
->dtype
]);
548 static ssize_t
dimmdev_edac_mode_show(struct device
*dev
,
549 struct device_attribute
*mattr
,
552 struct dimm_info
*dimm
= to_dimm(dev
);
554 return sprintf(data
, "%s\n", edac_caps
[dimm
->edac_mode
]);
557 /* dimm/rank attribute files */
558 static DEVICE_ATTR(dimm_label
, S_IRUGO
| S_IWUSR
,
559 dimmdev_label_show
, dimmdev_label_store
);
560 static DEVICE_ATTR(dimm_location
, S_IRUGO
, dimmdev_location_show
, NULL
);
561 static DEVICE_ATTR(size
, S_IRUGO
, dimmdev_size_show
, NULL
);
562 static DEVICE_ATTR(dimm_mem_type
, S_IRUGO
, dimmdev_mem_type_show
, NULL
);
563 static DEVICE_ATTR(dimm_dev_type
, S_IRUGO
, dimmdev_dev_type_show
, NULL
);
564 static DEVICE_ATTR(dimm_edac_mode
, S_IRUGO
, dimmdev_edac_mode_show
, NULL
);
566 /* attributes of the dimm<id>/rank<id> object */
567 static struct attribute
*dimm_attrs
[] = {
568 &dev_attr_dimm_label
.attr
,
569 &dev_attr_dimm_location
.attr
,
571 &dev_attr_dimm_mem_type
.attr
,
572 &dev_attr_dimm_dev_type
.attr
,
573 &dev_attr_dimm_edac_mode
.attr
,
577 static struct attribute_group dimm_attr_grp
= {
581 static const struct attribute_group
*dimm_attr_groups
[] = {
586 static void dimm_attr_release(struct device
*dev
)
588 struct dimm_info
*dimm
= container_of(dev
, struct dimm_info
, dev
);
590 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev
));
594 static struct device_type dimm_attr_type
= {
595 .groups
= dimm_attr_groups
,
596 .release
= dimm_attr_release
,
599 /* Create a DIMM object under specifed memory controller device */
600 static int edac_create_dimm_object(struct mem_ctl_info
*mci
,
601 struct dimm_info
*dimm
,
607 dimm
->dev
.type
= &dimm_attr_type
;
608 dimm
->dev
.bus
= &mci
->bus
;
609 device_initialize(&dimm
->dev
);
611 dimm
->dev
.parent
= &mci
->dev
;
613 dev_set_name(&dimm
->dev
, "rank%d", index
);
615 dev_set_name(&dimm
->dev
, "dimm%d", index
);
616 dev_set_drvdata(&dimm
->dev
, dimm
);
617 pm_runtime_forbid(&mci
->dev
);
619 err
= device_add(&dimm
->dev
);
621 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm
->dev
));
627 * Memory controller device
630 #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
632 static ssize_t
mci_reset_counters_store(struct device
*dev
,
633 struct device_attribute
*mattr
,
634 const char *data
, size_t count
)
636 struct mem_ctl_info
*mci
= to_mci(dev
);
637 int cnt
, row
, chan
, i
;
640 mci
->ue_noinfo_count
= 0;
641 mci
->ce_noinfo_count
= 0;
643 for (row
= 0; row
< mci
->nr_csrows
; row
++) {
644 struct csrow_info
*ri
= mci
->csrows
[row
];
649 for (chan
= 0; chan
< ri
->nr_channels
; chan
++)
650 ri
->channels
[chan
]->ce_count
= 0;
654 for (i
= 0; i
< mci
->n_layers
; i
++) {
655 cnt
*= mci
->layers
[i
].size
;
656 memset(mci
->ce_per_layer
[i
], 0, cnt
* sizeof(u32
));
657 memset(mci
->ue_per_layer
[i
], 0, cnt
* sizeof(u32
));
660 mci
->start_time
= jiffies
;
664 /* Memory scrubbing interface:
666 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
667 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
668 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
670 * Negative value still means that an error has occurred while setting
673 static ssize_t
mci_sdram_scrub_rate_store(struct device
*dev
,
674 struct device_attribute
*mattr
,
675 const char *data
, size_t count
)
677 struct mem_ctl_info
*mci
= to_mci(dev
);
678 unsigned long bandwidth
= 0;
681 if (strict_strtoul(data
, 10, &bandwidth
) < 0)
684 new_bw
= mci
->set_sdram_scrub_rate(mci
, bandwidth
);
686 edac_printk(KERN_WARNING
, EDAC_MC
,
687 "Error setting scrub rate to: %lu\n", bandwidth
);
695 * ->get_sdram_scrub_rate() return value semantics same as above.
697 static ssize_t
mci_sdram_scrub_rate_show(struct device
*dev
,
698 struct device_attribute
*mattr
,
701 struct mem_ctl_info
*mci
= to_mci(dev
);
704 bandwidth
= mci
->get_sdram_scrub_rate(mci
);
706 edac_printk(KERN_DEBUG
, EDAC_MC
, "Error reading scrub rate\n");
710 return sprintf(data
, "%d\n", bandwidth
);
713 /* default attribute files for the MCI object */
714 static ssize_t
mci_ue_count_show(struct device
*dev
,
715 struct device_attribute
*mattr
,
718 struct mem_ctl_info
*mci
= to_mci(dev
);
720 return sprintf(data
, "%d\n", mci
->ue_mc
);
723 static ssize_t
mci_ce_count_show(struct device
*dev
,
724 struct device_attribute
*mattr
,
727 struct mem_ctl_info
*mci
= to_mci(dev
);
729 return sprintf(data
, "%d\n", mci
->ce_mc
);
732 static ssize_t
mci_ce_noinfo_show(struct device
*dev
,
733 struct device_attribute
*mattr
,
736 struct mem_ctl_info
*mci
= to_mci(dev
);
738 return sprintf(data
, "%d\n", mci
->ce_noinfo_count
);
741 static ssize_t
mci_ue_noinfo_show(struct device
*dev
,
742 struct device_attribute
*mattr
,
745 struct mem_ctl_info
*mci
= to_mci(dev
);
747 return sprintf(data
, "%d\n", mci
->ue_noinfo_count
);
750 static ssize_t
mci_seconds_show(struct device
*dev
,
751 struct device_attribute
*mattr
,
754 struct mem_ctl_info
*mci
= to_mci(dev
);
756 return sprintf(data
, "%ld\n", (jiffies
- mci
->start_time
) / HZ
);
759 static ssize_t
mci_ctl_name_show(struct device
*dev
,
760 struct device_attribute
*mattr
,
763 struct mem_ctl_info
*mci
= to_mci(dev
);
765 return sprintf(data
, "%s\n", mci
->ctl_name
);
768 static ssize_t
mci_size_mb_show(struct device
*dev
,
769 struct device_attribute
*mattr
,
772 struct mem_ctl_info
*mci
= to_mci(dev
);
773 int total_pages
= 0, csrow_idx
, j
;
775 for (csrow_idx
= 0; csrow_idx
< mci
->nr_csrows
; csrow_idx
++) {
776 struct csrow_info
*csrow
= mci
->csrows
[csrow_idx
];
778 for (j
= 0; j
< csrow
->nr_channels
; j
++) {
779 struct dimm_info
*dimm
= csrow
->channels
[j
]->dimm
;
781 total_pages
+= dimm
->nr_pages
;
785 return sprintf(data
, "%u\n", PAGES_TO_MiB(total_pages
));
788 static ssize_t
mci_max_location_show(struct device
*dev
,
789 struct device_attribute
*mattr
,
792 struct mem_ctl_info
*mci
= to_mci(dev
);
796 for (i
= 0; i
< mci
->n_layers
; i
++) {
797 p
+= sprintf(p
, "%s %d ",
798 edac_layer_name
[mci
->layers
[i
].type
],
799 mci
->layers
[i
].size
- 1);
805 #ifdef CONFIG_EDAC_DEBUG
806 static ssize_t
edac_fake_inject_write(struct file
*file
,
807 const char __user
*data
,
808 size_t count
, loff_t
*ppos
)
810 struct device
*dev
= file
->private_data
;
811 struct mem_ctl_info
*mci
= to_mci(dev
);
812 static enum hw_event_mc_err_type type
;
813 u16 errcount
= mci
->fake_inject_count
;
818 type
= mci
->fake_inject_ue
? HW_EVENT_ERR_UNCORRECTED
819 : HW_EVENT_ERR_CORRECTED
;
822 "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
824 (type
== HW_EVENT_ERR_UNCORRECTED
) ? "UE" : "CE",
825 errcount
> 1 ? "s" : "",
826 mci
->fake_inject_layer
[0],
827 mci
->fake_inject_layer
[1],
828 mci
->fake_inject_layer
[2]
830 edac_mc_handle_error(type
, mci
, errcount
, 0, 0, 0,
831 mci
->fake_inject_layer
[0],
832 mci
->fake_inject_layer
[1],
833 mci
->fake_inject_layer
[2],
834 "FAKE ERROR", "for EDAC testing only");
839 static const struct file_operations debug_fake_inject_fops
= {
841 .write
= edac_fake_inject_write
,
842 .llseek
= generic_file_llseek
,
846 /* default Control file */
847 DEVICE_ATTR(reset_counters
, S_IWUSR
, NULL
, mci_reset_counters_store
);
849 /* default Attribute files */
850 DEVICE_ATTR(mc_name
, S_IRUGO
, mci_ctl_name_show
, NULL
);
851 DEVICE_ATTR(size_mb
, S_IRUGO
, mci_size_mb_show
, NULL
);
852 DEVICE_ATTR(seconds_since_reset
, S_IRUGO
, mci_seconds_show
, NULL
);
853 DEVICE_ATTR(ue_noinfo_count
, S_IRUGO
, mci_ue_noinfo_show
, NULL
);
854 DEVICE_ATTR(ce_noinfo_count
, S_IRUGO
, mci_ce_noinfo_show
, NULL
);
855 DEVICE_ATTR(ue_count
, S_IRUGO
, mci_ue_count_show
, NULL
);
856 DEVICE_ATTR(ce_count
, S_IRUGO
, mci_ce_count_show
, NULL
);
857 DEVICE_ATTR(max_location
, S_IRUGO
, mci_max_location_show
, NULL
);
859 /* memory scrubber attribute file */
860 DEVICE_ATTR(sdram_scrub_rate
, 0, NULL
, NULL
);
862 static struct attribute
*mci_attrs
[] = {
863 &dev_attr_reset_counters
.attr
,
864 &dev_attr_mc_name
.attr
,
865 &dev_attr_size_mb
.attr
,
866 &dev_attr_seconds_since_reset
.attr
,
867 &dev_attr_ue_noinfo_count
.attr
,
868 &dev_attr_ce_noinfo_count
.attr
,
869 &dev_attr_ue_count
.attr
,
870 &dev_attr_ce_count
.attr
,
871 &dev_attr_max_location
.attr
,
875 static struct attribute_group mci_attr_grp
= {
879 static const struct attribute_group
*mci_attr_groups
[] = {
884 static void mci_attr_release(struct device
*dev
)
886 struct mem_ctl_info
*mci
= container_of(dev
, struct mem_ctl_info
, dev
);
888 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev
));
892 static struct device_type mci_attr_type
= {
893 .groups
= mci_attr_groups
,
894 .release
= mci_attr_release
,
897 #ifdef CONFIG_EDAC_DEBUG
898 static struct dentry
*edac_debugfs
;
900 int __init
edac_debugfs_init(void)
902 edac_debugfs
= debugfs_create_dir("edac", NULL
);
903 if (IS_ERR(edac_debugfs
)) {
910 void __exit
edac_debugfs_exit(void)
912 debugfs_remove(edac_debugfs
);
915 int edac_create_debug_nodes(struct mem_ctl_info
*mci
)
917 struct dentry
*d
, *parent
;
924 d
= debugfs_create_dir(mci
->dev
.kobj
.name
, edac_debugfs
);
929 for (i
= 0; i
< mci
->n_layers
; i
++) {
930 sprintf(name
, "fake_inject_%s",
931 edac_layer_name
[mci
->layers
[i
].type
]);
932 d
= debugfs_create_u8(name
, S_IRUGO
| S_IWUSR
, parent
,
933 &mci
->fake_inject_layer
[i
]);
938 d
= debugfs_create_bool("fake_inject_ue", S_IRUGO
| S_IWUSR
, parent
,
939 &mci
->fake_inject_ue
);
943 d
= debugfs_create_u16("fake_inject_count", S_IRUGO
| S_IWUSR
, parent
,
944 &mci
->fake_inject_count
);
948 d
= debugfs_create_file("fake_inject", S_IWUSR
, parent
,
950 &debug_fake_inject_fops
);
954 mci
->debugfs
= parent
;
957 debugfs_remove(mci
->debugfs
);
963 * Create a new Memory Controller kobject instance,
964 * mc<id> under the 'mc' directory
970 int edac_create_sysfs_mci_device(struct mem_ctl_info
*mci
)
975 * The memory controller needs its own bus, in order to avoid
976 * namespace conflicts at /sys/bus/edac.
978 mci
->bus
.name
= kasprintf(GFP_KERNEL
, "mc%d", mci
->mc_idx
);
981 edac_dbg(0, "creating bus %s\n", mci
->bus
.name
);
982 err
= bus_register(&mci
->bus
);
986 /* get the /sys/devices/system/edac subsys reference */
987 mci
->dev
.type
= &mci_attr_type
;
988 device_initialize(&mci
->dev
);
990 mci
->dev
.parent
= mci_pdev
;
991 mci
->dev
.bus
= &mci
->bus
;
992 dev_set_name(&mci
->dev
, "mc%d", mci
->mc_idx
);
993 dev_set_drvdata(&mci
->dev
, mci
);
994 pm_runtime_forbid(&mci
->dev
);
996 edac_dbg(0, "creating device %s\n", dev_name(&mci
->dev
));
997 err
= device_add(&mci
->dev
);
999 edac_dbg(1, "failure: create device %s\n", dev_name(&mci
->dev
));
1000 bus_unregister(&mci
->bus
);
1001 kfree(mci
->bus
.name
);
1005 if (mci
->set_sdram_scrub_rate
|| mci
->get_sdram_scrub_rate
) {
1006 if (mci
->get_sdram_scrub_rate
) {
1007 dev_attr_sdram_scrub_rate
.attr
.mode
|= S_IRUGO
;
1008 dev_attr_sdram_scrub_rate
.show
= &mci_sdram_scrub_rate_show
;
1010 if (mci
->set_sdram_scrub_rate
) {
1011 dev_attr_sdram_scrub_rate
.attr
.mode
|= S_IWUSR
;
1012 dev_attr_sdram_scrub_rate
.store
= &mci_sdram_scrub_rate_store
;
1014 err
= device_create_file(&mci
->dev
,
1015 &dev_attr_sdram_scrub_rate
);
1017 edac_dbg(1, "failure: create sdram_scrub_rate\n");
1022 * Create the dimm/rank devices
1024 for (i
= 0; i
< mci
->tot_dimms
; i
++) {
1025 struct dimm_info
*dimm
= mci
->dimms
[i
];
1026 /* Only expose populated DIMMs */
1027 if (dimm
->nr_pages
== 0)
1029 #ifdef CONFIG_EDAC_DEBUG
1030 edac_dbg(1, "creating dimm%d, located at ", i
);
1031 if (edac_debug_level
>= 1) {
1033 for (lay
= 0; lay
< mci
->n_layers
; lay
++)
1034 printk(KERN_CONT
"%s %d ",
1035 edac_layer_name
[mci
->layers
[lay
].type
],
1036 dimm
->location
[lay
]);
1037 printk(KERN_CONT
"\n");
1040 err
= edac_create_dimm_object(mci
, dimm
, i
);
1042 edac_dbg(1, "failure: create dimm %d obj\n", i
);
1047 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1048 err
= edac_create_csrow_objects(mci
);
1053 #ifdef CONFIG_EDAC_DEBUG
1054 edac_create_debug_nodes(mci
);
1059 for (i
--; i
>= 0; i
--) {
1060 struct dimm_info
*dimm
= mci
->dimms
[i
];
1061 if (dimm
->nr_pages
== 0)
1063 device_unregister(&dimm
->dev
);
1066 device_unregister(&mci
->dev
);
1067 bus_unregister(&mci
->bus
);
1068 kfree(mci
->bus
.name
);
1073 * remove a Memory Controller instance
1075 void edac_remove_sysfs_mci_device(struct mem_ctl_info
*mci
)
1081 #ifdef CONFIG_EDAC_DEBUG
1082 debugfs_remove(mci
->debugfs
);
1084 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1085 edac_delete_csrow_objects(mci
);
1088 for (i
= 0; i
< mci
->tot_dimms
; i
++) {
1089 struct dimm_info
*dimm
= mci
->dimms
[i
];
1090 if (dimm
->nr_pages
== 0)
1092 edac_dbg(0, "removing device %s\n", dev_name(&dimm
->dev
));
1093 device_unregister(&dimm
->dev
);
1097 void edac_unregister_sysfs(struct mem_ctl_info
*mci
)
1099 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci
->dev
));
1100 device_unregister(&mci
->dev
);
1101 bus_unregister(&mci
->bus
);
1102 kfree(mci
->bus
.name
);
1105 static void mc_attr_release(struct device
*dev
)
1108 * There's no container structure here, as this is just the mci
1109 * parent device, used to create the /sys/devices/mc sysfs node.
1110 * So, there are no attributes on it.
1112 edac_dbg(1, "Releasing device %s\n", dev_name(dev
));
1116 static struct device_type mc_attr_type
= {
1117 .release
= mc_attr_release
,
1120 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
1122 int __init
edac_mc_sysfs_init(void)
1124 struct bus_type
*edac_subsys
;
1127 /* get the /sys/devices/system/edac subsys reference */
1128 edac_subsys
= edac_get_sysfs_subsys();
1129 if (edac_subsys
== NULL
) {
1130 edac_dbg(1, "no edac_subsys\n");
1135 mci_pdev
= kzalloc(sizeof(*mci_pdev
), GFP_KERNEL
);
1141 mci_pdev
->bus
= edac_subsys
;
1142 mci_pdev
->type
= &mc_attr_type
;
1143 device_initialize(mci_pdev
);
1144 dev_set_name(mci_pdev
, "mc");
1146 err
= device_add(mci_pdev
);
1150 edac_dbg(0, "device %s created\n", dev_name(mci_pdev
));
1157 edac_put_sysfs_subsys();
1162 void __exit
edac_mc_sysfs_exit(void)
1164 device_unregister(mci_pdev
);
1165 edac_put_sysfs_subsys();