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[NET]: Fix interrupt semaphore corruption in Intel drivers.
[linux-2.6/libata-dev.git] / drivers / net / e1000 / e1000_main.c
blob76c0fa690cc6adb60e0ab94d1e4cf7cbb6cbb00f
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 const char e1000_driver_version[] = DRV_VERSION;
41 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10A5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
105 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
108 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
110 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
111 INTEL_E1000_ETHERNET_DEVICE(0x10D5),
112 INTEL_E1000_ETHERNET_DEVICE(0x10D9),
113 INTEL_E1000_ETHERNET_DEVICE(0x10DA),
114 /* required last entry */
115 {0,}
116 };
117
118 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
119
120 int e1000_up(struct e1000_adapter *adapter);
121 void e1000_down(struct e1000_adapter *adapter);
122 void e1000_reinit_locked(struct e1000_adapter *adapter);
123 void e1000_reset(struct e1000_adapter *adapter);
124 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
125 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
126 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
127 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
128 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
129 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *txdr);
131 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rxdr);
133 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
134 struct e1000_tx_ring *tx_ring);
135 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
136 struct e1000_rx_ring *rx_ring);
137 void e1000_update_stats(struct e1000_adapter *adapter);
138
139 static int e1000_init_module(void);
140 static void e1000_exit_module(void);
141 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
142 static void __devexit e1000_remove(struct pci_dev *pdev);
143 static int e1000_alloc_queues(struct e1000_adapter *adapter);
144 static int e1000_sw_init(struct e1000_adapter *adapter);
145 static int e1000_open(struct net_device *netdev);
146 static int e1000_close(struct net_device *netdev);
147 static void e1000_configure_tx(struct e1000_adapter *adapter);
148 static void e1000_configure_rx(struct e1000_adapter *adapter);
149 static void e1000_setup_rctl(struct e1000_adapter *adapter);
150 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
151 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
152 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
153 struct e1000_tx_ring *tx_ring);
154 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
155 struct e1000_rx_ring *rx_ring);
156 static void e1000_set_multi(struct net_device *netdev);
157 static void e1000_update_phy_info(unsigned long data);
158 static void e1000_watchdog(unsigned long data);
159 static void e1000_82547_tx_fifo_stall(unsigned long data);
160 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
161 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
162 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
163 static int e1000_set_mac(struct net_device *netdev, void *p);
164 static irqreturn_t e1000_intr(int irq, void *data);
165 static irqreturn_t e1000_intr_msi(int irq, void *data);
166 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
167 struct e1000_tx_ring *tx_ring);
168 #ifdef CONFIG_E1000_NAPI
169 static int e1000_clean(struct napi_struct *napi, int budget);
170 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring,
172 int *work_done, int work_to_do);
173 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring,
175 int *work_done, int work_to_do);
176 #else
177 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rx_ring);
181 #endif
182 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
183 struct e1000_rx_ring *rx_ring,
184 int cleaned_count);
185 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
186 struct e1000_rx_ring *rx_ring,
187 int cleaned_count);
188 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
189 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
190 int cmd);
191 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
193 static void e1000_tx_timeout(struct net_device *dev);
194 static void e1000_reset_task(struct work_struct *work);
195 static void e1000_smartspeed(struct e1000_adapter *adapter);
196 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
197 struct sk_buff *skb);
198
199 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
200 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
202 static void e1000_restore_vlan(struct e1000_adapter *adapter);
203
204 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
205 #ifdef CONFIG_PM
206 static int e1000_resume(struct pci_dev *pdev);
207 #endif
208 static void e1000_shutdown(struct pci_dev *pdev);
209
210 #ifdef CONFIG_NET_POLL_CONTROLLER
211 /* for netdump / net console */
212 static void e1000_netpoll (struct net_device *netdev);
213 #endif
214
215 #define COPYBREAK_DEFAULT 256
216 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
217 module_param(copybreak, uint, 0644);
218 MODULE_PARM_DESC(copybreak,
219 "Maximum size of packet that is copied to a new buffer on receive");
220
221 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
222 pci_channel_state_t state);
223 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
224 static void e1000_io_resume(struct pci_dev *pdev);
225
226 static struct pci_error_handlers e1000_err_handler = {
227 .error_detected = e1000_io_error_detected,
228 .slot_reset = e1000_io_slot_reset,
229 .resume = e1000_io_resume,
230 };
231
232 static struct pci_driver e1000_driver = {
233 .name = e1000_driver_name,
234 .id_table = e1000_pci_tbl,
235 .probe = e1000_probe,
236 .remove = __devexit_p(e1000_remove),
237 #ifdef CONFIG_PM
238 /* Power Managment Hooks */
239 .suspend = e1000_suspend,
240 .resume = e1000_resume,
241 #endif
242 .shutdown = e1000_shutdown,
243 .err_handler = &e1000_err_handler
244 };
245
246 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
247 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
248 MODULE_LICENSE("GPL");
249 MODULE_VERSION(DRV_VERSION);
250
251 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
252 module_param(debug, int, 0);
253 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
254
255 /**
256 * e1000_init_module - Driver Registration Routine
257 *
258 * e1000_init_module is the first routine called when the driver is
259 * loaded. All it does is register with the PCI subsystem.
260 **/
261
262 static int __init
263 e1000_init_module(void)
264 {
265 int ret;
266 printk(KERN_INFO "%s - version %s\n",
267 e1000_driver_string, e1000_driver_version);
268
269 printk(KERN_INFO "%s\n", e1000_copyright);
270
271 ret = pci_register_driver(&e1000_driver);
272 if (copybreak != COPYBREAK_DEFAULT) {
273 if (copybreak == 0)
274 printk(KERN_INFO "e1000: copybreak disabled\n");
275 else
276 printk(KERN_INFO "e1000: copybreak enabled for "
277 "packets <= %u bytes\n", copybreak);
278 }
279 return ret;
280 }
281
282 module_init(e1000_init_module);
283
284 /**
285 * e1000_exit_module - Driver Exit Cleanup Routine
286 *
287 * e1000_exit_module is called just before the driver is removed
288 * from memory.
289 **/
290
291 static void __exit
292 e1000_exit_module(void)
293 {
294 pci_unregister_driver(&e1000_driver);
295 }
296
297 module_exit(e1000_exit_module);
298
299 static int e1000_request_irq(struct e1000_adapter *adapter)
300 {
301 struct net_device *netdev = adapter->netdev;
302 void (*handler) = &e1000_intr;
303 int irq_flags = IRQF_SHARED;
304 int err;
305
306 if (adapter->hw.mac_type >= e1000_82571) {
307 adapter->have_msi = !pci_enable_msi(adapter->pdev);
308 if (adapter->have_msi) {
309 handler = &e1000_intr_msi;
310 irq_flags = 0;
311 }
312 }
313
314 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
315 netdev);
316 if (err) {
317 if (adapter->have_msi)
318 pci_disable_msi(adapter->pdev);
319 DPRINTK(PROBE, ERR,
320 "Unable to allocate interrupt Error: %d\n", err);
321 }
322
323 return err;
324 }
325
326 static void e1000_free_irq(struct e1000_adapter *adapter)
327 {
328 struct net_device *netdev = adapter->netdev;
329
330 free_irq(adapter->pdev->irq, netdev);
331
332 if (adapter->have_msi)
333 pci_disable_msi(adapter->pdev);
334 }
335
336 /**
337 * e1000_irq_disable - Mask off interrupt generation on the NIC
338 * @adapter: board private structure
339 **/
340
341 static void
342 e1000_irq_disable(struct e1000_adapter *adapter)
343 {
344 atomic_inc(&adapter->irq_sem);
345 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
346 E1000_WRITE_FLUSH(&adapter->hw);
347 synchronize_irq(adapter->pdev->irq);
348 }
349
350 /**
351 * e1000_irq_enable - Enable default interrupt generation settings
352 * @adapter: board private structure
353 **/
354
355 static void
356 e1000_irq_enable(struct e1000_adapter *adapter)
357 {
358 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
359 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
360 E1000_WRITE_FLUSH(&adapter->hw);
361 }
362 }
363
364 static void
365 e1000_update_mng_vlan(struct e1000_adapter *adapter)
366 {
367 struct net_device *netdev = adapter->netdev;
368 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
369 uint16_t old_vid = adapter->mng_vlan_id;
370 if (adapter->vlgrp) {
371 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
372 if (adapter->hw.mng_cookie.status &
373 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
374 e1000_vlan_rx_add_vid(netdev, vid);
375 adapter->mng_vlan_id = vid;
376 } else
377 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
378
379 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
380 (vid != old_vid) &&
381 !vlan_group_get_device(adapter->vlgrp, old_vid))
382 e1000_vlan_rx_kill_vid(netdev, old_vid);
383 } else
384 adapter->mng_vlan_id = vid;
385 }
386 }
387
388 /**
389 * e1000_release_hw_control - release control of the h/w to f/w
390 * @adapter: address of board private structure
391 *
392 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
393 * For ASF and Pass Through versions of f/w this means that the
394 * driver is no longer loaded. For AMT version (only with 82573) i
395 * of the f/w this means that the network i/f is closed.
396 *
397 **/
398
399 static void
400 e1000_release_hw_control(struct e1000_adapter *adapter)
401 {
402 uint32_t ctrl_ext;
403 uint32_t swsm;
404
405 /* Let firmware taken over control of h/w */
406 switch (adapter->hw.mac_type) {
407 case e1000_82573:
408 swsm = E1000_READ_REG(&adapter->hw, SWSM);
409 E1000_WRITE_REG(&adapter->hw, SWSM,
410 swsm & ~E1000_SWSM_DRV_LOAD);
411 break;
412 case e1000_82571:
413 case e1000_82572:
414 case e1000_80003es2lan:
415 case e1000_ich8lan:
416 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
417 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
418 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
419 break;
420 default:
421 break;
422 }
423 }
424
425 /**
426 * e1000_get_hw_control - get control of the h/w from f/w
427 * @adapter: address of board private structure
428 *
429 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
430 * For ASF and Pass Through versions of f/w this means that
431 * the driver is loaded. For AMT version (only with 82573)
432 * of the f/w this means that the network i/f is open.
433 *
434 **/
435
436 static void
437 e1000_get_hw_control(struct e1000_adapter *adapter)
438 {
439 uint32_t ctrl_ext;
440 uint32_t swsm;
441
442 /* Let firmware know the driver has taken over */
443 switch (adapter->hw.mac_type) {
444 case e1000_82573:
445 swsm = E1000_READ_REG(&adapter->hw, SWSM);
446 E1000_WRITE_REG(&adapter->hw, SWSM,
447 swsm | E1000_SWSM_DRV_LOAD);
448 break;
449 case e1000_82571:
450 case e1000_82572:
451 case e1000_80003es2lan:
452 case e1000_ich8lan:
453 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
454 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
455 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
456 break;
457 default:
458 break;
459 }
460 }
461
462 static void
463 e1000_init_manageability(struct e1000_adapter *adapter)
464 {
465 if (adapter->en_mng_pt) {
466 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
467
468 /* disable hardware interception of ARP */
469 manc &= ~(E1000_MANC_ARP_EN);
470
471 /* enable receiving management packets to the host */
472 /* this will probably generate destination unreachable messages
473 * from the host OS, but the packets will be handled on SMBUS */
474 if (adapter->hw.has_manc2h) {
475 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
476
477 manc |= E1000_MANC_EN_MNG2HOST;
478 #define E1000_MNG2HOST_PORT_623 (1 << 5)
479 #define E1000_MNG2HOST_PORT_664 (1 << 6)
480 manc2h |= E1000_MNG2HOST_PORT_623;
481 manc2h |= E1000_MNG2HOST_PORT_664;
482 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
483 }
484
485 E1000_WRITE_REG(&adapter->hw, MANC, manc);
486 }
487 }
488
489 static void
490 e1000_release_manageability(struct e1000_adapter *adapter)
491 {
492 if (adapter->en_mng_pt) {
493 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
494
495 /* re-enable hardware interception of ARP */
496 manc |= E1000_MANC_ARP_EN;
497
498 if (adapter->hw.has_manc2h)
499 manc &= ~E1000_MANC_EN_MNG2HOST;
500
501 /* don't explicitly have to mess with MANC2H since
502 * MANC has an enable disable that gates MANC2H */
503
504 E1000_WRITE_REG(&adapter->hw, MANC, manc);
505 }
506 }
507
508 /**
509 * e1000_configure - configure the hardware for RX and TX
510 * @adapter = private board structure
511 **/
512 static void e1000_configure(struct e1000_adapter *adapter)
513 {
514 struct net_device *netdev = adapter->netdev;
515 int i;
516
517 e1000_set_multi(netdev);
518
519 e1000_restore_vlan(adapter);
520 e1000_init_manageability(adapter);
521
522 e1000_configure_tx(adapter);
523 e1000_setup_rctl(adapter);
524 e1000_configure_rx(adapter);
525 /* call E1000_DESC_UNUSED which always leaves
526 * at least 1 descriptor unused to make sure
527 * next_to_use != next_to_clean */
528 for (i = 0; i < adapter->num_rx_queues; i++) {
529 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
530 adapter->alloc_rx_buf(adapter, ring,
531 E1000_DESC_UNUSED(ring));
532 }
533
534 adapter->tx_queue_len = netdev->tx_queue_len;
535 }
536
537 int e1000_up(struct e1000_adapter *adapter)
538 {
539 /* hardware has been reset, we need to reload some things */
540 e1000_configure(adapter);
541
542 clear_bit(__E1000_DOWN, &adapter->flags);
543
544 #ifdef CONFIG_E1000_NAPI
545 napi_enable(&adapter->napi);
546 #endif
547 e1000_irq_enable(adapter);
548
549 /* fire a link change interrupt to start the watchdog */
550 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
551 return 0;
552 }
553
554 /**
555 * e1000_power_up_phy - restore link in case the phy was powered down
556 * @adapter: address of board private structure
557 *
558 * The phy may be powered down to save power and turn off link when the
559 * driver is unloaded and wake on lan is not enabled (among others)
560 * *** this routine MUST be followed by a call to e1000_reset ***
561 *
562 **/
563
564 void e1000_power_up_phy(struct e1000_adapter *adapter)
565 {
566 uint16_t mii_reg = 0;
567
568 /* Just clear the power down bit to wake the phy back up */
569 if (adapter->hw.media_type == e1000_media_type_copper) {
570 /* according to the manual, the phy will retain its
571 * settings across a power-down/up cycle */
572 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
573 mii_reg &= ~MII_CR_POWER_DOWN;
574 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
575 }
576 }
577
578 static void e1000_power_down_phy(struct e1000_adapter *adapter)
579 {
580 /* Power down the PHY so no link is implied when interface is down *
581 * The PHY cannot be powered down if any of the following is TRUE *
582 * (a) WoL is enabled
583 * (b) AMT is active
584 * (c) SoL/IDER session is active */
585 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
586 adapter->hw.media_type == e1000_media_type_copper) {
587 uint16_t mii_reg = 0;
588
589 switch (adapter->hw.mac_type) {
590 case e1000_82540:
591 case e1000_82545:
592 case e1000_82545_rev_3:
593 case e1000_82546:
594 case e1000_82546_rev_3:
595 case e1000_82541:
596 case e1000_82541_rev_2:
597 case e1000_82547:
598 case e1000_82547_rev_2:
599 if (E1000_READ_REG(&adapter->hw, MANC) &
600 E1000_MANC_SMBUS_EN)
601 goto out;
602 break;
603 case e1000_82571:
604 case e1000_82572:
605 case e1000_82573:
606 case e1000_80003es2lan:
607 case e1000_ich8lan:
608 if (e1000_check_mng_mode(&adapter->hw) ||
609 e1000_check_phy_reset_block(&adapter->hw))
610 goto out;
611 break;
612 default:
613 goto out;
614 }
615 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
616 mii_reg |= MII_CR_POWER_DOWN;
617 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
618 mdelay(1);
619 }
620 out:
621 return;
622 }
623
624 void
625 e1000_down(struct e1000_adapter *adapter)
626 {
627 struct net_device *netdev = adapter->netdev;
628
629 /* signal that we're down so the interrupt handler does not
630 * reschedule our watchdog timer */
631 set_bit(__E1000_DOWN, &adapter->flags);
632
633 #ifdef CONFIG_E1000_NAPI
634 napi_disable(&adapter->napi);
635 atomic_set(&adapter->irq_sem, 0);
636 #endif
637 e1000_irq_disable(adapter);
638
639 del_timer_sync(&adapter->tx_fifo_stall_timer);
640 del_timer_sync(&adapter->watchdog_timer);
641 del_timer_sync(&adapter->phy_info_timer);
642
643 netdev->tx_queue_len = adapter->tx_queue_len;
644 adapter->link_speed = 0;
645 adapter->link_duplex = 0;
646 netif_carrier_off(netdev);
647 netif_stop_queue(netdev);
648
649 e1000_reset(adapter);
650 e1000_clean_all_tx_rings(adapter);
651 e1000_clean_all_rx_rings(adapter);
652 }
653
654 void
655 e1000_reinit_locked(struct e1000_adapter *adapter)
656 {
657 WARN_ON(in_interrupt());
658 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
659 msleep(1);
660 e1000_down(adapter);
661 e1000_up(adapter);
662 clear_bit(__E1000_RESETTING, &adapter->flags);
663 }
664
665 void
666 e1000_reset(struct e1000_adapter *adapter)
667 {
668 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
669 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
670 boolean_t legacy_pba_adjust = FALSE;
671
672 /* Repartition Pba for greater than 9k mtu
673 * To take effect CTRL.RST is required.
674 */
675
676 switch (adapter->hw.mac_type) {
677 case e1000_82542_rev2_0:
678 case e1000_82542_rev2_1:
679 case e1000_82543:
680 case e1000_82544:
681 case e1000_82540:
682 case e1000_82541:
683 case e1000_82541_rev_2:
684 legacy_pba_adjust = TRUE;
685 pba = E1000_PBA_48K;
686 break;
687 case e1000_82545:
688 case e1000_82545_rev_3:
689 case e1000_82546:
690 case e1000_82546_rev_3:
691 pba = E1000_PBA_48K;
692 break;
693 case e1000_82547:
694 case e1000_82547_rev_2:
695 legacy_pba_adjust = TRUE;
696 pba = E1000_PBA_30K;
697 break;
698 case e1000_82571:
699 case e1000_82572:
700 case e1000_80003es2lan:
701 pba = E1000_PBA_38K;
702 break;
703 case e1000_82573:
704 pba = E1000_PBA_20K;
705 break;
706 case e1000_ich8lan:
707 pba = E1000_PBA_8K;
708 case e1000_undefined:
709 case e1000_num_macs:
710 break;
711 }
712
713 if (legacy_pba_adjust == TRUE) {
714 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
715 pba -= 8; /* allocate more FIFO for Tx */
716
717 if (adapter->hw.mac_type == e1000_82547) {
718 adapter->tx_fifo_head = 0;
719 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
720 adapter->tx_fifo_size =
721 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
722 atomic_set(&adapter->tx_fifo_stall, 0);
723 }
724 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
725 /* adjust PBA for jumbo frames */
726 E1000_WRITE_REG(&adapter->hw, PBA, pba);
727
728 /* To maintain wire speed transmits, the Tx FIFO should be
729 * large enough to accomodate two full transmit packets,
730 * rounded up to the next 1KB and expressed in KB. Likewise,
731 * the Rx FIFO should be large enough to accomodate at least
732 * one full receive packet and is similarly rounded up and
733 * expressed in KB. */
734 pba = E1000_READ_REG(&adapter->hw, PBA);
735 /* upper 16 bits has Tx packet buffer allocation size in KB */
736 tx_space = pba >> 16;
737 /* lower 16 bits has Rx packet buffer allocation size in KB */
738 pba &= 0xffff;
739 /* don't include ethernet FCS because hardware appends/strips */
740 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
741 VLAN_TAG_SIZE;
742 min_tx_space = min_rx_space;
743 min_tx_space *= 2;
744 min_tx_space = ALIGN(min_tx_space, 1024);
745 min_tx_space >>= 10;
746 min_rx_space = ALIGN(min_rx_space, 1024);
747 min_rx_space >>= 10;
748
749 /* If current Tx allocation is less than the min Tx FIFO size,
750 * and the min Tx FIFO size is less than the current Rx FIFO
751 * allocation, take space away from current Rx allocation */
752 if (tx_space < min_tx_space &&
753 ((min_tx_space - tx_space) < pba)) {
754 pba = pba - (min_tx_space - tx_space);
755
756 /* PCI/PCIx hardware has PBA alignment constraints */
757 switch (adapter->hw.mac_type) {
758 case e1000_82545 ... e1000_82546_rev_3:
759 pba &= ~(E1000_PBA_8K - 1);
760 break;
761 default:
762 break;
763 }
764
765 /* if short on rx space, rx wins and must trump tx
766 * adjustment or use Early Receive if available */
767 if (pba < min_rx_space) {
768 switch (adapter->hw.mac_type) {
769 case e1000_82573:
770 /* ERT enabled in e1000_configure_rx */
771 break;
772 default:
773 pba = min_rx_space;
774 break;
775 }
776 }
777 }
778 }
779
780 E1000_WRITE_REG(&adapter->hw, PBA, pba);
781
782 /* flow control settings */
783 /* Set the FC high water mark to 90% of the FIFO size.
784 * Required to clear last 3 LSB */
785 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
786 /* We can't use 90% on small FIFOs because the remainder
787 * would be less than 1 full frame. In this case, we size
788 * it to allow at least a full frame above the high water
789 * mark. */
790 if (pba < E1000_PBA_16K)
791 fc_high_water_mark = (pba * 1024) - 1600;
792
793 adapter->hw.fc_high_water = fc_high_water_mark;
794 adapter->hw.fc_low_water = fc_high_water_mark - 8;
795 if (adapter->hw.mac_type == e1000_80003es2lan)
796 adapter->hw.fc_pause_time = 0xFFFF;
797 else
798 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
799 adapter->hw.fc_send_xon = 1;
800 adapter->hw.fc = adapter->hw.original_fc;
801
802 /* Allow time for pending master requests to run */
803 e1000_reset_hw(&adapter->hw);
804 if (adapter->hw.mac_type >= e1000_82544)
805 E1000_WRITE_REG(&adapter->hw, WUC, 0);
806
807 if (e1000_init_hw(&adapter->hw))
808 DPRINTK(PROBE, ERR, "Hardware Error\n");
809 e1000_update_mng_vlan(adapter);
810
811 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
812 if (adapter->hw.mac_type >= e1000_82544 &&
813 adapter->hw.mac_type <= e1000_82547_rev_2 &&
814 adapter->hw.autoneg == 1 &&
815 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
816 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
817 /* clear phy power management bit if we are in gig only mode,
818 * which if enabled will attempt negotiation to 100Mb, which
819 * can cause a loss of link at power off or driver unload */
820 ctrl &= ~E1000_CTRL_SWDPIN3;
821 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
822 }
823
824 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
825 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
826
827 e1000_reset_adaptive(&adapter->hw);
828 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
829
830 if (!adapter->smart_power_down &&
831 (adapter->hw.mac_type == e1000_82571 ||
832 adapter->hw.mac_type == e1000_82572)) {
833 uint16_t phy_data = 0;
834 /* speed up time to link by disabling smart power down, ignore
835 * the return value of this function because there is nothing
836 * different we would do if it failed */
837 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
838 &phy_data);
839 phy_data &= ~IGP02E1000_PM_SPD;
840 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
841 phy_data);
842 }
843
844 e1000_release_manageability(adapter);
845 }
846
847 /**
848 * e1000_probe - Device Initialization Routine
849 * @pdev: PCI device information struct
850 * @ent: entry in e1000_pci_tbl
851 *
852 * Returns 0 on success, negative on failure
853 *
854 * e1000_probe initializes an adapter identified by a pci_dev structure.
855 * The OS initialization, configuring of the adapter private structure,
856 * and a hardware reset occur.
857 **/
858
859 static int __devinit
860 e1000_probe(struct pci_dev *pdev,
861 const struct pci_device_id *ent)
862 {
863 struct net_device *netdev;
864 struct e1000_adapter *adapter;
865 unsigned long mmio_start, mmio_len;
866 unsigned long flash_start, flash_len;
867
868 static int cards_found = 0;
869 static int global_quad_port_a = 0; /* global ksp3 port a indication */
870 int i, err, pci_using_dac;
871 uint16_t eeprom_data = 0;
872 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
873 DECLARE_MAC_BUF(mac);
874
875 if ((err = pci_enable_device(pdev)))
876 return err;
877
878 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
879 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
880 pci_using_dac = 1;
881 } else {
882 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
883 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
884 E1000_ERR("No usable DMA configuration, aborting\n");
885 goto err_dma;
886 }
887 pci_using_dac = 0;
888 }
889
890 if ((err = pci_request_regions(pdev, e1000_driver_name)))
891 goto err_pci_reg;
892
893 pci_set_master(pdev);
894
895 err = -ENOMEM;
896 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
897 if (!netdev)
898 goto err_alloc_etherdev;
899
900 SET_NETDEV_DEV(netdev, &pdev->dev);
901
902 pci_set_drvdata(pdev, netdev);
903 adapter = netdev_priv(netdev);
904 adapter->netdev = netdev;
905 adapter->pdev = pdev;
906 adapter->hw.back = adapter;
907 adapter->msg_enable = (1 << debug) - 1;
908
909 mmio_start = pci_resource_start(pdev, BAR_0);
910 mmio_len = pci_resource_len(pdev, BAR_0);
911
912 err = -EIO;
913 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
914 if (!adapter->hw.hw_addr)
915 goto err_ioremap;
916
917 for (i = BAR_1; i <= BAR_5; i++) {
918 if (pci_resource_len(pdev, i) == 0)
919 continue;
920 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
921 adapter->hw.io_base = pci_resource_start(pdev, i);
922 break;
923 }
924 }
925
926 netdev->open = &e1000_open;
927 netdev->stop = &e1000_close;
928 netdev->hard_start_xmit = &e1000_xmit_frame;
929 netdev->get_stats = &e1000_get_stats;
930 netdev->set_multicast_list = &e1000_set_multi;
931 netdev->set_mac_address = &e1000_set_mac;
932 netdev->change_mtu = &e1000_change_mtu;
933 netdev->do_ioctl = &e1000_ioctl;
934 e1000_set_ethtool_ops(netdev);
935 netdev->tx_timeout = &e1000_tx_timeout;
936 netdev->watchdog_timeo = 5 * HZ;
937 #ifdef CONFIG_E1000_NAPI
938 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
939 #endif
940 netdev->vlan_rx_register = e1000_vlan_rx_register;
941 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
942 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
943 #ifdef CONFIG_NET_POLL_CONTROLLER
944 netdev->poll_controller = e1000_netpoll;
945 #endif
946 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
947
948 netdev->mem_start = mmio_start;
949 netdev->mem_end = mmio_start + mmio_len;
950 netdev->base_addr = adapter->hw.io_base;
951
952 adapter->bd_number = cards_found;
953
954 /* setup the private structure */
955
956 if ((err = e1000_sw_init(adapter)))
957 goto err_sw_init;
958
959 err = -EIO;
960 /* Flash BAR mapping must happen after e1000_sw_init
961 * because it depends on mac_type */
962 if ((adapter->hw.mac_type == e1000_ich8lan) &&
963 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
964 flash_start = pci_resource_start(pdev, 1);
965 flash_len = pci_resource_len(pdev, 1);
966 adapter->hw.flash_address = ioremap(flash_start, flash_len);
967 if (!adapter->hw.flash_address)
968 goto err_flashmap;
969 }
970
971 if (e1000_check_phy_reset_block(&adapter->hw))
972 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
973
974 if (adapter->hw.mac_type >= e1000_82543) {
975 netdev->features = NETIF_F_SG |
976 NETIF_F_HW_CSUM |
977 NETIF_F_HW_VLAN_TX |
978 NETIF_F_HW_VLAN_RX |
979 NETIF_F_HW_VLAN_FILTER;
980 if (adapter->hw.mac_type == e1000_ich8lan)
981 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
982 }
983
984 if ((adapter->hw.mac_type >= e1000_82544) &&
985 (adapter->hw.mac_type != e1000_82547))
986 netdev->features |= NETIF_F_TSO;
987
988 if (adapter->hw.mac_type > e1000_82547_rev_2)
989 netdev->features |= NETIF_F_TSO6;
990 if (pci_using_dac)
991 netdev->features |= NETIF_F_HIGHDMA;
992
993 netdev->features |= NETIF_F_LLTX;
994
995 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
996
997 /* initialize eeprom parameters */
998
999 if (e1000_init_eeprom_params(&adapter->hw)) {
1000 E1000_ERR("EEPROM initialization failed\n");
1001 goto err_eeprom;
1002 }
1003
1004 /* before reading the EEPROM, reset the controller to
1005 * put the device in a known good starting state */
1006
1007 e1000_reset_hw(&adapter->hw);
1008
1009 /* make sure the EEPROM is good */
1010
1011 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1012 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1013 goto err_eeprom;
1014 }
1015
1016 /* copy the MAC address out of the EEPROM */
1017
1018 if (e1000_read_mac_addr(&adapter->hw))
1019 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1020 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1021 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1022
1023 if (!is_valid_ether_addr(netdev->perm_addr)) {
1024 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1025 goto err_eeprom;
1026 }
1027
1028 e1000_get_bus_info(&adapter->hw);
1029
1030 init_timer(&adapter->tx_fifo_stall_timer);
1031 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1032 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1033
1034 init_timer(&adapter->watchdog_timer);
1035 adapter->watchdog_timer.function = &e1000_watchdog;
1036 adapter->watchdog_timer.data = (unsigned long) adapter;
1037
1038 init_timer(&adapter->phy_info_timer);
1039 adapter->phy_info_timer.function = &e1000_update_phy_info;
1040 adapter->phy_info_timer.data = (unsigned long) adapter;
1041
1042 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1043
1044 e1000_check_options(adapter);
1045
1046 /* Initial Wake on LAN setting
1047 * If APM wake is enabled in the EEPROM,
1048 * enable the ACPI Magic Packet filter
1049 */
1050
1051 switch (adapter->hw.mac_type) {
1052 case e1000_82542_rev2_0:
1053 case e1000_82542_rev2_1:
1054 case e1000_82543:
1055 break;
1056 case e1000_82544:
1057 e1000_read_eeprom(&adapter->hw,
1058 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1059 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1060 break;
1061 case e1000_ich8lan:
1062 e1000_read_eeprom(&adapter->hw,
1063 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1064 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1065 break;
1066 case e1000_82546:
1067 case e1000_82546_rev_3:
1068 case e1000_82571:
1069 case e1000_80003es2lan:
1070 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1071 e1000_read_eeprom(&adapter->hw,
1072 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1073 break;
1074 }
1075 /* Fall Through */
1076 default:
1077 e1000_read_eeprom(&adapter->hw,
1078 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1079 break;
1080 }
1081 if (eeprom_data & eeprom_apme_mask)
1082 adapter->eeprom_wol |= E1000_WUFC_MAG;
1083
1084 /* now that we have the eeprom settings, apply the special cases
1085 * where the eeprom may be wrong or the board simply won't support
1086 * wake on lan on a particular port */
1087 switch (pdev->device) {
1088 case E1000_DEV_ID_82546GB_PCIE:
1089 adapter->eeprom_wol = 0;
1090 break;
1091 case E1000_DEV_ID_82546EB_FIBER:
1092 case E1000_DEV_ID_82546GB_FIBER:
1093 case E1000_DEV_ID_82571EB_FIBER:
1094 /* Wake events only supported on port A for dual fiber
1095 * regardless of eeprom setting */
1096 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1097 adapter->eeprom_wol = 0;
1098 break;
1099 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1100 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1101 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1102 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1103 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1104 /* if quad port adapter, disable WoL on all but port A */
1105 if (global_quad_port_a != 0)
1106 adapter->eeprom_wol = 0;
1107 else
1108 adapter->quad_port_a = 1;
1109 /* Reset for multiple quad port adapters */
1110 if (++global_quad_port_a == 4)
1111 global_quad_port_a = 0;
1112 break;
1113 }
1114
1115 /* initialize the wol settings based on the eeprom settings */
1116 adapter->wol = adapter->eeprom_wol;
1117
1118 /* print bus type/speed/width info */
1119 {
1120 struct e1000_hw *hw = &adapter->hw;
1121 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1122 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1123 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1124 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1125 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1126 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1127 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1128 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1129 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1130 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1131 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1132 "32-bit"));
1133 }
1134
1135 printk("%s\n", print_mac(mac, netdev->dev_addr));
1136
1137 /* reset the hardware with the new settings */
1138 e1000_reset(adapter);
1139
1140 /* If the controller is 82573 and f/w is AMT, do not set
1141 * DRV_LOAD until the interface is up. For all other cases,
1142 * let the f/w know that the h/w is now under the control
1143 * of the driver. */
1144 if (adapter->hw.mac_type != e1000_82573 ||
1145 !e1000_check_mng_mode(&adapter->hw))
1146 e1000_get_hw_control(adapter);
1147
1148 /* tell the stack to leave us alone until e1000_open() is called */
1149 netif_carrier_off(netdev);
1150 netif_stop_queue(netdev);
1151
1152 strcpy(netdev->name, "eth%d");
1153 if ((err = register_netdev(netdev)))
1154 goto err_register;
1155
1156 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1157
1158 cards_found++;
1159 return 0;
1160
1161 err_register:
1162 e1000_release_hw_control(adapter);
1163 err_eeprom:
1164 if (!e1000_check_phy_reset_block(&adapter->hw))
1165 e1000_phy_hw_reset(&adapter->hw);
1166
1167 if (adapter->hw.flash_address)
1168 iounmap(adapter->hw.flash_address);
1169 err_flashmap:
1170 #ifdef CONFIG_E1000_NAPI
1171 for (i = 0; i < adapter->num_rx_queues; i++)
1172 dev_put(&adapter->polling_netdev[i]);
1173 #endif
1174
1175 kfree(adapter->tx_ring);
1176 kfree(adapter->rx_ring);
1177 #ifdef CONFIG_E1000_NAPI
1178 kfree(adapter->polling_netdev);
1179 #endif
1180 err_sw_init:
1181 iounmap(adapter->hw.hw_addr);
1182 err_ioremap:
1183 free_netdev(netdev);
1184 err_alloc_etherdev:
1185 pci_release_regions(pdev);
1186 err_pci_reg:
1187 err_dma:
1188 pci_disable_device(pdev);
1189 return err;
1190 }
1191
1192 /**
1193 * e1000_remove - Device Removal Routine
1194 * @pdev: PCI device information struct
1195 *
1196 * e1000_remove is called by the PCI subsystem to alert the driver
1197 * that it should release a PCI device. The could be caused by a
1198 * Hot-Plug event, or because the driver is going to be removed from
1199 * memory.
1200 **/
1201
1202 static void __devexit
1203 e1000_remove(struct pci_dev *pdev)
1204 {
1205 struct net_device *netdev = pci_get_drvdata(pdev);
1206 struct e1000_adapter *adapter = netdev_priv(netdev);
1207 #ifdef CONFIG_E1000_NAPI
1208 int i;
1209 #endif
1210
1211 cancel_work_sync(&adapter->reset_task);
1212
1213 e1000_release_manageability(adapter);
1214
1215 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1216 * would have already happened in close and is redundant. */
1217 e1000_release_hw_control(adapter);
1218
1219 #ifdef CONFIG_E1000_NAPI
1220 for (i = 0; i < adapter->num_rx_queues; i++)
1221 dev_put(&adapter->polling_netdev[i]);
1222 #endif
1223
1224 unregister_netdev(netdev);
1225
1226 if (!e1000_check_phy_reset_block(&adapter->hw))
1227 e1000_phy_hw_reset(&adapter->hw);
1228
1229 kfree(adapter->tx_ring);
1230 kfree(adapter->rx_ring);
1231 #ifdef CONFIG_E1000_NAPI
1232 kfree(adapter->polling_netdev);
1233 #endif
1234
1235 iounmap(adapter->hw.hw_addr);
1236 if (adapter->hw.flash_address)
1237 iounmap(adapter->hw.flash_address);
1238 pci_release_regions(pdev);
1239
1240 free_netdev(netdev);
1241
1242 pci_disable_device(pdev);
1243 }
1244
1245 /**
1246 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1247 * @adapter: board private structure to initialize
1248 *
1249 * e1000_sw_init initializes the Adapter private data structure.
1250 * Fields are initialized based on PCI device information and
1251 * OS network device settings (MTU size).
1252 **/
1253
1254 static int __devinit
1255 e1000_sw_init(struct e1000_adapter *adapter)
1256 {
1257 struct e1000_hw *hw = &adapter->hw;
1258 struct net_device *netdev = adapter->netdev;
1259 struct pci_dev *pdev = adapter->pdev;
1260 #ifdef CONFIG_E1000_NAPI
1261 int i;
1262 #endif
1263
1264 /* PCI config space info */
1265
1266 hw->vendor_id = pdev->vendor;
1267 hw->device_id = pdev->device;
1268 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1269 hw->subsystem_id = pdev->subsystem_device;
1270 hw->revision_id = pdev->revision;
1271
1272 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1273
1274 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1275 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1276 hw->max_frame_size = netdev->mtu +
1277 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1278 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1279
1280 /* identify the MAC */
1281
1282 if (e1000_set_mac_type(hw)) {
1283 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1284 return -EIO;
1285 }
1286
1287 switch (hw->mac_type) {
1288 default:
1289 break;
1290 case e1000_82541:
1291 case e1000_82547:
1292 case e1000_82541_rev_2:
1293 case e1000_82547_rev_2:
1294 hw->phy_init_script = 1;
1295 break;
1296 }
1297
1298 e1000_set_media_type(hw);
1299
1300 hw->wait_autoneg_complete = FALSE;
1301 hw->tbi_compatibility_en = TRUE;
1302 hw->adaptive_ifs = TRUE;
1303
1304 /* Copper options */
1305
1306 if (hw->media_type == e1000_media_type_copper) {
1307 hw->mdix = AUTO_ALL_MODES;
1308 hw->disable_polarity_correction = FALSE;
1309 hw->master_slave = E1000_MASTER_SLAVE;
1310 }
1311
1312 adapter->num_tx_queues = 1;
1313 adapter->num_rx_queues = 1;
1314
1315 if (e1000_alloc_queues(adapter)) {
1316 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1317 return -ENOMEM;
1318 }
1319
1320 #ifdef CONFIG_E1000_NAPI
1321 for (i = 0; i < adapter->num_rx_queues; i++) {
1322 adapter->polling_netdev[i].priv = adapter;
1323 dev_hold(&adapter->polling_netdev[i]);
1324 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1325 }
1326 spin_lock_init(&adapter->tx_queue_lock);
1327 #endif
1328
1329 /* Explicitly disable IRQ since the NIC can be in any state. */
1330 atomic_set(&adapter->irq_sem, 0);
1331 e1000_irq_disable(adapter);
1332
1333 spin_lock_init(&adapter->stats_lock);
1334
1335 set_bit(__E1000_DOWN, &adapter->flags);
1336
1337 return 0;
1338 }
1339
1340 /**
1341 * e1000_alloc_queues - Allocate memory for all rings
1342 * @adapter: board private structure to initialize
1343 *
1344 * We allocate one ring per queue at run-time since we don't know the
1345 * number of queues at compile-time. The polling_netdev array is
1346 * intended for Multiqueue, but should work fine with a single queue.
1347 **/
1348
1349 static int __devinit
1350 e1000_alloc_queues(struct e1000_adapter *adapter)
1351 {
1352 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1353 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1354 if (!adapter->tx_ring)
1355 return -ENOMEM;
1356
1357 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1358 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1359 if (!adapter->rx_ring) {
1360 kfree(adapter->tx_ring);
1361 return -ENOMEM;
1362 }
1363
1364 #ifdef CONFIG_E1000_NAPI
1365 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1366 sizeof(struct net_device),
1367 GFP_KERNEL);
1368 if (!adapter->polling_netdev) {
1369 kfree(adapter->tx_ring);
1370 kfree(adapter->rx_ring);
1371 return -ENOMEM;
1372 }
1373 #endif
1374
1375 return E1000_SUCCESS;
1376 }
1377
1378 /**
1379 * e1000_open - Called when a network interface is made active
1380 * @netdev: network interface device structure
1381 *
1382 * Returns 0 on success, negative value on failure
1383 *
1384 * The open entry point is called when a network interface is made
1385 * active by the system (IFF_UP). At this point all resources needed
1386 * for transmit and receive operations are allocated, the interrupt
1387 * handler is registered with the OS, the watchdog timer is started,
1388 * and the stack is notified that the interface is ready.
1389 **/
1390
1391 static int
1392 e1000_open(struct net_device *netdev)
1393 {
1394 struct e1000_adapter *adapter = netdev_priv(netdev);
1395 int err;
1396
1397 /* disallow open during test */
1398 if (test_bit(__E1000_TESTING, &adapter->flags))
1399 return -EBUSY;
1400
1401 /* allocate transmit descriptors */
1402 err = e1000_setup_all_tx_resources(adapter);
1403 if (err)
1404 goto err_setup_tx;
1405
1406 /* allocate receive descriptors */
1407 err = e1000_setup_all_rx_resources(adapter);
1408 if (err)
1409 goto err_setup_rx;
1410
1411 e1000_power_up_phy(adapter);
1412
1413 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1414 if ((adapter->hw.mng_cookie.status &
1415 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1416 e1000_update_mng_vlan(adapter);
1417 }
1418
1419 /* If AMT is enabled, let the firmware know that the network
1420 * interface is now open */
1421 if (adapter->hw.mac_type == e1000_82573 &&
1422 e1000_check_mng_mode(&adapter->hw))
1423 e1000_get_hw_control(adapter);
1424
1425 /* before we allocate an interrupt, we must be ready to handle it.
1426 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1427 * as soon as we call pci_request_irq, so we have to setup our
1428 * clean_rx handler before we do so. */
1429 e1000_configure(adapter);
1430
1431 err = e1000_request_irq(adapter);
1432 if (err)
1433 goto err_req_irq;
1434
1435 /* From here on the code is the same as e1000_up() */
1436 clear_bit(__E1000_DOWN, &adapter->flags);
1437
1438 #ifdef CONFIG_E1000_NAPI
1439 napi_enable(&adapter->napi);
1440 #endif
1441
1442 e1000_irq_enable(adapter);
1443
1444 /* fire a link status change interrupt to start the watchdog */
1445 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1446
1447 return E1000_SUCCESS;
1448
1449 err_req_irq:
1450 e1000_release_hw_control(adapter);
1451 e1000_power_down_phy(adapter);
1452 e1000_free_all_rx_resources(adapter);
1453 err_setup_rx:
1454 e1000_free_all_tx_resources(adapter);
1455 err_setup_tx:
1456 e1000_reset(adapter);
1457
1458 return err;
1459 }
1460
1461 /**
1462 * e1000_close - Disables a network interface
1463 * @netdev: network interface device structure
1464 *
1465 * Returns 0, this is not allowed to fail
1466 *
1467 * The close entry point is called when an interface is de-activated
1468 * by the OS. The hardware is still under the drivers control, but
1469 * needs to be disabled. A global MAC reset is issued to stop the
1470 * hardware, and all transmit and receive resources are freed.
1471 **/
1472
1473 static int
1474 e1000_close(struct net_device *netdev)
1475 {
1476 struct e1000_adapter *adapter = netdev_priv(netdev);
1477
1478 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1479 e1000_down(adapter);
1480 e1000_power_down_phy(adapter);
1481 e1000_free_irq(adapter);
1482
1483 e1000_free_all_tx_resources(adapter);
1484 e1000_free_all_rx_resources(adapter);
1485
1486 /* kill manageability vlan ID if supported, but not if a vlan with
1487 * the same ID is registered on the host OS (let 8021q kill it) */
1488 if ((adapter->hw.mng_cookie.status &
1489 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1490 !(adapter->vlgrp &&
1491 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1492 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1493 }
1494
1495 /* If AMT is enabled, let the firmware know that the network
1496 * interface is now closed */
1497 if (adapter->hw.mac_type == e1000_82573 &&
1498 e1000_check_mng_mode(&adapter->hw))
1499 e1000_release_hw_control(adapter);
1500
1501 return 0;
1502 }
1503
1504 /**
1505 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1506 * @adapter: address of board private structure
1507 * @start: address of beginning of memory
1508 * @len: length of memory
1509 **/
1510 static boolean_t
1511 e1000_check_64k_bound(struct e1000_adapter *adapter,
1512 void *start, unsigned long len)
1513 {
1514 unsigned long begin = (unsigned long) start;
1515 unsigned long end = begin + len;
1516
1517 /* First rev 82545 and 82546 need to not allow any memory
1518 * write location to cross 64k boundary due to errata 23 */
1519 if (adapter->hw.mac_type == e1000_82545 ||
1520 adapter->hw.mac_type == e1000_82546) {
1521 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1522 }
1523
1524 return TRUE;
1525 }
1526
1527 /**
1528 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1529 * @adapter: board private structure
1530 * @txdr: tx descriptor ring (for a specific queue) to setup
1531 *
1532 * Return 0 on success, negative on failure
1533 **/
1534
1535 static int
1536 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1537 struct e1000_tx_ring *txdr)
1538 {
1539 struct pci_dev *pdev = adapter->pdev;
1540 int size;
1541
1542 size = sizeof(struct e1000_buffer) * txdr->count;
1543 txdr->buffer_info = vmalloc(size);
1544 if (!txdr->buffer_info) {
1545 DPRINTK(PROBE, ERR,
1546 "Unable to allocate memory for the transmit descriptor ring\n");
1547 return -ENOMEM;
1548 }
1549 memset(txdr->buffer_info, 0, size);
1550
1551 /* round up to nearest 4K */
1552
1553 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1554 txdr->size = ALIGN(txdr->size, 4096);
1555
1556 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1557 if (!txdr->desc) {
1558 setup_tx_desc_die:
1559 vfree(txdr->buffer_info);
1560 DPRINTK(PROBE, ERR,
1561 "Unable to allocate memory for the transmit descriptor ring\n");
1562 return -ENOMEM;
1563 }
1564
1565 /* Fix for errata 23, can't cross 64kB boundary */
1566 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1567 void *olddesc = txdr->desc;
1568 dma_addr_t olddma = txdr->dma;
1569 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1570 "at %p\n", txdr->size, txdr->desc);
1571 /* Try again, without freeing the previous */
1572 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1573 /* Failed allocation, critical failure */
1574 if (!txdr->desc) {
1575 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1576 goto setup_tx_desc_die;
1577 }
1578
1579 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1580 /* give up */
1581 pci_free_consistent(pdev, txdr->size, txdr->desc,
1582 txdr->dma);
1583 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1584 DPRINTK(PROBE, ERR,
1585 "Unable to allocate aligned memory "
1586 "for the transmit descriptor ring\n");
1587 vfree(txdr->buffer_info);
1588 return -ENOMEM;
1589 } else {
1590 /* Free old allocation, new allocation was successful */
1591 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1592 }
1593 }
1594 memset(txdr->desc, 0, txdr->size);
1595
1596 txdr->next_to_use = 0;
1597 txdr->next_to_clean = 0;
1598 spin_lock_init(&txdr->tx_lock);
1599
1600 return 0;
1601 }
1602
1603 /**
1604 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1605 * (Descriptors) for all queues
1606 * @adapter: board private structure
1607 *
1608 * Return 0 on success, negative on failure
1609 **/
1610
1611 int
1612 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1613 {
1614 int i, err = 0;
1615
1616 for (i = 0; i < adapter->num_tx_queues; i++) {
1617 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1618 if (err) {
1619 DPRINTK(PROBE, ERR,
1620 "Allocation for Tx Queue %u failed\n", i);
1621 for (i-- ; i >= 0; i--)
1622 e1000_free_tx_resources(adapter,
1623 &adapter->tx_ring[i]);
1624 break;
1625 }
1626 }
1627
1628 return err;
1629 }
1630
1631 /**
1632 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1633 * @adapter: board private structure
1634 *
1635 * Configure the Tx unit of the MAC after a reset.
1636 **/
1637
1638 static void
1639 e1000_configure_tx(struct e1000_adapter *adapter)
1640 {
1641 uint64_t tdba;
1642 struct e1000_hw *hw = &adapter->hw;
1643 uint32_t tdlen, tctl, tipg, tarc;
1644 uint32_t ipgr1, ipgr2;
1645
1646 /* Setup the HW Tx Head and Tail descriptor pointers */
1647
1648 switch (adapter->num_tx_queues) {
1649 case 1:
1650 default:
1651 tdba = adapter->tx_ring[0].dma;
1652 tdlen = adapter->tx_ring[0].count *
1653 sizeof(struct e1000_tx_desc);
1654 E1000_WRITE_REG(hw, TDLEN, tdlen);
1655 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1656 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1657 E1000_WRITE_REG(hw, TDT, 0);
1658 E1000_WRITE_REG(hw, TDH, 0);
1659 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1660 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1661 break;
1662 }
1663
1664 /* Set the default values for the Tx Inter Packet Gap timer */
1665 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1666 (hw->media_type == e1000_media_type_fiber ||
1667 hw->media_type == e1000_media_type_internal_serdes))
1668 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1669 else
1670 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1671
1672 switch (hw->mac_type) {
1673 case e1000_82542_rev2_0:
1674 case e1000_82542_rev2_1:
1675 tipg = DEFAULT_82542_TIPG_IPGT;
1676 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1677 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1678 break;
1679 case e1000_80003es2lan:
1680 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1681 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1682 break;
1683 default:
1684 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1685 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1686 break;
1687 }
1688 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1689 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1690 E1000_WRITE_REG(hw, TIPG, tipg);
1691
1692 /* Set the Tx Interrupt Delay register */
1693
1694 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1695 if (hw->mac_type >= e1000_82540)
1696 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1697
1698 /* Program the Transmit Control Register */
1699
1700 tctl = E1000_READ_REG(hw, TCTL);
1701 tctl &= ~E1000_TCTL_CT;
1702 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1703 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1704
1705 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1706 tarc = E1000_READ_REG(hw, TARC0);
1707 /* set the speed mode bit, we'll clear it if we're not at
1708 * gigabit link later */
1709 tarc |= (1 << 21);
1710 E1000_WRITE_REG(hw, TARC0, tarc);
1711 } else if (hw->mac_type == e1000_80003es2lan) {
1712 tarc = E1000_READ_REG(hw, TARC0);
1713 tarc |= 1;
1714 E1000_WRITE_REG(hw, TARC0, tarc);
1715 tarc = E1000_READ_REG(hw, TARC1);
1716 tarc |= 1;
1717 E1000_WRITE_REG(hw, TARC1, tarc);
1718 }
1719
1720 e1000_config_collision_dist(hw);
1721
1722 /* Setup Transmit Descriptor Settings for eop descriptor */
1723 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1724
1725 /* only set IDE if we are delaying interrupts using the timers */
1726 if (adapter->tx_int_delay)
1727 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1728
1729 if (hw->mac_type < e1000_82543)
1730 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1731 else
1732 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1733
1734 /* Cache if we're 82544 running in PCI-X because we'll
1735 * need this to apply a workaround later in the send path. */
1736 if (hw->mac_type == e1000_82544 &&
1737 hw->bus_type == e1000_bus_type_pcix)
1738 adapter->pcix_82544 = 1;
1739
1740 E1000_WRITE_REG(hw, TCTL, tctl);
1741
1742 }
1743
1744 /**
1745 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1746 * @adapter: board private structure
1747 * @rxdr: rx descriptor ring (for a specific queue) to setup
1748 *
1749 * Returns 0 on success, negative on failure
1750 **/
1751
1752 static int
1753 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1754 struct e1000_rx_ring *rxdr)
1755 {
1756 struct pci_dev *pdev = adapter->pdev;
1757 int size, desc_len;
1758
1759 size = sizeof(struct e1000_buffer) * rxdr->count;
1760 rxdr->buffer_info = vmalloc(size);
1761 if (!rxdr->buffer_info) {
1762 DPRINTK(PROBE, ERR,
1763 "Unable to allocate memory for the receive descriptor ring\n");
1764 return -ENOMEM;
1765 }
1766 memset(rxdr->buffer_info, 0, size);
1767
1768 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1769 GFP_KERNEL);
1770 if (!rxdr->ps_page) {
1771 vfree(rxdr->buffer_info);
1772 DPRINTK(PROBE, ERR,
1773 "Unable to allocate memory for the receive descriptor ring\n");
1774 return -ENOMEM;
1775 }
1776
1777 rxdr->ps_page_dma = kcalloc(rxdr->count,
1778 sizeof(struct e1000_ps_page_dma),
1779 GFP_KERNEL);
1780 if (!rxdr->ps_page_dma) {
1781 vfree(rxdr->buffer_info);
1782 kfree(rxdr->ps_page);
1783 DPRINTK(PROBE, ERR,
1784 "Unable to allocate memory for the receive descriptor ring\n");
1785 return -ENOMEM;
1786 }
1787
1788 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1789 desc_len = sizeof(struct e1000_rx_desc);
1790 else
1791 desc_len = sizeof(union e1000_rx_desc_packet_split);
1792
1793 /* Round up to nearest 4K */
1794
1795 rxdr->size = rxdr->count * desc_len;
1796 rxdr->size = ALIGN(rxdr->size, 4096);
1797
1798 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1799
1800 if (!rxdr->desc) {
1801 DPRINTK(PROBE, ERR,
1802 "Unable to allocate memory for the receive descriptor ring\n");
1803 setup_rx_desc_die:
1804 vfree(rxdr->buffer_info);
1805 kfree(rxdr->ps_page);
1806 kfree(rxdr->ps_page_dma);
1807 return -ENOMEM;
1808 }
1809
1810 /* Fix for errata 23, can't cross 64kB boundary */
1811 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1812 void *olddesc = rxdr->desc;
1813 dma_addr_t olddma = rxdr->dma;
1814 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1815 "at %p\n", rxdr->size, rxdr->desc);
1816 /* Try again, without freeing the previous */
1817 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1818 /* Failed allocation, critical failure */
1819 if (!rxdr->desc) {
1820 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1821 DPRINTK(PROBE, ERR,
1822 "Unable to allocate memory "
1823 "for the receive descriptor ring\n");
1824 goto setup_rx_desc_die;
1825 }
1826
1827 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1828 /* give up */
1829 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1830 rxdr->dma);
1831 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1832 DPRINTK(PROBE, ERR,
1833 "Unable to allocate aligned memory "
1834 "for the receive descriptor ring\n");
1835 goto setup_rx_desc_die;
1836 } else {
1837 /* Free old allocation, new allocation was successful */
1838 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1839 }
1840 }
1841 memset(rxdr->desc, 0, rxdr->size);
1842
1843 rxdr->next_to_clean = 0;
1844 rxdr->next_to_use = 0;
1845
1846 return 0;
1847 }
1848
1849 /**
1850 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1851 * (Descriptors) for all queues
1852 * @adapter: board private structure
1853 *
1854 * Return 0 on success, negative on failure
1855 **/
1856
1857 int
1858 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1859 {
1860 int i, err = 0;
1861
1862 for (i = 0; i < adapter->num_rx_queues; i++) {
1863 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1864 if (err) {
1865 DPRINTK(PROBE, ERR,
1866 "Allocation for Rx Queue %u failed\n", i);
1867 for (i-- ; i >= 0; i--)
1868 e1000_free_rx_resources(adapter,
1869 &adapter->rx_ring[i]);
1870 break;
1871 }
1872 }
1873
1874 return err;
1875 }
1876
1877 /**
1878 * e1000_setup_rctl - configure the receive control registers
1879 * @adapter: Board private structure
1880 **/
1881 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1882 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1883 static void
1884 e1000_setup_rctl(struct e1000_adapter *adapter)
1885 {
1886 uint32_t rctl, rfctl;
1887 uint32_t psrctl = 0;
1888 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1889 uint32_t pages = 0;
1890 #endif
1891
1892 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1893
1894 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1895
1896 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1897 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1898 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1899
1900 if (adapter->hw.tbi_compatibility_on == 1)
1901 rctl |= E1000_RCTL_SBP;
1902 else
1903 rctl &= ~E1000_RCTL_SBP;
1904
1905 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1906 rctl &= ~E1000_RCTL_LPE;
1907 else
1908 rctl |= E1000_RCTL_LPE;
1909
1910 /* Setup buffer sizes */
1911 rctl &= ~E1000_RCTL_SZ_4096;
1912 rctl |= E1000_RCTL_BSEX;
1913 switch (adapter->rx_buffer_len) {
1914 case E1000_RXBUFFER_256:
1915 rctl |= E1000_RCTL_SZ_256;
1916 rctl &= ~E1000_RCTL_BSEX;
1917 break;
1918 case E1000_RXBUFFER_512:
1919 rctl |= E1000_RCTL_SZ_512;
1920 rctl &= ~E1000_RCTL_BSEX;
1921 break;
1922 case E1000_RXBUFFER_1024:
1923 rctl |= E1000_RCTL_SZ_1024;
1924 rctl &= ~E1000_RCTL_BSEX;
1925 break;
1926 case E1000_RXBUFFER_2048:
1927 default:
1928 rctl |= E1000_RCTL_SZ_2048;
1929 rctl &= ~E1000_RCTL_BSEX;
1930 break;
1931 case E1000_RXBUFFER_4096:
1932 rctl |= E1000_RCTL_SZ_4096;
1933 break;
1934 case E1000_RXBUFFER_8192:
1935 rctl |= E1000_RCTL_SZ_8192;
1936 break;
1937 case E1000_RXBUFFER_16384:
1938 rctl |= E1000_RCTL_SZ_16384;
1939 break;
1940 }
1941
1942 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1943 /* 82571 and greater support packet-split where the protocol
1944 * header is placed in skb->data and the packet data is
1945 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1946 * In the case of a non-split, skb->data is linearly filled,
1947 * followed by the page buffers. Therefore, skb->data is
1948 * sized to hold the largest protocol header.
1949 */
1950 /* allocations using alloc_page take too long for regular MTU
1951 * so only enable packet split for jumbo frames */
1952 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1953 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1954 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1955 adapter->rx_ps_pages = pages;
1956 else
1957 adapter->rx_ps_pages = 0;
1958 #endif
1959 if (adapter->rx_ps_pages) {
1960 /* Configure extra packet-split registers */
1961 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1962 rfctl |= E1000_RFCTL_EXTEN;
1963 /* disable packet split support for IPv6 extension headers,
1964 * because some malformed IPv6 headers can hang the RX */
1965 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1966 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1967
1968 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1969
1970 rctl |= E1000_RCTL_DTYP_PS;
1971
1972 psrctl |= adapter->rx_ps_bsize0 >>
1973 E1000_PSRCTL_BSIZE0_SHIFT;
1974
1975 switch (adapter->rx_ps_pages) {
1976 case 3:
1977 psrctl |= PAGE_SIZE <<
1978 E1000_PSRCTL_BSIZE3_SHIFT;
1979 case 2:
1980 psrctl |= PAGE_SIZE <<
1981 E1000_PSRCTL_BSIZE2_SHIFT;
1982 case 1:
1983 psrctl |= PAGE_SIZE >>
1984 E1000_PSRCTL_BSIZE1_SHIFT;
1985 break;
1986 }
1987
1988 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1989 }
1990
1991 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1992 }
1993
1994 /**
1995 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1996 * @adapter: board private structure
1997 *
1998 * Configure the Rx unit of the MAC after a reset.
1999 **/
2000
2001 static void
2002 e1000_configure_rx(struct e1000_adapter *adapter)
2003 {
2004 uint64_t rdba;
2005 struct e1000_hw *hw = &adapter->hw;
2006 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2007
2008 if (adapter->rx_ps_pages) {
2009 /* this is a 32 byte descriptor */
2010 rdlen = adapter->rx_ring[0].count *
2011 sizeof(union e1000_rx_desc_packet_split);
2012 adapter->clean_rx = e1000_clean_rx_irq_ps;
2013 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2014 } else {
2015 rdlen = adapter->rx_ring[0].count *
2016 sizeof(struct e1000_rx_desc);
2017 adapter->clean_rx = e1000_clean_rx_irq;
2018 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2019 }
2020
2021 /* disable receives while setting up the descriptors */
2022 rctl = E1000_READ_REG(hw, RCTL);
2023 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2024
2025 /* set the Receive Delay Timer Register */
2026 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2027
2028 if (hw->mac_type >= e1000_82540) {
2029 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2030 if (adapter->itr_setting != 0)
2031 E1000_WRITE_REG(hw, ITR,
2032 1000000000 / (adapter->itr * 256));
2033 }
2034
2035 if (hw->mac_type >= e1000_82571) {
2036 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2037 /* Reset delay timers after every interrupt */
2038 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2039 #ifdef CONFIG_E1000_NAPI
2040 /* Auto-Mask interrupts upon ICR access */
2041 ctrl_ext |= E1000_CTRL_EXT_IAME;
2042 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2043 #endif
2044 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2045 E1000_WRITE_FLUSH(hw);
2046 }
2047
2048 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2049 * the Base and Length of the Rx Descriptor Ring */
2050 switch (adapter->num_rx_queues) {
2051 case 1:
2052 default:
2053 rdba = adapter->rx_ring[0].dma;
2054 E1000_WRITE_REG(hw, RDLEN, rdlen);
2055 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2056 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2057 E1000_WRITE_REG(hw, RDT, 0);
2058 E1000_WRITE_REG(hw, RDH, 0);
2059 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2060 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2061 break;
2062 }
2063
2064 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2065 if (hw->mac_type >= e1000_82543) {
2066 rxcsum = E1000_READ_REG(hw, RXCSUM);
2067 if (adapter->rx_csum == TRUE) {
2068 rxcsum |= E1000_RXCSUM_TUOFL;
2069
2070 /* Enable 82571 IPv4 payload checksum for UDP fragments
2071 * Must be used in conjunction with packet-split. */
2072 if ((hw->mac_type >= e1000_82571) &&
2073 (adapter->rx_ps_pages)) {
2074 rxcsum |= E1000_RXCSUM_IPPCSE;
2075 }
2076 } else {
2077 rxcsum &= ~E1000_RXCSUM_TUOFL;
2078 /* don't need to clear IPPCSE as it defaults to 0 */
2079 }
2080 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2081 }
2082
2083 /* enable early receives on 82573, only takes effect if using > 2048
2084 * byte total frame size. for example only for jumbo frames */
2085 #define E1000_ERT_2048 0x100
2086 if (hw->mac_type == e1000_82573)
2087 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2088
2089 /* Enable Receives */
2090 E1000_WRITE_REG(hw, RCTL, rctl);
2091 }
2092
2093 /**
2094 * e1000_free_tx_resources - Free Tx Resources per Queue
2095 * @adapter: board private structure
2096 * @tx_ring: Tx descriptor ring for a specific queue
2097 *
2098 * Free all transmit software resources
2099 **/
2100
2101 static void
2102 e1000_free_tx_resources(struct e1000_adapter *adapter,
2103 struct e1000_tx_ring *tx_ring)
2104 {
2105 struct pci_dev *pdev = adapter->pdev;
2106
2107 e1000_clean_tx_ring(adapter, tx_ring);
2108
2109 vfree(tx_ring->buffer_info);
2110 tx_ring->buffer_info = NULL;
2111
2112 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2113
2114 tx_ring->desc = NULL;
2115 }
2116
2117 /**
2118 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2119 * @adapter: board private structure
2120 *
2121 * Free all transmit software resources
2122 **/
2123
2124 void
2125 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2126 {
2127 int i;
2128
2129 for (i = 0; i < adapter->num_tx_queues; i++)
2130 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2131 }
2132
2133 static void
2134 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2135 struct e1000_buffer *buffer_info)
2136 {
2137 if (buffer_info->dma) {
2138 pci_unmap_page(adapter->pdev,
2139 buffer_info->dma,
2140 buffer_info->length,
2141 PCI_DMA_TODEVICE);
2142 buffer_info->dma = 0;
2143 }
2144 if (buffer_info->skb) {
2145 dev_kfree_skb_any(buffer_info->skb);
2146 buffer_info->skb = NULL;
2147 }
2148 /* buffer_info must be completely set up in the transmit path */
2149 }
2150
2151 /**
2152 * e1000_clean_tx_ring - Free Tx Buffers
2153 * @adapter: board private structure
2154 * @tx_ring: ring to be cleaned
2155 **/
2156
2157 static void
2158 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2159 struct e1000_tx_ring *tx_ring)
2160 {
2161 struct e1000_buffer *buffer_info;
2162 unsigned long size;
2163 unsigned int i;
2164
2165 /* Free all the Tx ring sk_buffs */
2166
2167 for (i = 0; i < tx_ring->count; i++) {
2168 buffer_info = &tx_ring->buffer_info[i];
2169 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2170 }
2171
2172 size = sizeof(struct e1000_buffer) * tx_ring->count;
2173 memset(tx_ring->buffer_info, 0, size);
2174
2175 /* Zero out the descriptor ring */
2176
2177 memset(tx_ring->desc, 0, tx_ring->size);
2178
2179 tx_ring->next_to_use = 0;
2180 tx_ring->next_to_clean = 0;
2181 tx_ring->last_tx_tso = 0;
2182
2183 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2184 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2185 }
2186
2187 /**
2188 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2189 * @adapter: board private structure
2190 **/
2191
2192 static void
2193 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2194 {
2195 int i;
2196
2197 for (i = 0; i < adapter->num_tx_queues; i++)
2198 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2199 }
2200
2201 /**
2202 * e1000_free_rx_resources - Free Rx Resources
2203 * @adapter: board private structure
2204 * @rx_ring: ring to clean the resources from
2205 *
2206 * Free all receive software resources
2207 **/
2208
2209 static void
2210 e1000_free_rx_resources(struct e1000_adapter *adapter,
2211 struct e1000_rx_ring *rx_ring)
2212 {
2213 struct pci_dev *pdev = adapter->pdev;
2214
2215 e1000_clean_rx_ring(adapter, rx_ring);
2216
2217 vfree(rx_ring->buffer_info);
2218 rx_ring->buffer_info = NULL;
2219 kfree(rx_ring->ps_page);
2220 rx_ring->ps_page = NULL;
2221 kfree(rx_ring->ps_page_dma);
2222 rx_ring->ps_page_dma = NULL;
2223
2224 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2225
2226 rx_ring->desc = NULL;
2227 }
2228
2229 /**
2230 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2231 * @adapter: board private structure
2232 *
2233 * Free all receive software resources
2234 **/
2235
2236 void
2237 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2238 {
2239 int i;
2240
2241 for (i = 0; i < adapter->num_rx_queues; i++)
2242 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2243 }
2244
2245 /**
2246 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2247 * @adapter: board private structure
2248 * @rx_ring: ring to free buffers from
2249 **/
2250
2251 static void
2252 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2253 struct e1000_rx_ring *rx_ring)
2254 {
2255 struct e1000_buffer *buffer_info;
2256 struct e1000_ps_page *ps_page;
2257 struct e1000_ps_page_dma *ps_page_dma;
2258 struct pci_dev *pdev = adapter->pdev;
2259 unsigned long size;
2260 unsigned int i, j;
2261
2262 /* Free all the Rx ring sk_buffs */
2263 for (i = 0; i < rx_ring->count; i++) {
2264 buffer_info = &rx_ring->buffer_info[i];
2265 if (buffer_info->skb) {
2266 pci_unmap_single(pdev,
2267 buffer_info->dma,
2268 buffer_info->length,
2269 PCI_DMA_FROMDEVICE);
2270
2271 dev_kfree_skb(buffer_info->skb);
2272 buffer_info->skb = NULL;
2273 }
2274 ps_page = &rx_ring->ps_page[i];
2275 ps_page_dma = &rx_ring->ps_page_dma[i];
2276 for (j = 0; j < adapter->rx_ps_pages; j++) {
2277 if (!ps_page->ps_page[j]) break;
2278 pci_unmap_page(pdev,
2279 ps_page_dma->ps_page_dma[j],
2280 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2281 ps_page_dma->ps_page_dma[j] = 0;
2282 put_page(ps_page->ps_page[j]);
2283 ps_page->ps_page[j] = NULL;
2284 }
2285 }
2286
2287 size = sizeof(struct e1000_buffer) * rx_ring->count;
2288 memset(rx_ring->buffer_info, 0, size);
2289 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2290 memset(rx_ring->ps_page, 0, size);
2291 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2292 memset(rx_ring->ps_page_dma, 0, size);
2293
2294 /* Zero out the descriptor ring */
2295
2296 memset(rx_ring->desc, 0, rx_ring->size);
2297
2298 rx_ring->next_to_clean = 0;
2299 rx_ring->next_to_use = 0;
2300
2301 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2302 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2303 }
2304
2305 /**
2306 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2307 * @adapter: board private structure
2308 **/
2309
2310 static void
2311 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2312 {
2313 int i;
2314
2315 for (i = 0; i < adapter->num_rx_queues; i++)
2316 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2317 }
2318
2319 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2320 * and memory write and invalidate disabled for certain operations
2321 */
2322 static void
2323 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2324 {
2325 struct net_device *netdev = adapter->netdev;
2326 uint32_t rctl;
2327
2328 e1000_pci_clear_mwi(&adapter->hw);
2329
2330 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2331 rctl |= E1000_RCTL_RST;
2332 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2333 E1000_WRITE_FLUSH(&adapter->hw);
2334 mdelay(5);
2335
2336 if (netif_running(netdev))
2337 e1000_clean_all_rx_rings(adapter);
2338 }
2339
2340 static void
2341 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2342 {
2343 struct net_device *netdev = adapter->netdev;
2344 uint32_t rctl;
2345
2346 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2347 rctl &= ~E1000_RCTL_RST;
2348 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2349 E1000_WRITE_FLUSH(&adapter->hw);
2350 mdelay(5);
2351
2352 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2353 e1000_pci_set_mwi(&adapter->hw);
2354
2355 if (netif_running(netdev)) {
2356 /* No need to loop, because 82542 supports only 1 queue */
2357 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2358 e1000_configure_rx(adapter);
2359 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2360 }
2361 }
2362
2363 /**
2364 * e1000_set_mac - Change the Ethernet Address of the NIC
2365 * @netdev: network interface device structure
2366 * @p: pointer to an address structure
2367 *
2368 * Returns 0 on success, negative on failure
2369 **/
2370
2371 static int
2372 e1000_set_mac(struct net_device *netdev, void *p)
2373 {
2374 struct e1000_adapter *adapter = netdev_priv(netdev);
2375 struct sockaddr *addr = p;
2376
2377 if (!is_valid_ether_addr(addr->sa_data))
2378 return -EADDRNOTAVAIL;
2379
2380 /* 82542 2.0 needs to be in reset to write receive address registers */
2381
2382 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2383 e1000_enter_82542_rst(adapter);
2384
2385 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2386 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2387
2388 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2389
2390 /* With 82571 controllers, LAA may be overwritten (with the default)
2391 * due to controller reset from the other port. */
2392 if (adapter->hw.mac_type == e1000_82571) {
2393 /* activate the work around */
2394 adapter->hw.laa_is_present = 1;
2395
2396 /* Hold a copy of the LAA in RAR[14] This is done so that
2397 * between the time RAR[0] gets clobbered and the time it
2398 * gets fixed (in e1000_watchdog), the actual LAA is in one
2399 * of the RARs and no incoming packets directed to this port
2400 * are dropped. Eventaully the LAA will be in RAR[0] and
2401 * RAR[14] */
2402 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2403 E1000_RAR_ENTRIES - 1);
2404 }
2405
2406 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2407 e1000_leave_82542_rst(adapter);
2408
2409 return 0;
2410 }
2411
2412 /**
2413 * e1000_set_multi - Multicast and Promiscuous mode set
2414 * @netdev: network interface device structure
2415 *
2416 * The set_multi entry point is called whenever the multicast address
2417 * list or the network interface flags are updated. This routine is
2418 * responsible for configuring the hardware for proper multicast,
2419 * promiscuous mode, and all-multi behavior.
2420 **/
2421
2422 static void
2423 e1000_set_multi(struct net_device *netdev)
2424 {
2425 struct e1000_adapter *adapter = netdev_priv(netdev);
2426 struct e1000_hw *hw = &adapter->hw;
2427 struct dev_mc_list *mc_ptr;
2428 uint32_t rctl;
2429 uint32_t hash_value;
2430 int i, rar_entries = E1000_RAR_ENTRIES;
2431 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2432 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2433 E1000_NUM_MTA_REGISTERS;
2434
2435 if (adapter->hw.mac_type == e1000_ich8lan)
2436 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2437
2438 /* reserve RAR[14] for LAA over-write work-around */
2439 if (adapter->hw.mac_type == e1000_82571)
2440 rar_entries--;
2441
2442 /* Check for Promiscuous and All Multicast modes */
2443
2444 rctl = E1000_READ_REG(hw, RCTL);
2445
2446 if (netdev->flags & IFF_PROMISC) {
2447 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2448 } else if (netdev->flags & IFF_ALLMULTI) {
2449 rctl |= E1000_RCTL_MPE;
2450 rctl &= ~E1000_RCTL_UPE;
2451 } else {
2452 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2453 }
2454
2455 E1000_WRITE_REG(hw, RCTL, rctl);
2456
2457 /* 82542 2.0 needs to be in reset to write receive address registers */
2458
2459 if (hw->mac_type == e1000_82542_rev2_0)
2460 e1000_enter_82542_rst(adapter);
2461
2462 /* load the first 14 multicast address into the exact filters 1-14
2463 * RAR 0 is used for the station MAC adddress
2464 * if there are not 14 addresses, go ahead and clear the filters
2465 * -- with 82571 controllers only 0-13 entries are filled here
2466 */
2467 mc_ptr = netdev->mc_list;
2468
2469 for (i = 1; i < rar_entries; i++) {
2470 if (mc_ptr) {
2471 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2472 mc_ptr = mc_ptr->next;
2473 } else {
2474 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2475 E1000_WRITE_FLUSH(hw);
2476 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2477 E1000_WRITE_FLUSH(hw);
2478 }
2479 }
2480
2481 /* clear the old settings from the multicast hash table */
2482
2483 for (i = 0; i < mta_reg_count; i++) {
2484 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2485 E1000_WRITE_FLUSH(hw);
2486 }
2487
2488 /* load any remaining addresses into the hash table */
2489
2490 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2491 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2492 e1000_mta_set(hw, hash_value);
2493 }
2494
2495 if (hw->mac_type == e1000_82542_rev2_0)
2496 e1000_leave_82542_rst(adapter);
2497 }
2498
2499 /* Need to wait a few seconds after link up to get diagnostic information from
2500 * the phy */
2501
2502 static void
2503 e1000_update_phy_info(unsigned long data)
2504 {
2505 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2506 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2507 }
2508
2509 /**
2510 * e1000_82547_tx_fifo_stall - Timer Call-back
2511 * @data: pointer to adapter cast into an unsigned long
2512 **/
2513
2514 static void
2515 e1000_82547_tx_fifo_stall(unsigned long data)
2516 {
2517 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2518 struct net_device *netdev = adapter->netdev;
2519 uint32_t tctl;
2520
2521 if (atomic_read(&adapter->tx_fifo_stall)) {
2522 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2523 E1000_READ_REG(&adapter->hw, TDH)) &&
2524 (E1000_READ_REG(&adapter->hw, TDFT) ==
2525 E1000_READ_REG(&adapter->hw, TDFH)) &&
2526 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2527 E1000_READ_REG(&adapter->hw, TDFHS))) {
2528 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2529 E1000_WRITE_REG(&adapter->hw, TCTL,
2530 tctl & ~E1000_TCTL_EN);
2531 E1000_WRITE_REG(&adapter->hw, TDFT,
2532 adapter->tx_head_addr);
2533 E1000_WRITE_REG(&adapter->hw, TDFH,
2534 adapter->tx_head_addr);
2535 E1000_WRITE_REG(&adapter->hw, TDFTS,
2536 adapter->tx_head_addr);
2537 E1000_WRITE_REG(&adapter->hw, TDFHS,
2538 adapter->tx_head_addr);
2539 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2540 E1000_WRITE_FLUSH(&adapter->hw);
2541
2542 adapter->tx_fifo_head = 0;
2543 atomic_set(&adapter->tx_fifo_stall, 0);
2544 netif_wake_queue(netdev);
2545 } else {
2546 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2547 }
2548 }
2549 }
2550
2551 /**
2552 * e1000_watchdog - Timer Call-back
2553 * @data: pointer to adapter cast into an unsigned long
2554 **/
2555 static void
2556 e1000_watchdog(unsigned long data)
2557 {
2558 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2559 struct net_device *netdev = adapter->netdev;
2560 struct e1000_tx_ring *txdr = adapter->tx_ring;
2561 uint32_t link, tctl;
2562 int32_t ret_val;
2563
2564 ret_val = e1000_check_for_link(&adapter->hw);
2565 if ((ret_val == E1000_ERR_PHY) &&
2566 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2567 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2568 /* See e1000_kumeran_lock_loss_workaround() */
2569 DPRINTK(LINK, INFO,
2570 "Gigabit has been disabled, downgrading speed\n");
2571 }
2572
2573 if (adapter->hw.mac_type == e1000_82573) {
2574 e1000_enable_tx_pkt_filtering(&adapter->hw);
2575 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2576 e1000_update_mng_vlan(adapter);
2577 }
2578
2579 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2580 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2581 link = !adapter->hw.serdes_link_down;
2582 else
2583 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2584
2585 if (link) {
2586 if (!netif_carrier_ok(netdev)) {
2587 uint32_t ctrl;
2588 boolean_t txb2b = 1;
2589 e1000_get_speed_and_duplex(&adapter->hw,
2590 &adapter->link_speed,
2591 &adapter->link_duplex);
2592
2593 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2594 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2595 "Flow Control: %s\n",
2596 adapter->link_speed,
2597 adapter->link_duplex == FULL_DUPLEX ?
2598 "Full Duplex" : "Half Duplex",
2599 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2600 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2601 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2602 E1000_CTRL_TFCE) ? "TX" : "None" )));
2603
2604 /* tweak tx_queue_len according to speed/duplex
2605 * and adjust the timeout factor */
2606 netdev->tx_queue_len = adapter->tx_queue_len;
2607 adapter->tx_timeout_factor = 1;
2608 switch (adapter->link_speed) {
2609 case SPEED_10:
2610 txb2b = 0;
2611 netdev->tx_queue_len = 10;
2612 adapter->tx_timeout_factor = 8;
2613 break;
2614 case SPEED_100:
2615 txb2b = 0;
2616 netdev->tx_queue_len = 100;
2617 /* maybe add some timeout factor ? */
2618 break;
2619 }
2620
2621 if ((adapter->hw.mac_type == e1000_82571 ||
2622 adapter->hw.mac_type == e1000_82572) &&
2623 txb2b == 0) {
2624 uint32_t tarc0;
2625 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2626 tarc0 &= ~(1 << 21);
2627 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2628 }
2629
2630 /* disable TSO for pcie and 10/100 speeds, to avoid
2631 * some hardware issues */
2632 if (!adapter->tso_force &&
2633 adapter->hw.bus_type == e1000_bus_type_pci_express){
2634 switch (adapter->link_speed) {
2635 case SPEED_10:
2636 case SPEED_100:
2637 DPRINTK(PROBE,INFO,
2638 "10/100 speed: disabling TSO\n");
2639 netdev->features &= ~NETIF_F_TSO;
2640 netdev->features &= ~NETIF_F_TSO6;
2641 break;
2642 case SPEED_1000:
2643 netdev->features |= NETIF_F_TSO;
2644 netdev->features |= NETIF_F_TSO6;
2645 break;
2646 default:
2647 /* oops */
2648 break;
2649 }
2650 }
2651
2652 /* enable transmits in the hardware, need to do this
2653 * after setting TARC0 */
2654 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2655 tctl |= E1000_TCTL_EN;
2656 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2657
2658 netif_carrier_on(netdev);
2659 netif_wake_queue(netdev);
2660 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2661 adapter->smartspeed = 0;
2662 } else {
2663 /* make sure the receive unit is started */
2664 if (adapter->hw.rx_needs_kicking) {
2665 struct e1000_hw *hw = &adapter->hw;
2666 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2667 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2668 }
2669 }
2670 } else {
2671 if (netif_carrier_ok(netdev)) {
2672 adapter->link_speed = 0;
2673 adapter->link_duplex = 0;
2674 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2675 netif_carrier_off(netdev);
2676 netif_stop_queue(netdev);
2677 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2678
2679 /* 80003ES2LAN workaround--
2680 * For packet buffer work-around on link down event;
2681 * disable receives in the ISR and
2682 * reset device here in the watchdog
2683 */
2684 if (adapter->hw.mac_type == e1000_80003es2lan)
2685 /* reset device */
2686 schedule_work(&adapter->reset_task);
2687 }
2688
2689 e1000_smartspeed(adapter);
2690 }
2691
2692 e1000_update_stats(adapter);
2693
2694 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2695 adapter->tpt_old = adapter->stats.tpt;
2696 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2697 adapter->colc_old = adapter->stats.colc;
2698
2699 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2700 adapter->gorcl_old = adapter->stats.gorcl;
2701 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2702 adapter->gotcl_old = adapter->stats.gotcl;
2703
2704 e1000_update_adaptive(&adapter->hw);
2705
2706 if (!netif_carrier_ok(netdev)) {
2707 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2708 /* We've lost link, so the controller stops DMA,
2709 * but we've got queued Tx work that's never going
2710 * to get done, so reset controller to flush Tx.
2711 * (Do the reset outside of interrupt context). */
2712 adapter->tx_timeout_count++;
2713 schedule_work(&adapter->reset_task);
2714 }
2715 }
2716
2717 /* Cause software interrupt to ensure rx ring is cleaned */
2718 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2719
2720 /* Force detection of hung controller every watchdog period */
2721 adapter->detect_tx_hung = TRUE;
2722
2723 /* With 82571 controllers, LAA may be overwritten due to controller
2724 * reset from the other port. Set the appropriate LAA in RAR[0] */
2725 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2726 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2727
2728 /* Reset the timer */
2729 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2730 }
2731
2732 enum latency_range {
2733 lowest_latency = 0,
2734 low_latency = 1,
2735 bulk_latency = 2,
2736 latency_invalid = 255
2737 };
2738
2739 /**
2740 * e1000_update_itr - update the dynamic ITR value based on statistics
2741 * Stores a new ITR value based on packets and byte
2742 * counts during the last interrupt. The advantage of per interrupt
2743 * computation is faster updates and more accurate ITR for the current
2744 * traffic pattern. Constants in this function were computed
2745 * based on theoretical maximum wire speed and thresholds were set based
2746 * on testing data as well as attempting to minimize response time
2747 * while increasing bulk throughput.
2748 * this functionality is controlled by the InterruptThrottleRate module
2749 * parameter (see e1000_param.c)
2750 * @adapter: pointer to adapter
2751 * @itr_setting: current adapter->itr
2752 * @packets: the number of packets during this measurement interval
2753 * @bytes: the number of bytes during this measurement interval
2754 **/
2755 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2756 uint16_t itr_setting,
2757 int packets,
2758 int bytes)
2759 {
2760 unsigned int retval = itr_setting;
2761 struct e1000_hw *hw = &adapter->hw;
2762
2763 if (unlikely(hw->mac_type < e1000_82540))
2764 goto update_itr_done;
2765
2766 if (packets == 0)
2767 goto update_itr_done;
2768
2769 switch (itr_setting) {
2770 case lowest_latency:
2771 /* jumbo frames get bulk treatment*/
2772 if (bytes/packets > 8000)
2773 retval = bulk_latency;
2774 else if ((packets < 5) && (bytes > 512))
2775 retval = low_latency;
2776 break;
2777 case low_latency: /* 50 usec aka 20000 ints/s */
2778 if (bytes > 10000) {
2779 /* jumbo frames need bulk latency setting */
2780 if (bytes/packets > 8000)
2781 retval = bulk_latency;
2782 else if ((packets < 10) || ((bytes/packets) > 1200))
2783 retval = bulk_latency;
2784 else if ((packets > 35))
2785 retval = lowest_latency;
2786 } else if (bytes/packets > 2000)
2787 retval = bulk_latency;
2788 else if (packets <= 2 && bytes < 512)
2789 retval = lowest_latency;
2790 break;
2791 case bulk_latency: /* 250 usec aka 4000 ints/s */
2792 if (bytes > 25000) {
2793 if (packets > 35)
2794 retval = low_latency;
2795 } else if (bytes < 6000) {
2796 retval = low_latency;
2797 }
2798 break;
2799 }
2800
2801 update_itr_done:
2802 return retval;
2803 }
2804
2805 static void e1000_set_itr(struct e1000_adapter *adapter)
2806 {
2807 struct e1000_hw *hw = &adapter->hw;
2808 uint16_t current_itr;
2809 uint32_t new_itr = adapter->itr;
2810
2811 if (unlikely(hw->mac_type < e1000_82540))
2812 return;
2813
2814 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2815 if (unlikely(adapter->link_speed != SPEED_1000)) {
2816 current_itr = 0;
2817 new_itr = 4000;
2818 goto set_itr_now;
2819 }
2820
2821 adapter->tx_itr = e1000_update_itr(adapter,
2822 adapter->tx_itr,
2823 adapter->total_tx_packets,
2824 adapter->total_tx_bytes);
2825 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2826 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2827 adapter->tx_itr = low_latency;
2828
2829 adapter->rx_itr = e1000_update_itr(adapter,
2830 adapter->rx_itr,
2831 adapter->total_rx_packets,
2832 adapter->total_rx_bytes);
2833 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2834 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2835 adapter->rx_itr = low_latency;
2836
2837 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2838
2839 switch (current_itr) {
2840 /* counts and packets in update_itr are dependent on these numbers */
2841 case lowest_latency:
2842 new_itr = 70000;
2843 break;
2844 case low_latency:
2845 new_itr = 20000; /* aka hwitr = ~200 */
2846 break;
2847 case bulk_latency:
2848 new_itr = 4000;
2849 break;
2850 default:
2851 break;
2852 }
2853
2854 set_itr_now:
2855 if (new_itr != adapter->itr) {
2856 /* this attempts to bias the interrupt rate towards Bulk
2857 * by adding intermediate steps when interrupt rate is
2858 * increasing */
2859 new_itr = new_itr > adapter->itr ?
2860 min(adapter->itr + (new_itr >> 2), new_itr) :
2861 new_itr;
2862 adapter->itr = new_itr;
2863 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2864 }
2865
2866 return;
2867 }
2868
2869 #define E1000_TX_FLAGS_CSUM 0x00000001
2870 #define E1000_TX_FLAGS_VLAN 0x00000002
2871 #define E1000_TX_FLAGS_TSO 0x00000004
2872 #define E1000_TX_FLAGS_IPV4 0x00000008
2873 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2874 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2875
2876 static int
2877 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2878 struct sk_buff *skb)
2879 {
2880 struct e1000_context_desc *context_desc;
2881 struct e1000_buffer *buffer_info;
2882 unsigned int i;
2883 uint32_t cmd_length = 0;
2884 uint16_t ipcse = 0, tucse, mss;
2885 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2886 int err;
2887
2888 if (skb_is_gso(skb)) {
2889 if (skb_header_cloned(skb)) {
2890 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2891 if (err)
2892 return err;
2893 }
2894
2895 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2896 mss = skb_shinfo(skb)->gso_size;
2897 if (skb->protocol == htons(ETH_P_IP)) {
2898 struct iphdr *iph = ip_hdr(skb);
2899 iph->tot_len = 0;
2900 iph->check = 0;
2901 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2902 iph->daddr, 0,
2903 IPPROTO_TCP,
2904 0);
2905 cmd_length = E1000_TXD_CMD_IP;
2906 ipcse = skb_transport_offset(skb) - 1;
2907 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2908 ipv6_hdr(skb)->payload_len = 0;
2909 tcp_hdr(skb)->check =
2910 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2911 &ipv6_hdr(skb)->daddr,
2912 0, IPPROTO_TCP, 0);
2913 ipcse = 0;
2914 }
2915 ipcss = skb_network_offset(skb);
2916 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2917 tucss = skb_transport_offset(skb);
2918 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2919 tucse = 0;
2920
2921 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2922 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2923
2924 i = tx_ring->next_to_use;
2925 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2926 buffer_info = &tx_ring->buffer_info[i];
2927
2928 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2929 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2930 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2931 context_desc->upper_setup.tcp_fields.tucss = tucss;
2932 context_desc->upper_setup.tcp_fields.tucso = tucso;
2933 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2934 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2935 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2936 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2937
2938 buffer_info->time_stamp = jiffies;
2939 buffer_info->next_to_watch = i;
2940
2941 if (++i == tx_ring->count) i = 0;
2942 tx_ring->next_to_use = i;
2943
2944 return TRUE;
2945 }
2946 return FALSE;
2947 }
2948
2949 static boolean_t
2950 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2951 struct sk_buff *skb)
2952 {
2953 struct e1000_context_desc *context_desc;
2954 struct e1000_buffer *buffer_info;
2955 unsigned int i;
2956 uint8_t css;
2957
2958 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2959 css = skb_transport_offset(skb);
2960
2961 i = tx_ring->next_to_use;
2962 buffer_info = &tx_ring->buffer_info[i];
2963 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2964
2965 context_desc->lower_setup.ip_config = 0;
2966 context_desc->upper_setup.tcp_fields.tucss = css;
2967 context_desc->upper_setup.tcp_fields.tucso =
2968 css + skb->csum_offset;
2969 context_desc->upper_setup.tcp_fields.tucse = 0;
2970 context_desc->tcp_seg_setup.data = 0;
2971 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2972
2973 buffer_info->time_stamp = jiffies;
2974 buffer_info->next_to_watch = i;
2975
2976 if (unlikely(++i == tx_ring->count)) i = 0;
2977 tx_ring->next_to_use = i;
2978
2979 return TRUE;
2980 }
2981
2982 return FALSE;
2983 }
2984
2985 #define E1000_MAX_TXD_PWR 12
2986 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2987
2988 static int
2989 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2990 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2991 unsigned int nr_frags, unsigned int mss)
2992 {
2993 struct e1000_buffer *buffer_info;
2994 unsigned int len = skb->len;
2995 unsigned int offset = 0, size, count = 0, i;
2996 unsigned int f;
2997 len -= skb->data_len;
2998
2999 i = tx_ring->next_to_use;
3000
3001 while (len) {
3002 buffer_info = &tx_ring->buffer_info[i];
3003 size = min(len, max_per_txd);
3004 /* Workaround for Controller erratum --
3005 * descriptor for non-tso packet in a linear SKB that follows a
3006 * tso gets written back prematurely before the data is fully
3007 * DMA'd to the controller */
3008 if (!skb->data_len && tx_ring->last_tx_tso &&
3009 !skb_is_gso(skb)) {
3010 tx_ring->last_tx_tso = 0;
3011 size -= 4;
3012 }
3013
3014 /* Workaround for premature desc write-backs
3015 * in TSO mode. Append 4-byte sentinel desc */
3016 if (unlikely(mss && !nr_frags && size == len && size > 8))
3017 size -= 4;
3018 /* work-around for errata 10 and it applies
3019 * to all controllers in PCI-X mode
3020 * The fix is to make sure that the first descriptor of a
3021 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3022 */
3023 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3024 (size > 2015) && count == 0))
3025 size = 2015;
3026
3027 /* Workaround for potential 82544 hang in PCI-X. Avoid
3028 * terminating buffers within evenly-aligned dwords. */
3029 if (unlikely(adapter->pcix_82544 &&
3030 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3031 size > 4))
3032 size -= 4;
3033
3034 buffer_info->length = size;
3035 buffer_info->dma =
3036 pci_map_single(adapter->pdev,
3037 skb->data + offset,
3038 size,
3039 PCI_DMA_TODEVICE);
3040 buffer_info->time_stamp = jiffies;
3041 buffer_info->next_to_watch = i;
3042
3043 len -= size;
3044 offset += size;
3045 count++;
3046 if (unlikely(++i == tx_ring->count)) i = 0;
3047 }
3048
3049 for (f = 0; f < nr_frags; f++) {
3050 struct skb_frag_struct *frag;
3051
3052 frag = &skb_shinfo(skb)->frags[f];
3053 len = frag->size;
3054 offset = frag->page_offset;
3055
3056 while (len) {
3057 buffer_info = &tx_ring->buffer_info[i];
3058 size = min(len, max_per_txd);
3059 /* Workaround for premature desc write-backs
3060 * in TSO mode. Append 4-byte sentinel desc */
3061 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3062 size -= 4;
3063 /* Workaround for potential 82544 hang in PCI-X.
3064 * Avoid terminating buffers within evenly-aligned
3065 * dwords. */
3066 if (unlikely(adapter->pcix_82544 &&
3067 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3068 size > 4))
3069 size -= 4;
3070
3071 buffer_info->length = size;
3072 buffer_info->dma =
3073 pci_map_page(adapter->pdev,
3074 frag->page,
3075 offset,
3076 size,
3077 PCI_DMA_TODEVICE);
3078 buffer_info->time_stamp = jiffies;
3079 buffer_info->next_to_watch = i;
3080
3081 len -= size;
3082 offset += size;
3083 count++;
3084 if (unlikely(++i == tx_ring->count)) i = 0;
3085 }
3086 }
3087
3088 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3089 tx_ring->buffer_info[i].skb = skb;
3090 tx_ring->buffer_info[first].next_to_watch = i;
3091
3092 return count;
3093 }
3094
3095 static void
3096 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3097 int tx_flags, int count)
3098 {
3099 struct e1000_tx_desc *tx_desc = NULL;
3100 struct e1000_buffer *buffer_info;
3101 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3102 unsigned int i;
3103
3104 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3105 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3106 E1000_TXD_CMD_TSE;
3107 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3108
3109 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3110 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3111 }
3112
3113 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3114 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3115 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3116 }
3117
3118 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3119 txd_lower |= E1000_TXD_CMD_VLE;
3120 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3121 }
3122
3123 i = tx_ring->next_to_use;
3124
3125 while (count--) {
3126 buffer_info = &tx_ring->buffer_info[i];
3127 tx_desc = E1000_TX_DESC(*tx_ring, i);
3128 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3129 tx_desc->lower.data =
3130 cpu_to_le32(txd_lower | buffer_info->length);
3131 tx_desc->upper.data = cpu_to_le32(txd_upper);
3132 if (unlikely(++i == tx_ring->count)) i = 0;
3133 }
3134
3135 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3136
3137 /* Force memory writes to complete before letting h/w
3138 * know there are new descriptors to fetch. (Only
3139 * applicable for weak-ordered memory model archs,
3140 * such as IA-64). */
3141 wmb();
3142
3143 tx_ring->next_to_use = i;
3144 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3145 /* we need this if more than one processor can write to our tail
3146 * at a time, it syncronizes IO on IA64/Altix systems */
3147 mmiowb();
3148 }
3149
3150 /**
3151 * 82547 workaround to avoid controller hang in half-duplex environment.
3152 * The workaround is to avoid queuing a large packet that would span
3153 * the internal Tx FIFO ring boundary by notifying the stack to resend
3154 * the packet at a later time. This gives the Tx FIFO an opportunity to
3155 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3156 * to the beginning of the Tx FIFO.
3157 **/
3158
3159 #define E1000_FIFO_HDR 0x10
3160 #define E1000_82547_PAD_LEN 0x3E0
3161
3162 static int
3163 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3164 {
3165 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3166 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3167
3168 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3169
3170 if (adapter->link_duplex != HALF_DUPLEX)
3171 goto no_fifo_stall_required;
3172
3173 if (atomic_read(&adapter->tx_fifo_stall))
3174 return 1;
3175
3176 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3177 atomic_set(&adapter->tx_fifo_stall, 1);
3178 return 1;
3179 }
3180
3181 no_fifo_stall_required:
3182 adapter->tx_fifo_head += skb_fifo_len;
3183 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3184 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3185 return 0;
3186 }
3187
3188 #define MINIMUM_DHCP_PACKET_SIZE 282
3189 static int
3190 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3191 {
3192 struct e1000_hw *hw = &adapter->hw;
3193 uint16_t length, offset;
3194 if (vlan_tx_tag_present(skb)) {
3195 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3196 ( adapter->hw.mng_cookie.status &
3197 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3198 return 0;
3199 }
3200 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3201 struct ethhdr *eth = (struct ethhdr *) skb->data;
3202 if ((htons(ETH_P_IP) == eth->h_proto)) {
3203 const struct iphdr *ip =
3204 (struct iphdr *)((uint8_t *)skb->data+14);
3205 if (IPPROTO_UDP == ip->protocol) {
3206 struct udphdr *udp =
3207 (struct udphdr *)((uint8_t *)ip +
3208 (ip->ihl << 2));
3209 if (ntohs(udp->dest) == 67) {
3210 offset = (uint8_t *)udp + 8 - skb->data;
3211 length = skb->len - offset;
3212
3213 return e1000_mng_write_dhcp_info(hw,
3214 (uint8_t *)udp + 8,
3215 length);
3216 }
3217 }
3218 }
3219 }
3220 return 0;
3221 }
3222
3223 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3224 {
3225 struct e1000_adapter *adapter = netdev_priv(netdev);
3226 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3227
3228 netif_stop_queue(netdev);
3229 /* Herbert's original patch had:
3230 * smp_mb__after_netif_stop_queue();
3231 * but since that doesn't exist yet, just open code it. */
3232 smp_mb();
3233
3234 /* We need to check again in a case another CPU has just
3235 * made room available. */
3236 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3237 return -EBUSY;
3238
3239 /* A reprieve! */
3240 netif_start_queue(netdev);
3241 ++adapter->restart_queue;
3242 return 0;
3243 }
3244
3245 static int e1000_maybe_stop_tx(struct net_device *netdev,
3246 struct e1000_tx_ring *tx_ring, int size)
3247 {
3248 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3249 return 0;
3250 return __e1000_maybe_stop_tx(netdev, size);
3251 }
3252
3253 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3254 static int
3255 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3256 {
3257 struct e1000_adapter *adapter = netdev_priv(netdev);
3258 struct e1000_tx_ring *tx_ring;
3259 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3260 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3261 unsigned int tx_flags = 0;
3262 unsigned int len = skb->len - skb->data_len;
3263 unsigned long flags;
3264 unsigned int nr_frags;
3265 unsigned int mss;
3266 int count = 0;
3267 int tso;
3268 unsigned int f;
3269
3270 /* This goes back to the question of how to logically map a tx queue
3271 * to a flow. Right now, performance is impacted slightly negatively
3272 * if using multiple tx queues. If the stack breaks away from a
3273 * single qdisc implementation, we can look at this again. */
3274 tx_ring = adapter->tx_ring;
3275
3276 if (unlikely(skb->len <= 0)) {
3277 dev_kfree_skb_any(skb);
3278 return NETDEV_TX_OK;
3279 }
3280
3281 /* 82571 and newer doesn't need the workaround that limited descriptor
3282 * length to 4kB */
3283 if (adapter->hw.mac_type >= e1000_82571)
3284 max_per_txd = 8192;
3285
3286 mss = skb_shinfo(skb)->gso_size;
3287 /* The controller does a simple calculation to
3288 * make sure there is enough room in the FIFO before
3289 * initiating the DMA for each buffer. The calc is:
3290 * 4 = ceil(buffer len/mss). To make sure we don't
3291 * overrun the FIFO, adjust the max buffer len if mss
3292 * drops. */
3293 if (mss) {
3294 uint8_t hdr_len;
3295 max_per_txd = min(mss << 2, max_per_txd);
3296 max_txd_pwr = fls(max_per_txd) - 1;
3297
3298 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3299 * points to just header, pull a few bytes of payload from
3300 * frags into skb->data */
3301 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3302 if (skb->data_len && hdr_len == len) {
3303 switch (adapter->hw.mac_type) {
3304 unsigned int pull_size;
3305 case e1000_82544:
3306 /* Make sure we have room to chop off 4 bytes,
3307 * and that the end alignment will work out to
3308 * this hardware's requirements
3309 * NOTE: this is a TSO only workaround
3310 * if end byte alignment not correct move us
3311 * into the next dword */
3312 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3313 break;
3314 /* fall through */
3315 case e1000_82571:
3316 case e1000_82572:
3317 case e1000_82573:
3318 case e1000_ich8lan:
3319 pull_size = min((unsigned int)4, skb->data_len);
3320 if (!__pskb_pull_tail(skb, pull_size)) {
3321 DPRINTK(DRV, ERR,
3322 "__pskb_pull_tail failed.\n");
3323 dev_kfree_skb_any(skb);
3324 return NETDEV_TX_OK;
3325 }
3326 len = skb->len - skb->data_len;
3327 break;
3328 default:
3329 /* do nothing */
3330 break;
3331 }
3332 }
3333 }
3334
3335 /* reserve a descriptor for the offload context */
3336 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3337 count++;
3338 count++;
3339
3340 /* Controller Erratum workaround */
3341 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3342 count++;
3343
3344 count += TXD_USE_COUNT(len, max_txd_pwr);
3345
3346 if (adapter->pcix_82544)
3347 count++;
3348
3349 /* work-around for errata 10 and it applies to all controllers
3350 * in PCI-X mode, so add one more descriptor to the count
3351 */
3352 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3353 (len > 2015)))
3354 count++;
3355
3356 nr_frags = skb_shinfo(skb)->nr_frags;
3357 for (f = 0; f < nr_frags; f++)
3358 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3359 max_txd_pwr);
3360 if (adapter->pcix_82544)
3361 count += nr_frags;
3362
3363
3364 if (adapter->hw.tx_pkt_filtering &&
3365 (adapter->hw.mac_type == e1000_82573))
3366 e1000_transfer_dhcp_info(adapter, skb);
3367
3368 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3369 /* Collision - tell upper layer to requeue */
3370 return NETDEV_TX_LOCKED;
3371
3372 /* need: count + 2 desc gap to keep tail from touching
3373 * head, otherwise try next time */
3374 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3375 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3376 return NETDEV_TX_BUSY;
3377 }
3378
3379 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3380 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3381 netif_stop_queue(netdev);
3382 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3383 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3384 return NETDEV_TX_BUSY;
3385 }
3386 }
3387
3388 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3389 tx_flags |= E1000_TX_FLAGS_VLAN;
3390 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3391 }
3392
3393 first = tx_ring->next_to_use;
3394
3395 tso = e1000_tso(adapter, tx_ring, skb);
3396 if (tso < 0) {
3397 dev_kfree_skb_any(skb);
3398 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3399 return NETDEV_TX_OK;
3400 }
3401
3402 if (likely(tso)) {
3403 tx_ring->last_tx_tso = 1;
3404 tx_flags |= E1000_TX_FLAGS_TSO;
3405 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3406 tx_flags |= E1000_TX_FLAGS_CSUM;
3407
3408 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3409 * 82571 hardware supports TSO capabilities for IPv6 as well...
3410 * no longer assume, we must. */
3411 if (likely(skb->protocol == htons(ETH_P_IP)))
3412 tx_flags |= E1000_TX_FLAGS_IPV4;
3413
3414 e1000_tx_queue(adapter, tx_ring, tx_flags,
3415 e1000_tx_map(adapter, tx_ring, skb, first,
3416 max_per_txd, nr_frags, mss));
3417
3418 netdev->trans_start = jiffies;
3419
3420 /* Make sure there is space in the ring for the next send. */
3421 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3422
3423 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3424 return NETDEV_TX_OK;
3425 }
3426
3427 /**
3428 * e1000_tx_timeout - Respond to a Tx Hang
3429 * @netdev: network interface device structure
3430 **/
3431
3432 static void
3433 e1000_tx_timeout(struct net_device *netdev)
3434 {
3435 struct e1000_adapter *adapter = netdev_priv(netdev);
3436
3437 /* Do the reset outside of interrupt context */
3438 adapter->tx_timeout_count++;
3439 schedule_work(&adapter->reset_task);
3440 }
3441
3442 static void
3443 e1000_reset_task(struct work_struct *work)
3444 {
3445 struct e1000_adapter *adapter =
3446 container_of(work, struct e1000_adapter, reset_task);
3447
3448 e1000_reinit_locked(adapter);
3449 }
3450
3451 /**
3452 * e1000_get_stats - Get System Network Statistics
3453 * @netdev: network interface device structure
3454 *
3455 * Returns the address of the device statistics structure.
3456 * The statistics are actually updated from the timer callback.
3457 **/
3458
3459 static struct net_device_stats *
3460 e1000_get_stats(struct net_device *netdev)
3461 {
3462 struct e1000_adapter *adapter = netdev_priv(netdev);
3463
3464 /* only return the current stats */
3465 return &adapter->net_stats;
3466 }
3467
3468 /**
3469 * e1000_change_mtu - Change the Maximum Transfer Unit
3470 * @netdev: network interface device structure
3471 * @new_mtu: new value for maximum frame size
3472 *
3473 * Returns 0 on success, negative on failure
3474 **/
3475
3476 static int
3477 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3478 {
3479 struct e1000_adapter *adapter = netdev_priv(netdev);
3480 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3481 uint16_t eeprom_data = 0;
3482
3483 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3484 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3485 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3486 return -EINVAL;
3487 }
3488
3489 /* Adapter-specific max frame size limits. */
3490 switch (adapter->hw.mac_type) {
3491 case e1000_undefined ... e1000_82542_rev2_1:
3492 case e1000_ich8lan:
3493 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3494 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3495 return -EINVAL;
3496 }
3497 break;
3498 case e1000_82573:
3499 /* Jumbo Frames not supported if:
3500 * - this is not an 82573L device
3501 * - ASPM is enabled in any way (0x1A bits 3:2) */
3502 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3503 &eeprom_data);
3504 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3505 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3506 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3507 DPRINTK(PROBE, ERR,
3508 "Jumbo Frames not supported.\n");
3509 return -EINVAL;
3510 }
3511 break;
3512 }
3513 /* ERT will be enabled later to enable wire speed receives */
3514
3515 /* fall through to get support */
3516 case e1000_82571:
3517 case e1000_82572:
3518 case e1000_80003es2lan:
3519 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3520 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3521 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3522 return -EINVAL;
3523 }
3524 break;
3525 default:
3526 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3527 break;
3528 }
3529
3530 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3531 * means we reserve 2 more, this pushes us to allocate from the next
3532 * larger slab size
3533 * i.e. RXBUFFER_2048 --> size-4096 slab */
3534
3535 if (max_frame <= E1000_RXBUFFER_256)
3536 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3537 else if (max_frame <= E1000_RXBUFFER_512)
3538 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3539 else if (max_frame <= E1000_RXBUFFER_1024)
3540 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3541 else if (max_frame <= E1000_RXBUFFER_2048)
3542 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3543 else if (max_frame <= E1000_RXBUFFER_4096)
3544 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3545 else if (max_frame <= E1000_RXBUFFER_8192)
3546 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3547 else if (max_frame <= E1000_RXBUFFER_16384)
3548 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3549
3550 /* adjust allocation if LPE protects us, and we aren't using SBP */
3551 if (!adapter->hw.tbi_compatibility_on &&
3552 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3553 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3554 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3555
3556 netdev->mtu = new_mtu;
3557 adapter->hw.max_frame_size = max_frame;
3558
3559 if (netif_running(netdev))
3560 e1000_reinit_locked(adapter);
3561
3562 return 0;
3563 }
3564
3565 /**
3566 * e1000_update_stats - Update the board statistics counters
3567 * @adapter: board private structure
3568 **/
3569
3570 void
3571 e1000_update_stats(struct e1000_adapter *adapter)
3572 {
3573 struct e1000_hw *hw = &adapter->hw;
3574 struct pci_dev *pdev = adapter->pdev;
3575 unsigned long flags;
3576 uint16_t phy_tmp;
3577
3578 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3579
3580 /*
3581 * Prevent stats update while adapter is being reset, or if the pci
3582 * connection is down.
3583 */
3584 if (adapter->link_speed == 0)
3585 return;
3586 if (pci_channel_offline(pdev))
3587 return;
3588
3589 spin_lock_irqsave(&adapter->stats_lock, flags);
3590
3591 /* these counters are modified from e1000_tbi_adjust_stats,
3592 * called from the interrupt context, so they must only
3593 * be written while holding adapter->stats_lock
3594 */
3595
3596 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3597 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3598 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3599 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3600 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3601 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3602 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3603
3604 if (adapter->hw.mac_type != e1000_ich8lan) {
3605 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3606 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3607 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3608 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3609 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3610 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3611 }
3612
3613 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3614 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3615 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3616 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3617 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3618 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3619 adapter->stats.dc += E1000_READ_REG(hw, DC);
3620 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3621 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3622 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3623 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3624 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3625 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3626 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3627 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3628 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3629 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3630 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3631 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3632 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3633 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3634 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3635 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3636 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3637 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3638 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3639
3640 if (adapter->hw.mac_type != e1000_ich8lan) {
3641 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3642 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3643 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3644 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3645 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3646 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3647 }
3648
3649 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3650 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3651
3652 /* used for adaptive IFS */
3653
3654 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3655 adapter->stats.tpt += hw->tx_packet_delta;
3656 hw->collision_delta = E1000_READ_REG(hw, COLC);
3657 adapter->stats.colc += hw->collision_delta;
3658
3659 if (hw->mac_type >= e1000_82543) {
3660 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3661 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3662 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3663 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3664 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3665 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3666 }
3667 if (hw->mac_type > e1000_82547_rev_2) {
3668 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3669 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3670
3671 if (adapter->hw.mac_type != e1000_ich8lan) {
3672 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3673 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3674 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3675 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3676 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3677 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3678 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3679 }
3680 }
3681
3682 /* Fill out the OS statistics structure */
3683 adapter->net_stats.rx_packets = adapter->stats.gprc;
3684 adapter->net_stats.tx_packets = adapter->stats.gptc;
3685 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3686 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3687 adapter->net_stats.multicast = adapter->stats.mprc;
3688 adapter->net_stats.collisions = adapter->stats.colc;
3689
3690 /* Rx Errors */
3691
3692 /* RLEC on some newer hardware can be incorrect so build
3693 * our own version based on RUC and ROC */
3694 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3695 adapter->stats.crcerrs + adapter->stats.algnerrc +
3696 adapter->stats.ruc + adapter->stats.roc +
3697 adapter->stats.cexterr;
3698 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3699 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3700 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3701 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3702 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3703
3704 /* Tx Errors */
3705 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3706 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3707 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3708 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3709 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3710 if (adapter->hw.bad_tx_carr_stats_fd &&
3711 adapter->link_duplex == FULL_DUPLEX) {
3712 adapter->net_stats.tx_carrier_errors = 0;
3713 adapter->stats.tncrs = 0;
3714 }
3715
3716 /* Tx Dropped needs to be maintained elsewhere */
3717
3718 /* Phy Stats */
3719 if (hw->media_type == e1000_media_type_copper) {
3720 if ((adapter->link_speed == SPEED_1000) &&
3721 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3722 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3723 adapter->phy_stats.idle_errors += phy_tmp;
3724 }
3725
3726 if ((hw->mac_type <= e1000_82546) &&
3727 (hw->phy_type == e1000_phy_m88) &&
3728 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3729 adapter->phy_stats.receive_errors += phy_tmp;
3730 }
3731
3732 /* Management Stats */
3733 if (adapter->hw.has_smbus) {
3734 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3735 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3736 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3737 }
3738
3739 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3740 }
3741
3742 /**
3743 * e1000_intr_msi - Interrupt Handler
3744 * @irq: interrupt number
3745 * @data: pointer to a network interface device structure
3746 **/
3747
3748 static irqreturn_t
3749 e1000_intr_msi(int irq, void *data)
3750 {
3751 struct net_device *netdev = data;
3752 struct e1000_adapter *adapter = netdev_priv(netdev);
3753 struct e1000_hw *hw = &adapter->hw;
3754 #ifndef CONFIG_E1000_NAPI
3755 int i;
3756 #endif
3757 uint32_t icr = E1000_READ_REG(hw, ICR);
3758
3759 #ifdef CONFIG_E1000_NAPI
3760 /* read ICR disables interrupts using IAM, so keep up with our
3761 * enable/disable accounting */
3762 atomic_inc(&adapter->irq_sem);
3763 #endif
3764 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3765 hw->get_link_status = 1;
3766 /* 80003ES2LAN workaround-- For packet buffer work-around on
3767 * link down event; disable receives here in the ISR and reset
3768 * adapter in watchdog */
3769 if (netif_carrier_ok(netdev) &&
3770 (adapter->hw.mac_type == e1000_80003es2lan)) {
3771 /* disable receives */
3772 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3773 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3774 }
3775 /* guard against interrupt when we're going down */
3776 if (!test_bit(__E1000_DOWN, &adapter->flags))
3777 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3778 }
3779
3780 #ifdef CONFIG_E1000_NAPI
3781 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3782 adapter->total_tx_bytes = 0;
3783 adapter->total_tx_packets = 0;
3784 adapter->total_rx_bytes = 0;
3785 adapter->total_rx_packets = 0;
3786 __netif_rx_schedule(netdev, &adapter->napi);
3787 } else
3788 e1000_irq_enable(adapter);
3789 #else
3790 adapter->total_tx_bytes = 0;
3791 adapter->total_rx_bytes = 0;
3792 adapter->total_tx_packets = 0;
3793 adapter->total_rx_packets = 0;
3794
3795 for (i = 0; i < E1000_MAX_INTR; i++)
3796 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3797 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3798 break;
3799
3800 if (likely(adapter->itr_setting & 3))
3801 e1000_set_itr(adapter);
3802 #endif
3803
3804 return IRQ_HANDLED;
3805 }
3806
3807 /**
3808 * e1000_intr - Interrupt Handler
3809 * @irq: interrupt number
3810 * @data: pointer to a network interface device structure
3811 **/
3812
3813 static irqreturn_t
3814 e1000_intr(int irq, void *data)
3815 {
3816 struct net_device *netdev = data;
3817 struct e1000_adapter *adapter = netdev_priv(netdev);
3818 struct e1000_hw *hw = &adapter->hw;
3819 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3820 #ifndef CONFIG_E1000_NAPI
3821 int i;
3822 #endif
3823 if (unlikely(!icr))
3824 return IRQ_NONE; /* Not our interrupt */
3825
3826 #ifdef CONFIG_E1000_NAPI
3827 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3828 * not set, then the adapter didn't send an interrupt */
3829 if (unlikely(hw->mac_type >= e1000_82571 &&
3830 !(icr & E1000_ICR_INT_ASSERTED)))
3831 return IRQ_NONE;
3832
3833 /* Interrupt Auto-Mask...upon reading ICR,
3834 * interrupts are masked. No need for the
3835 * IMC write, but it does mean we should
3836 * account for it ASAP. */
3837 if (likely(hw->mac_type >= e1000_82571))
3838 atomic_inc(&adapter->irq_sem);
3839 #endif
3840
3841 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3842 hw->get_link_status = 1;
3843 /* 80003ES2LAN workaround--
3844 * For packet buffer work-around on link down event;
3845 * disable receives here in the ISR and
3846 * reset adapter in watchdog
3847 */
3848 if (netif_carrier_ok(netdev) &&
3849 (adapter->hw.mac_type == e1000_80003es2lan)) {
3850 /* disable receives */
3851 rctl = E1000_READ_REG(hw, RCTL);
3852 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3853 }
3854 /* guard against interrupt when we're going down */
3855 if (!test_bit(__E1000_DOWN, &adapter->flags))
3856 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3857 }
3858
3859 #ifdef CONFIG_E1000_NAPI
3860 if (unlikely(hw->mac_type < e1000_82571)) {
3861 /* disable interrupts, without the synchronize_irq bit */
3862 atomic_inc(&adapter->irq_sem);
3863 E1000_WRITE_REG(hw, IMC, ~0);
3864 E1000_WRITE_FLUSH(hw);
3865 }
3866 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3867 adapter->total_tx_bytes = 0;
3868 adapter->total_tx_packets = 0;
3869 adapter->total_rx_bytes = 0;
3870 adapter->total_rx_packets = 0;
3871 __netif_rx_schedule(netdev, &adapter->napi);
3872 } else
3873 /* this really should not happen! if it does it is basically a
3874 * bug, but not a hard error, so enable ints and continue */
3875 e1000_irq_enable(adapter);
3876 #else
3877 /* Writing IMC and IMS is needed for 82547.
3878 * Due to Hub Link bus being occupied, an interrupt
3879 * de-assertion message is not able to be sent.
3880 * When an interrupt assertion message is generated later,
3881 * two messages are re-ordered and sent out.
3882 * That causes APIC to think 82547 is in de-assertion
3883 * state, while 82547 is in assertion state, resulting
3884 * in dead lock. Writing IMC forces 82547 into
3885 * de-assertion state.
3886 */
3887 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3888 atomic_inc(&adapter->irq_sem);
3889 E1000_WRITE_REG(hw, IMC, ~0);
3890 }
3891
3892 adapter->total_tx_bytes = 0;
3893 adapter->total_rx_bytes = 0;
3894 adapter->total_tx_packets = 0;
3895 adapter->total_rx_packets = 0;
3896
3897 for (i = 0; i < E1000_MAX_INTR; i++)
3898 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3899 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3900 break;
3901
3902 if (likely(adapter->itr_setting & 3))
3903 e1000_set_itr(adapter);
3904
3905 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3906 e1000_irq_enable(adapter);
3907
3908 #endif
3909 return IRQ_HANDLED;
3910 }
3911
3912 #ifdef CONFIG_E1000_NAPI
3913 /**
3914 * e1000_clean - NAPI Rx polling callback
3915 * @adapter: board private structure
3916 **/
3917
3918 static int
3919 e1000_clean(struct napi_struct *napi, int budget)
3920 {
3921 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3922 struct net_device *poll_dev = adapter->netdev;
3923 int tx_cleaned = 0, work_done = 0;
3924
3925 /* Must NOT use netdev_priv macro here. */
3926 adapter = poll_dev->priv;
3927
3928 /* e1000_clean is called per-cpu. This lock protects
3929 * tx_ring[0] from being cleaned by multiple cpus
3930 * simultaneously. A failure obtaining the lock means
3931 * tx_ring[0] is currently being cleaned anyway. */
3932 if (spin_trylock(&adapter->tx_queue_lock)) {
3933 tx_cleaned = e1000_clean_tx_irq(adapter,
3934 &adapter->tx_ring[0]);
3935 spin_unlock(&adapter->tx_queue_lock);
3936 }
3937
3938 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3939 &work_done, budget);
3940
3941 if (tx_cleaned)
3942 work_done = budget;
3943
3944 /* If budget not fully consumed, exit the polling mode */
3945 if (work_done < budget) {
3946 if (likely(adapter->itr_setting & 3))
3947 e1000_set_itr(adapter);
3948 netif_rx_complete(poll_dev, napi);
3949 e1000_irq_enable(adapter);
3950 }
3951
3952 return work_done;
3953 }
3954
3955 #endif
3956 /**
3957 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3958 * @adapter: board private structure
3959 **/
3960
3961 static boolean_t
3962 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3963 struct e1000_tx_ring *tx_ring)
3964 {
3965 struct net_device *netdev = adapter->netdev;
3966 struct e1000_tx_desc *tx_desc, *eop_desc;
3967 struct e1000_buffer *buffer_info;
3968 unsigned int i, eop;
3969 #ifdef CONFIG_E1000_NAPI
3970 unsigned int count = 0;
3971 #endif
3972 boolean_t cleaned = FALSE;
3973 unsigned int total_tx_bytes=0, total_tx_packets=0;
3974
3975 i = tx_ring->next_to_clean;
3976 eop = tx_ring->buffer_info[i].next_to_watch;
3977 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3978
3979 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3980 for (cleaned = FALSE; !cleaned; ) {
3981 tx_desc = E1000_TX_DESC(*tx_ring, i);
3982 buffer_info = &tx_ring->buffer_info[i];
3983 cleaned = (i == eop);
3984
3985 if (cleaned) {
3986 struct sk_buff *skb = buffer_info->skb;
3987 unsigned int segs, bytecount;
3988 segs = skb_shinfo(skb)->gso_segs ?: 1;
3989 /* multiply data chunks by size of headers */
3990 bytecount = ((segs - 1) * skb_headlen(skb)) +
3991 skb->len;
3992 total_tx_packets += segs;
3993 total_tx_bytes += bytecount;
3994 }
3995 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3996 tx_desc->upper.data = 0;
3997
3998 if (unlikely(++i == tx_ring->count)) i = 0;
3999 }
4000
4001 eop = tx_ring->buffer_info[i].next_to_watch;
4002 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4003 #ifdef CONFIG_E1000_NAPI
4004 #define E1000_TX_WEIGHT 64
4005 /* weight of a sort for tx, to avoid endless transmit cleanup */
4006 if (count++ == E1000_TX_WEIGHT) break;
4007 #endif
4008 }
4009
4010 tx_ring->next_to_clean = i;
4011
4012 #define TX_WAKE_THRESHOLD 32
4013 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4014 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4015 /* Make sure that anybody stopping the queue after this
4016 * sees the new next_to_clean.
4017 */
4018 smp_mb();
4019 if (netif_queue_stopped(netdev)) {
4020 netif_wake_queue(netdev);
4021 ++adapter->restart_queue;
4022 }
4023 }
4024
4025 if (adapter->detect_tx_hung) {
4026 /* Detect a transmit hang in hardware, this serializes the
4027 * check with the clearing of time_stamp and movement of i */
4028 adapter->detect_tx_hung = FALSE;
4029 if (tx_ring->buffer_info[eop].dma &&
4030 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4031 (adapter->tx_timeout_factor * HZ))
4032 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4033 E1000_STATUS_TXOFF)) {
4034
4035 /* detected Tx unit hang */
4036 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4037 " Tx Queue <%lu>\n"
4038 " TDH <%x>\n"
4039 " TDT <%x>\n"
4040 " next_to_use <%x>\n"
4041 " next_to_clean <%x>\n"
4042 "buffer_info[next_to_clean]\n"
4043 " time_stamp <%lx>\n"
4044 " next_to_watch <%x>\n"
4045 " jiffies <%lx>\n"
4046 " next_to_watch.status <%x>\n",
4047 (unsigned long)((tx_ring - adapter->tx_ring) /
4048 sizeof(struct e1000_tx_ring)),
4049 readl(adapter->hw.hw_addr + tx_ring->tdh),
4050 readl(adapter->hw.hw_addr + tx_ring->tdt),
4051 tx_ring->next_to_use,
4052 tx_ring->next_to_clean,
4053 tx_ring->buffer_info[eop].time_stamp,
4054 eop,
4055 jiffies,
4056 eop_desc->upper.fields.status);
4057 netif_stop_queue(netdev);
4058 }
4059 }
4060 adapter->total_tx_bytes += total_tx_bytes;
4061 adapter->total_tx_packets += total_tx_packets;
4062 return cleaned;
4063 }
4064
4065 /**
4066 * e1000_rx_checksum - Receive Checksum Offload for 82543
4067 * @adapter: board private structure
4068 * @status_err: receive descriptor status and error fields
4069 * @csum: receive descriptor csum field
4070 * @sk_buff: socket buffer with received data
4071 **/
4072
4073 static void
4074 e1000_rx_checksum(struct e1000_adapter *adapter,
4075 uint32_t status_err, uint32_t csum,
4076 struct sk_buff *skb)
4077 {
4078 uint16_t status = (uint16_t)status_err;
4079 uint8_t errors = (uint8_t)(status_err >> 24);
4080 skb->ip_summed = CHECKSUM_NONE;
4081
4082 /* 82543 or newer only */
4083 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4084 /* Ignore Checksum bit is set */
4085 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4086 /* TCP/UDP checksum error bit is set */
4087 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4088 /* let the stack verify checksum errors */
4089 adapter->hw_csum_err++;
4090 return;
4091 }
4092 /* TCP/UDP Checksum has not been calculated */
4093 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4094 if (!(status & E1000_RXD_STAT_TCPCS))
4095 return;
4096 } else {
4097 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4098 return;
4099 }
4100 /* It must be a TCP or UDP packet with a valid checksum */
4101 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4102 /* TCP checksum is good */
4103 skb->ip_summed = CHECKSUM_UNNECESSARY;
4104 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4105 /* IP fragment with UDP payload */
4106 /* Hardware complements the payload checksum, so we undo it
4107 * and then put the value in host order for further stack use.
4108 */
4109 csum = ntohl(csum ^ 0xFFFF);
4110 skb->csum = csum;
4111 skb->ip_summed = CHECKSUM_COMPLETE;
4112 }
4113 adapter->hw_csum_good++;
4114 }
4115
4116 /**
4117 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4118 * @adapter: board private structure
4119 **/
4120
4121 static boolean_t
4122 #ifdef CONFIG_E1000_NAPI
4123 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4124 struct e1000_rx_ring *rx_ring,
4125 int *work_done, int work_to_do)
4126 #else
4127 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4128 struct e1000_rx_ring *rx_ring)
4129 #endif
4130 {
4131 struct net_device *netdev = adapter->netdev;
4132 struct pci_dev *pdev = adapter->pdev;
4133 struct e1000_rx_desc *rx_desc, *next_rxd;
4134 struct e1000_buffer *buffer_info, *next_buffer;
4135 unsigned long flags;
4136 uint32_t length;
4137 uint8_t last_byte;
4138 unsigned int i;
4139 int cleaned_count = 0;
4140 boolean_t cleaned = FALSE;
4141 unsigned int total_rx_bytes=0, total_rx_packets=0;
4142
4143 i = rx_ring->next_to_clean;
4144 rx_desc = E1000_RX_DESC(*rx_ring, i);
4145 buffer_info = &rx_ring->buffer_info[i];
4146
4147 while (rx_desc->status & E1000_RXD_STAT_DD) {
4148 struct sk_buff *skb;
4149 u8 status;
4150
4151 #ifdef CONFIG_E1000_NAPI
4152 if (*work_done >= work_to_do)
4153 break;
4154 (*work_done)++;
4155 #endif
4156 status = rx_desc->status;
4157 skb = buffer_info->skb;
4158 buffer_info->skb = NULL;
4159
4160 prefetch(skb->data - NET_IP_ALIGN);
4161
4162 if (++i == rx_ring->count) i = 0;
4163 next_rxd = E1000_RX_DESC(*rx_ring, i);
4164 prefetch(next_rxd);
4165
4166 next_buffer = &rx_ring->buffer_info[i];
4167
4168 cleaned = TRUE;
4169 cleaned_count++;
4170 pci_unmap_single(pdev,
4171 buffer_info->dma,
4172 buffer_info->length,
4173 PCI_DMA_FROMDEVICE);
4174
4175 length = le16_to_cpu(rx_desc->length);
4176
4177 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4178 /* All receives must fit into a single buffer */
4179 E1000_DBG("%s: Receive packet consumed multiple"
4180 " buffers\n", netdev->name);
4181 /* recycle */
4182 buffer_info->skb = skb;
4183 goto next_desc;
4184 }
4185
4186 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4187 last_byte = *(skb->data + length - 1);
4188 if (TBI_ACCEPT(&adapter->hw, status,
4189 rx_desc->errors, length, last_byte)) {
4190 spin_lock_irqsave(&adapter->stats_lock, flags);
4191 e1000_tbi_adjust_stats(&adapter->hw,
4192 &adapter->stats,
4193 length, skb->data);
4194 spin_unlock_irqrestore(&adapter->stats_lock,
4195 flags);
4196 length--;
4197 } else {
4198 /* recycle */
4199 buffer_info->skb = skb;
4200 goto next_desc;
4201 }
4202 }
4203
4204 /* adjust length to remove Ethernet CRC, this must be
4205 * done after the TBI_ACCEPT workaround above */
4206 length -= 4;
4207
4208 /* probably a little skewed due to removing CRC */
4209 total_rx_bytes += length;
4210 total_rx_packets++;
4211
4212 /* code added for copybreak, this should improve
4213 * performance for small packets with large amounts
4214 * of reassembly being done in the stack */
4215 if (length < copybreak) {
4216 struct sk_buff *new_skb =
4217 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4218 if (new_skb) {
4219 skb_reserve(new_skb, NET_IP_ALIGN);
4220 skb_copy_to_linear_data_offset(new_skb,
4221 -NET_IP_ALIGN,
4222 (skb->data -
4223 NET_IP_ALIGN),
4224 (length +
4225 NET_IP_ALIGN));
4226 /* save the skb in buffer_info as good */
4227 buffer_info->skb = skb;
4228 skb = new_skb;
4229 }
4230 /* else just continue with the old one */
4231 }
4232 /* end copybreak code */
4233 skb_put(skb, length);
4234
4235 /* Receive Checksum Offload */
4236 e1000_rx_checksum(adapter,
4237 (uint32_t)(status) |
4238 ((uint32_t)(rx_desc->errors) << 24),
4239 le16_to_cpu(rx_desc->csum), skb);
4240
4241 skb->protocol = eth_type_trans(skb, netdev);
4242 #ifdef CONFIG_E1000_NAPI
4243 if (unlikely(adapter->vlgrp &&
4244 (status & E1000_RXD_STAT_VP))) {
4245 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4246 le16_to_cpu(rx_desc->special) &
4247 E1000_RXD_SPC_VLAN_MASK);
4248 } else {
4249 netif_receive_skb(skb);
4250 }
4251 #else /* CONFIG_E1000_NAPI */
4252 if (unlikely(adapter->vlgrp &&
4253 (status & E1000_RXD_STAT_VP))) {
4254 vlan_hwaccel_rx(skb, adapter->vlgrp,
4255 le16_to_cpu(rx_desc->special) &
4256 E1000_RXD_SPC_VLAN_MASK);
4257 } else {
4258 netif_rx(skb);
4259 }
4260 #endif /* CONFIG_E1000_NAPI */
4261 netdev->last_rx = jiffies;
4262
4263 next_desc:
4264 rx_desc->status = 0;
4265
4266 /* return some buffers to hardware, one at a time is too slow */
4267 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4268 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4269 cleaned_count = 0;
4270 }
4271
4272 /* use prefetched values */
4273 rx_desc = next_rxd;
4274 buffer_info = next_buffer;
4275 }
4276 rx_ring->next_to_clean = i;
4277
4278 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4279 if (cleaned_count)
4280 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4281
4282 adapter->total_rx_packets += total_rx_packets;
4283 adapter->total_rx_bytes += total_rx_bytes;
4284 return cleaned;
4285 }
4286
4287 /**
4288 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4289 * @adapter: board private structure
4290 **/
4291
4292 static boolean_t
4293 #ifdef CONFIG_E1000_NAPI
4294 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4295 struct e1000_rx_ring *rx_ring,
4296 int *work_done, int work_to_do)
4297 #else
4298 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4299 struct e1000_rx_ring *rx_ring)
4300 #endif
4301 {
4302 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4303 struct net_device *netdev = adapter->netdev;
4304 struct pci_dev *pdev = adapter->pdev;
4305 struct e1000_buffer *buffer_info, *next_buffer;
4306 struct e1000_ps_page *ps_page;
4307 struct e1000_ps_page_dma *ps_page_dma;
4308 struct sk_buff *skb;
4309 unsigned int i, j;
4310 uint32_t length, staterr;
4311 int cleaned_count = 0;
4312 boolean_t cleaned = FALSE;
4313 unsigned int total_rx_bytes=0, total_rx_packets=0;
4314
4315 i = rx_ring->next_to_clean;
4316 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4317 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4318 buffer_info = &rx_ring->buffer_info[i];
4319
4320 while (staterr & E1000_RXD_STAT_DD) {
4321 ps_page = &rx_ring->ps_page[i];
4322 ps_page_dma = &rx_ring->ps_page_dma[i];
4323 #ifdef CONFIG_E1000_NAPI
4324 if (unlikely(*work_done >= work_to_do))
4325 break;
4326 (*work_done)++;
4327 #endif
4328 skb = buffer_info->skb;
4329
4330 /* in the packet split case this is header only */
4331 prefetch(skb->data - NET_IP_ALIGN);
4332
4333 if (++i == rx_ring->count) i = 0;
4334 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4335 prefetch(next_rxd);
4336
4337 next_buffer = &rx_ring->buffer_info[i];
4338
4339 cleaned = TRUE;
4340 cleaned_count++;
4341 pci_unmap_single(pdev, buffer_info->dma,
4342 buffer_info->length,
4343 PCI_DMA_FROMDEVICE);
4344
4345 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4346 E1000_DBG("%s: Packet Split buffers didn't pick up"
4347 " the full packet\n", netdev->name);
4348 dev_kfree_skb_irq(skb);
4349 goto next_desc;
4350 }
4351
4352 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4353 dev_kfree_skb_irq(skb);
4354 goto next_desc;
4355 }
4356
4357 length = le16_to_cpu(rx_desc->wb.middle.length0);
4358
4359 if (unlikely(!length)) {
4360 E1000_DBG("%s: Last part of the packet spanning"
4361 " multiple descriptors\n", netdev->name);
4362 dev_kfree_skb_irq(skb);
4363 goto next_desc;
4364 }
4365
4366 /* Good Receive */
4367 skb_put(skb, length);
4368
4369 {
4370 /* this looks ugly, but it seems compiler issues make it
4371 more efficient than reusing j */
4372 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4373
4374 /* page alloc/put takes too long and effects small packet
4375 * throughput, so unsplit small packets and save the alloc/put*/
4376 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4377 u8 *vaddr;
4378 /* there is no documentation about how to call
4379 * kmap_atomic, so we can't hold the mapping
4380 * very long */
4381 pci_dma_sync_single_for_cpu(pdev,
4382 ps_page_dma->ps_page_dma[0],
4383 PAGE_SIZE,
4384 PCI_DMA_FROMDEVICE);
4385 vaddr = kmap_atomic(ps_page->ps_page[0],
4386 KM_SKB_DATA_SOFTIRQ);
4387 memcpy(skb_tail_pointer(skb), vaddr, l1);
4388 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4389 pci_dma_sync_single_for_device(pdev,
4390 ps_page_dma->ps_page_dma[0],
4391 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4392 /* remove the CRC */
4393 l1 -= 4;
4394 skb_put(skb, l1);
4395 goto copydone;
4396 } /* if */
4397 }
4398
4399 for (j = 0; j < adapter->rx_ps_pages; j++) {
4400 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4401 break;
4402 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4403 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4404 ps_page_dma->ps_page_dma[j] = 0;
4405 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4406 length);
4407 ps_page->ps_page[j] = NULL;
4408 skb->len += length;
4409 skb->data_len += length;
4410 skb->truesize += length;
4411 }
4412
4413 /* strip the ethernet crc, problem is we're using pages now so
4414 * this whole operation can get a little cpu intensive */
4415 pskb_trim(skb, skb->len - 4);
4416
4417 copydone:
4418 total_rx_bytes += skb->len;
4419 total_rx_packets++;
4420
4421 e1000_rx_checksum(adapter, staterr,
4422 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4423 skb->protocol = eth_type_trans(skb, netdev);
4424
4425 if (likely(rx_desc->wb.upper.header_status &
4426 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4427 adapter->rx_hdr_split++;
4428 #ifdef CONFIG_E1000_NAPI
4429 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4430 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4431 le16_to_cpu(rx_desc->wb.middle.vlan) &
4432 E1000_RXD_SPC_VLAN_MASK);
4433 } else {
4434 netif_receive_skb(skb);
4435 }
4436 #else /* CONFIG_E1000_NAPI */
4437 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4438 vlan_hwaccel_rx(skb, adapter->vlgrp,
4439 le16_to_cpu(rx_desc->wb.middle.vlan) &
4440 E1000_RXD_SPC_VLAN_MASK);
4441 } else {
4442 netif_rx(skb);
4443 }
4444 #endif /* CONFIG_E1000_NAPI */
4445 netdev->last_rx = jiffies;
4446
4447 next_desc:
4448 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4449 buffer_info->skb = NULL;
4450
4451 /* return some buffers to hardware, one at a time is too slow */
4452 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4453 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4454 cleaned_count = 0;
4455 }
4456
4457 /* use prefetched values */
4458 rx_desc = next_rxd;
4459 buffer_info = next_buffer;
4460
4461 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4462 }
4463 rx_ring->next_to_clean = i;
4464
4465 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4466 if (cleaned_count)
4467 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4468
4469 adapter->total_rx_packets += total_rx_packets;
4470 adapter->total_rx_bytes += total_rx_bytes;
4471 return cleaned;
4472 }
4473
4474 /**
4475 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4476 * @adapter: address of board private structure
4477 **/
4478
4479 static void
4480 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4481 struct e1000_rx_ring *rx_ring,
4482 int cleaned_count)
4483 {
4484 struct net_device *netdev = adapter->netdev;
4485 struct pci_dev *pdev = adapter->pdev;
4486 struct e1000_rx_desc *rx_desc;
4487 struct e1000_buffer *buffer_info;
4488 struct sk_buff *skb;
4489 unsigned int i;
4490 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4491
4492 i = rx_ring->next_to_use;
4493 buffer_info = &rx_ring->buffer_info[i];
4494
4495 while (cleaned_count--) {
4496 skb = buffer_info->skb;
4497 if (skb) {
4498 skb_trim(skb, 0);
4499 goto map_skb;
4500 }
4501
4502 skb = netdev_alloc_skb(netdev, bufsz);
4503 if (unlikely(!skb)) {
4504 /* Better luck next round */
4505 adapter->alloc_rx_buff_failed++;
4506 break;
4507 }
4508
4509 /* Fix for errata 23, can't cross 64kB boundary */
4510 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4511 struct sk_buff *oldskb = skb;
4512 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4513 "at %p\n", bufsz, skb->data);
4514 /* Try again, without freeing the previous */
4515 skb = netdev_alloc_skb(netdev, bufsz);
4516 /* Failed allocation, critical failure */
4517 if (!skb) {
4518 dev_kfree_skb(oldskb);
4519 break;
4520 }
4521
4522 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4523 /* give up */
4524 dev_kfree_skb(skb);
4525 dev_kfree_skb(oldskb);
4526 break; /* while !buffer_info->skb */
4527 }
4528
4529 /* Use new allocation */
4530 dev_kfree_skb(oldskb);
4531 }
4532 /* Make buffer alignment 2 beyond a 16 byte boundary
4533 * this will result in a 16 byte aligned IP header after
4534 * the 14 byte MAC header is removed
4535 */
4536 skb_reserve(skb, NET_IP_ALIGN);
4537
4538 buffer_info->skb = skb;
4539 buffer_info->length = adapter->rx_buffer_len;
4540 map_skb:
4541 buffer_info->dma = pci_map_single(pdev,
4542 skb->data,
4543 adapter->rx_buffer_len,
4544 PCI_DMA_FROMDEVICE);
4545
4546 /* Fix for errata 23, can't cross 64kB boundary */
4547 if (!e1000_check_64k_bound(adapter,
4548 (void *)(unsigned long)buffer_info->dma,
4549 adapter->rx_buffer_len)) {
4550 DPRINTK(RX_ERR, ERR,
4551 "dma align check failed: %u bytes at %p\n",
4552 adapter->rx_buffer_len,
4553 (void *)(unsigned long)buffer_info->dma);
4554 dev_kfree_skb(skb);
4555 buffer_info->skb = NULL;
4556
4557 pci_unmap_single(pdev, buffer_info->dma,
4558 adapter->rx_buffer_len,
4559 PCI_DMA_FROMDEVICE);
4560
4561 break; /* while !buffer_info->skb */
4562 }
4563 rx_desc = E1000_RX_DESC(*rx_ring, i);
4564 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4565
4566 if (unlikely(++i == rx_ring->count))
4567 i = 0;
4568 buffer_info = &rx_ring->buffer_info[i];
4569 }
4570
4571 if (likely(rx_ring->next_to_use != i)) {
4572 rx_ring->next_to_use = i;
4573 if (unlikely(i-- == 0))
4574 i = (rx_ring->count - 1);
4575
4576 /* Force memory writes to complete before letting h/w
4577 * know there are new descriptors to fetch. (Only
4578 * applicable for weak-ordered memory model archs,
4579 * such as IA-64). */
4580 wmb();
4581 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4582 }
4583 }
4584
4585 /**
4586 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4587 * @adapter: address of board private structure
4588 **/
4589
4590 static void
4591 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4592 struct e1000_rx_ring *rx_ring,
4593 int cleaned_count)
4594 {
4595 struct net_device *netdev = adapter->netdev;
4596 struct pci_dev *pdev = adapter->pdev;
4597 union e1000_rx_desc_packet_split *rx_desc;
4598 struct e1000_buffer *buffer_info;
4599 struct e1000_ps_page *ps_page;
4600 struct e1000_ps_page_dma *ps_page_dma;
4601 struct sk_buff *skb;
4602 unsigned int i, j;
4603
4604 i = rx_ring->next_to_use;
4605 buffer_info = &rx_ring->buffer_info[i];
4606 ps_page = &rx_ring->ps_page[i];
4607 ps_page_dma = &rx_ring->ps_page_dma[i];
4608
4609 while (cleaned_count--) {
4610 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4611
4612 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4613 if (j < adapter->rx_ps_pages) {
4614 if (likely(!ps_page->ps_page[j])) {
4615 ps_page->ps_page[j] =
4616 alloc_page(GFP_ATOMIC);
4617 if (unlikely(!ps_page->ps_page[j])) {
4618 adapter->alloc_rx_buff_failed++;
4619 goto no_buffers;
4620 }
4621 ps_page_dma->ps_page_dma[j] =
4622 pci_map_page(pdev,
4623 ps_page->ps_page[j],
4624 0, PAGE_SIZE,
4625 PCI_DMA_FROMDEVICE);
4626 }
4627 /* Refresh the desc even if buffer_addrs didn't
4628 * change because each write-back erases
4629 * this info.
4630 */
4631 rx_desc->read.buffer_addr[j+1] =
4632 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4633 } else
4634 rx_desc->read.buffer_addr[j+1] = ~0;
4635 }
4636
4637 skb = netdev_alloc_skb(netdev,
4638 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4639
4640 if (unlikely(!skb)) {
4641 adapter->alloc_rx_buff_failed++;
4642 break;
4643 }
4644
4645 /* Make buffer alignment 2 beyond a 16 byte boundary
4646 * this will result in a 16 byte aligned IP header after
4647 * the 14 byte MAC header is removed
4648 */
4649 skb_reserve(skb, NET_IP_ALIGN);
4650
4651 buffer_info->skb = skb;
4652 buffer_info->length = adapter->rx_ps_bsize0;
4653 buffer_info->dma = pci_map_single(pdev, skb->data,
4654 adapter->rx_ps_bsize0,
4655 PCI_DMA_FROMDEVICE);
4656
4657 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4658
4659 if (unlikely(++i == rx_ring->count)) i = 0;
4660 buffer_info = &rx_ring->buffer_info[i];
4661 ps_page = &rx_ring->ps_page[i];
4662 ps_page_dma = &rx_ring->ps_page_dma[i];
4663 }
4664
4665 no_buffers:
4666 if (likely(rx_ring->next_to_use != i)) {
4667 rx_ring->next_to_use = i;
4668 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4669
4670 /* Force memory writes to complete before letting h/w
4671 * know there are new descriptors to fetch. (Only
4672 * applicable for weak-ordered memory model archs,
4673 * such as IA-64). */
4674 wmb();
4675 /* Hardware increments by 16 bytes, but packet split
4676 * descriptors are 32 bytes...so we increment tail
4677 * twice as much.
4678 */
4679 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4680 }
4681 }
4682
4683 /**
4684 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4685 * @adapter:
4686 **/
4687
4688 static void
4689 e1000_smartspeed(struct e1000_adapter *adapter)
4690 {
4691 uint16_t phy_status;
4692 uint16_t phy_ctrl;
4693
4694 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4695 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4696 return;
4697
4698 if (adapter->smartspeed == 0) {
4699 /* If Master/Slave config fault is asserted twice,
4700 * we assume back-to-back */
4701 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4702 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4703 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4704 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4705 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4706 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4707 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4708 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4709 phy_ctrl);
4710 adapter->smartspeed++;
4711 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4712 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4713 &phy_ctrl)) {
4714 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4715 MII_CR_RESTART_AUTO_NEG);
4716 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4717 phy_ctrl);
4718 }
4719 }
4720 return;
4721 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4722 /* If still no link, perhaps using 2/3 pair cable */
4723 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4724 phy_ctrl |= CR_1000T_MS_ENABLE;
4725 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4726 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4727 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4728 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4729 MII_CR_RESTART_AUTO_NEG);
4730 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4731 }
4732 }
4733 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4734 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4735 adapter->smartspeed = 0;
4736 }
4737
4738 /**
4739 * e1000_ioctl -
4740 * @netdev:
4741 * @ifreq:
4742 * @cmd:
4743 **/
4744
4745 static int
4746 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4747 {
4748 switch (cmd) {
4749 case SIOCGMIIPHY:
4750 case SIOCGMIIREG:
4751 case SIOCSMIIREG:
4752 return e1000_mii_ioctl(netdev, ifr, cmd);
4753 default:
4754 return -EOPNOTSUPP;
4755 }
4756 }
4757
4758 /**
4759 * e1000_mii_ioctl -
4760 * @netdev:
4761 * @ifreq:
4762 * @cmd:
4763 **/
4764
4765 static int
4766 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4767 {
4768 struct e1000_adapter *adapter = netdev_priv(netdev);
4769 struct mii_ioctl_data *data = if_mii(ifr);
4770 int retval;
4771 uint16_t mii_reg;
4772 uint16_t spddplx;
4773 unsigned long flags;
4774
4775 if (adapter->hw.media_type != e1000_media_type_copper)
4776 return -EOPNOTSUPP;
4777
4778 switch (cmd) {
4779 case SIOCGMIIPHY:
4780 data->phy_id = adapter->hw.phy_addr;
4781 break;
4782 case SIOCGMIIREG:
4783 if (!capable(CAP_NET_ADMIN))
4784 return -EPERM;
4785 spin_lock_irqsave(&adapter->stats_lock, flags);
4786 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4787 &data->val_out)) {
4788 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4789 return -EIO;
4790 }
4791 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4792 break;
4793 case SIOCSMIIREG:
4794 if (!capable(CAP_NET_ADMIN))
4795 return -EPERM;
4796 if (data->reg_num & ~(0x1F))
4797 return -EFAULT;
4798 mii_reg = data->val_in;
4799 spin_lock_irqsave(&adapter->stats_lock, flags);
4800 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4801 mii_reg)) {
4802 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4803 return -EIO;
4804 }
4805 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4806 if (adapter->hw.media_type == e1000_media_type_copper) {
4807 switch (data->reg_num) {
4808 case PHY_CTRL:
4809 if (mii_reg & MII_CR_POWER_DOWN)
4810 break;
4811 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4812 adapter->hw.autoneg = 1;
4813 adapter->hw.autoneg_advertised = 0x2F;
4814 } else {
4815 if (mii_reg & 0x40)
4816 spddplx = SPEED_1000;
4817 else if (mii_reg & 0x2000)
4818 spddplx = SPEED_100;
4819 else
4820 spddplx = SPEED_10;
4821 spddplx += (mii_reg & 0x100)
4822 ? DUPLEX_FULL :
4823 DUPLEX_HALF;
4824 retval = e1000_set_spd_dplx(adapter,
4825 spddplx);
4826 if (retval)
4827 return retval;
4828 }
4829 if (netif_running(adapter->netdev))
4830 e1000_reinit_locked(adapter);
4831 else
4832 e1000_reset(adapter);
4833 break;
4834 case M88E1000_PHY_SPEC_CTRL:
4835 case M88E1000_EXT_PHY_SPEC_CTRL:
4836 if (e1000_phy_reset(&adapter->hw))
4837 return -EIO;
4838 break;
4839 }
4840 } else {
4841 switch (data->reg_num) {
4842 case PHY_CTRL:
4843 if (mii_reg & MII_CR_POWER_DOWN)
4844 break;
4845 if (netif_running(adapter->netdev))
4846 e1000_reinit_locked(adapter);
4847 else
4848 e1000_reset(adapter);
4849 break;
4850 }
4851 }
4852 break;
4853 default:
4854 return -EOPNOTSUPP;
4855 }
4856 return E1000_SUCCESS;
4857 }
4858
4859 void
4860 e1000_pci_set_mwi(struct e1000_hw *hw)
4861 {
4862 struct e1000_adapter *adapter = hw->back;
4863 int ret_val = pci_set_mwi(adapter->pdev);
4864
4865 if (ret_val)
4866 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4867 }
4868
4869 void
4870 e1000_pci_clear_mwi(struct e1000_hw *hw)
4871 {
4872 struct e1000_adapter *adapter = hw->back;
4873
4874 pci_clear_mwi(adapter->pdev);
4875 }
4876
4877 void
4878 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4879 {
4880 struct e1000_adapter *adapter = hw->back;
4881
4882 pci_read_config_word(adapter->pdev, reg, value);
4883 }
4884
4885 void
4886 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4887 {
4888 struct e1000_adapter *adapter = hw->back;
4889
4890 pci_write_config_word(adapter->pdev, reg, *value);
4891 }
4892
4893 int
4894 e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4895 {
4896 struct e1000_adapter *adapter = hw->back;
4897 return pcix_get_mmrbc(adapter->pdev);
4898 }
4899
4900 void
4901 e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4902 {
4903 struct e1000_adapter *adapter = hw->back;
4904 pcix_set_mmrbc(adapter->pdev, mmrbc);
4905 }
4906
4907 int32_t
4908 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4909 {
4910 struct e1000_adapter *adapter = hw->back;
4911 uint16_t cap_offset;
4912
4913 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4914 if (!cap_offset)
4915 return -E1000_ERR_CONFIG;
4916
4917 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4918
4919 return E1000_SUCCESS;
4920 }
4921
4922 void
4923 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4924 {
4925 outl(value, port);
4926 }
4927
4928 static void
4929 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4930 {
4931 struct e1000_adapter *adapter = netdev_priv(netdev);
4932 uint32_t ctrl, rctl;
4933
4934 e1000_irq_disable(adapter);
4935 adapter->vlgrp = grp;
4936
4937 if (grp) {
4938 /* enable VLAN tag insert/strip */
4939 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4940 ctrl |= E1000_CTRL_VME;
4941 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4942
4943 if (adapter->hw.mac_type != e1000_ich8lan) {
4944 /* enable VLAN receive filtering */
4945 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4946 rctl |= E1000_RCTL_VFE;
4947 rctl &= ~E1000_RCTL_CFIEN;
4948 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4949 e1000_update_mng_vlan(adapter);
4950 }
4951 } else {
4952 /* disable VLAN tag insert/strip */
4953 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4954 ctrl &= ~E1000_CTRL_VME;
4955 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4956
4957 if (adapter->hw.mac_type != e1000_ich8lan) {
4958 /* disable VLAN filtering */
4959 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4960 rctl &= ~E1000_RCTL_VFE;
4961 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4962 if (adapter->mng_vlan_id !=
4963 (uint16_t)E1000_MNG_VLAN_NONE) {
4964 e1000_vlan_rx_kill_vid(netdev,
4965 adapter->mng_vlan_id);
4966 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4967 }
4968 }
4969 }
4970
4971 e1000_irq_enable(adapter);
4972 }
4973
4974 static void
4975 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4976 {
4977 struct e1000_adapter *adapter = netdev_priv(netdev);
4978 uint32_t vfta, index;
4979
4980 if ((adapter->hw.mng_cookie.status &
4981 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4982 (vid == adapter->mng_vlan_id))
4983 return;
4984 /* add VID to filter table */
4985 index = (vid >> 5) & 0x7F;
4986 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4987 vfta |= (1 << (vid & 0x1F));
4988 e1000_write_vfta(&adapter->hw, index, vfta);
4989 }
4990
4991 static void
4992 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4993 {
4994 struct e1000_adapter *adapter = netdev_priv(netdev);
4995 uint32_t vfta, index;
4996
4997 e1000_irq_disable(adapter);
4998 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4999 e1000_irq_enable(adapter);
5000
5001 if ((adapter->hw.mng_cookie.status &
5002 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5003 (vid == adapter->mng_vlan_id)) {
5004 /* release control to f/w */
5005 e1000_release_hw_control(adapter);
5006 return;
5007 }
5008
5009 /* remove VID from filter table */
5010 index = (vid >> 5) & 0x7F;
5011 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5012 vfta &= ~(1 << (vid & 0x1F));
5013 e1000_write_vfta(&adapter->hw, index, vfta);
5014 }
5015
5016 static void
5017 e1000_restore_vlan(struct e1000_adapter *adapter)
5018 {
5019 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5020
5021 if (adapter->vlgrp) {
5022 uint16_t vid;
5023 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5024 if (!vlan_group_get_device(adapter->vlgrp, vid))
5025 continue;
5026 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5027 }
5028 }
5029 }
5030
5031 int
5032 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5033 {
5034 adapter->hw.autoneg = 0;
5035
5036 /* Fiber NICs only allow 1000 gbps Full duplex */
5037 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5038 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5039 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5040 return -EINVAL;
5041 }
5042
5043 switch (spddplx) {
5044 case SPEED_10 + DUPLEX_HALF:
5045 adapter->hw.forced_speed_duplex = e1000_10_half;
5046 break;
5047 case SPEED_10 + DUPLEX_FULL:
5048 adapter->hw.forced_speed_duplex = e1000_10_full;
5049 break;
5050 case SPEED_100 + DUPLEX_HALF:
5051 adapter->hw.forced_speed_duplex = e1000_100_half;
5052 break;
5053 case SPEED_100 + DUPLEX_FULL:
5054 adapter->hw.forced_speed_duplex = e1000_100_full;
5055 break;
5056 case SPEED_1000 + DUPLEX_FULL:
5057 adapter->hw.autoneg = 1;
5058 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5059 break;
5060 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5061 default:
5062 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5063 return -EINVAL;
5064 }
5065 return 0;
5066 }
5067
5068 static int
5069 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5070 {
5071 struct net_device *netdev = pci_get_drvdata(pdev);
5072 struct e1000_adapter *adapter = netdev_priv(netdev);
5073 uint32_t ctrl, ctrl_ext, rctl, status;
5074 uint32_t wufc = adapter->wol;
5075 #ifdef CONFIG_PM
5076 int retval = 0;
5077 #endif
5078
5079 netif_device_detach(netdev);
5080
5081 if (netif_running(netdev)) {
5082 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5083 e1000_down(adapter);
5084 }
5085
5086 #ifdef CONFIG_PM
5087 retval = pci_save_state(pdev);
5088 if (retval)
5089 return retval;
5090 #endif
5091
5092 status = E1000_READ_REG(&adapter->hw, STATUS);
5093 if (status & E1000_STATUS_LU)
5094 wufc &= ~E1000_WUFC_LNKC;
5095
5096 if (wufc) {
5097 e1000_setup_rctl(adapter);
5098 e1000_set_multi(netdev);
5099
5100 /* turn on all-multi mode if wake on multicast is enabled */
5101 if (wufc & E1000_WUFC_MC) {
5102 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5103 rctl |= E1000_RCTL_MPE;
5104 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5105 }
5106
5107 if (adapter->hw.mac_type >= e1000_82540) {
5108 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5109 /* advertise wake from D3Cold */
5110 #define E1000_CTRL_ADVD3WUC 0x00100000
5111 /* phy power management enable */
5112 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5113 ctrl |= E1000_CTRL_ADVD3WUC |
5114 E1000_CTRL_EN_PHY_PWR_MGMT;
5115 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5116 }
5117
5118 if (adapter->hw.media_type == e1000_media_type_fiber ||
5119 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5120 /* keep the laser running in D3 */
5121 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5122 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5123 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5124 }
5125
5126 /* Allow time for pending master requests to run */
5127 e1000_disable_pciex_master(&adapter->hw);
5128
5129 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5130 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5131 pci_enable_wake(pdev, PCI_D3hot, 1);
5132 pci_enable_wake(pdev, PCI_D3cold, 1);
5133 } else {
5134 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5135 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5136 pci_enable_wake(pdev, PCI_D3hot, 0);
5137 pci_enable_wake(pdev, PCI_D3cold, 0);
5138 }
5139
5140 e1000_release_manageability(adapter);
5141
5142 /* make sure adapter isn't asleep if manageability is enabled */
5143 if (adapter->en_mng_pt) {
5144 pci_enable_wake(pdev, PCI_D3hot, 1);
5145 pci_enable_wake(pdev, PCI_D3cold, 1);
5146 }
5147
5148 if (adapter->hw.phy_type == e1000_phy_igp_3)
5149 e1000_phy_powerdown_workaround(&adapter->hw);
5150
5151 if (netif_running(netdev))
5152 e1000_free_irq(adapter);
5153
5154 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5155 * would have already happened in close and is redundant. */
5156 e1000_release_hw_control(adapter);
5157
5158 pci_disable_device(pdev);
5159
5160 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5161
5162 return 0;
5163 }
5164
5165 #ifdef CONFIG_PM
5166 static int
5167 e1000_resume(struct pci_dev *pdev)
5168 {
5169 struct net_device *netdev = pci_get_drvdata(pdev);
5170 struct e1000_adapter *adapter = netdev_priv(netdev);
5171 uint32_t err;
5172
5173 pci_set_power_state(pdev, PCI_D0);
5174 pci_restore_state(pdev);
5175 if ((err = pci_enable_device(pdev))) {
5176 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5177 return err;
5178 }
5179 pci_set_master(pdev);
5180
5181 pci_enable_wake(pdev, PCI_D3hot, 0);
5182 pci_enable_wake(pdev, PCI_D3cold, 0);
5183
5184 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5185 return err;
5186
5187 e1000_power_up_phy(adapter);
5188 e1000_reset(adapter);
5189 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5190
5191 e1000_init_manageability(adapter);
5192
5193 if (netif_running(netdev))
5194 e1000_up(adapter);
5195
5196 netif_device_attach(netdev);
5197
5198 /* If the controller is 82573 and f/w is AMT, do not set
5199 * DRV_LOAD until the interface is up. For all other cases,
5200 * let the f/w know that the h/w is now under the control
5201 * of the driver. */
5202 if (adapter->hw.mac_type != e1000_82573 ||
5203 !e1000_check_mng_mode(&adapter->hw))
5204 e1000_get_hw_control(adapter);
5205
5206 return 0;
5207 }
5208 #endif
5209
5210 static void e1000_shutdown(struct pci_dev *pdev)
5211 {
5212 e1000_suspend(pdev, PMSG_SUSPEND);
5213 }
5214
5215 #ifdef CONFIG_NET_POLL_CONTROLLER
5216 /*
5217 * Polling 'interrupt' - used by things like netconsole to send skbs
5218 * without having to re-enable interrupts. It's not called while
5219 * the interrupt routine is executing.
5220 */
5221 static void
5222 e1000_netpoll(struct net_device *netdev)
5223 {
5224 struct e1000_adapter *adapter = netdev_priv(netdev);
5225
5226 disable_irq(adapter->pdev->irq);
5227 e1000_intr(adapter->pdev->irq, netdev);
5228 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5229 #ifndef CONFIG_E1000_NAPI
5230 adapter->clean_rx(adapter, adapter->rx_ring);
5231 #endif
5232 enable_irq(adapter->pdev->irq);
5233 }
5234 #endif
5235
5236 /**
5237 * e1000_io_error_detected - called when PCI error is detected
5238 * @pdev: Pointer to PCI device
5239 * @state: The current pci conneection state
5240 *
5241 * This function is called after a PCI bus error affecting
5242 * this device has been detected.
5243 */
5244 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5245 {
5246 struct net_device *netdev = pci_get_drvdata(pdev);
5247 struct e1000_adapter *adapter = netdev->priv;
5248
5249 netif_device_detach(netdev);
5250
5251 if (netif_running(netdev))
5252 e1000_down(adapter);
5253 pci_disable_device(pdev);
5254
5255 /* Request a slot slot reset. */
5256 return PCI_ERS_RESULT_NEED_RESET;
5257 }
5258
5259 /**
5260 * e1000_io_slot_reset - called after the pci bus has been reset.
5261 * @pdev: Pointer to PCI device
5262 *
5263 * Restart the card from scratch, as if from a cold-boot. Implementation
5264 * resembles the first-half of the e1000_resume routine.
5265 */
5266 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5267 {
5268 struct net_device *netdev = pci_get_drvdata(pdev);
5269 struct e1000_adapter *adapter = netdev->priv;
5270
5271 if (pci_enable_device(pdev)) {
5272 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5273 return PCI_ERS_RESULT_DISCONNECT;
5274 }
5275 pci_set_master(pdev);
5276
5277 pci_enable_wake(pdev, PCI_D3hot, 0);
5278 pci_enable_wake(pdev, PCI_D3cold, 0);
5279
5280 e1000_reset(adapter);
5281 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5282
5283 return PCI_ERS_RESULT_RECOVERED;
5284 }
5285
5286 /**
5287 * e1000_io_resume - called when traffic can start flowing again.
5288 * @pdev: Pointer to PCI device
5289 *
5290 * This callback is called when the error recovery driver tells us that
5291 * its OK to resume normal operation. Implementation resembles the
5292 * second-half of the e1000_resume routine.
5293 */
5294 static void e1000_io_resume(struct pci_dev *pdev)
5295 {
5296 struct net_device *netdev = pci_get_drvdata(pdev);
5297 struct e1000_adapter *adapter = netdev->priv;
5298
5299 e1000_init_manageability(adapter);
5300
5301 if (netif_running(netdev)) {
5302 if (e1000_up(adapter)) {
5303 printk("e1000: can't bring device back up after reset\n");
5304 return;
5305 }
5306 }
5307
5308 netif_device_attach(netdev);
5309
5310 /* If the controller is 82573 and f/w is AMT, do not set
5311 * DRV_LOAD until the interface is up. For all other cases,
5312 * let the f/w know that the h/w is now under the control
5313 * of the driver. */
5314 if (adapter->hw.mac_type != e1000_82573 ||
5315 !e1000_check_mng_mode(&adapter->hw))
5316 e1000_get_hw_control(adapter);
5317
5318 }
5319
5320 /* e1000_main.c */
Linux 2.6 libata-dev (mirror)