2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
23 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/ioport.h>
30 #include <linux/init.h>
31 #include <linux/console.h>
32 #include <linux/sysrq.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/tty.h>
36 #include <linux/tty_flip.h>
37 #include <linux/serial_reg.h>
38 #include <linux/serial_core.h>
39 #include <linux/serial.h>
40 #include <linux/serial_8250.h>
41 #include <linux/nmi.h>
42 #include <linux/mutex.h>
51 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
52 * is unsafe when used on edge-triggered interrupts.
54 static unsigned int share_irqs
= SERIAL8250_SHARE_IRQS
;
56 static unsigned int nr_uarts
= CONFIG_SERIAL_8250_RUNTIME_UARTS
;
62 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
64 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
68 #define DEBUG_INTR(fmt...) printk(fmt)
70 #define DEBUG_INTR(fmt...) do { } while (0)
73 #define PASS_LIMIT 256
76 * We default to IRQ0 for the "no irq" hack. Some
77 * machine types want others as well - they're free
78 * to redefine this in their header file.
80 #define is_real_interrupt(irq) ((irq) != 0)
82 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
83 #define CONFIG_SERIAL_DETECT_IRQ 1
85 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
86 #define CONFIG_SERIAL_MANY_PORTS 1
90 * HUB6 is always on. This will be removed once the header
91 * files have been cleaned.
95 #include <asm/serial.h>
98 * SERIAL_PORT_DFNS tells us about built-in ports that have no
99 * standard enumeration mechanism. Platforms that can find all
100 * serial ports via mechanisms like ACPI or PCI need not supply it.
102 #ifndef SERIAL_PORT_DFNS
103 #define SERIAL_PORT_DFNS
106 static const struct old_serial_port old_serial_port
[] = {
107 SERIAL_PORT_DFNS
/* defined in asm/serial.h */
110 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
112 #ifdef CONFIG_SERIAL_8250_RSA
114 #define PORT_RSA_MAX 4
115 static unsigned long probe_rsa
[PORT_RSA_MAX
];
116 static unsigned int probe_rsa_count
;
117 #endif /* CONFIG_SERIAL_8250_RSA */
119 struct uart_8250_port
{
120 struct uart_port port
;
121 struct timer_list timer
; /* "no irq" timer */
122 struct list_head list
; /* ports on this IRQ */
123 unsigned short capabilities
; /* port capabilities */
124 unsigned short bugs
; /* port bugs */
125 unsigned int tx_loadsz
; /* transmit fifo load size */
130 unsigned char mcr_mask
; /* mask of user bits */
131 unsigned char mcr_force
; /* mask of forced bits */
132 unsigned char lsr_break_flag
;
135 * We provide a per-port pm hook.
137 void (*pm
)(struct uart_port
*port
,
138 unsigned int state
, unsigned int old
);
143 struct list_head
*head
;
146 static struct irq_info irq_lists
[NR_IRQS
];
149 * Here we define the default xmit fifo size used for each type of UART.
151 static const struct serial8250_config uart_config
[] = {
176 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
177 .flags
= UART_CAP_FIFO
,
188 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
194 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
196 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
202 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
|
204 .flags
= UART_CAP_FIFO
| UART_CAP_SLEEP
| UART_CAP_AFE
,
212 .name
= "16C950/954",
215 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
216 .flags
= UART_CAP_FIFO
,
222 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
224 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
230 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
231 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
237 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_11
,
238 .flags
= UART_CAP_FIFO
,
244 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
245 .flags
= UART_CAP_FIFO
| UART_NATSEMI
,
251 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
252 .flags
= UART_CAP_FIFO
| UART_CAP_UUE
,
256 #ifdef CONFIG_SERIAL_8250_AU1X00
258 /* Au1x00 UART hardware has a weird register layout */
259 static const u8 au_io_in_map
[] = {
269 static const u8 au_io_out_map
[] = {
277 /* sane hardware needs no mapping */
278 static inline int map_8250_in_reg(struct uart_8250_port
*up
, int offset
)
280 if (up
->port
.iotype
!= UPIO_AU
)
282 return au_io_in_map
[offset
];
285 static inline int map_8250_out_reg(struct uart_8250_port
*up
, int offset
)
287 if (up
->port
.iotype
!= UPIO_AU
)
289 return au_io_out_map
[offset
];
294 /* sane hardware needs no mapping */
295 #define map_8250_in_reg(up, offset) (offset)
296 #define map_8250_out_reg(up, offset) (offset)
300 static unsigned int serial_in(struct uart_8250_port
*up
, int offset
)
303 offset
= map_8250_in_reg(up
, offset
) << up
->port
.regshift
;
305 switch (up
->port
.iotype
) {
307 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
308 return inb(up
->port
.iobase
+ 1);
311 return readb(up
->port
.membase
+ offset
);
314 return readl(up
->port
.membase
+ offset
);
316 #ifdef CONFIG_SERIAL_8250_AU1X00
318 return __raw_readl(up
->port
.membase
+ offset
);
322 if (offset
== UART_IIR
) {
323 tmp
= readl(up
->port
.membase
+ (UART_IIR
& ~3));
324 return (tmp
>> 16) & 0xff; /* UART_IIR % 4 == 2 */
326 return readb(up
->port
.membase
+ offset
);
329 return inb(up
->port
.iobase
+ offset
);
334 serial_out(struct uart_8250_port
*up
, int offset
, int value
)
336 offset
= map_8250_out_reg(up
, offset
) << up
->port
.regshift
;
338 switch (up
->port
.iotype
) {
340 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
341 outb(value
, up
->port
.iobase
+ 1);
345 writeb(value
, up
->port
.membase
+ offset
);
349 writel(value
, up
->port
.membase
+ offset
);
352 #ifdef CONFIG_SERIAL_8250_AU1X00
354 __raw_writel(value
, up
->port
.membase
+ offset
);
358 if (!((offset
== UART_IER
) && (value
& UART_IER_UUE
)))
359 writeb(value
, up
->port
.membase
+ offset
);
363 outb(value
, up
->port
.iobase
+ offset
);
368 * We used to support using pause I/O for certain machines. We
369 * haven't supported this for a while, but just in case it's badly
370 * needed for certain old 386 machines, I've left these #define's
373 #define serial_inp(up, offset) serial_in(up, offset)
374 #define serial_outp(up, offset, value) serial_out(up, offset, value)
376 /* Uart divisor latch read */
377 static inline int _serial_dl_read(struct uart_8250_port
*up
)
379 return serial_inp(up
, UART_DLL
) | serial_inp(up
, UART_DLM
) << 8;
382 /* Uart divisor latch write */
383 static inline void _serial_dl_write(struct uart_8250_port
*up
, int value
)
385 serial_outp(up
, UART_DLL
, value
& 0xff);
386 serial_outp(up
, UART_DLM
, value
>> 8 & 0xff);
389 #ifdef CONFIG_SERIAL_8250_AU1X00
390 /* Au1x00 haven't got a standard divisor latch */
391 static int serial_dl_read(struct uart_8250_port
*up
)
393 if (up
->port
.iotype
== UPIO_AU
)
394 return __raw_readl(up
->port
.membase
+ 0x28);
396 return _serial_dl_read(up
);
399 static void serial_dl_write(struct uart_8250_port
*up
, int value
)
401 if (up
->port
.iotype
== UPIO_AU
)
402 __raw_writel(value
, up
->port
.membase
+ 0x28);
404 _serial_dl_write(up
, value
);
407 #define serial_dl_read(up) _serial_dl_read(up)
408 #define serial_dl_write(up, value) _serial_dl_write(up, value)
414 static void serial_icr_write(struct uart_8250_port
*up
, int offset
, int value
)
416 serial_out(up
, UART_SCR
, offset
);
417 serial_out(up
, UART_ICR
, value
);
420 static unsigned int serial_icr_read(struct uart_8250_port
*up
, int offset
)
424 serial_icr_write(up
, UART_ACR
, up
->acr
| UART_ACR_ICRRD
);
425 serial_out(up
, UART_SCR
, offset
);
426 value
= serial_in(up
, UART_ICR
);
427 serial_icr_write(up
, UART_ACR
, up
->acr
);
435 static inline void serial8250_clear_fifos(struct uart_8250_port
*p
)
437 if (p
->capabilities
& UART_CAP_FIFO
) {
438 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
439 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
440 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
441 serial_outp(p
, UART_FCR
, 0);
446 * IER sleep support. UARTs which have EFRs need the "extended
447 * capability" bit enabled. Note that on XR16C850s, we need to
448 * reset LCR to write to IER.
450 static inline void serial8250_set_sleep(struct uart_8250_port
*p
, int sleep
)
452 if (p
->capabilities
& UART_CAP_SLEEP
) {
453 if (p
->capabilities
& UART_CAP_EFR
) {
454 serial_outp(p
, UART_LCR
, 0xBF);
455 serial_outp(p
, UART_EFR
, UART_EFR_ECB
);
456 serial_outp(p
, UART_LCR
, 0);
458 serial_outp(p
, UART_IER
, sleep
? UART_IERX_SLEEP
: 0);
459 if (p
->capabilities
& UART_CAP_EFR
) {
460 serial_outp(p
, UART_LCR
, 0xBF);
461 serial_outp(p
, UART_EFR
, 0);
462 serial_outp(p
, UART_LCR
, 0);
467 #ifdef CONFIG_SERIAL_8250_RSA
469 * Attempts to turn on the RSA FIFO. Returns zero on failure.
470 * We set the port uart clock rate if we succeed.
472 static int __enable_rsa(struct uart_8250_port
*up
)
477 mode
= serial_inp(up
, UART_RSA_MSR
);
478 result
= mode
& UART_RSA_MSR_FIFO
;
481 serial_outp(up
, UART_RSA_MSR
, mode
| UART_RSA_MSR_FIFO
);
482 mode
= serial_inp(up
, UART_RSA_MSR
);
483 result
= mode
& UART_RSA_MSR_FIFO
;
487 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE
* 16;
492 static void enable_rsa(struct uart_8250_port
*up
)
494 if (up
->port
.type
== PORT_RSA
) {
495 if (up
->port
.uartclk
!= SERIAL_RSA_BAUD_BASE
* 16) {
496 spin_lock_irq(&up
->port
.lock
);
498 spin_unlock_irq(&up
->port
.lock
);
500 if (up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16)
501 serial_outp(up
, UART_RSA_FRR
, 0);
506 * Attempts to turn off the RSA FIFO. Returns zero on failure.
507 * It is unknown why interrupts were disabled in here. However,
508 * the caller is expected to preserve this behaviour by grabbing
509 * the spinlock before calling this function.
511 static void disable_rsa(struct uart_8250_port
*up
)
516 if (up
->port
.type
== PORT_RSA
&&
517 up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16) {
518 spin_lock_irq(&up
->port
.lock
);
520 mode
= serial_inp(up
, UART_RSA_MSR
);
521 result
= !(mode
& UART_RSA_MSR_FIFO
);
524 serial_outp(up
, UART_RSA_MSR
, mode
& ~UART_RSA_MSR_FIFO
);
525 mode
= serial_inp(up
, UART_RSA_MSR
);
526 result
= !(mode
& UART_RSA_MSR_FIFO
);
530 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE_LO
* 16;
531 spin_unlock_irq(&up
->port
.lock
);
534 #endif /* CONFIG_SERIAL_8250_RSA */
537 * This is a quickie test to see how big the FIFO is.
538 * It doesn't work at all the time, more's the pity.
540 static int size_fifo(struct uart_8250_port
*up
)
542 unsigned char old_fcr
, old_mcr
, old_lcr
;
543 unsigned short old_dl
;
546 old_lcr
= serial_inp(up
, UART_LCR
);
547 serial_outp(up
, UART_LCR
, 0);
548 old_fcr
= serial_inp(up
, UART_FCR
);
549 old_mcr
= serial_inp(up
, UART_MCR
);
550 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
551 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
552 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
);
553 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
554 old_dl
= serial_dl_read(up
);
555 serial_dl_write(up
, 0x0001);
556 serial_outp(up
, UART_LCR
, 0x03);
557 for (count
= 0; count
< 256; count
++)
558 serial_outp(up
, UART_TX
, count
);
559 mdelay(20);/* FIXME - schedule_timeout */
560 for (count
= 0; (serial_inp(up
, UART_LSR
) & UART_LSR_DR
) &&
561 (count
< 256); count
++)
562 serial_inp(up
, UART_RX
);
563 serial_outp(up
, UART_FCR
, old_fcr
);
564 serial_outp(up
, UART_MCR
, old_mcr
);
565 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
566 serial_dl_write(up
, old_dl
);
567 serial_outp(up
, UART_LCR
, old_lcr
);
573 * Read UART ID using the divisor method - set DLL and DLM to zero
574 * and the revision will be in DLL and device type in DLM. We
575 * preserve the device state across this.
577 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port
*p
)
579 unsigned char old_dll
, old_dlm
, old_lcr
;
582 old_lcr
= serial_inp(p
, UART_LCR
);
583 serial_outp(p
, UART_LCR
, UART_LCR_DLAB
);
585 old_dll
= serial_inp(p
, UART_DLL
);
586 old_dlm
= serial_inp(p
, UART_DLM
);
588 serial_outp(p
, UART_DLL
, 0);
589 serial_outp(p
, UART_DLM
, 0);
591 id
= serial_inp(p
, UART_DLL
) | serial_inp(p
, UART_DLM
) << 8;
593 serial_outp(p
, UART_DLL
, old_dll
);
594 serial_outp(p
, UART_DLM
, old_dlm
);
595 serial_outp(p
, UART_LCR
, old_lcr
);
601 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
602 * When this function is called we know it is at least a StarTech
603 * 16650 V2, but it might be one of several StarTech UARTs, or one of
604 * its clones. (We treat the broken original StarTech 16650 V1 as a
605 * 16550, and why not? Startech doesn't seem to even acknowledge its
608 * What evil have men's minds wrought...
610 static void autoconfig_has_efr(struct uart_8250_port
*up
)
612 unsigned int id1
, id2
, id3
, rev
;
615 * Everything with an EFR has SLEEP
617 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
620 * First we check to see if it's an Oxford Semiconductor UART.
622 * If we have to do this here because some non-National
623 * Semiconductor clone chips lock up if you try writing to the
624 * LSR register (which serial_icr_read does)
628 * Check for Oxford Semiconductor 16C950.
630 * EFR [4] must be set else this test fails.
632 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
633 * claims that it's needed for 952 dual UART's (which are not
634 * recommended for new designs).
637 serial_out(up
, UART_LCR
, 0xBF);
638 serial_out(up
, UART_EFR
, UART_EFR_ECB
);
639 serial_out(up
, UART_LCR
, 0x00);
640 id1
= serial_icr_read(up
, UART_ID1
);
641 id2
= serial_icr_read(up
, UART_ID2
);
642 id3
= serial_icr_read(up
, UART_ID3
);
643 rev
= serial_icr_read(up
, UART_REV
);
645 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1
, id2
, id3
, rev
);
647 if (id1
== 0x16 && id2
== 0xC9 &&
648 (id3
== 0x50 || id3
== 0x52 || id3
== 0x54)) {
649 up
->port
.type
= PORT_16C950
;
652 * Enable work around for the Oxford Semiconductor 952 rev B
653 * chip which causes it to seriously miscalculate baud rates
656 if (id3
== 0x52 && rev
== 0x01)
657 up
->bugs
|= UART_BUG_QUOT
;
662 * We check for a XR16C850 by setting DLL and DLM to 0, and then
663 * reading back DLL and DLM. The chip type depends on the DLM
665 * 0x10 - XR16C850 and the DLL contains the chip revision.
669 id1
= autoconfig_read_divisor_id(up
);
670 DEBUG_AUTOCONF("850id=%04x ", id1
);
673 if (id2
== 0x10 || id2
== 0x12 || id2
== 0x14) {
674 up
->port
.type
= PORT_16850
;
679 * It wasn't an XR16C850.
681 * We distinguish between the '654 and the '650 by counting
682 * how many bytes are in the FIFO. I'm using this for now,
683 * since that's the technique that was sent to me in the
684 * serial driver update, but I'm not convinced this works.
685 * I've had problems doing this in the past. -TYT
687 if (size_fifo(up
) == 64)
688 up
->port
.type
= PORT_16654
;
690 up
->port
.type
= PORT_16650V2
;
694 * We detected a chip without a FIFO. Only two fall into
695 * this category - the original 8250 and the 16450. The
696 * 16450 has a scratch register (accessible with LCR=0)
698 static void autoconfig_8250(struct uart_8250_port
*up
)
700 unsigned char scratch
, status1
, status2
;
702 up
->port
.type
= PORT_8250
;
704 scratch
= serial_in(up
, UART_SCR
);
705 serial_outp(up
, UART_SCR
, 0xa5);
706 status1
= serial_in(up
, UART_SCR
);
707 serial_outp(up
, UART_SCR
, 0x5a);
708 status2
= serial_in(up
, UART_SCR
);
709 serial_outp(up
, UART_SCR
, scratch
);
711 if (status1
== 0xa5 && status2
== 0x5a)
712 up
->port
.type
= PORT_16450
;
715 static int broken_efr(struct uart_8250_port
*up
)
718 * Exar ST16C2550 "A2" devices incorrectly detect as
719 * having an EFR, and report an ID of 0x0201. See
720 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
722 if (autoconfig_read_divisor_id(up
) == 0x0201 && size_fifo(up
) == 16)
729 * We know that the chip has FIFOs. Does it have an EFR? The
730 * EFR is located in the same register position as the IIR and
731 * we know the top two bits of the IIR are currently set. The
732 * EFR should contain zero. Try to read the EFR.
734 static void autoconfig_16550a(struct uart_8250_port
*up
)
736 unsigned char status1
, status2
;
737 unsigned int iersave
;
739 up
->port
.type
= PORT_16550A
;
740 up
->capabilities
|= UART_CAP_FIFO
;
743 * Check for presence of the EFR when DLAB is set.
744 * Only ST16C650V1 UARTs pass this test.
746 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
747 if (serial_in(up
, UART_EFR
) == 0) {
748 serial_outp(up
, UART_EFR
, 0xA8);
749 if (serial_in(up
, UART_EFR
) != 0) {
750 DEBUG_AUTOCONF("EFRv1 ");
751 up
->port
.type
= PORT_16650
;
752 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
754 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
756 serial_outp(up
, UART_EFR
, 0);
761 * Maybe it requires 0xbf to be written to the LCR.
762 * (other ST16C650V2 UARTs, TI16C752A, etc)
764 serial_outp(up
, UART_LCR
, 0xBF);
765 if (serial_in(up
, UART_EFR
) == 0 && !broken_efr(up
)) {
766 DEBUG_AUTOCONF("EFRv2 ");
767 autoconfig_has_efr(up
);
772 * Check for a National Semiconductor SuperIO chip.
773 * Attempt to switch to bank 2, read the value of the LOOP bit
774 * from EXCR1. Switch back to bank 0, change it in MCR. Then
775 * switch back to bank 2, read it from EXCR1 again and check
776 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
778 serial_outp(up
, UART_LCR
, 0);
779 status1
= serial_in(up
, UART_MCR
);
780 serial_outp(up
, UART_LCR
, 0xE0);
781 status2
= serial_in(up
, 0x02); /* EXCR1 */
783 if (!((status2
^ status1
) & UART_MCR_LOOP
)) {
784 serial_outp(up
, UART_LCR
, 0);
785 serial_outp(up
, UART_MCR
, status1
^ UART_MCR_LOOP
);
786 serial_outp(up
, UART_LCR
, 0xE0);
787 status2
= serial_in(up
, 0x02); /* EXCR1 */
788 serial_outp(up
, UART_LCR
, 0);
789 serial_outp(up
, UART_MCR
, status1
);
791 if ((status2
^ status1
) & UART_MCR_LOOP
) {
794 serial_outp(up
, UART_LCR
, 0xE0);
796 quot
= serial_dl_read(up
);
799 status1
= serial_in(up
, 0x04); /* EXCR1 */
800 status1
&= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
801 status1
|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
802 serial_outp(up
, 0x04, status1
);
804 serial_dl_write(up
, quot
);
806 serial_outp(up
, UART_LCR
, 0);
808 up
->port
.uartclk
= 921600*16;
809 up
->port
.type
= PORT_NS16550A
;
810 up
->capabilities
|= UART_NATSEMI
;
816 * No EFR. Try to detect a TI16750, which only sets bit 5 of
817 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
818 * Try setting it with and without DLAB set. Cheap clones
819 * set bit 5 without DLAB set.
821 serial_outp(up
, UART_LCR
, 0);
822 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
823 status1
= serial_in(up
, UART_IIR
) >> 5;
824 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
825 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
826 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
827 status2
= serial_in(up
, UART_IIR
) >> 5;
828 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
829 serial_outp(up
, UART_LCR
, 0);
831 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1
, status2
);
833 if (status1
== 6 && status2
== 7) {
834 up
->port
.type
= PORT_16750
;
835 up
->capabilities
|= UART_CAP_AFE
| UART_CAP_SLEEP
;
840 * Try writing and reading the UART_IER_UUE bit (b6).
841 * If it works, this is probably one of the Xscale platform's
843 * We're going to explicitly set the UUE bit to 0 before
844 * trying to write and read a 1 just to make sure it's not
845 * already a 1 and maybe locked there before we even start start.
847 iersave
= serial_in(up
, UART_IER
);
848 serial_outp(up
, UART_IER
, iersave
& ~UART_IER_UUE
);
849 if (!(serial_in(up
, UART_IER
) & UART_IER_UUE
)) {
851 * OK it's in a known zero state, try writing and reading
852 * without disturbing the current state of the other bits.
854 serial_outp(up
, UART_IER
, iersave
| UART_IER_UUE
);
855 if (serial_in(up
, UART_IER
) & UART_IER_UUE
) {
858 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
860 DEBUG_AUTOCONF("Xscale ");
861 up
->port
.type
= PORT_XSCALE
;
862 up
->capabilities
|= UART_CAP_UUE
;
867 * If we got here we couldn't force the IER_UUE bit to 0.
868 * Log it and continue.
870 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
872 serial_outp(up
, UART_IER
, iersave
);
876 * This routine is called by rs_init() to initialize a specific serial
877 * port. It determines what type of UART chip this serial port is
878 * using: 8250, 16450, 16550, 16550A. The important question is
879 * whether or not this UART is a 16550A or not, since this will
880 * determine whether or not we can use its FIFO features or not.
882 static void autoconfig(struct uart_8250_port
*up
, unsigned int probeflags
)
884 unsigned char status1
, scratch
, scratch2
, scratch3
;
885 unsigned char save_lcr
, save_mcr
;
888 if (!up
->port
.iobase
&& !up
->port
.mapbase
&& !up
->port
.membase
)
891 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
892 up
->port
.line
, up
->port
.iobase
, up
->port
.membase
);
895 * We really do need global IRQs disabled here - we're going to
896 * be frobbing the chips IRQ enable register to see if it exists.
898 spin_lock_irqsave(&up
->port
.lock
, flags
);
899 // save_flags(flags); cli();
901 up
->capabilities
= 0;
904 if (!(up
->port
.flags
& UPF_BUGGY_UART
)) {
906 * Do a simple existence test first; if we fail this,
907 * there's no point trying anything else.
909 * 0x80 is used as a nonsense port to prevent against
910 * false positives due to ISA bus float. The
911 * assumption is that 0x80 is a non-existent port;
912 * which should be safe since include/asm/io.h also
913 * makes this assumption.
915 * Note: this is safe as long as MCR bit 4 is clear
916 * and the device is in "PC" mode.
918 scratch
= serial_inp(up
, UART_IER
);
919 serial_outp(up
, UART_IER
, 0);
924 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
925 * 16C754B) allow only to modify them if an EFR bit is set.
927 scratch2
= serial_inp(up
, UART_IER
) & 0x0f;
928 serial_outp(up
, UART_IER
, 0x0F);
932 scratch3
= serial_inp(up
, UART_IER
) & 0x0f;
933 serial_outp(up
, UART_IER
, scratch
);
934 if (scratch2
!= 0 || scratch3
!= 0x0F) {
936 * We failed; there's nothing here
938 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
944 save_mcr
= serial_in(up
, UART_MCR
);
945 save_lcr
= serial_in(up
, UART_LCR
);
948 * Check to see if a UART is really there. Certain broken
949 * internal modems based on the Rockwell chipset fail this
950 * test, because they apparently don't implement the loopback
951 * test mode. So this test is skipped on the COM 1 through
952 * COM 4 ports. This *should* be safe, since no board
953 * manufacturer would be stupid enough to design a board
954 * that conflicts with COM 1-4 --- we hope!
956 if (!(up
->port
.flags
& UPF_SKIP_TEST
)) {
957 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
| 0x0A);
958 status1
= serial_inp(up
, UART_MSR
) & 0xF0;
959 serial_outp(up
, UART_MCR
, save_mcr
);
960 if (status1
!= 0x90) {
961 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
968 * We're pretty sure there's a port here. Lets find out what
969 * type of port it is. The IIR top two bits allows us to find
970 * out if it's 8250 or 16450, 16550, 16550A or later. This
971 * determines what we test for next.
973 * We also initialise the EFR (if any) to zero for later. The
974 * EFR occupies the same register location as the FCR and IIR.
976 serial_outp(up
, UART_LCR
, 0xBF);
977 serial_outp(up
, UART_EFR
, 0);
978 serial_outp(up
, UART_LCR
, 0);
980 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
981 scratch
= serial_in(up
, UART_IIR
) >> 6;
983 DEBUG_AUTOCONF("iir=%d ", scratch
);
990 up
->port
.type
= PORT_UNKNOWN
;
993 up
->port
.type
= PORT_16550
;
996 autoconfig_16550a(up
);
1000 #ifdef CONFIG_SERIAL_8250_RSA
1002 * Only probe for RSA ports if we got the region.
1004 if (up
->port
.type
== PORT_16550A
&& probeflags
& PROBE_RSA
) {
1007 for (i
= 0 ; i
< probe_rsa_count
; ++i
) {
1008 if (probe_rsa
[i
] == up
->port
.iobase
&&
1010 up
->port
.type
= PORT_RSA
;
1017 #ifdef CONFIG_SERIAL_8250_AU1X00
1018 /* if access method is AU, it is a 16550 with a quirk */
1019 if (up
->port
.type
== PORT_16550A
&& up
->port
.iotype
== UPIO_AU
)
1020 up
->bugs
|= UART_BUG_NOMSR
;
1023 serial_outp(up
, UART_LCR
, save_lcr
);
1025 if (up
->capabilities
!= uart_config
[up
->port
.type
].flags
) {
1027 "ttyS%d: detected caps %08x should be %08x\n",
1028 up
->port
.line
, up
->capabilities
,
1029 uart_config
[up
->port
.type
].flags
);
1032 up
->port
.fifosize
= uart_config
[up
->port
.type
].fifo_size
;
1033 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1034 up
->tx_loadsz
= uart_config
[up
->port
.type
].tx_loadsz
;
1036 if (up
->port
.type
== PORT_UNKNOWN
)
1042 #ifdef CONFIG_SERIAL_8250_RSA
1043 if (up
->port
.type
== PORT_RSA
)
1044 serial_outp(up
, UART_RSA_FRR
, 0);
1046 serial_outp(up
, UART_MCR
, save_mcr
);
1047 serial8250_clear_fifos(up
);
1048 (void)serial_in(up
, UART_RX
);
1049 if (up
->capabilities
& UART_CAP_UUE
)
1050 serial_outp(up
, UART_IER
, UART_IER_UUE
);
1052 serial_outp(up
, UART_IER
, 0);
1055 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1056 // restore_flags(flags);
1057 DEBUG_AUTOCONF("type=%s\n", uart_config
[up
->port
.type
].name
);
1060 static void autoconfig_irq(struct uart_8250_port
*up
)
1062 unsigned char save_mcr
, save_ier
;
1063 unsigned char save_ICP
= 0;
1064 unsigned int ICP
= 0;
1068 if (up
->port
.flags
& UPF_FOURPORT
) {
1069 ICP
= (up
->port
.iobase
& 0xfe0) | 0x1f;
1070 save_ICP
= inb_p(ICP
);
1075 /* forget possible initially masked and pending IRQ */
1076 probe_irq_off(probe_irq_on());
1077 save_mcr
= serial_inp(up
, UART_MCR
);
1078 save_ier
= serial_inp(up
, UART_IER
);
1079 serial_outp(up
, UART_MCR
, UART_MCR_OUT1
| UART_MCR_OUT2
);
1081 irqs
= probe_irq_on();
1082 serial_outp(up
, UART_MCR
, 0);
1084 if (up
->port
.flags
& UPF_FOURPORT
) {
1085 serial_outp(up
, UART_MCR
,
1086 UART_MCR_DTR
| UART_MCR_RTS
);
1088 serial_outp(up
, UART_MCR
,
1089 UART_MCR_DTR
| UART_MCR_RTS
| UART_MCR_OUT2
);
1091 serial_outp(up
, UART_IER
, 0x0f); /* enable all intrs */
1092 (void)serial_inp(up
, UART_LSR
);
1093 (void)serial_inp(up
, UART_RX
);
1094 (void)serial_inp(up
, UART_IIR
);
1095 (void)serial_inp(up
, UART_MSR
);
1096 serial_outp(up
, UART_TX
, 0xFF);
1098 irq
= probe_irq_off(irqs
);
1100 serial_outp(up
, UART_MCR
, save_mcr
);
1101 serial_outp(up
, UART_IER
, save_ier
);
1103 if (up
->port
.flags
& UPF_FOURPORT
)
1104 outb_p(save_ICP
, ICP
);
1106 up
->port
.irq
= (irq
> 0) ? irq
: 0;
1109 static inline void __stop_tx(struct uart_8250_port
*p
)
1111 if (p
->ier
& UART_IER_THRI
) {
1112 p
->ier
&= ~UART_IER_THRI
;
1113 serial_out(p
, UART_IER
, p
->ier
);
1117 static void serial8250_stop_tx(struct uart_port
*port
)
1119 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1124 * We really want to stop the transmitter from sending.
1126 if (up
->port
.type
== PORT_16C950
) {
1127 up
->acr
|= UART_ACR_TXDIS
;
1128 serial_icr_write(up
, UART_ACR
, up
->acr
);
1132 static void transmit_chars(struct uart_8250_port
*up
);
1134 static void serial8250_start_tx(struct uart_port
*port
)
1136 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1138 if (!(up
->ier
& UART_IER_THRI
)) {
1139 up
->ier
|= UART_IER_THRI
;
1140 serial_out(up
, UART_IER
, up
->ier
);
1142 if (up
->bugs
& UART_BUG_TXEN
) {
1143 unsigned char lsr
, iir
;
1144 lsr
= serial_in(up
, UART_LSR
);
1145 iir
= serial_in(up
, UART_IIR
);
1146 if (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
)
1152 * Re-enable the transmitter if we disabled it.
1154 if (up
->port
.type
== PORT_16C950
&& up
->acr
& UART_ACR_TXDIS
) {
1155 up
->acr
&= ~UART_ACR_TXDIS
;
1156 serial_icr_write(up
, UART_ACR
, up
->acr
);
1160 static void serial8250_stop_rx(struct uart_port
*port
)
1162 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1164 up
->ier
&= ~UART_IER_RLSI
;
1165 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
1166 serial_out(up
, UART_IER
, up
->ier
);
1169 static void serial8250_enable_ms(struct uart_port
*port
)
1171 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1173 /* no MSR capabilities */
1174 if (up
->bugs
& UART_BUG_NOMSR
)
1177 up
->ier
|= UART_IER_MSI
;
1178 serial_out(up
, UART_IER
, up
->ier
);
1182 receive_chars(struct uart_8250_port
*up
, int *status
)
1184 struct tty_struct
*tty
= up
->port
.info
->tty
;
1185 unsigned char ch
, lsr
= *status
;
1186 int max_count
= 256;
1190 ch
= serial_inp(up
, UART_RX
);
1192 up
->port
.icount
.rx
++;
1194 #ifdef CONFIG_SERIAL_8250_CONSOLE
1196 * Recover the break flag from console xmit
1198 if (up
->port
.line
== up
->port
.cons
->index
) {
1199 lsr
|= up
->lsr_break_flag
;
1200 up
->lsr_break_flag
= 0;
1204 if (unlikely(lsr
& (UART_LSR_BI
| UART_LSR_PE
|
1205 UART_LSR_FE
| UART_LSR_OE
))) {
1207 * For statistics only
1209 if (lsr
& UART_LSR_BI
) {
1210 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
1211 up
->port
.icount
.brk
++;
1213 * We do the SysRQ and SAK checking
1214 * here because otherwise the break
1215 * may get masked by ignore_status_mask
1216 * or read_status_mask.
1218 if (uart_handle_break(&up
->port
))
1220 } else if (lsr
& UART_LSR_PE
)
1221 up
->port
.icount
.parity
++;
1222 else if (lsr
& UART_LSR_FE
)
1223 up
->port
.icount
.frame
++;
1224 if (lsr
& UART_LSR_OE
)
1225 up
->port
.icount
.overrun
++;
1228 * Mask off conditions which should be ignored.
1230 lsr
&= up
->port
.read_status_mask
;
1232 if (lsr
& UART_LSR_BI
) {
1233 DEBUG_INTR("handling break....");
1235 } else if (lsr
& UART_LSR_PE
)
1237 else if (lsr
& UART_LSR_FE
)
1240 if (uart_handle_sysrq_char(&up
->port
, ch
))
1243 uart_insert_char(&up
->port
, lsr
, UART_LSR_OE
, ch
, flag
);
1246 lsr
= serial_inp(up
, UART_LSR
);
1247 } while ((lsr
& UART_LSR_DR
) && (max_count
-- > 0));
1248 spin_unlock(&up
->port
.lock
);
1249 tty_flip_buffer_push(tty
);
1250 spin_lock(&up
->port
.lock
);
1254 static void transmit_chars(struct uart_8250_port
*up
)
1256 struct circ_buf
*xmit
= &up
->port
.info
->xmit
;
1259 if (up
->port
.x_char
) {
1260 serial_outp(up
, UART_TX
, up
->port
.x_char
);
1261 up
->port
.icount
.tx
++;
1262 up
->port
.x_char
= 0;
1265 if (uart_tx_stopped(&up
->port
)) {
1266 serial8250_stop_tx(&up
->port
);
1269 if (uart_circ_empty(xmit
)) {
1274 count
= up
->tx_loadsz
;
1276 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
1277 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
1278 up
->port
.icount
.tx
++;
1279 if (uart_circ_empty(xmit
))
1281 } while (--count
> 0);
1283 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
1284 uart_write_wakeup(&up
->port
);
1286 DEBUG_INTR("THRE...");
1288 if (uart_circ_empty(xmit
))
1292 static unsigned int check_modem_status(struct uart_8250_port
*up
)
1294 unsigned int status
= serial_in(up
, UART_MSR
);
1296 if (status
& UART_MSR_ANY_DELTA
&& up
->ier
& UART_IER_MSI
) {
1297 if (status
& UART_MSR_TERI
)
1298 up
->port
.icount
.rng
++;
1299 if (status
& UART_MSR_DDSR
)
1300 up
->port
.icount
.dsr
++;
1301 if (status
& UART_MSR_DDCD
)
1302 uart_handle_dcd_change(&up
->port
, status
& UART_MSR_DCD
);
1303 if (status
& UART_MSR_DCTS
)
1304 uart_handle_cts_change(&up
->port
, status
& UART_MSR_CTS
);
1306 wake_up_interruptible(&up
->port
.info
->delta_msr_wait
);
1313 * This handles the interrupt from one port.
1316 serial8250_handle_port(struct uart_8250_port
*up
)
1318 unsigned int status
;
1320 spin_lock(&up
->port
.lock
);
1322 status
= serial_inp(up
, UART_LSR
);
1324 DEBUG_INTR("status = %x...", status
);
1326 if (status
& UART_LSR_DR
)
1327 receive_chars(up
, &status
);
1328 check_modem_status(up
);
1329 if (status
& UART_LSR_THRE
)
1332 spin_unlock(&up
->port
.lock
);
1336 * This is the serial driver's interrupt routine.
1338 * Arjan thinks the old way was overly complex, so it got simplified.
1339 * Alan disagrees, saying that need the complexity to handle the weird
1340 * nature of ISA shared interrupts. (This is a special exception.)
1342 * In order to handle ISA shared interrupts properly, we need to check
1343 * that all ports have been serviced, and therefore the ISA interrupt
1344 * line has been de-asserted.
1346 * This means we need to loop through all ports. checking that they
1347 * don't have an interrupt pending.
1349 static irqreturn_t
serial8250_interrupt(int irq
, void *dev_id
)
1351 struct irq_info
*i
= dev_id
;
1352 struct list_head
*l
, *end
= NULL
;
1353 int pass_counter
= 0, handled
= 0;
1355 DEBUG_INTR("serial8250_interrupt(%d)...", irq
);
1357 spin_lock(&i
->lock
);
1361 struct uart_8250_port
*up
;
1364 up
= list_entry(l
, struct uart_8250_port
, list
);
1366 iir
= serial_in(up
, UART_IIR
);
1367 if (!(iir
& UART_IIR_NO_INT
)) {
1368 serial8250_handle_port(up
);
1373 } else if (end
== NULL
)
1378 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
1379 /* If we hit this, we're dead. */
1380 printk(KERN_ERR
"serial8250: too much work for "
1386 spin_unlock(&i
->lock
);
1388 DEBUG_INTR("end.\n");
1390 return IRQ_RETVAL(handled
);
1394 * To support ISA shared interrupts, we need to have one interrupt
1395 * handler that ensures that the IRQ line has been deasserted
1396 * before returning. Failing to do this will result in the IRQ
1397 * line being stuck active, and, since ISA irqs are edge triggered,
1398 * no more IRQs will be seen.
1400 static void serial_do_unlink(struct irq_info
*i
, struct uart_8250_port
*up
)
1402 spin_lock_irq(&i
->lock
);
1404 if (!list_empty(i
->head
)) {
1405 if (i
->head
== &up
->list
)
1406 i
->head
= i
->head
->next
;
1407 list_del(&up
->list
);
1409 BUG_ON(i
->head
!= &up
->list
);
1413 spin_unlock_irq(&i
->lock
);
1416 static int serial_link_irq_chain(struct uart_8250_port
*up
)
1418 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1419 int ret
, irq_flags
= up
->port
.flags
& UPF_SHARE_IRQ
? IRQF_SHARED
: 0;
1421 spin_lock_irq(&i
->lock
);
1424 list_add(&up
->list
, i
->head
);
1425 spin_unlock_irq(&i
->lock
);
1429 INIT_LIST_HEAD(&up
->list
);
1430 i
->head
= &up
->list
;
1431 spin_unlock_irq(&i
->lock
);
1433 ret
= request_irq(up
->port
.irq
, serial8250_interrupt
,
1434 irq_flags
, "serial", i
);
1436 serial_do_unlink(i
, up
);
1442 static void serial_unlink_irq_chain(struct uart_8250_port
*up
)
1444 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1446 BUG_ON(i
->head
== NULL
);
1448 if (list_empty(i
->head
))
1449 free_irq(up
->port
.irq
, i
);
1451 serial_do_unlink(i
, up
);
1455 * This function is used to handle ports that do not have an
1456 * interrupt. This doesn't work very well for 16450's, but gives
1457 * barely passable results for a 16550A. (Although at the expense
1458 * of much CPU overhead).
1460 static void serial8250_timeout(unsigned long data
)
1462 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1463 unsigned int timeout
;
1466 iir
= serial_in(up
, UART_IIR
);
1467 if (!(iir
& UART_IIR_NO_INT
))
1468 serial8250_handle_port(up
);
1470 timeout
= up
->port
.timeout
;
1471 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1472 mod_timer(&up
->timer
, jiffies
+ timeout
);
1475 static unsigned int serial8250_tx_empty(struct uart_port
*port
)
1477 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1478 unsigned long flags
;
1481 spin_lock_irqsave(&up
->port
.lock
, flags
);
1482 ret
= serial_in(up
, UART_LSR
) & UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
1483 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1488 static unsigned int serial8250_get_mctrl(struct uart_port
*port
)
1490 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1491 unsigned int status
;
1494 status
= check_modem_status(up
);
1497 if (status
& UART_MSR_DCD
)
1499 if (status
& UART_MSR_RI
)
1501 if (status
& UART_MSR_DSR
)
1503 if (status
& UART_MSR_CTS
)
1508 static void serial8250_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
1510 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1511 unsigned char mcr
= 0;
1513 if (mctrl
& TIOCM_RTS
)
1514 mcr
|= UART_MCR_RTS
;
1515 if (mctrl
& TIOCM_DTR
)
1516 mcr
|= UART_MCR_DTR
;
1517 if (mctrl
& TIOCM_OUT1
)
1518 mcr
|= UART_MCR_OUT1
;
1519 if (mctrl
& TIOCM_OUT2
)
1520 mcr
|= UART_MCR_OUT2
;
1521 if (mctrl
& TIOCM_LOOP
)
1522 mcr
|= UART_MCR_LOOP
;
1524 mcr
= (mcr
& up
->mcr_mask
) | up
->mcr_force
| up
->mcr
;
1526 serial_out(up
, UART_MCR
, mcr
);
1529 static void serial8250_break_ctl(struct uart_port
*port
, int break_state
)
1531 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1532 unsigned long flags
;
1534 spin_lock_irqsave(&up
->port
.lock
, flags
);
1535 if (break_state
== -1)
1536 up
->lcr
|= UART_LCR_SBC
;
1538 up
->lcr
&= ~UART_LCR_SBC
;
1539 serial_out(up
, UART_LCR
, up
->lcr
);
1540 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1543 static int serial8250_startup(struct uart_port
*port
)
1545 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1546 unsigned long flags
;
1547 unsigned char lsr
, iir
;
1550 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1553 if (up
->port
.type
== PORT_16C950
) {
1554 /* Wake up and initialize UART */
1556 serial_outp(up
, UART_LCR
, 0xBF);
1557 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1558 serial_outp(up
, UART_IER
, 0);
1559 serial_outp(up
, UART_LCR
, 0);
1560 serial_icr_write(up
, UART_CSR
, 0); /* Reset the UART */
1561 serial_outp(up
, UART_LCR
, 0xBF);
1562 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1563 serial_outp(up
, UART_LCR
, 0);
1566 #ifdef CONFIG_SERIAL_8250_RSA
1568 * If this is an RSA port, see if we can kick it up to the
1569 * higher speed clock.
1575 * Clear the FIFO buffers and disable them.
1576 * (they will be reenabled in set_termios())
1578 serial8250_clear_fifos(up
);
1581 * Clear the interrupt registers.
1583 (void) serial_inp(up
, UART_LSR
);
1584 (void) serial_inp(up
, UART_RX
);
1585 (void) serial_inp(up
, UART_IIR
);
1586 (void) serial_inp(up
, UART_MSR
);
1589 * At this point, there's no way the LSR could still be 0xff;
1590 * if it is, then bail out, because there's likely no UART
1593 if (!(up
->port
.flags
& UPF_BUGGY_UART
) &&
1594 (serial_inp(up
, UART_LSR
) == 0xff)) {
1595 printk("ttyS%d: LSR safety check engaged!\n", up
->port
.line
);
1600 * For a XR16C850, we need to set the trigger levels
1602 if (up
->port
.type
== PORT_16850
) {
1605 serial_outp(up
, UART_LCR
, 0xbf);
1607 fctr
= serial_inp(up
, UART_FCTR
) & ~(UART_FCTR_RX
|UART_FCTR_TX
);
1608 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_RX
);
1609 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1610 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_TX
);
1611 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1613 serial_outp(up
, UART_LCR
, 0);
1617 * If the "interrupt" for this port doesn't correspond with any
1618 * hardware interrupt, we use a timer-based system. The original
1619 * driver used to do this with IRQ0.
1621 if (!is_real_interrupt(up
->port
.irq
)) {
1622 unsigned int timeout
= up
->port
.timeout
;
1624 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1626 up
->timer
.data
= (unsigned long)up
;
1627 mod_timer(&up
->timer
, jiffies
+ timeout
);
1629 retval
= serial_link_irq_chain(up
);
1635 * Now, initialize the UART
1637 serial_outp(up
, UART_LCR
, UART_LCR_WLEN8
);
1639 spin_lock_irqsave(&up
->port
.lock
, flags
);
1640 if (up
->port
.flags
& UPF_FOURPORT
) {
1641 if (!is_real_interrupt(up
->port
.irq
))
1642 up
->port
.mctrl
|= TIOCM_OUT1
;
1645 * Most PC uarts need OUT2 raised to enable interrupts.
1647 if (is_real_interrupt(up
->port
.irq
))
1648 up
->port
.mctrl
|= TIOCM_OUT2
;
1650 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1653 * Do a quick test to see if we receive an
1654 * interrupt when we enable the TX irq.
1656 serial_outp(up
, UART_IER
, UART_IER_THRI
);
1657 lsr
= serial_in(up
, UART_LSR
);
1658 iir
= serial_in(up
, UART_IIR
);
1659 serial_outp(up
, UART_IER
, 0);
1661 if (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
) {
1662 if (!(up
->bugs
& UART_BUG_TXEN
)) {
1663 up
->bugs
|= UART_BUG_TXEN
;
1664 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
1668 up
->bugs
&= ~UART_BUG_TXEN
;
1671 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1674 * Finally, enable interrupts. Note: Modem status interrupts
1675 * are set via set_termios(), which will be occurring imminently
1676 * anyway, so we don't enable them here.
1678 up
->ier
= UART_IER_RLSI
| UART_IER_RDI
;
1679 serial_outp(up
, UART_IER
, up
->ier
);
1681 if (up
->port
.flags
& UPF_FOURPORT
) {
1684 * Enable interrupts on the AST Fourport board
1686 icp
= (up
->port
.iobase
& 0xfe0) | 0x01f;
1692 * And clear the interrupt registers again for luck.
1694 (void) serial_inp(up
, UART_LSR
);
1695 (void) serial_inp(up
, UART_RX
);
1696 (void) serial_inp(up
, UART_IIR
);
1697 (void) serial_inp(up
, UART_MSR
);
1702 static void serial8250_shutdown(struct uart_port
*port
)
1704 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1705 unsigned long flags
;
1708 * Disable interrupts from this port
1711 serial_outp(up
, UART_IER
, 0);
1713 spin_lock_irqsave(&up
->port
.lock
, flags
);
1714 if (up
->port
.flags
& UPF_FOURPORT
) {
1715 /* reset interrupts on the AST Fourport board */
1716 inb((up
->port
.iobase
& 0xfe0) | 0x1f);
1717 up
->port
.mctrl
|= TIOCM_OUT1
;
1719 up
->port
.mctrl
&= ~TIOCM_OUT2
;
1721 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1722 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1725 * Disable break condition and FIFOs
1727 serial_out(up
, UART_LCR
, serial_inp(up
, UART_LCR
) & ~UART_LCR_SBC
);
1728 serial8250_clear_fifos(up
);
1730 #ifdef CONFIG_SERIAL_8250_RSA
1732 * Reset the RSA board back to 115kbps compat mode.
1738 * Read data port to reset things, and then unlink from
1741 (void) serial_in(up
, UART_RX
);
1743 if (!is_real_interrupt(up
->port
.irq
))
1744 del_timer_sync(&up
->timer
);
1746 serial_unlink_irq_chain(up
);
1749 static unsigned int serial8250_get_divisor(struct uart_port
*port
, unsigned int baud
)
1754 * Handle magic divisors for baud rates above baud_base on
1755 * SMSC SuperIO chips.
1757 if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1758 baud
== (port
->uartclk
/4))
1760 else if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1761 baud
== (port
->uartclk
/8))
1764 quot
= uart_get_divisor(port
, baud
);
1770 serial8250_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
1771 struct ktermios
*old
)
1773 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1774 unsigned char cval
, fcr
= 0;
1775 unsigned long flags
;
1776 unsigned int baud
, quot
;
1778 switch (termios
->c_cflag
& CSIZE
) {
1780 cval
= UART_LCR_WLEN5
;
1783 cval
= UART_LCR_WLEN6
;
1786 cval
= UART_LCR_WLEN7
;
1790 cval
= UART_LCR_WLEN8
;
1794 if (termios
->c_cflag
& CSTOPB
)
1795 cval
|= UART_LCR_STOP
;
1796 if (termios
->c_cflag
& PARENB
)
1797 cval
|= UART_LCR_PARITY
;
1798 if (!(termios
->c_cflag
& PARODD
))
1799 cval
|= UART_LCR_EPAR
;
1801 if (termios
->c_cflag
& CMSPAR
)
1802 cval
|= UART_LCR_SPAR
;
1806 * Ask the core to calculate the divisor for us.
1808 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
1809 quot
= serial8250_get_divisor(port
, baud
);
1812 * Oxford Semi 952 rev B workaround
1814 if (up
->bugs
& UART_BUG_QUOT
&& (quot
& 0xff) == 0)
1817 if (up
->capabilities
& UART_CAP_FIFO
&& up
->port
.fifosize
> 1) {
1819 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_TRIGGER_1
;
1821 fcr
= uart_config
[up
->port
.type
].fcr
;
1825 * MCR-based auto flow control. When AFE is enabled, RTS will be
1826 * deasserted when the receive FIFO contains more characters than
1827 * the trigger, or the MCR RTS bit is cleared. In the case where
1828 * the remote UART is not using CTS auto flow control, we must
1829 * have sufficient FIFO entries for the latency of the remote
1830 * UART to respond. IOW, at least 32 bytes of FIFO.
1832 if (up
->capabilities
& UART_CAP_AFE
&& up
->port
.fifosize
>= 32) {
1833 up
->mcr
&= ~UART_MCR_AFE
;
1834 if (termios
->c_cflag
& CRTSCTS
)
1835 up
->mcr
|= UART_MCR_AFE
;
1839 * Ok, we're now changing the port state. Do it with
1840 * interrupts disabled.
1842 spin_lock_irqsave(&up
->port
.lock
, flags
);
1845 * Update the per-port timeout.
1847 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1849 up
->port
.read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
1850 if (termios
->c_iflag
& INPCK
)
1851 up
->port
.read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
1852 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
1853 up
->port
.read_status_mask
|= UART_LSR_BI
;
1856 * Characteres to ignore
1858 up
->port
.ignore_status_mask
= 0;
1859 if (termios
->c_iflag
& IGNPAR
)
1860 up
->port
.ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
1861 if (termios
->c_iflag
& IGNBRK
) {
1862 up
->port
.ignore_status_mask
|= UART_LSR_BI
;
1864 * If we're ignoring parity and break indicators,
1865 * ignore overruns too (for real raw support).
1867 if (termios
->c_iflag
& IGNPAR
)
1868 up
->port
.ignore_status_mask
|= UART_LSR_OE
;
1872 * ignore all characters if CREAD is not set
1874 if ((termios
->c_cflag
& CREAD
) == 0)
1875 up
->port
.ignore_status_mask
|= UART_LSR_DR
;
1878 * CTS flow control flag and modem status interrupts
1880 up
->ier
&= ~UART_IER_MSI
;
1881 if (!(up
->bugs
& UART_BUG_NOMSR
) &&
1882 UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
1883 up
->ier
|= UART_IER_MSI
;
1884 if (up
->capabilities
& UART_CAP_UUE
)
1885 up
->ier
|= UART_IER_UUE
| UART_IER_RTOIE
;
1887 serial_out(up
, UART_IER
, up
->ier
);
1889 if (up
->capabilities
& UART_CAP_EFR
) {
1890 unsigned char efr
= 0;
1892 * TI16C752/Startech hardware flow control. FIXME:
1893 * - TI16C752 requires control thresholds to be set.
1894 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1896 if (termios
->c_cflag
& CRTSCTS
)
1897 efr
|= UART_EFR_CTS
;
1899 serial_outp(up
, UART_LCR
, 0xBF);
1900 serial_outp(up
, UART_EFR
, efr
);
1903 #ifdef CONFIG_ARCH_OMAP15XX
1904 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
1905 if (cpu_is_omap1510() && is_omap_port((unsigned int)up
->port
.membase
)) {
1906 if (baud
== 115200) {
1908 serial_out(up
, UART_OMAP_OSC_12M_SEL
, 1);
1910 serial_out(up
, UART_OMAP_OSC_12M_SEL
, 0);
1914 if (up
->capabilities
& UART_NATSEMI
) {
1915 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1916 serial_outp(up
, UART_LCR
, 0xe0);
1918 serial_outp(up
, UART_LCR
, cval
| UART_LCR_DLAB
);/* set DLAB */
1921 serial_dl_write(up
, quot
);
1924 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1925 * is written without DLAB set, this mode will be disabled.
1927 if (up
->port
.type
== PORT_16750
)
1928 serial_outp(up
, UART_FCR
, fcr
);
1930 serial_outp(up
, UART_LCR
, cval
); /* reset DLAB */
1931 up
->lcr
= cval
; /* Save LCR */
1932 if (up
->port
.type
!= PORT_16750
) {
1933 if (fcr
& UART_FCR_ENABLE_FIFO
) {
1934 /* emulated UARTs (Lucent Venus 167x) need two steps */
1935 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
1937 serial_outp(up
, UART_FCR
, fcr
); /* set fcr */
1939 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1940 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1944 serial8250_pm(struct uart_port
*port
, unsigned int state
,
1945 unsigned int oldstate
)
1947 struct uart_8250_port
*p
= (struct uart_8250_port
*)port
;
1949 serial8250_set_sleep(p
, state
!= 0);
1952 p
->pm(port
, state
, oldstate
);
1956 * Resource handling.
1958 static int serial8250_request_std_resource(struct uart_8250_port
*up
)
1960 unsigned int size
= 8 << up
->port
.regshift
;
1963 switch (up
->port
.iotype
) {
1970 if (!up
->port
.mapbase
)
1973 if (!request_mem_region(up
->port
.mapbase
, size
, "serial")) {
1978 if (up
->port
.flags
& UPF_IOREMAP
) {
1979 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
1980 if (!up
->port
.membase
) {
1981 release_mem_region(up
->port
.mapbase
, size
);
1989 if (!request_region(up
->port
.iobase
, size
, "serial"))
1996 static void serial8250_release_std_resource(struct uart_8250_port
*up
)
1998 unsigned int size
= 8 << up
->port
.regshift
;
2000 switch (up
->port
.iotype
) {
2007 if (!up
->port
.mapbase
)
2010 if (up
->port
.flags
& UPF_IOREMAP
) {
2011 iounmap(up
->port
.membase
);
2012 up
->port
.membase
= NULL
;
2015 release_mem_region(up
->port
.mapbase
, size
);
2020 release_region(up
->port
.iobase
, size
);
2025 static int serial8250_request_rsa_resource(struct uart_8250_port
*up
)
2027 unsigned long start
= UART_RSA_BASE
<< up
->port
.regshift
;
2028 unsigned int size
= 8 << up
->port
.regshift
;
2031 switch (up
->port
.iotype
) {
2034 start
+= up
->port
.iobase
;
2035 if (request_region(start
, size
, "serial-rsa"))
2045 static void serial8250_release_rsa_resource(struct uart_8250_port
*up
)
2047 unsigned long offset
= UART_RSA_BASE
<< up
->port
.regshift
;
2048 unsigned int size
= 8 << up
->port
.regshift
;
2050 switch (up
->port
.iotype
) {
2053 release_region(up
->port
.iobase
+ offset
, size
);
2058 static void serial8250_release_port(struct uart_port
*port
)
2060 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2062 serial8250_release_std_resource(up
);
2063 if (up
->port
.type
== PORT_RSA
)
2064 serial8250_release_rsa_resource(up
);
2067 static int serial8250_request_port(struct uart_port
*port
)
2069 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2072 ret
= serial8250_request_std_resource(up
);
2073 if (ret
== 0 && up
->port
.type
== PORT_RSA
) {
2074 ret
= serial8250_request_rsa_resource(up
);
2076 serial8250_release_std_resource(up
);
2082 static void serial8250_config_port(struct uart_port
*port
, int flags
)
2084 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2085 int probeflags
= PROBE_ANY
;
2089 * Find the region that we can probe for. This in turn
2090 * tells us whether we can probe for the type of port.
2092 ret
= serial8250_request_std_resource(up
);
2096 ret
= serial8250_request_rsa_resource(up
);
2098 probeflags
&= ~PROBE_RSA
;
2100 if (flags
& UART_CONFIG_TYPE
)
2101 autoconfig(up
, probeflags
);
2102 if (up
->port
.type
!= PORT_UNKNOWN
&& flags
& UART_CONFIG_IRQ
)
2105 if (up
->port
.type
!= PORT_RSA
&& probeflags
& PROBE_RSA
)
2106 serial8250_release_rsa_resource(up
);
2107 if (up
->port
.type
== PORT_UNKNOWN
)
2108 serial8250_release_std_resource(up
);
2112 serial8250_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
2114 if (ser
->irq
>= NR_IRQS
|| ser
->irq
< 0 ||
2115 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
2116 ser
->type
>= ARRAY_SIZE(uart_config
) || ser
->type
== PORT_CIRRUS
||
2117 ser
->type
== PORT_STARTECH
)
2123 serial8250_type(struct uart_port
*port
)
2125 int type
= port
->type
;
2127 if (type
>= ARRAY_SIZE(uart_config
))
2129 return uart_config
[type
].name
;
2132 static struct uart_ops serial8250_pops
= {
2133 .tx_empty
= serial8250_tx_empty
,
2134 .set_mctrl
= serial8250_set_mctrl
,
2135 .get_mctrl
= serial8250_get_mctrl
,
2136 .stop_tx
= serial8250_stop_tx
,
2137 .start_tx
= serial8250_start_tx
,
2138 .stop_rx
= serial8250_stop_rx
,
2139 .enable_ms
= serial8250_enable_ms
,
2140 .break_ctl
= serial8250_break_ctl
,
2141 .startup
= serial8250_startup
,
2142 .shutdown
= serial8250_shutdown
,
2143 .set_termios
= serial8250_set_termios
,
2144 .pm
= serial8250_pm
,
2145 .type
= serial8250_type
,
2146 .release_port
= serial8250_release_port
,
2147 .request_port
= serial8250_request_port
,
2148 .config_port
= serial8250_config_port
,
2149 .verify_port
= serial8250_verify_port
,
2152 static struct uart_8250_port serial8250_ports
[UART_NR
];
2154 static void __init
serial8250_isa_init_ports(void)
2156 struct uart_8250_port
*up
;
2157 static int first
= 1;
2164 for (i
= 0; i
< nr_uarts
; i
++) {
2165 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2168 spin_lock_init(&up
->port
.lock
);
2170 init_timer(&up
->timer
);
2171 up
->timer
.function
= serial8250_timeout
;
2174 * ALPHA_KLUDGE_MCR needs to be killed.
2176 up
->mcr_mask
= ~ALPHA_KLUDGE_MCR
;
2177 up
->mcr_force
= ALPHA_KLUDGE_MCR
;
2179 up
->port
.ops
= &serial8250_pops
;
2182 for (i
= 0, up
= serial8250_ports
;
2183 i
< ARRAY_SIZE(old_serial_port
) && i
< nr_uarts
;
2185 up
->port
.iobase
= old_serial_port
[i
].port
;
2186 up
->port
.irq
= irq_canonicalize(old_serial_port
[i
].irq
);
2187 up
->port
.uartclk
= old_serial_port
[i
].baud_base
* 16;
2188 up
->port
.flags
= old_serial_port
[i
].flags
;
2189 up
->port
.hub6
= old_serial_port
[i
].hub6
;
2190 up
->port
.membase
= old_serial_port
[i
].iomem_base
;
2191 up
->port
.iotype
= old_serial_port
[i
].io_type
;
2192 up
->port
.regshift
= old_serial_port
[i
].iomem_reg_shift
;
2194 up
->port
.flags
|= UPF_SHARE_IRQ
;
2199 serial8250_register_ports(struct uart_driver
*drv
, struct device
*dev
)
2203 serial8250_isa_init_ports();
2205 for (i
= 0; i
< nr_uarts
; i
++) {
2206 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2209 uart_add_one_port(drv
, &up
->port
);
2213 #ifdef CONFIG_SERIAL_8250_CONSOLE
2215 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2218 * Wait for transmitter & holding register to empty
2220 static inline void wait_for_xmitr(struct uart_8250_port
*up
, int bits
)
2222 unsigned int status
, tmout
= 10000;
2224 /* Wait up to 10ms for the character(s) to be sent. */
2226 status
= serial_in(up
, UART_LSR
);
2228 if (status
& UART_LSR_BI
)
2229 up
->lsr_break_flag
= UART_LSR_BI
;
2234 } while ((status
& bits
) != bits
);
2236 /* Wait up to 1s for flow control if necessary */
2237 if (up
->port
.flags
& UPF_CONS_FLOW
) {
2239 while (!(serial_in(up
, UART_MSR
) & UART_MSR_CTS
) && --tmout
) {
2241 touch_nmi_watchdog();
2246 static void serial8250_console_putchar(struct uart_port
*port
, int ch
)
2248 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2250 wait_for_xmitr(up
, UART_LSR_THRE
);
2251 serial_out(up
, UART_TX
, ch
);
2255 * Print a string to the serial port trying not to disturb
2256 * any possible real use of the port...
2258 * The console_lock must be held when we get here.
2261 serial8250_console_write(struct console
*co
, const char *s
, unsigned int count
)
2263 struct uart_8250_port
*up
= &serial8250_ports
[co
->index
];
2264 unsigned long flags
;
2268 touch_nmi_watchdog();
2270 local_irq_save(flags
);
2271 if (up
->port
.sysrq
) {
2272 /* serial8250_handle_port() already took the lock */
2274 } else if (oops_in_progress
) {
2275 locked
= spin_trylock(&up
->port
.lock
);
2277 spin_lock(&up
->port
.lock
);
2280 * First save the IER then disable the interrupts
2282 ier
= serial_in(up
, UART_IER
);
2284 if (up
->capabilities
& UART_CAP_UUE
)
2285 serial_out(up
, UART_IER
, UART_IER_UUE
);
2287 serial_out(up
, UART_IER
, 0);
2289 uart_console_write(&up
->port
, s
, count
, serial8250_console_putchar
);
2292 * Finally, wait for transmitter to become empty
2293 * and restore the IER
2295 wait_for_xmitr(up
, BOTH_EMPTY
);
2296 serial_out(up
, UART_IER
, ier
);
2299 spin_unlock(&up
->port
.lock
);
2300 local_irq_restore(flags
);
2303 static int __init
serial8250_console_setup(struct console
*co
, char *options
)
2305 struct uart_port
*port
;
2312 * Check whether an invalid uart number has been specified, and
2313 * if so, search for the first available port that does have
2316 if (co
->index
>= nr_uarts
)
2318 port
= &serial8250_ports
[co
->index
].port
;
2319 if (!port
->iobase
&& !port
->membase
)
2323 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
2325 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
2328 static struct uart_driver serial8250_reg
;
2329 static struct console serial8250_console
= {
2331 .write
= serial8250_console_write
,
2332 .device
= uart_console_device
,
2333 .setup
= serial8250_console_setup
,
2334 .flags
= CON_PRINTBUFFER
,
2336 .data
= &serial8250_reg
,
2339 static int __init
serial8250_console_init(void)
2341 serial8250_isa_init_ports();
2342 register_console(&serial8250_console
);
2345 console_initcall(serial8250_console_init
);
2347 static int __init
find_port(struct uart_port
*p
)
2350 struct uart_port
*port
;
2352 for (line
= 0; line
< nr_uarts
; line
++) {
2353 port
= &serial8250_ports
[line
].port
;
2354 if (uart_match_port(p
, port
))
2360 int __init
serial8250_start_console(struct uart_port
*port
, char *options
)
2364 line
= find_port(port
);
2368 add_preferred_console("ttyS", line
, options
);
2369 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2370 line
, port
->iotype
== UPIO_MEM
? "MMIO" : "I/O port",
2371 port
->iotype
== UPIO_MEM
? (unsigned long) port
->mapbase
:
2372 (unsigned long) port
->iobase
, options
);
2373 if (!(serial8250_console
.flags
& CON_ENABLED
)) {
2374 serial8250_console
.flags
&= ~CON_PRINTBUFFER
;
2375 register_console(&serial8250_console
);
2380 #define SERIAL8250_CONSOLE &serial8250_console
2382 #define SERIAL8250_CONSOLE NULL
2385 static struct uart_driver serial8250_reg
= {
2386 .owner
= THIS_MODULE
,
2387 .driver_name
= "serial",
2392 .cons
= SERIAL8250_CONSOLE
,
2396 * early_serial_setup - early registration for 8250 ports
2398 * Setup an 8250 port structure prior to console initialisation. Use
2399 * after console initialisation will cause undefined behaviour.
2401 int __init
early_serial_setup(struct uart_port
*port
)
2403 if (port
->line
>= ARRAY_SIZE(serial8250_ports
))
2406 serial8250_isa_init_ports();
2407 serial8250_ports
[port
->line
].port
= *port
;
2408 serial8250_ports
[port
->line
].port
.ops
= &serial8250_pops
;
2413 * serial8250_suspend_port - suspend one serial port
2414 * @line: serial line number
2416 * Suspend one serial port.
2418 void serial8250_suspend_port(int line
)
2420 uart_suspend_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2424 * serial8250_resume_port - resume one serial port
2425 * @line: serial line number
2427 * Resume one serial port.
2429 void serial8250_resume_port(int line
)
2431 uart_resume_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2435 * Register a set of serial devices attached to a platform device. The
2436 * list is terminated with a zero flags entry, which means we expect
2437 * all entries to have at least UPF_BOOT_AUTOCONF set.
2439 static int __devinit
serial8250_probe(struct platform_device
*dev
)
2441 struct plat_serial8250_port
*p
= dev
->dev
.platform_data
;
2442 struct uart_port port
;
2445 memset(&port
, 0, sizeof(struct uart_port
));
2447 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
2448 port
.iobase
= p
->iobase
;
2449 port
.membase
= p
->membase
;
2451 port
.uartclk
= p
->uartclk
;
2452 port
.regshift
= p
->regshift
;
2453 port
.iotype
= p
->iotype
;
2454 port
.flags
= p
->flags
;
2455 port
.mapbase
= p
->mapbase
;
2456 port
.hub6
= p
->hub6
;
2457 port
.dev
= &dev
->dev
;
2459 port
.flags
|= UPF_SHARE_IRQ
;
2460 ret
= serial8250_register_port(&port
);
2462 dev_err(&dev
->dev
, "unable to register port at index %d "
2463 "(IO%lx MEM%lx IRQ%d): %d\n", i
,
2464 p
->iobase
, p
->mapbase
, p
->irq
, ret
);
2471 * Remove serial ports registered against a platform device.
2473 static int __devexit
serial8250_remove(struct platform_device
*dev
)
2477 for (i
= 0; i
< nr_uarts
; i
++) {
2478 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2480 if (up
->port
.dev
== &dev
->dev
)
2481 serial8250_unregister_port(i
);
2486 static int serial8250_suspend(struct platform_device
*dev
, pm_message_t state
)
2490 for (i
= 0; i
< UART_NR
; i
++) {
2491 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2493 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
2494 uart_suspend_port(&serial8250_reg
, &up
->port
);
2500 static int serial8250_resume(struct platform_device
*dev
)
2504 for (i
= 0; i
< UART_NR
; i
++) {
2505 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2507 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
2508 uart_resume_port(&serial8250_reg
, &up
->port
);
2514 static struct platform_driver serial8250_isa_driver
= {
2515 .probe
= serial8250_probe
,
2516 .remove
= __devexit_p(serial8250_remove
),
2517 .suspend
= serial8250_suspend
,
2518 .resume
= serial8250_resume
,
2520 .name
= "serial8250",
2521 .owner
= THIS_MODULE
,
2526 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2527 * in the table in include/asm/serial.h
2529 static struct platform_device
*serial8250_isa_devs
;
2532 * serial8250_register_port and serial8250_unregister_port allows for
2533 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2534 * modems and PCI multiport cards.
2536 static DEFINE_MUTEX(serial_mutex
);
2538 static struct uart_8250_port
*serial8250_find_match_or_unused(struct uart_port
*port
)
2543 * First, find a port entry which matches.
2545 for (i
= 0; i
< nr_uarts
; i
++)
2546 if (uart_match_port(&serial8250_ports
[i
].port
, port
))
2547 return &serial8250_ports
[i
];
2550 * We didn't find a matching entry, so look for the first
2551 * free entry. We look for one which hasn't been previously
2552 * used (indicated by zero iobase).
2554 for (i
= 0; i
< nr_uarts
; i
++)
2555 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
&&
2556 serial8250_ports
[i
].port
.iobase
== 0)
2557 return &serial8250_ports
[i
];
2560 * That also failed. Last resort is to find any entry which
2561 * doesn't have a real port associated with it.
2563 for (i
= 0; i
< nr_uarts
; i
++)
2564 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
)
2565 return &serial8250_ports
[i
];
2571 * serial8250_register_port - register a serial port
2572 * @port: serial port template
2574 * Configure the serial port specified by the request. If the
2575 * port exists and is in use, it is hung up and unregistered
2578 * The port is then probed and if necessary the IRQ is autodetected
2579 * If this fails an error is returned.
2581 * On success the port is ready to use and the line number is returned.
2583 int serial8250_register_port(struct uart_port
*port
)
2585 struct uart_8250_port
*uart
;
2588 if (port
->uartclk
== 0)
2591 mutex_lock(&serial_mutex
);
2593 uart
= serial8250_find_match_or_unused(port
);
2595 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2597 uart
->port
.iobase
= port
->iobase
;
2598 uart
->port
.membase
= port
->membase
;
2599 uart
->port
.irq
= port
->irq
;
2600 uart
->port
.uartclk
= port
->uartclk
;
2601 uart
->port
.fifosize
= port
->fifosize
;
2602 uart
->port
.regshift
= port
->regshift
;
2603 uart
->port
.iotype
= port
->iotype
;
2604 uart
->port
.flags
= port
->flags
| UPF_BOOT_AUTOCONF
;
2605 uart
->port
.mapbase
= port
->mapbase
;
2607 uart
->port
.dev
= port
->dev
;
2609 ret
= uart_add_one_port(&serial8250_reg
, &uart
->port
);
2611 ret
= uart
->port
.line
;
2613 mutex_unlock(&serial_mutex
);
2617 EXPORT_SYMBOL(serial8250_register_port
);
2620 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2621 * @line: serial line number
2623 * Remove one serial port. This may not be called from interrupt
2624 * context. We hand the port back to the our control.
2626 void serial8250_unregister_port(int line
)
2628 struct uart_8250_port
*uart
= &serial8250_ports
[line
];
2630 mutex_lock(&serial_mutex
);
2631 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2632 if (serial8250_isa_devs
) {
2633 uart
->port
.flags
&= ~UPF_BOOT_AUTOCONF
;
2634 uart
->port
.type
= PORT_UNKNOWN
;
2635 uart
->port
.dev
= &serial8250_isa_devs
->dev
;
2636 uart_add_one_port(&serial8250_reg
, &uart
->port
);
2638 uart
->port
.dev
= NULL
;
2640 mutex_unlock(&serial_mutex
);
2642 EXPORT_SYMBOL(serial8250_unregister_port
);
2644 static int __init
serial8250_init(void)
2648 if (nr_uarts
> UART_NR
)
2651 printk(KERN_INFO
"Serial: 8250/16550 driver $Revision: 1.90 $ "
2652 "%d ports, IRQ sharing %sabled\n", nr_uarts
,
2653 share_irqs
? "en" : "dis");
2655 for (i
= 0; i
< NR_IRQS
; i
++)
2656 spin_lock_init(&irq_lists
[i
].lock
);
2658 ret
= uart_register_driver(&serial8250_reg
);
2662 serial8250_isa_devs
= platform_device_alloc("serial8250",
2663 PLAT8250_DEV_LEGACY
);
2664 if (!serial8250_isa_devs
) {
2666 goto unreg_uart_drv
;
2669 ret
= platform_device_add(serial8250_isa_devs
);
2673 serial8250_register_ports(&serial8250_reg
, &serial8250_isa_devs
->dev
);
2675 ret
= platform_driver_register(&serial8250_isa_driver
);
2679 platform_device_del(serial8250_isa_devs
);
2681 platform_device_put(serial8250_isa_devs
);
2683 uart_unregister_driver(&serial8250_reg
);
2688 static void __exit
serial8250_exit(void)
2690 struct platform_device
*isa_dev
= serial8250_isa_devs
;
2693 * This tells serial8250_unregister_port() not to re-register
2694 * the ports (thereby making serial8250_isa_driver permanently
2697 serial8250_isa_devs
= NULL
;
2699 platform_driver_unregister(&serial8250_isa_driver
);
2700 platform_device_unregister(isa_dev
);
2702 uart_unregister_driver(&serial8250_reg
);
2705 module_init(serial8250_init
);
2706 module_exit(serial8250_exit
);
2708 EXPORT_SYMBOL(serial8250_suspend_port
);
2709 EXPORT_SYMBOL(serial8250_resume_port
);
2711 MODULE_LICENSE("GPL");
2712 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2714 module_param(share_irqs
, uint
, 0644);
2715 MODULE_PARM_DESC(share_irqs
, "Share IRQs with other non-8250/16x50 devices"
2718 module_param(nr_uarts
, uint
, 0644);
2719 MODULE_PARM_DESC(nr_uarts
, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS
) ")");
2721 #ifdef CONFIG_SERIAL_8250_RSA
2722 module_param_array(probe_rsa
, ulong
, &probe_rsa_count
, 0444);
2723 MODULE_PARM_DESC(probe_rsa
, "Probe I/O ports for RSA");
2725 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR
);