2 * Copyright (C) 2005 - 2008 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
20 #include <linux/module.h>
22 #include <linux/list.h>
23 #include <linux/spinlock.h>
25 #include "regmap.h" /* srcgen array map output */
27 #include "asyncmesg.h"
28 #include "fwcmd_opcodes.h"
29 #include "post_codes.h"
30 #include "fwcmd_mcc.h"
32 #include "fwcmd_types_bmap.h"
33 #include "fwcmd_common_bmap.h"
34 #include "fwcmd_eth_bmap.h"
38 * Macros for reading/writing a protection domain or CSR registers
41 #define PD_READ(fo, field) ioread32((fo)->db_va + \
42 offsetof(struct BE_PROTECTION_DOMAIN_DBMAP_AMAP, field)/8)
44 #define PD_WRITE(fo, field, val) iowrite32(val, (fo)->db_va + \
45 offsetof(struct BE_PROTECTION_DOMAIN_DBMAP_AMAP, field)/8)
47 #define CSR_READ(fo, field) ioread32((fo)->csr_va + \
48 offsetof(struct BE_BLADE_ENGINE_CSRMAP_AMAP, field)/8)
50 #define CSR_WRITE(fo, field, val) iowrite32(val, (fo)->csr_va + \
51 offsetof(struct BE_BLADE_ENGINE_CSRMAP_AMAP, field)/8)
53 #define PCICFG0_READ(fo, field) ioread32((fo)->pci_va + \
54 offsetof(struct BE_PCICFG0_CSRMAP_AMAP, field)/8)
56 #define PCICFG0_WRITE(fo, field, val) iowrite32(val, (fo)->pci_va + \
57 offsetof(struct BE_PCICFG0_CSRMAP_AMAP, field)/8)
59 #define PCICFG1_READ(fo, field) ioread32((fo)->pci_va + \
60 offsetof(struct BE_PCICFG1_CSRMAP_AMAP, field)/8)
62 #define PCICFG1_WRITE(fo, field, val) iowrite32(val, (fo)->pci_va + \
63 offsetof(struct BE_PCICFG1_CSRMAP_AMAP, field)/8)
66 #define ASSERT(c) BUG_ON(!(c));
72 enum BE_DEBUG_LEVELS
{
73 DL_ALWAYS
= 0, /* cannot be masked */
74 DL_ERR
= 0x1, /* errors that should never happen */
75 DL_WARN
= 0x2, /* something questionable.
77 DL_NOTE
= 0x4, /* infrequent, important debug info */
78 DL_INFO
= 0x8, /* debug information */
79 DL_VERBOSE
= 0x10, /* detailed info, such as buffer traces */
80 BE_DL_MIN_VALUE
= 0x1, /* this is the min value used */
81 BE_DL_MAX_VALUE
= 0x80 /* this is the higheset value used */
84 extern unsigned int trace_level
;
86 #define TRACE(lm, fmt, args...) { \
87 if (trace_level & lm) { \
88 printk(KERN_NOTICE "BE: %s:%d \n" fmt, \
89 __FILE__ , __LINE__ , ## args); \
93 static inline unsigned int be_trace_set_level(unsigned int level
)
95 unsigned int old_level
= trace_level
;
100 #define be_trace_get_level() trace_level
102 * Returns number of pages spanned by the size of data
103 * starting at the given address.
105 #define PAGES_SPANNED(_address, _size) \
106 ((u32)((((size_t)(_address) & (PAGE_SIZE - 1)) + \
107 (_size) + (PAGE_SIZE - 1)) >> PAGE_SHIFT))
108 /* Byte offset into the page corresponding to given address */
109 #define OFFSET_IN_PAGE(_addr_) ((size_t)(_addr_) & (PAGE_SIZE-1))
113 * Returns a - b assuming a circular number system, where a and b are
114 * in range (0, maxValue-1). If a==b, zero is returned so the
115 * highest value possible with this subtraction is maxValue-1.
117 static inline u32
be_subc(u32 a
, u32 b
, u32 max
)
119 ASSERT(a
<= max
&& b
<= max
);
121 return a
>= b
? (a
- b
) : (max
- b
+ a
);
124 static inline u32
be_addc(u32 a
, u32 b
, u32 max
)
128 return (max
- a
> b
) ? (a
+ b
) : (b
+ a
- max
);
131 /* descriptor for a physically contiguous memory used for ring */
133 u32 length
; /* length in bytes */
134 void *va
; /* virtual address */
135 u64 pa
; /* bus address */
139 * This structure stores information about a ring shared between hardware
140 * and software. Each ring is allocated by the driver in the uncached
141 * extension and mapped into BladeEngine's unified table.
144 u32 pages
; /* queue size in pages */
145 u32 id
; /* queue id assigned by beklib */
146 u32 num
; /* number of elements in queue */
147 u32 cidx
; /* consumer index */
148 u32 pidx
; /* producer index -- not used by most rings */
149 u32 itemSize
; /* size in bytes of one object */
151 void *va
; /* The virtual address of the ring.
152 This should be last to allow 32 & 64
153 bit debugger extensions to work. */
156 /*----------- amap bit filed get / set macros and functions -----*/
158 * Structures defined in the map header files (under fw/amap/) with names
159 * in the format BE_<name>_AMAP are pseudo structures with members
160 * of type u8. These structures are templates that are used in
161 * conjuntion with the structures with names in the format
162 * <name>_AMAP to calculate the bit masks and bit offsets to get or set
163 * bit fields in structures. The structures <name>_AMAP are arrays
164 * of 32 bits words and have the correct size. The following macros
165 * provide convenient ways to get and set the various members
166 * in the structures without using strucctures with bit fields.
167 * Always use the macros AMAP_GET_BITS_PTR and AMAP_SET_BITS_PTR
168 * macros to extract and set various members.
172 * Returns the a bit mask for the register that is NOT shifted into location.
173 * That means return values always look like: 0x1, 0xFF, 0x7FF, etc...
175 static inline u32
amap_mask(u32 bit_size
)
177 return bit_size
== 32 ? 0xFFFFFFFF : (1 << bit_size
) - 1;
180 #define AMAP_BIT_MASK(_struct_, field) \
181 amap_mask(AMAP_BIT_SIZE(_struct_, field))
184 * non-optimized set bits function. First clears the bits and then assigns them.
185 * This does not require knowledge of the particular DWORD you are setting.
186 * e.g. AMAP_SET_BITS_PTR (struct, field1, &contextMemory, 123);
189 amap_set(void *ptr
, u32 dw_offset
, u32 mask
, u32 offset
, u32 value
)
191 u32
*dw
= (u32
*)ptr
;
192 *(dw
+ dw_offset
) &= ~(mask
<< offset
);
193 *(dw
+ dw_offset
) |= (mask
& value
) << offset
;
196 #define AMAP_SET_BITS_PTR(_struct_, field, _structPtr_, val) \
197 amap_set(_structPtr_, AMAP_WORD_OFFSET(_struct_, field),\
198 AMAP_BIT_MASK(_struct_, field), \
199 AMAP_BIT_OFFSET(_struct_, field), val)
201 * Non-optimized routine that gets the bits without knowing the correct DWORD.
202 * e.g. fieldValue = AMAP_GET_BITS_PTR (struct, field1, &contextMemory);
205 amap_get(void *ptr
, u32 dw_offset
, u32 mask
, u32 offset
)
207 u32
*dw
= (u32
*)ptr
;
208 return mask
& (*(dw
+ dw_offset
) >> offset
);
210 #define AMAP_GET_BITS_PTR(_struct_, field, _structPtr_) \
211 amap_get(_structPtr_, AMAP_WORD_OFFSET(_struct_, field), \
212 AMAP_BIT_MASK(_struct_, field), \
213 AMAP_BIT_OFFSET(_struct_, field))
215 /* Returns 0-31 representing bit offset within a DWORD of a bitfield. */
216 #define AMAP_BIT_OFFSET(_struct_, field) \
217 (offsetof(struct BE_ ## _struct_ ## _AMAP, field) % 32)
219 /* Returns 0-n representing DWORD offset of bitfield within the structure. */
220 #define AMAP_WORD_OFFSET(_struct_, field) \
221 (offsetof(struct BE_ ## _struct_ ## _AMAP, field)/32)
223 /* Returns size of bitfield in bits. */
224 #define AMAP_BIT_SIZE(_struct_, field) \
225 sizeof(((struct BE_ ## _struct_ ## _AMAP*)0)->field)
227 struct be_mcc_wrb_response_copy
{
228 u16 length
; /* bytes in response */
229 u16 fwcmd_offset
; /* offset within the wrb of the response */
230 void *va
; /* user's va to copy response into */
233 typedef void (*mcc_wrb_cqe_callback
) (void *context
, int status
,
234 struct MCC_WRB_AMAP
*optional_wrb
);
235 struct be_mcc_wrb_context
{
237 mcc_wrb_cqe_callback internal_cb
; /* Function to call on
239 void *internal_cb_context
; /* Parameter to pass
240 to completion function */
242 mcc_wrb_cqe_callback cb
; /* Function to call on completion */
243 void *cb_context
; /* Parameter to pass to completion function */
245 int *users_final_status
; /* pointer to a local
246 variable for synchronous
248 struct MCC_WRB_AMAP
*wrb
; /* pointer to original wrb for embedded
250 struct list_head next
; /* links context structs together in
253 struct be_mcc_wrb_response_copy copy
; /* Optional parameters to copy
254 embedded response to user's va */
256 #if defined(BE_DEBUG)
257 u16 subsystem
, opcode
; /* Track this FWCMD for debug builds. */
258 struct MCC_WRB_AMAP
*ring_wrb
;
264 Represents a function object for network or storage. This
265 is used to manage per-function resources like MCC CQs, etc.
267 struct be_function_object
{
269 u32 magic
; /*!< magic for detecting memory corruption. */
271 /* PCI BAR mapped addresses */
272 u8 __iomem
*csr_va
; /* CSR */
273 u8 __iomem
*db_va
; /* Door Bell */
274 u8 __iomem
*pci_va
; /* PCI config space */
275 u32 emulate
; /* if set, MPU is not available.
276 Emulate everything. */
277 u32 pend_queue_driving
; /* if set, drive the queued WRBs
278 after releasing the WRB lock */
280 spinlock_t post_lock
; /* lock for verifying one thread posting wrbs */
281 spinlock_t cq_lock
; /* lock for verifying one thread
283 spinlock_t mcc_context_lock
; /* lock for protecting mcc
285 unsigned long post_irq
;
286 unsigned long cq_irq
;
289 u32 pci_function_number
;
291 struct be_mcc_object
*mcc
; /* mcc rings. */
294 struct MCC_MAILBOX_AMAP
*va
; /* VA to the mailbox */
295 u64 pa
; /* PA to the mailbox */
296 u32 length
; /* byte length of mailbox */
298 /* One default context struct used for posting at
301 struct be_mcc_wrb_context default_context
;
302 bool default_context_allocated
;
307 /* Wake on lans configured. */
308 u32 wol_bitmask
; /* bits 0,1,2,3 are set if
309 corresponding index is enabled */
313 struct BE_FIRMWARE_CONFIG fw_config
;
317 Represents an Event Queue
319 struct be_eq_object
{
323 struct be_function_object
*parent_function
;
325 struct list_head eq_list
;
326 struct list_head cq_list_head
;
334 Manages a completion queue
336 struct be_cq_object
{
340 struct be_function_object
*parent_function
;
341 struct be_eq_object
*eq_object
;
343 struct list_head cq_list
;
344 struct list_head cqlist_for_eq
;
356 Manages an ethernet send queue
358 struct be_ethsq_object
{
361 struct list_head list
;
363 struct be_function_object
*parent_function
;
364 struct be_cq_object
*cq_object
;
371 Manages an ethernet receive queue
373 struct be_ethrq_object
{
375 struct list_head list
;
376 struct be_function_object
*parent_function
;
378 struct be_cq_object
*cq_object
;
379 struct be_cq_object
*rss_cq_object
[4];
386 typedef void (*mcc_async_event_callback
) (void *context
, u32 event_code
,
388 struct be_mcc_object
{
391 struct be_function_object
*parent_function
;
392 struct list_head mcc_list
;
394 struct be_cq_object
*cq_object
;
396 /* Async event callback for MCC CQ. */
397 mcc_async_event_callback async_cb
;
401 struct be_mcc_wrb_context
*base
;
403 struct list_head list_head
;
407 struct ring_desc
*rd
;
415 u32 processing
; /* flag indicating that one thread
417 u32 rearm
; /* doorbell rearm setting to make
418 sure the active processing thread */
419 /* rearms the CQ if any of the threads requested it. */
421 struct list_head backlog
;
429 /* Queue context header -- the required software information for
432 struct be_queue_driver_context
{
433 mcc_wrb_cqe_callback internal_cb
; /* Function to call on
435 void *internal_cb_context
; /* Parameter to pass
436 to completion function */
438 mcc_wrb_cqe_callback cb
; /* Function to call on completion */
439 void *cb_context
; /* Parameter to pass to completion function */
441 struct be_mcc_wrb_response_copy copy
; /* Optional parameters to copy
442 embedded response to user's va */
443 void *optional_fwcmd_va
;
444 struct list_head list
;
449 * Common MCC WRB header that all commands require.
451 struct be_mcc_wrb_header
{
452 u8 rsvd
[offsetof(struct BE_MCC_WRB_AMAP
, payload
)/8];
456 * All non embedded commands supported by hwlib functions only allow
457 * 1 SGE. This queue context handles them all.
459 struct be_nonembedded_q_ctxt
{
460 struct be_queue_driver_context context
;
461 struct be_mcc_wrb_header wrb_header
;
462 struct MCC_SGE_AMAP sge
[1];
466 * ------------------------------------------------------------------------
467 * This section contains the specific queue struct for each command.
468 * The user could always provide a be_generic_q_ctxt but this is a
469 * rather large struct. By using the specific struct, memory consumption
471 * ------------------------------------------------------------------------
474 struct be_link_status_q_ctxt
{
475 struct be_queue_driver_context context
;
476 struct be_mcc_wrb_header wrb_header
;
477 struct FWCMD_COMMON_NTWK_LINK_STATUS_QUERY fwcmd
;
480 struct be_multicast_q_ctxt
{
481 struct be_queue_driver_context context
;
482 struct be_mcc_wrb_header wrb_header
;
483 struct FWCMD_COMMON_NTWK_MULTICAST_SET fwcmd
;
487 struct be_vlan_q_ctxt
{
488 struct be_queue_driver_context context
;
489 struct be_mcc_wrb_header wrb_header
;
490 struct FWCMD_COMMON_NTWK_VLAN_CONFIG fwcmd
;
493 struct be_promiscuous_q_ctxt
{
494 struct be_queue_driver_context context
;
495 struct be_mcc_wrb_header wrb_header
;
496 struct FWCMD_ETH_PROMISCUOUS fwcmd
;
499 struct be_force_failover_q_ctxt
{
500 struct be_queue_driver_context context
;
501 struct be_mcc_wrb_header wrb_header
;
502 struct FWCMD_COMMON_FORCE_FAILOVER fwcmd
;
506 struct be_rxf_filter_q_ctxt
{
507 struct be_queue_driver_context context
;
508 struct be_mcc_wrb_header wrb_header
;
509 struct FWCMD_COMMON_NTWK_RX_FILTER fwcmd
;
512 struct be_eq_modify_delay_q_ctxt
{
513 struct be_queue_driver_context context
;
514 struct be_mcc_wrb_header wrb_header
;
515 struct FWCMD_COMMON_MODIFY_EQ_DELAY fwcmd
;
519 * The generic context is the largest size that would be required.
520 * It is the software context plus an entire WRB.
522 struct be_generic_q_ctxt
{
523 struct be_queue_driver_context context
;
524 struct be_mcc_wrb_header wrb_header
;
525 struct MCC_WRB_PAYLOAD_AMAP payload
;
529 * Types for the BE_QUEUE_CONTEXT object.
531 #define BE_QUEUE_INVALID (0)
532 #define BE_QUEUE_LINK_STATUS (0xA006)
533 #define BE_QUEUE_ETH_STATS (0xA007)
534 #define BE_QUEUE_TPM_STATS (0xA008)
535 #define BE_QUEUE_TCP_STATS (0xA009)
536 #define BE_QUEUE_MULTICAST (0xA00A)
537 #define BE_QUEUE_VLAN (0xA00B)
538 #define BE_QUEUE_RSS (0xA00C)
539 #define BE_QUEUE_FORCE_FAILOVER (0xA00D)
540 #define BE_QUEUE_PROMISCUOUS (0xA00E)
541 #define BE_QUEUE_WAKE_ON_LAN (0xA00F)
542 #define BE_QUEUE_NOP (0xA010)
544 /* --- BE_FUNCTION_ENUM --- */
545 #define BE_FUNCTION_TYPE_ISCSI (0)
546 #define BE_FUNCTION_TYPE_NETWORK (1)
547 #define BE_FUNCTION_TYPE_ARM (2)
549 /* --- BE_ETH_TX_RING_TYPE_ENUM --- */
550 #define BE_ETH_TX_RING_TYPE_FORWARDING (1) /* Ether ring for forwarding */
551 #define BE_ETH_TX_RING_TYPE_STANDARD (2) /* Ether ring for sending */
552 /* network packets. */
553 #define BE_ETH_TX_RING_TYPE_BOUND (3) /* Ethernet ring for sending */
554 /* network packets, bound */
555 /* to a physical port. */
557 * ----------------------------------------------------------------------
559 * ----------------------------------------------------------------------
561 #define BE_FWCMD_NAME(_short_name_) struct FWCMD_##_short_name_
562 #define BE_OPCODE_NAME(_short_name_) OPCODE_##_short_name_
563 #define BE_SUBSYSTEM_NAME(_short_name_) SUBSYSTEM_##_short_name_
566 #define BE_PREPARE_EMBEDDED_FWCMD(_pfob_, _wrb_, _short_name_) \
567 ((BE_FWCMD_NAME(_short_name_) *) \
568 be_function_prepare_embedded_fwcmd(_pfob_, _wrb_, \
569 sizeof(BE_FWCMD_NAME(_short_name_)), \
570 FIELD_SIZEOF(BE_FWCMD_NAME(_short_name_), params.request), \
571 FIELD_SIZEOF(BE_FWCMD_NAME(_short_name_), params.response), \
572 BE_OPCODE_NAME(_short_name_), \
573 BE_SUBSYSTEM_NAME(_short_name_)));
575 #define BE_PREPARE_NONEMBEDDED_FWCMD(_pfob_, _wrb_, _iva_, _ipa_, _short_name_)\
576 ((BE_FWCMD_NAME(_short_name_) *) \
577 be_function_prepare_nonembedded_fwcmd(_pfob_, _wrb_, (_iva_), (_ipa_), \
578 sizeof(BE_FWCMD_NAME(_short_name_)), \
579 FIELD_SIZEOF(BE_FWCMD_NAME(_short_name_), params.request), \
580 FIELD_SIZEOF(BE_FWCMD_NAME(_short_name_), params.response), \
581 BE_OPCODE_NAME(_short_name_), \
582 BE_SUBSYSTEM_NAME(_short_name_)));
584 int be_function_object_create(u8 __iomem
*csr_va
, u8 __iomem
*db_va
,
585 u8 __iomem
*pci_va
, u32 function_type
, struct ring_desc
*mailbox_rd
,
586 struct be_function_object
*pfob
);
588 int be_function_object_destroy(struct be_function_object
*pfob
);
589 int be_function_cleanup(struct be_function_object
*pfob
);
592 int be_function_get_fw_version(struct be_function_object
*pfob
,
593 struct FWCMD_COMMON_GET_FW_VERSION_RESPONSE_PAYLOAD
*fw_version
,
594 mcc_wrb_cqe_callback cb
, void *cb_context
);
597 int be_eq_modify_delay(struct be_function_object
*pfob
,
598 u32 num_eq
, struct be_eq_object
**eq_array
,
599 u32
*eq_delay_array
, mcc_wrb_cqe_callback cb
,
601 struct be_eq_modify_delay_q_ctxt
*q_ctxt
);
605 int be_eq_create(struct be_function_object
*pfob
,
606 struct ring_desc
*rd
, u32 eqe_size
, u32 num_entries
,
607 u32 watermark
, u32 timer_delay
, struct be_eq_object
*eq_object
);
609 int be_eq_destroy(struct be_eq_object
*eq
);
611 int be_cq_create(struct be_function_object
*pfob
,
612 struct ring_desc
*rd
, u32 length
,
613 bool solicited_eventable
, bool no_delay
,
614 u32 wm_thresh
, struct be_eq_object
*eq_object
,
615 struct be_cq_object
*cq_object
);
617 int be_cq_destroy(struct be_cq_object
*cq
);
619 int be_mcc_ring_create(struct be_function_object
*pfob
,
620 struct ring_desc
*rd
, u32 length
,
621 struct be_mcc_wrb_context
*context_array
,
622 u32 num_context_entries
,
623 struct be_cq_object
*cq
, struct be_mcc_object
*mcc
);
624 int be_mcc_ring_destroy(struct be_mcc_object
*mcc_object
);
626 int be_mcc_process_cq(struct be_mcc_object
*mcc_object
, bool rearm
);
628 int be_mcc_add_async_event_callback(struct be_mcc_object
*mcc_object
,
629 mcc_async_event_callback cb
, void *cb_context
);
631 int be_pci_soft_reset(struct be_function_object
*pfob
);
634 int be_drive_POST(struct be_function_object
*pfob
);
637 int be_eth_sq_create(struct be_function_object
*pfob
,
638 struct ring_desc
*rd
, u32 length_in_bytes
,
639 u32 type
, u32 ulp
, struct be_cq_object
*cq_object
,
640 struct be_ethsq_object
*eth_sq
);
642 struct be_eth_sq_parameters
{
647 int be_eth_sq_create_ex(struct be_function_object
*pfob
,
648 struct ring_desc
*rd
, u32 length_in_bytes
,
649 u32 type
, u32 ulp
, struct be_cq_object
*cq_object
,
650 struct be_eth_sq_parameters
*ex_parameters
,
651 struct be_ethsq_object
*eth_sq
);
652 int be_eth_sq_destroy(struct be_ethsq_object
*eth_sq
);
654 int be_eth_set_flow_control(struct be_function_object
*pfob
,
655 bool txfc_enable
, bool rxfc_enable
);
657 int be_eth_get_flow_control(struct be_function_object
*pfob
,
658 bool *txfc_enable
, bool *rxfc_enable
);
659 int be_eth_set_qos(struct be_function_object
*pfob
, u32 max_bps
, u32 max_pps
);
661 int be_eth_get_qos(struct be_function_object
*pfob
, u32
*max_bps
, u32
*max_pps
);
663 int be_eth_set_frame_size(struct be_function_object
*pfob
,
664 u32
*tx_frame_size
, u32
*rx_frame_size
);
666 int be_eth_rq_create(struct be_function_object
*pfob
,
667 struct ring_desc
*rd
, struct be_cq_object
*cq_object
,
668 struct be_cq_object
*bcmc_cq_object
,
669 struct be_ethrq_object
*eth_rq
);
671 int be_eth_rq_destroy(struct be_ethrq_object
*eth_rq
);
673 int be_eth_rq_destroy_options(struct be_ethrq_object
*eth_rq
, bool flush
,
674 mcc_wrb_cqe_callback cb
, void *cb_context
);
675 int be_eth_rq_set_frag_size(struct be_function_object
*pfob
,
676 u32 new_frag_size_bytes
, u32
*actual_frag_size_bytes
);
677 int be_eth_rq_get_frag_size(struct be_function_object
*pfob
,
678 u32
*frag_size_bytes
);
680 void *be_function_prepare_embedded_fwcmd(struct be_function_object
*pfob
,
681 struct MCC_WRB_AMAP
*wrb
,
682 u32 payload_length
, u32 request_length
,
683 u32 response_length
, u32 opcode
, u32 subsystem
);
684 void *be_function_prepare_nonembedded_fwcmd(struct be_function_object
*pfob
,
685 struct MCC_WRB_AMAP
*wrb
, void *fwcmd_header_va
, u64 fwcmd_header_pa
,
686 u32 payload_length
, u32 request_length
, u32 response_length
,
687 u32 opcode
, u32 subsystem
);
690 struct MCC_WRB_AMAP
*
691 be_function_peek_mcc_wrb(struct be_function_object
*pfob
);
693 int be_rxf_mac_address_read_write(struct be_function_object
*pfob
,
694 bool port1
, bool mac1
, bool mgmt
,
695 bool write
, bool permanent
, u8
*mac_address
,
696 mcc_wrb_cqe_callback cb
,
699 int be_rxf_multicast_config(struct be_function_object
*pfob
,
700 bool promiscuous
, u32 num
, u8
*mac_table
,
701 mcc_wrb_cqe_callback cb
,
703 struct be_multicast_q_ctxt
*q_ctxt
);
705 int be_rxf_vlan_config(struct be_function_object
*pfob
,
706 bool promiscuous
, u32 num
, u16
*vlan_tag_array
,
707 mcc_wrb_cqe_callback cb
, void *cb_context
,
708 struct be_vlan_q_ctxt
*q_ctxt
);
711 int be_rxf_link_status(struct be_function_object
*pfob
,
712 struct BE_LINK_STATUS
*link_status
,
713 mcc_wrb_cqe_callback cb
,
715 struct be_link_status_q_ctxt
*q_ctxt
);
718 int be_rxf_query_eth_statistics(struct be_function_object
*pfob
,
719 struct FWCMD_ETH_GET_STATISTICS
*va_for_fwcmd
,
720 u64 pa_for_fwcmd
, mcc_wrb_cqe_callback cb
,
722 struct be_nonembedded_q_ctxt
*q_ctxt
);
724 int be_rxf_promiscuous(struct be_function_object
*pfob
,
725 bool enable_port0
, bool enable_port1
,
726 mcc_wrb_cqe_callback cb
, void *cb_context
,
727 struct be_promiscuous_q_ctxt
*q_ctxt
);
730 int be_rxf_filter_config(struct be_function_object
*pfob
,
731 struct NTWK_RX_FILTER_SETTINGS
*settings
,
732 mcc_wrb_cqe_callback cb
,
734 struct be_rxf_filter_q_ctxt
*q_ctxt
);
737 * ------------------------------------------------------
738 * internal functions used by hwlib
739 * ------------------------------------------------------
743 int be_function_ring_destroy(struct be_function_object
*pfob
,
744 u32 id
, u32 ring_type
, mcc_wrb_cqe_callback cb
,
746 mcc_wrb_cqe_callback internal_cb
,
747 void *internal_callback_context
);
749 int be_function_post_mcc_wrb(struct be_function_object
*pfob
,
750 struct MCC_WRB_AMAP
*wrb
,
751 struct be_generic_q_ctxt
*q_ctxt
,
752 mcc_wrb_cqe_callback cb
, void *cb_context
,
753 mcc_wrb_cqe_callback internal_cb
,
754 void *internal_cb_context
, void *optional_fwcmd_va
,
755 struct be_mcc_wrb_response_copy
*response_copy
);
757 int be_function_queue_mcc_wrb(struct be_function_object
*pfob
,
758 struct be_generic_q_ctxt
*q_ctxt
);
761 * ------------------------------------------------------
763 * ------------------------------------------------------
766 int be_mpu_init_mailbox(struct be_function_object
*pfob
, struct ring_desc
*rd
);
769 struct MCC_WRB_AMAP
*
770 _be_mpu_peek_ring_wrb(struct be_mcc_object
*mcc
, bool driving_queue
);
772 struct be_mcc_wrb_context
*
773 _be_mcc_allocate_wrb_context(struct be_function_object
*pfob
);
775 void _be_mcc_free_wrb_context(struct be_function_object
*pfob
,
776 struct be_mcc_wrb_context
*context
);
778 int _be_mpu_post_wrb_mailbox(struct be_function_object
*pfob
,
779 struct MCC_WRB_AMAP
*wrb
, struct be_mcc_wrb_context
*wrb_context
);
781 int _be_mpu_post_wrb_ring(struct be_mcc_object
*mcc
,
782 struct MCC_WRB_AMAP
*wrb
, struct be_mcc_wrb_context
*wrb_context
);
784 void be_drive_mcc_wrb_queue(struct be_mcc_object
*mcc
);
788 * ------------------------------------------------------
790 * ------------------------------------------------------
792 static inline u32
be_ring_encoding_to_length(u32 encoding
, u32 object_size
)
795 ASSERT(encoding
!= 1); /* 1 is rsvd */
796 ASSERT(encoding
< 16);
797 ASSERT(object_size
> 0);
799 if (encoding
== 0) /* 32k deep */
802 return (1 << (encoding
- 1)) * object_size
;
806 u32
be_ring_length_to_encoding(u32 length_in_bytes
, u32 object_size
)
811 ASSERT(object_size
> 0);
812 ASSERT(length_in_bytes
% object_size
== 0);
814 count
= length_in_bytes
/ object_size
;
817 ASSERT(count
<= 32 * 1024);
818 ASSERT(length_in_bytes
<= 8 * PAGE_SIZE
); /* max ring size in UT */
820 encoding
= __ilog2_u32(count
) + 1;
823 encoding
= 0; /* 32k deep */
828 void be_rd_to_pa_list(struct ring_desc
*rd
, struct PHYS_ADDR
*pa_list
,
830 #endif /* __hwlib_h__ */