mac80211: clean up channel type config
[linux-2.6/libata-dev.git] / drivers / staging / benet / be_cm.h
blobb7a1dfd20c36eac358b1ca6b2ec3e976f9978cfc
1 /*
2 * Copyright (C) 2005 - 2008 ServerEngines
3 * All rights reserved.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
18 * Autogenerated by srcgen version: 0127
20 #ifndef __be_cm_amap_h__
21 #define __be_cm_amap_h__
22 #include "be_common.h"
23 #include "etx_context.h"
24 #include "mpu_context.h"
27 * --- CEV_WATERMARK_ENUM ---
28 * CQ/EQ Watermark Encodings. Encoded as number of free entries in
29 * Queue when Watermark is reached.
31 #define CEV_WMARK_0 (0) /* Watermark when Queue full */
32 #define CEV_WMARK_16 (1) /* Watermark at 16 free entries */
33 #define CEV_WMARK_32 (2) /* Watermark at 32 free entries */
34 #define CEV_WMARK_48 (3) /* Watermark at 48 free entries */
35 #define CEV_WMARK_64 (4) /* Watermark at 64 free entries */
36 #define CEV_WMARK_80 (5) /* Watermark at 80 free entries */
37 #define CEV_WMARK_96 (6) /* Watermark at 96 free entries */
38 #define CEV_WMARK_112 (7) /* Watermark at 112 free entries */
39 #define CEV_WMARK_128 (8) /* Watermark at 128 free entries */
40 #define CEV_WMARK_144 (9) /* Watermark at 144 free entries */
41 #define CEV_WMARK_160 (10) /* Watermark at 160 free entries */
42 #define CEV_WMARK_176 (11) /* Watermark at 176 free entries */
43 #define CEV_WMARK_192 (12) /* Watermark at 192 free entries */
44 #define CEV_WMARK_208 (13) /* Watermark at 208 free entries */
45 #define CEV_WMARK_224 (14) /* Watermark at 224 free entries */
46 #define CEV_WMARK_240 (15) /* Watermark at 240 free entries */
49 * --- CQ_CNT_ENUM ---
50 * Completion Queue Count Encodings.
52 #define CEV_CQ_CNT_256 (0) /* CQ has 256 entries */
53 #define CEV_CQ_CNT_512 (1) /* CQ has 512 entries */
54 #define CEV_CQ_CNT_1024 (2) /* CQ has 1024 entries */
57 * --- EQ_CNT_ENUM ---
58 * Event Queue Count Encodings.
60 #define CEV_EQ_CNT_256 (0) /* EQ has 256 entries (16-byte EQEs only) */
61 #define CEV_EQ_CNT_512 (1) /* EQ has 512 entries (16-byte EQEs only) */
62 #define CEV_EQ_CNT_1024 (2) /* EQ has 1024 entries (4-byte or */
63 /* 16-byte EQEs only) */
64 #define CEV_EQ_CNT_2048 (3) /* EQ has 2048 entries (4-byte or */
65 /* 16-byte EQEs only) */
66 #define CEV_EQ_CNT_4096 (4) /* EQ has 4096 entries (4-byte EQEs only) */
69 * --- EQ_SIZE_ENUM ---
70 * Event Queue Entry Size Encoding.
72 #define CEV_EQ_SIZE_4 (0) /* EQE is 4 bytes */
73 #define CEV_EQ_SIZE_16 (1) /* EQE is 16 bytes */
76 * Completion Queue Context Table Entry. Contains the state of a CQ.
77 * Located in RAM within the CEV block.
79 struct BE_CQ_CONTEXT_AMAP {
80 u8 Cidx[11]; /* DWORD 0 */
81 u8 Watermark[4]; /* DWORD 0 */
82 u8 NoDelay; /* DWORD 0 */
83 u8 EPIdx[11]; /* DWORD 0 */
84 u8 Count[2]; /* DWORD 0 */
85 u8 valid; /* DWORD 0 */
86 u8 SolEvent; /* DWORD 0 */
87 u8 Eventable; /* DWORD 0 */
88 u8 Pidx[11]; /* DWORD 1 */
89 u8 PD[10]; /* DWORD 1 */
90 u8 EQID[7]; /* DWORD 1 */
91 u8 Func; /* DWORD 1 */
92 u8 WME; /* DWORD 1 */
93 u8 Stalled; /* DWORD 1 */
94 u8 Armed; /* DWORD 1 */
95 } __packed;
96 struct CQ_CONTEXT_AMAP {
97 u32 dw[2];
101 * Event Queue Context Table Entry. Contains the state of an EQ.
102 * Located in RAM in the CEV block.
104 struct BE_EQ_CONTEXT_AMAP {
105 u8 Cidx[13]; /* DWORD 0 */
106 u8 rsvd0[2]; /* DWORD 0 */
107 u8 Func; /* DWORD 0 */
108 u8 EPIdx[13]; /* DWORD 0 */
109 u8 valid; /* DWORD 0 */
110 u8 rsvd1; /* DWORD 0 */
111 u8 Size; /* DWORD 0 */
112 u8 Pidx[13]; /* DWORD 1 */
113 u8 rsvd2[3]; /* DWORD 1 */
114 u8 PD[10]; /* DWORD 1 */
115 u8 Count[3]; /* DWORD 1 */
116 u8 SolEvent; /* DWORD 1 */
117 u8 Stalled; /* DWORD 1 */
118 u8 Armed; /* DWORD 1 */
119 u8 Watermark[4]; /* DWORD 2 */
120 u8 WME; /* DWORD 2 */
121 u8 rsvd3[3]; /* DWORD 2 */
122 u8 EventVect[6]; /* DWORD 2 */
123 u8 rsvd4[2]; /* DWORD 2 */
124 u8 Delay[8]; /* DWORD 2 */
125 u8 rsvd5[6]; /* DWORD 2 */
126 u8 TMR; /* DWORD 2 */
127 u8 rsvd6; /* DWORD 2 */
128 u8 rsvd7[32]; /* DWORD 3 */
129 } __packed;
130 struct EQ_CONTEXT_AMAP {
131 u32 dw[4];
134 #endif /* __be_cm_amap_h__ */