4 #include <linux/workqueue.h>
6 #define PCI_CFG_SPACE_SIZE 256
7 #define PCI_CFG_SPACE_EXP_SIZE 4096
9 /* Functions internal to the PCI core code */
11 extern int pci_uevent(struct device
*dev
, struct kobj_uevent_env
*env
);
12 extern int pci_create_sysfs_dev_files(struct pci_dev
*pdev
);
13 extern void pci_remove_sysfs_dev_files(struct pci_dev
*pdev
);
15 static inline void pci_create_firmware_label_files(struct pci_dev
*pdev
)
17 static inline void pci_remove_firmware_label_files(struct pci_dev
*pdev
)
20 extern void pci_create_firmware_label_files(struct pci_dev
*pdev
);
21 extern void pci_remove_firmware_label_files(struct pci_dev
*pdev
);
23 extern void pci_cleanup_rom(struct pci_dev
*dev
);
25 extern int pci_mmap_fits(struct pci_dev
*pdev
, int resno
,
26 struct vm_area_struct
*vma
);
28 int pci_probe_reset_function(struct pci_dev
*dev
);
31 * struct pci_platform_pm_ops - Firmware PM callbacks
33 * @is_manageable: returns 'true' if given device is power manageable by the
36 * @set_state: invokes the platform firmware to set the device's power state
38 * @choose_state: returns PCI power state of given device preferred by the
39 * platform; to be used during system-wide transitions from a
40 * sleeping state to the working state and vice versa
42 * @can_wakeup: returns 'true' if given device is capable of waking up the
43 * system from a sleeping state
45 * @sleep_wake: enables/disables the system wake up capability of given device
47 * @run_wake: enables/disables the platform to generate run-time wake-up events
48 * for given device (the device's wake-up capability has to be
49 * enabled by @sleep_wake for this feature to work)
51 * If given platform is generally capable of power managing PCI devices, all of
52 * these callbacks are mandatory.
54 struct pci_platform_pm_ops
{
55 bool (*is_manageable
)(struct pci_dev
*dev
);
56 int (*set_state
)(struct pci_dev
*dev
, pci_power_t state
);
57 pci_power_t (*choose_state
)(struct pci_dev
*dev
);
58 bool (*can_wakeup
)(struct pci_dev
*dev
);
59 int (*sleep_wake
)(struct pci_dev
*dev
, bool enable
);
60 int (*run_wake
)(struct pci_dev
*dev
, bool enable
);
63 extern int pci_set_platform_pm(struct pci_platform_pm_ops
*ops
);
64 extern void pci_update_current_state(struct pci_dev
*dev
, pci_power_t state
);
65 extern void pci_disable_enabled_device(struct pci_dev
*dev
);
66 extern int pci_finish_runtime_suspend(struct pci_dev
*dev
);
67 extern int __pci_pme_wakeup(struct pci_dev
*dev
, void *ign
);
68 extern void pci_pm_init(struct pci_dev
*dev
);
69 extern void platform_pci_wakeup_init(struct pci_dev
*dev
);
70 extern void pci_allocate_cap_save_buffers(struct pci_dev
*dev
);
72 static inline bool pci_is_bridge(struct pci_dev
*pci_dev
)
74 return !!(pci_dev
->subordinate
);
77 extern int pci_user_read_config_byte(struct pci_dev
*dev
, int where
, u8
*val
);
78 extern int pci_user_read_config_word(struct pci_dev
*dev
, int where
, u16
*val
);
79 extern int pci_user_read_config_dword(struct pci_dev
*dev
, int where
, u32
*val
);
80 extern int pci_user_write_config_byte(struct pci_dev
*dev
, int where
, u8 val
);
81 extern int pci_user_write_config_word(struct pci_dev
*dev
, int where
, u16 val
);
82 extern int pci_user_write_config_dword(struct pci_dev
*dev
, int where
, u32 val
);
85 ssize_t (*read
)(struct pci_dev
*dev
, loff_t pos
, size_t count
, void *buf
);
86 ssize_t (*write
)(struct pci_dev
*dev
, loff_t pos
, size_t count
, const void *buf
);
87 void (*release
)(struct pci_dev
*dev
);
92 const struct pci_vpd_ops
*ops
;
93 struct bin_attribute
*attr
; /* descriptor for sysfs VPD entry */
96 extern int pci_vpd_pci22_init(struct pci_dev
*dev
);
97 static inline void pci_vpd_release(struct pci_dev
*dev
)
100 dev
->vpd
->ops
->release(dev
);
103 /* PCI /proc functions */
104 #ifdef CONFIG_PROC_FS
105 extern int pci_proc_attach_device(struct pci_dev
*dev
);
106 extern int pci_proc_detach_device(struct pci_dev
*dev
);
107 extern int pci_proc_detach_bus(struct pci_bus
*bus
);
109 static inline int pci_proc_attach_device(struct pci_dev
*dev
) { return 0; }
110 static inline int pci_proc_detach_device(struct pci_dev
*dev
) { return 0; }
111 static inline int pci_proc_detach_bus(struct pci_bus
*bus
) { return 0; }
114 /* Functions for PCI Hotplug drivers to use */
115 extern unsigned int pci_do_scan_bus(struct pci_bus
*bus
);
117 #ifdef HAVE_PCI_LEGACY
118 extern void pci_create_legacy_files(struct pci_bus
*bus
);
119 extern void pci_remove_legacy_files(struct pci_bus
*bus
);
121 static inline void pci_create_legacy_files(struct pci_bus
*bus
) { return; }
122 static inline void pci_remove_legacy_files(struct pci_bus
*bus
) { return; }
125 /* Lock for read/write access to pci device and bus lists */
126 extern struct rw_semaphore pci_bus_sem
;
128 extern unsigned int pci_pm_d3_delay
;
130 #ifdef CONFIG_PCI_MSI
131 void pci_no_msi(void);
132 extern void pci_msi_init_pci_dev(struct pci_dev
*dev
);
134 static inline void pci_no_msi(void) { }
135 static inline void pci_msi_init_pci_dev(struct pci_dev
*dev
) { }
138 #ifdef CONFIG_PCIEAER
139 void pci_no_aer(void);
140 bool pci_aer_available(void);
142 static inline void pci_no_aer(void) { }
143 static inline bool pci_aer_available(void) { return false; }
146 static inline int pci_no_d1d2(struct pci_dev
*dev
)
148 unsigned int parent_dstates
= 0;
151 parent_dstates
= dev
->bus
->self
->no_d1d2
;
152 return (dev
->no_d1d2
|| parent_dstates
);
155 extern struct device_attribute pci_dev_attrs
[];
156 extern struct device_attribute dev_attr_cpuaffinity
;
157 extern struct device_attribute dev_attr_cpulistaffinity
;
158 #ifdef CONFIG_HOTPLUG
159 extern struct bus_attribute pci_bus_attrs
[];
161 #define pci_bus_attrs NULL
166 * pci_match_one_device - Tell if a PCI device structure has a matching
167 * PCI device id structure
168 * @id: single PCI device id structure to match
169 * @dev: the PCI device structure to match against
171 * Returns the matching pci_device_id structure or %NULL if there is no match.
173 static inline const struct pci_device_id
*
174 pci_match_one_device(const struct pci_device_id
*id
, const struct pci_dev
*dev
)
176 if ((id
->vendor
== PCI_ANY_ID
|| id
->vendor
== dev
->vendor
) &&
177 (id
->device
== PCI_ANY_ID
|| id
->device
== dev
->device
) &&
178 (id
->subvendor
== PCI_ANY_ID
|| id
->subvendor
== dev
->subsystem_vendor
) &&
179 (id
->subdevice
== PCI_ANY_ID
|| id
->subdevice
== dev
->subsystem_device
) &&
180 !((id
->class ^ dev
->class) & id
->class_mask
))
185 struct pci_dev
*pci_find_upstream_pcie_bridge(struct pci_dev
*pdev
);
187 /* PCI slot sysfs helper code */
188 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
190 extern struct kset
*pci_slots_kset
;
192 struct pci_slot_attribute
{
193 struct attribute attr
;
194 ssize_t (*show
)(struct pci_slot
*, char *);
195 ssize_t (*store
)(struct pci_slot
*, const char *, size_t);
197 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
200 pci_bar_unknown
, /* Standard PCI BAR probe */
201 pci_bar_io
, /* An io port BAR */
202 pci_bar_mem32
, /* A 32-bit memory BAR */
203 pci_bar_mem64
, /* A 64-bit memory BAR */
206 extern int pci_setup_device(struct pci_dev
*dev
);
207 extern int __pci_read_base(struct pci_dev
*dev
, enum pci_bar_type type
,
208 struct resource
*res
, unsigned int reg
);
209 extern int pci_resource_bar(struct pci_dev
*dev
, int resno
,
210 enum pci_bar_type
*type
);
211 extern int pci_bus_add_child(struct pci_bus
*bus
);
212 extern void pci_enable_ari(struct pci_dev
*dev
);
214 * pci_ari_enabled - query ARI forwarding status
217 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
219 static inline int pci_ari_enabled(struct pci_bus
*bus
)
221 return bus
->self
&& bus
->self
->ari_enabled
;
224 #ifdef CONFIG_PCI_QUIRKS
225 extern int pci_is_reassigndev(struct pci_dev
*dev
);
226 resource_size_t
pci_specified_resource_alignment(struct pci_dev
*dev
);
227 extern void pci_disable_bridge_window(struct pci_dev
*dev
);
230 /* Single Root I/O Virtualization */
232 int pos
; /* capability position */
233 int nres
; /* number of resources */
234 u32 cap
; /* SR-IOV Capabilities */
235 u16 ctrl
; /* SR-IOV Control */
236 u16 total
; /* total VFs associated with the PF */
237 u16 initial
; /* initial VFs associated with the PF */
238 u16 nr_virtfn
; /* number of VFs available */
239 u16 offset
; /* first VF Routing ID offset */
240 u16 stride
; /* following VF stride */
241 u32 pgsz
; /* page size for BAR alignment */
242 u8 link
; /* Function Dependency Link */
243 struct pci_dev
*dev
; /* lowest numbered PF */
244 struct pci_dev
*self
; /* this PF */
245 struct mutex lock
; /* lock for VF bus */
246 struct work_struct mtask
; /* VF Migration task */
247 u8 __iomem
*mstate
; /* VF Migration State Array */
250 /* Address Translation Service */
252 int pos
; /* capability position */
253 int stu
; /* Smallest Translation Unit */
254 int qdep
; /* Invalidate Queue Depth */
255 int ref_cnt
; /* Physical Function reference count */
256 unsigned int is_enabled
:1; /* Enable bit is set */
259 #ifdef CONFIG_PCI_IOV
260 extern int pci_iov_init(struct pci_dev
*dev
);
261 extern void pci_iov_release(struct pci_dev
*dev
);
262 extern int pci_iov_resource_bar(struct pci_dev
*dev
, int resno
,
263 enum pci_bar_type
*type
);
264 extern resource_size_t
pci_sriov_resource_alignment(struct pci_dev
*dev
,
266 extern void pci_restore_iov_state(struct pci_dev
*dev
);
267 extern int pci_iov_bus_range(struct pci_bus
*bus
);
269 extern int pci_enable_ats(struct pci_dev
*dev
, int ps
);
270 extern void pci_disable_ats(struct pci_dev
*dev
);
271 extern int pci_ats_queue_depth(struct pci_dev
*dev
);
273 * pci_ats_enabled - query the ATS status
274 * @dev: the PCI device
276 * Returns 1 if ATS capability is enabled, or 0 if not.
278 static inline int pci_ats_enabled(struct pci_dev
*dev
)
280 return dev
->ats
&& dev
->ats
->is_enabled
;
283 static inline int pci_iov_init(struct pci_dev
*dev
)
287 static inline void pci_iov_release(struct pci_dev
*dev
)
291 static inline int pci_iov_resource_bar(struct pci_dev
*dev
, int resno
,
292 enum pci_bar_type
*type
)
296 static inline void pci_restore_iov_state(struct pci_dev
*dev
)
299 static inline int pci_iov_bus_range(struct pci_bus
*bus
)
304 static inline int pci_enable_ats(struct pci_dev
*dev
, int ps
)
308 static inline void pci_disable_ats(struct pci_dev
*dev
)
311 static inline int pci_ats_queue_depth(struct pci_dev
*dev
)
315 static inline int pci_ats_enabled(struct pci_dev
*dev
)
319 #endif /* CONFIG_PCI_IOV */
321 static inline resource_size_t
pci_resource_alignment(struct pci_dev
*dev
,
322 struct resource
*res
)
324 #ifdef CONFIG_PCI_IOV
325 int resno
= res
- dev
->resource
;
327 if (resno
>= PCI_IOV_RESOURCES
&& resno
<= PCI_IOV_RESOURCE_END
)
328 return pci_sriov_resource_alignment(dev
, resno
);
330 return resource_alignment(res
);
333 extern void pci_enable_acs(struct pci_dev
*dev
);
335 struct pci_dev_reset_methods
{
338 int (*reset
)(struct pci_dev
*dev
, int probe
);
341 #ifdef CONFIG_PCI_QUIRKS
342 extern int pci_dev_specific_reset(struct pci_dev
*dev
, int probe
);
344 static inline int pci_dev_specific_reset(struct pci_dev
*dev
, int probe
)
350 #endif /* DRIVERS_PCI_H */