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Char: mxser, ioctl cleanup
[linux-2.6/libata-dev.git] / drivers / char / mxser.c
blobe5029b149c5b8a4e64a095650f197cf85f663bb5
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 */
20
21 #include <linux/module.h>
22 #include <linux/errno.h>
23 #include <linux/signal.h>
24 #include <linux/sched.h>
25 #include <linux/timer.h>
26 #include <linux/interrupt.h>
27 #include <linux/tty.h>
28 #include <linux/tty_flip.h>
29 #include <linux/serial.h>
30 #include <linux/serial_reg.h>
31 #include <linux/major.h>
32 #include <linux/string.h>
33 #include <linux/fcntl.h>
34 #include <linux/ptrace.h>
35 #include <linux/gfp.h>
36 #include <linux/ioport.h>
37 #include <linux/mm.h>
38 #include <linux/delay.h>
39 #include <linux/pci.h>
40 #include <linux/bitops.h>
41
42 #include <asm/system.h>
43 #include <asm/io.h>
44 #include <asm/irq.h>
45 #include <asm/uaccess.h>
46
47 #include "mxser.h"
48
49 #define MXSER_VERSION "2.0.4" /* 1.12 */
50 #define MXSERMAJOR 174
51 #define MXSERCUMAJOR 175
52
53 #define MXSER_BOARDS 4 /* Max. boards */
54 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
55 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56 #define MXSER_ISR_PASS_LIMIT 100
57
58 #define MXSER_ERR_IOADDR -1
59 #define MXSER_ERR_IRQ -2
60 #define MXSER_ERR_IRQ_CONFLIT -3
61 #define MXSER_ERR_VECTOR -4
62
63 /*CheckIsMoxaMust return value*/
64 #define MOXA_OTHER_UART 0x00
65 #define MOXA_MUST_MU150_HWID 0x01
66 #define MOXA_MUST_MU860_HWID 0x02
67
68 #define WAKEUP_CHARS 256
69
70 #define UART_MCR_AFE 0x20
71 #define UART_LSR_SPECIAL 0x1E
72
73 #define PCI_DEVICE_ID_POS104UL 0x1044
74 #define PCI_DEVICE_ID_CB108 0x1080
75 #define PCI_DEVICE_ID_CP102UF 0x1023
76 #define PCI_DEVICE_ID_CB114 0x1142
77 #define PCI_DEVICE_ID_CP114UL 0x1143
78 #define PCI_DEVICE_ID_CB134I 0x1341
79 #define PCI_DEVICE_ID_CP138U 0x1380
80
81
82 #define C168_ASIC_ID 1
83 #define C104_ASIC_ID 2
84 #define C102_ASIC_ID 0xB
85 #define CI132_ASIC_ID 4
86 #define CI134_ASIC_ID 3
87 #define CI104J_ASIC_ID 5
88
89 #define MXSER_HIGHBAUD 1
90 #define MXSER_HAS2 2
91
92 /* This is only for PCI */
93 static const struct {
94 int type;
95 int tx_fifo;
96 int rx_fifo;
97 int xmit_fifo_size;
98 int rx_high_water;
99 int rx_trigger;
100 int rx_low_water;
101 long max_baud;
102 } Gpci_uart_info[] = {
103 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
104 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
105 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
106 };
107 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
108
109 struct mxser_cardinfo {
110 char *name;
111 unsigned int nports;
112 unsigned int flags;
113 };
114
115 static const struct mxser_cardinfo mxser_cards[] = {
116 /* 0*/ { "C168 series", 8, },
117 { "C104 series", 4, },
118 { "CI-104J series", 4, },
119 { "C168H/PCI series", 8, },
120 { "C104H/PCI series", 4, },
121 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
122 { "CI-132 series", 4, MXSER_HAS2 },
123 { "CI-134 series", 4, },
124 { "CP-132 series", 2, },
125 { "CP-114 series", 4, },
126 /*10*/ { "CT-114 series", 4, },
127 { "CP-102 series", 2, MXSER_HIGHBAUD },
128 { "CP-104U series", 4, },
129 { "CP-168U series", 8, },
130 { "CP-132U series", 2, },
131 /*15*/ { "CP-134U series", 4, },
132 { "CP-104JU series", 4, },
133 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
134 { "CP-118U series", 8, },
135 { "CP-102UL series", 2, },
136 /*20*/ { "CP-102U series", 2, },
137 { "CP-118EL series", 8, },
138 { "CP-168EL series", 8, },
139 { "CP-104EL series", 4, },
140 { "CB-108 series", 8, },
141 /*25*/ { "CB-114 series", 4, },
142 { "CB-134I series", 4, },
143 { "CP-138U series", 8, },
144 { "POS-104UL series", 4, },
145 { "CP-114UL series", 4, },
146 /*30*/ { "CP-102UF series", 2, }
147 };
148
149 /* driver_data correspond to the lines in the structure above
150 see also ISA probe function before you change something */
151 static struct pci_device_id mxser_pcibrds[] = {
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
176 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
177 { }
178 };
179 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
180
181 static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
182 static int ttymajor = MXSERMAJOR;
183
184 /* Variables for insmod */
185
186 MODULE_AUTHOR("Casper Yang");
187 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
188 module_param_array(ioaddr, int, NULL, 0);
189 module_param(ttymajor, int, 0);
190 MODULE_LICENSE("GPL");
191
192 struct mxser_log {
193 int tick;
194 unsigned long rxcnt[MXSER_PORTS];
195 unsigned long txcnt[MXSER_PORTS];
196 };
197
198
199 struct mxser_mon {
200 unsigned long rxcnt;
201 unsigned long txcnt;
202 unsigned long up_rxcnt;
203 unsigned long up_txcnt;
204 int modem_status;
205 unsigned char hold_reason;
206 };
207
208 struct mxser_mon_ext {
209 unsigned long rx_cnt[32];
210 unsigned long tx_cnt[32];
211 unsigned long up_rxcnt[32];
212 unsigned long up_txcnt[32];
213 int modem_status[32];
214
215 long baudrate[32];
216 int databits[32];
217 int stopbits[32];
218 int parity[32];
219 int flowctrl[32];
220 int fifo[32];
221 int iftype[32];
222 };
223
224 struct mxser_board;
225
226 struct mxser_port {
227 struct tty_port port;
228 struct mxser_board *board;
229
230 unsigned long ioaddr;
231 unsigned long opmode_ioaddr;
232 int max_baud;
233
234 int rx_high_water;
235 int rx_trigger; /* Rx fifo trigger level */
236 int rx_low_water;
237 int baud_base; /* max. speed */
238 int type; /* UART type */
239
240 int x_char; /* xon/xoff character */
241 int IER; /* Interrupt Enable Register */
242 int MCR; /* Modem control register */
243
244 unsigned char stop_rx;
245 unsigned char ldisc_stop_rx;
246
247 int custom_divisor;
248 unsigned char err_shadow;
249
250 struct async_icount icount; /* kernel counters for 4 input interrupts */
251 int timeout;
252
253 int read_status_mask;
254 int ignore_status_mask;
255 int xmit_fifo_size;
256 int xmit_head;
257 int xmit_tail;
258 int xmit_cnt;
259
260 struct ktermios normal_termios;
261
262 struct mxser_mon mon_data;
263
264 spinlock_t slock;
265 wait_queue_head_t delta_msr_wait;
266 };
267
268 struct mxser_board {
269 unsigned int idx;
270 int irq;
271 const struct mxser_cardinfo *info;
272 unsigned long vector;
273 unsigned long vector_mask;
274
275 int chip_flag;
276 int uart_type;
277
278 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
279 };
280
281 struct mxser_mstatus {
282 tcflag_t cflag;
283 int cts;
284 int dsr;
285 int ri;
286 int dcd;
287 };
288
289 static struct mxser_mstatus GMStatus[MXSER_PORTS];
290
291 static int mxserBoardCAP[MXSER_BOARDS] = {
292 0, 0, 0, 0
293 /* 0x180, 0x280, 0x200, 0x320 */
294 };
295
296 static struct mxser_board mxser_boards[MXSER_BOARDS];
297 static struct tty_driver *mxvar_sdriver;
298 static struct mxser_log mxvar_log;
299 static int mxvar_diagflag;
300 static unsigned char mxser_msr[MXSER_PORTS + 1];
301 static struct mxser_mon_ext mon_data_ext;
302 static int mxser_set_baud_method[MXSER_PORTS + 1];
303
304 static void mxser_enable_must_enchance_mode(unsigned long baseio)
305 {
306 u8 oldlcr;
307 u8 efr;
308
309 oldlcr = inb(baseio + UART_LCR);
310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
311
312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
313 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
314
315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
316 outb(oldlcr, baseio + UART_LCR);
317 }
318
319 static void mxser_disable_must_enchance_mode(unsigned long baseio)
320 {
321 u8 oldlcr;
322 u8 efr;
323
324 oldlcr = inb(baseio + UART_LCR);
325 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
326
327 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
328 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
329
330 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
331 outb(oldlcr, baseio + UART_LCR);
332 }
333
334 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
335 {
336 u8 oldlcr;
337 u8 efr;
338
339 oldlcr = inb(baseio + UART_LCR);
340 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
341
342 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
343 efr &= ~MOXA_MUST_EFR_BANK_MASK;
344 efr |= MOXA_MUST_EFR_BANK0;
345
346 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
347 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
348 outb(oldlcr, baseio + UART_LCR);
349 }
350
351 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
352 {
353 u8 oldlcr;
354 u8 efr;
355
356 oldlcr = inb(baseio + UART_LCR);
357 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
358
359 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
360 efr &= ~MOXA_MUST_EFR_BANK_MASK;
361 efr |= MOXA_MUST_EFR_BANK0;
362
363 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
364 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
365 outb(oldlcr, baseio + UART_LCR);
366 }
367
368 static void mxser_set_must_fifo_value(struct mxser_port *info)
369 {
370 u8 oldlcr;
371 u8 efr;
372
373 oldlcr = inb(info->ioaddr + UART_LCR);
374 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
375
376 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
377 efr &= ~MOXA_MUST_EFR_BANK_MASK;
378 efr |= MOXA_MUST_EFR_BANK1;
379
380 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
381 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
382 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
383 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
384 outb(oldlcr, info->ioaddr + UART_LCR);
385 }
386
387 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
388 {
389 u8 oldlcr;
390 u8 efr;
391
392 oldlcr = inb(baseio + UART_LCR);
393 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
394
395 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
396 efr &= ~MOXA_MUST_EFR_BANK_MASK;
397 efr |= MOXA_MUST_EFR_BANK2;
398
399 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
400 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
401 outb(oldlcr, baseio + UART_LCR);
402 }
403
404 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
405 {
406 u8 oldlcr;
407 u8 efr;
408
409 oldlcr = inb(baseio + UART_LCR);
410 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
411
412 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
413 efr &= ~MOXA_MUST_EFR_BANK_MASK;
414 efr |= MOXA_MUST_EFR_BANK2;
415
416 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
417 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
418 outb(oldlcr, baseio + UART_LCR);
419 }
420
421 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
422 {
423 u8 oldlcr;
424 u8 efr;
425
426 oldlcr = inb(baseio + UART_LCR);
427 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
428
429 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
430 efr &= ~MOXA_MUST_EFR_SF_MASK;
431
432 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
433 outb(oldlcr, baseio + UART_LCR);
434 }
435
436 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
437 {
438 u8 oldlcr;
439 u8 efr;
440
441 oldlcr = inb(baseio + UART_LCR);
442 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
443
444 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
445 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
446 efr |= MOXA_MUST_EFR_SF_TX1;
447
448 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
449 outb(oldlcr, baseio + UART_LCR);
450 }
451
452 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
453 {
454 u8 oldlcr;
455 u8 efr;
456
457 oldlcr = inb(baseio + UART_LCR);
458 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
459
460 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
461 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
462
463 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
464 outb(oldlcr, baseio + UART_LCR);
465 }
466
467 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
468 {
469 u8 oldlcr;
470 u8 efr;
471
472 oldlcr = inb(baseio + UART_LCR);
473 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
474
475 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
476 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
477 efr |= MOXA_MUST_EFR_SF_RX1;
478
479 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
480 outb(oldlcr, baseio + UART_LCR);
481 }
482
483 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
484 {
485 u8 oldlcr;
486 u8 efr;
487
488 oldlcr = inb(baseio + UART_LCR);
489 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
490
491 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
492 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
493
494 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
495 outb(oldlcr, baseio + UART_LCR);
496 }
497
498 #ifdef CONFIG_PCI
499 static int __devinit CheckIsMoxaMust(unsigned long io)
500 {
501 u8 oldmcr, hwid;
502 int i;
503
504 outb(0, io + UART_LCR);
505 mxser_disable_must_enchance_mode(io);
506 oldmcr = inb(io + UART_MCR);
507 outb(0, io + UART_MCR);
508 mxser_set_must_xon1_value(io, 0x11);
509 if ((hwid = inb(io + UART_MCR)) != 0) {
510 outb(oldmcr, io + UART_MCR);
511 return MOXA_OTHER_UART;
512 }
513
514 mxser_get_must_hardware_id(io, &hwid);
515 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
516 if (hwid == Gpci_uart_info[i].type)
517 return (int)hwid;
518 }
519 return MOXA_OTHER_UART;
520 }
521 #endif
522
523 static void process_txrx_fifo(struct mxser_port *info)
524 {
525 int i;
526
527 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
528 info->rx_trigger = 1;
529 info->rx_high_water = 1;
530 info->rx_low_water = 1;
531 info->xmit_fifo_size = 1;
532 } else
533 for (i = 0; i < UART_INFO_NUM; i++)
534 if (info->board->chip_flag == Gpci_uart_info[i].type) {
535 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
536 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
537 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
538 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
539 break;
540 }
541 }
542
543 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
544 {
545 unsigned char status = 0;
546
547 status = inb(baseaddr + UART_MSR);
548
549 mxser_msr[port] &= 0x0F;
550 mxser_msr[port] |= status;
551 status = mxser_msr[port];
552 if (mode)
553 mxser_msr[port] = 0;
554
555 return status;
556 }
557
558 static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
559 struct mxser_port *port)
560 {
561 DECLARE_WAITQUEUE(wait, current);
562 int retval;
563 int do_clocal = 0;
564 unsigned long flags;
565
566 /*
567 * If non-blocking mode is set, or the port is not enabled,
568 * then make the check up front and then exit.
569 */
570 if ((filp->f_flags & O_NONBLOCK) ||
571 test_bit(TTY_IO_ERROR, &tty->flags)) {
572 port->port.flags |= ASYNC_NORMAL_ACTIVE;
573 return 0;
574 }
575
576 if (tty->termios->c_cflag & CLOCAL)
577 do_clocal = 1;
578
579 /*
580 * Block waiting for the carrier detect and the line to become
581 * free (i.e., not in use by the callout). While we are in
582 * this loop, port->port.count is dropped by one, so that
583 * mxser_close() knows when to free things. We restore it upon
584 * exit, either normal or abnormal.
585 */
586 retval = 0;
587 add_wait_queue(&port->port.open_wait, &wait);
588
589 spin_lock_irqsave(&port->slock, flags);
590 if (!tty_hung_up_p(filp))
591 port->port.count--;
592 spin_unlock_irqrestore(&port->slock, flags);
593 port->port.blocked_open++;
594 while (1) {
595 spin_lock_irqsave(&port->slock, flags);
596 outb(inb(port->ioaddr + UART_MCR) |
597 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
598 spin_unlock_irqrestore(&port->slock, flags);
599 set_current_state(TASK_INTERRUPTIBLE);
600 if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
601 if (port->port.flags & ASYNC_HUP_NOTIFY)
602 retval = -EAGAIN;
603 else
604 retval = -ERESTARTSYS;
605 break;
606 }
607 if (!(port->port.flags & ASYNC_CLOSING) &&
608 (do_clocal ||
609 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
610 break;
611 if (signal_pending(current)) {
612 retval = -ERESTARTSYS;
613 break;
614 }
615 schedule();
616 }
617 set_current_state(TASK_RUNNING);
618 remove_wait_queue(&port->port.open_wait, &wait);
619 if (!tty_hung_up_p(filp))
620 port->port.count++;
621 port->port.blocked_open--;
622 if (retval)
623 return retval;
624 port->port.flags |= ASYNC_NORMAL_ACTIVE;
625 return 0;
626 }
627
628 static int mxser_set_baud(struct mxser_port *info, long newspd)
629 {
630 int quot = 0, baud;
631 unsigned char cval;
632
633 if (!info->port.tty || !info->port.tty->termios)
634 return -1;
635
636 if (!(info->ioaddr))
637 return -1;
638
639 if (newspd > info->max_baud)
640 return -1;
641
642 if (newspd == 134) {
643 quot = 2 * info->baud_base / 269;
644 tty_encode_baud_rate(info->port.tty, 134, 134);
645 } else if (newspd) {
646 quot = info->baud_base / newspd;
647 if (quot == 0)
648 quot = 1;
649 baud = info->baud_base/quot;
650 tty_encode_baud_rate(info->port.tty, baud, baud);
651 } else {
652 quot = 0;
653 }
654
655 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
656 info->timeout += HZ / 50; /* Add .02 seconds of slop */
657
658 if (quot) {
659 info->MCR |= UART_MCR_DTR;
660 outb(info->MCR, info->ioaddr + UART_MCR);
661 } else {
662 info->MCR &= ~UART_MCR_DTR;
663 outb(info->MCR, info->ioaddr + UART_MCR);
664 return 0;
665 }
666
667 cval = inb(info->ioaddr + UART_LCR);
668
669 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
670
671 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
672 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
673 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
674
675 #ifdef BOTHER
676 if (C_BAUD(info->port.tty) == BOTHER) {
677 quot = info->baud_base % newspd;
678 quot *= 8;
679 if (quot % newspd > newspd / 2) {
680 quot /= newspd;
681 quot++;
682 } else
683 quot /= newspd;
684
685 mxser_set_must_enum_value(info->ioaddr, quot);
686 } else
687 #endif
688 mxser_set_must_enum_value(info->ioaddr, 0);
689
690 return 0;
691 }
692
693 /*
694 * This routine is called to set the UART divisor registers to match
695 * the specified baud rate for a serial port.
696 */
697 static int mxser_change_speed(struct mxser_port *info,
698 struct ktermios *old_termios)
699 {
700 unsigned cflag, cval, fcr;
701 int ret = 0;
702 unsigned char status;
703
704 if (!info->port.tty || !info->port.tty->termios)
705 return ret;
706 cflag = info->port.tty->termios->c_cflag;
707 if (!(info->ioaddr))
708 return ret;
709
710 if (mxser_set_baud_method[info->port.tty->index] == 0)
711 mxser_set_baud(info, tty_get_baud_rate(info->port.tty));
712
713 /* byte size and parity */
714 switch (cflag & CSIZE) {
715 case CS5:
716 cval = 0x00;
717 break;
718 case CS6:
719 cval = 0x01;
720 break;
721 case CS7:
722 cval = 0x02;
723 break;
724 case CS8:
725 cval = 0x03;
726 break;
727 default:
728 cval = 0x00;
729 break; /* too keep GCC shut... */
730 }
731 if (cflag & CSTOPB)
732 cval |= 0x04;
733 if (cflag & PARENB)
734 cval |= UART_LCR_PARITY;
735 if (!(cflag & PARODD))
736 cval |= UART_LCR_EPAR;
737 if (cflag & CMSPAR)
738 cval |= UART_LCR_SPAR;
739
740 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
741 if (info->board->chip_flag) {
742 fcr = UART_FCR_ENABLE_FIFO;
743 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
744 mxser_set_must_fifo_value(info);
745 } else
746 fcr = 0;
747 } else {
748 fcr = UART_FCR_ENABLE_FIFO;
749 if (info->board->chip_flag) {
750 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
751 mxser_set_must_fifo_value(info);
752 } else {
753 switch (info->rx_trigger) {
754 case 1:
755 fcr |= UART_FCR_TRIGGER_1;
756 break;
757 case 4:
758 fcr |= UART_FCR_TRIGGER_4;
759 break;
760 case 8:
761 fcr |= UART_FCR_TRIGGER_8;
762 break;
763 default:
764 fcr |= UART_FCR_TRIGGER_14;
765 break;
766 }
767 }
768 }
769
770 /* CTS flow control flag and modem status interrupts */
771 info->IER &= ~UART_IER_MSI;
772 info->MCR &= ~UART_MCR_AFE;
773 if (cflag & CRTSCTS) {
774 info->port.flags |= ASYNC_CTS_FLOW;
775 info->IER |= UART_IER_MSI;
776 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
777 info->MCR |= UART_MCR_AFE;
778 } else {
779 status = inb(info->ioaddr + UART_MSR);
780 if (info->port.tty->hw_stopped) {
781 if (status & UART_MSR_CTS) {
782 info->port.tty->hw_stopped = 0;
783 if (info->type != PORT_16550A &&
784 !info->board->chip_flag) {
785 outb(info->IER & ~UART_IER_THRI,
786 info->ioaddr +
787 UART_IER);
788 info->IER |= UART_IER_THRI;
789 outb(info->IER, info->ioaddr +
790 UART_IER);
791 }
792 tty_wakeup(info->port.tty);
793 }
794 } else {
795 if (!(status & UART_MSR_CTS)) {
796 info->port.tty->hw_stopped = 1;
797 if ((info->type != PORT_16550A) &&
798 (!info->board->chip_flag)) {
799 info->IER &= ~UART_IER_THRI;
800 outb(info->IER, info->ioaddr +
801 UART_IER);
802 }
803 }
804 }
805 }
806 } else {
807 info->port.flags &= ~ASYNC_CTS_FLOW;
808 }
809 outb(info->MCR, info->ioaddr + UART_MCR);
810 if (cflag & CLOCAL) {
811 info->port.flags &= ~ASYNC_CHECK_CD;
812 } else {
813 info->port.flags |= ASYNC_CHECK_CD;
814 info->IER |= UART_IER_MSI;
815 }
816 outb(info->IER, info->ioaddr + UART_IER);
817
818 /*
819 * Set up parity check flag
820 */
821 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
822 if (I_INPCK(info->port.tty))
823 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
824 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
825 info->read_status_mask |= UART_LSR_BI;
826
827 info->ignore_status_mask = 0;
828
829 if (I_IGNBRK(info->port.tty)) {
830 info->ignore_status_mask |= UART_LSR_BI;
831 info->read_status_mask |= UART_LSR_BI;
832 /*
833 * If we're ignore parity and break indicators, ignore
834 * overruns too. (For real raw support).
835 */
836 if (I_IGNPAR(info->port.tty)) {
837 info->ignore_status_mask |=
838 UART_LSR_OE |
839 UART_LSR_PE |
840 UART_LSR_FE;
841 info->read_status_mask |=
842 UART_LSR_OE |
843 UART_LSR_PE |
844 UART_LSR_FE;
845 }
846 }
847 if (info->board->chip_flag) {
848 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty));
849 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty));
850 if (I_IXON(info->port.tty)) {
851 mxser_enable_must_rx_software_flow_control(
852 info->ioaddr);
853 } else {
854 mxser_disable_must_rx_software_flow_control(
855 info->ioaddr);
856 }
857 if (I_IXOFF(info->port.tty)) {
858 mxser_enable_must_tx_software_flow_control(
859 info->ioaddr);
860 } else {
861 mxser_disable_must_tx_software_flow_control(
862 info->ioaddr);
863 }
864 }
865
866
867 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
868 outb(cval, info->ioaddr + UART_LCR);
869
870 return ret;
871 }
872
873 static void mxser_check_modem_status(struct mxser_port *port, int status)
874 {
875 /* update input line counters */
876 if (status & UART_MSR_TERI)
877 port->icount.rng++;
878 if (status & UART_MSR_DDSR)
879 port->icount.dsr++;
880 if (status & UART_MSR_DDCD)
881 port->icount.dcd++;
882 if (status & UART_MSR_DCTS)
883 port->icount.cts++;
884 port->mon_data.modem_status = status;
885 wake_up_interruptible(&port->delta_msr_wait);
886
887 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
888 if (status & UART_MSR_DCD)
889 wake_up_interruptible(&port->port.open_wait);
890 }
891
892 if (port->port.flags & ASYNC_CTS_FLOW) {
893 if (port->port.tty->hw_stopped) {
894 if (status & UART_MSR_CTS) {
895 port->port.tty->hw_stopped = 0;
896
897 if ((port->type != PORT_16550A) &&
898 (!port->board->chip_flag)) {
899 outb(port->IER & ~UART_IER_THRI,
900 port->ioaddr + UART_IER);
901 port->IER |= UART_IER_THRI;
902 outb(port->IER, port->ioaddr +
903 UART_IER);
904 }
905 tty_wakeup(port->port.tty);
906 }
907 } else {
908 if (!(status & UART_MSR_CTS)) {
909 port->port.tty->hw_stopped = 1;
910 if (port->type != PORT_16550A &&
911 !port->board->chip_flag) {
912 port->IER &= ~UART_IER_THRI;
913 outb(port->IER, port->ioaddr +
914 UART_IER);
915 }
916 }
917 }
918 }
919 }
920
921 static int mxser_startup(struct mxser_port *info)
922 {
923 unsigned long page;
924 unsigned long flags;
925
926 page = __get_free_page(GFP_KERNEL);
927 if (!page)
928 return -ENOMEM;
929
930 spin_lock_irqsave(&info->slock, flags);
931
932 if (info->port.flags & ASYNC_INITIALIZED) {
933 free_page(page);
934 spin_unlock_irqrestore(&info->slock, flags);
935 return 0;
936 }
937
938 if (!info->ioaddr || !info->type) {
939 if (info->port.tty)
940 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
941 free_page(page);
942 spin_unlock_irqrestore(&info->slock, flags);
943 return 0;
944 }
945 if (info->port.xmit_buf)
946 free_page(page);
947 else
948 info->port.xmit_buf = (unsigned char *) page;
949
950 /*
951 * Clear the FIFO buffers and disable them
952 * (they will be reenabled in mxser_change_speed())
953 */
954 if (info->board->chip_flag)
955 outb((UART_FCR_CLEAR_RCVR |
956 UART_FCR_CLEAR_XMIT |
957 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
958 else
959 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
960 info->ioaddr + UART_FCR);
961
962 /*
963 * At this point there's no way the LSR could still be 0xFF;
964 * if it is, then bail out, because there's likely no UART
965 * here.
966 */
967 if (inb(info->ioaddr + UART_LSR) == 0xff) {
968 spin_unlock_irqrestore(&info->slock, flags);
969 if (capable(CAP_SYS_ADMIN)) {
970 if (info->port.tty)
971 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
972 return 0;
973 } else
974 return -ENODEV;
975 }
976
977 /*
978 * Clear the interrupt registers.
979 */
980 (void) inb(info->ioaddr + UART_LSR);
981 (void) inb(info->ioaddr + UART_RX);
982 (void) inb(info->ioaddr + UART_IIR);
983 (void) inb(info->ioaddr + UART_MSR);
984
985 /*
986 * Now, initialize the UART
987 */
988 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
989 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
990 outb(info->MCR, info->ioaddr + UART_MCR);
991
992 /*
993 * Finally, enable interrupts
994 */
995 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
996
997 if (info->board->chip_flag)
998 info->IER |= MOXA_MUST_IER_EGDAI;
999 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
1000
1001 /*
1002 * And clear the interrupt registers again for luck.
1003 */
1004 (void) inb(info->ioaddr + UART_LSR);
1005 (void) inb(info->ioaddr + UART_RX);
1006 (void) inb(info->ioaddr + UART_IIR);
1007 (void) inb(info->ioaddr + UART_MSR);
1008
1009 if (info->port.tty)
1010 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
1011 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1012
1013 /*
1014 * and set the speed of the serial port
1015 */
1016 mxser_change_speed(info, NULL);
1017 info->port.flags |= ASYNC_INITIALIZED;
1018 spin_unlock_irqrestore(&info->slock, flags);
1019
1020 return 0;
1021 }
1022
1023 /*
1024 * This routine will shutdown a serial port; interrupts maybe disabled, and
1025 * DTR is dropped if the hangup on close termio flag is on.
1026 */
1027 static void mxser_shutdown(struct mxser_port *info)
1028 {
1029 unsigned long flags;
1030
1031 if (!(info->port.flags & ASYNC_INITIALIZED))
1032 return;
1033
1034 spin_lock_irqsave(&info->slock, flags);
1035
1036 /*
1037 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
1038 * here so the queue might never be waken up
1039 */
1040 wake_up_interruptible(&info->delta_msr_wait);
1041
1042 /*
1043 * Free the IRQ, if necessary
1044 */
1045 if (info->port.xmit_buf) {
1046 free_page((unsigned long) info->port.xmit_buf);
1047 info->port.xmit_buf = NULL;
1048 }
1049
1050 info->IER = 0;
1051 outb(0x00, info->ioaddr + UART_IER);
1052
1053 if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL))
1054 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
1055 outb(info->MCR, info->ioaddr + UART_MCR);
1056
1057 /* clear Rx/Tx FIFO's */
1058 if (info->board->chip_flag)
1059 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
1060 MOXA_MUST_FCR_GDA_MODE_ENABLE,
1061 info->ioaddr + UART_FCR);
1062 else
1063 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1064 info->ioaddr + UART_FCR);
1065
1066 /* read data port to reset things */
1067 (void) inb(info->ioaddr + UART_RX);
1068
1069 if (info->port.tty)
1070 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
1071
1072 info->port.flags &= ~ASYNC_INITIALIZED;
1073
1074 if (info->board->chip_flag)
1075 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1076
1077 spin_unlock_irqrestore(&info->slock, flags);
1078 }
1079
1080 /*
1081 * This routine is called whenever a serial port is opened. It
1082 * enables interrupts for a serial port, linking in its async structure into
1083 * the IRQ chain. It also performs the serial-specific
1084 * initialization for the tty structure.
1085 */
1086 static int mxser_open(struct tty_struct *tty, struct file *filp)
1087 {
1088 struct mxser_port *info;
1089 unsigned long flags;
1090 int retval, line;
1091
1092 line = tty->index;
1093 if (line == MXSER_PORTS)
1094 return 0;
1095 if (line < 0 || line > MXSER_PORTS)
1096 return -ENODEV;
1097 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1098 if (!info->ioaddr)
1099 return -ENODEV;
1100
1101 tty->driver_data = info;
1102 info->port.tty = tty;
1103 /*
1104 * Start up serial port
1105 */
1106 spin_lock_irqsave(&info->slock, flags);
1107 info->port.count++;
1108 spin_unlock_irqrestore(&info->slock, flags);
1109 retval = mxser_startup(info);
1110 if (retval)
1111 return retval;
1112
1113 retval = mxser_block_til_ready(tty, filp, info);
1114 if (retval)
1115 return retval;
1116
1117 /* unmark here for very high baud rate (ex. 921600 bps) used */
1118 tty->low_latency = 1;
1119 return 0;
1120 }
1121
1122 static void mxser_flush_buffer(struct tty_struct *tty)
1123 {
1124 struct mxser_port *info = tty->driver_data;
1125 char fcr;
1126 unsigned long flags;
1127
1128
1129 spin_lock_irqsave(&info->slock, flags);
1130 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1131
1132 fcr = inb(info->ioaddr + UART_FCR);
1133 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1134 info->ioaddr + UART_FCR);
1135 outb(fcr, info->ioaddr + UART_FCR);
1136
1137 spin_unlock_irqrestore(&info->slock, flags);
1138
1139 tty_wakeup(tty);
1140 }
1141
1142
1143 /*
1144 * This routine is called when the serial port gets closed. First, we
1145 * wait for the last remaining data to be sent. Then, we unlink its
1146 * async structure from the interrupt chain if necessary, and we free
1147 * that IRQ if nothing is left in the chain.
1148 */
1149 static void mxser_close(struct tty_struct *tty, struct file *filp)
1150 {
1151 struct mxser_port *info = tty->driver_data;
1152
1153 unsigned long timeout;
1154 unsigned long flags;
1155
1156 if (tty->index == MXSER_PORTS)
1157 return;
1158 if (!info)
1159 return;
1160
1161 spin_lock_irqsave(&info->slock, flags);
1162
1163 if (tty_hung_up_p(filp)) {
1164 spin_unlock_irqrestore(&info->slock, flags);
1165 return;
1166 }
1167 if ((tty->count == 1) && (info->port.count != 1)) {
1168 /*
1169 * Uh, oh. tty->count is 1, which means that the tty
1170 * structure will be freed. Info->port.count should always
1171 * be one in these conditions. If it's greater than
1172 * one, we've got real problems, since it means the
1173 * serial port won't be shutdown.
1174 */
1175 printk(KERN_ERR "mxser_close: bad serial port count; "
1176 "tty->count is 1, info->port.count is %d\n", info->port.count);
1177 info->port.count = 1;
1178 }
1179 if (--info->port.count < 0) {
1180 printk(KERN_ERR "mxser_close: bad serial port count for "
1181 "ttys%d: %d\n", tty->index, info->port.count);
1182 info->port.count = 0;
1183 }
1184 if (info->port.count) {
1185 spin_unlock_irqrestore(&info->slock, flags);
1186 return;
1187 }
1188 info->port.flags |= ASYNC_CLOSING;
1189 spin_unlock_irqrestore(&info->slock, flags);
1190 /*
1191 * Save the termios structure, since this port may have
1192 * separate termios for callout and dialin.
1193 */
1194 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1195 info->normal_termios = *tty->termios;
1196 /*
1197 * Now we wait for the transmit buffer to clear; and we notify
1198 * the line discipline to only process XON/XOFF characters.
1199 */
1200 tty->closing = 1;
1201 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
1202 tty_wait_until_sent(tty, info->port.closing_wait);
1203 /*
1204 * At this point we stop accepting input. To do this, we
1205 * disable the receive line status interrupts, and tell the
1206 * interrupt driver to stop checking the data ready bit in the
1207 * line status register.
1208 */
1209 info->IER &= ~UART_IER_RLSI;
1210 if (info->board->chip_flag)
1211 info->IER &= ~MOXA_MUST_RECV_ISR;
1212
1213 if (info->port.flags & ASYNC_INITIALIZED) {
1214 outb(info->IER, info->ioaddr + UART_IER);
1215 /*
1216 * Before we drop DTR, make sure the UART transmitter
1217 * has completely drained; this is especially
1218 * important if there is a transmit FIFO!
1219 */
1220 timeout = jiffies + HZ;
1221 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1222 schedule_timeout_interruptible(5);
1223 if (time_after(jiffies, timeout))
1224 break;
1225 }
1226 }
1227 mxser_shutdown(info);
1228
1229 mxser_flush_buffer(tty);
1230 tty_ldisc_flush(tty);
1231
1232 tty->closing = 0;
1233 info->port.tty = NULL;
1234 if (info->port.blocked_open) {
1235 if (info->port.close_delay)
1236 schedule_timeout_interruptible(info->port.close_delay);
1237 wake_up_interruptible(&info->port.open_wait);
1238 }
1239
1240 info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1241 }
1242
1243 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1244 {
1245 int c, total = 0;
1246 struct mxser_port *info = tty->driver_data;
1247 unsigned long flags;
1248
1249 if (!info->port.xmit_buf)
1250 return 0;
1251
1252 while (1) {
1253 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1254 SERIAL_XMIT_SIZE - info->xmit_head));
1255 if (c <= 0)
1256 break;
1257
1258 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1259 spin_lock_irqsave(&info->slock, flags);
1260 info->xmit_head = (info->xmit_head + c) &
1261 (SERIAL_XMIT_SIZE - 1);
1262 info->xmit_cnt += c;
1263 spin_unlock_irqrestore(&info->slock, flags);
1264
1265 buf += c;
1266 count -= c;
1267 total += c;
1268 }
1269
1270 if (info->xmit_cnt && !tty->stopped) {
1271 if (!tty->hw_stopped ||
1272 (info->type == PORT_16550A) ||
1273 (info->board->chip_flag)) {
1274 spin_lock_irqsave(&info->slock, flags);
1275 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1276 UART_IER);
1277 info->IER |= UART_IER_THRI;
1278 outb(info->IER, info->ioaddr + UART_IER);
1279 spin_unlock_irqrestore(&info->slock, flags);
1280 }
1281 }
1282 return total;
1283 }
1284
1285 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1286 {
1287 struct mxser_port *info = tty->driver_data;
1288 unsigned long flags;
1289
1290 if (!info->port.xmit_buf)
1291 return 0;
1292
1293 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1294 return 0;
1295
1296 spin_lock_irqsave(&info->slock, flags);
1297 info->port.xmit_buf[info->xmit_head++] = ch;
1298 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1299 info->xmit_cnt++;
1300 spin_unlock_irqrestore(&info->slock, flags);
1301 if (!tty->stopped) {
1302 if (!tty->hw_stopped ||
1303 (info->type == PORT_16550A) ||
1304 info->board->chip_flag) {
1305 spin_lock_irqsave(&info->slock, flags);
1306 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1307 info->IER |= UART_IER_THRI;
1308 outb(info->IER, info->ioaddr + UART_IER);
1309 spin_unlock_irqrestore(&info->slock, flags);
1310 }
1311 }
1312 return 1;
1313 }
1314
1315
1316 static void mxser_flush_chars(struct tty_struct *tty)
1317 {
1318 struct mxser_port *info = tty->driver_data;
1319 unsigned long flags;
1320
1321 if (info->xmit_cnt <= 0 ||
1322 tty->stopped ||
1323 !info->port.xmit_buf ||
1324 (tty->hw_stopped &&
1325 (info->type != PORT_16550A) &&
1326 (!info->board->chip_flag)
1327 ))
1328 return;
1329
1330 spin_lock_irqsave(&info->slock, flags);
1331
1332 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1333 info->IER |= UART_IER_THRI;
1334 outb(info->IER, info->ioaddr + UART_IER);
1335
1336 spin_unlock_irqrestore(&info->slock, flags);
1337 }
1338
1339 static int mxser_write_room(struct tty_struct *tty)
1340 {
1341 struct mxser_port *info = tty->driver_data;
1342 int ret;
1343
1344 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1345 if (ret < 0)
1346 ret = 0;
1347 return ret;
1348 }
1349
1350 static int mxser_chars_in_buffer(struct tty_struct *tty)
1351 {
1352 struct mxser_port *info = tty->driver_data;
1353 return info->xmit_cnt;
1354 }
1355
1356 /*
1357 * ------------------------------------------------------------
1358 * friends of mxser_ioctl()
1359 * ------------------------------------------------------------
1360 */
1361 static int mxser_get_serial_info(struct mxser_port *info,
1362 struct serial_struct __user *retinfo)
1363 {
1364 struct serial_struct tmp = {
1365 .type = info->type,
1366 .line = info->port.tty->index,
1367 .port = info->ioaddr,
1368 .irq = info->board->irq,
1369 .flags = info->port.flags,
1370 .baud_base = info->baud_base,
1371 .close_delay = info->port.close_delay,
1372 .closing_wait = info->port.closing_wait,
1373 .custom_divisor = info->custom_divisor,
1374 .hub6 = 0
1375 };
1376 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1377 return -EFAULT;
1378 return 0;
1379 }
1380
1381 static int mxser_set_serial_info(struct mxser_port *info,
1382 struct serial_struct __user *new_info)
1383 {
1384 struct serial_struct new_serial;
1385 speed_t baud;
1386 unsigned long sl_flags;
1387 unsigned int flags;
1388 int retval = 0;
1389
1390 if (!new_info || !info->ioaddr)
1391 return -ENODEV;
1392 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1393 return -EFAULT;
1394
1395 if (new_serial.irq != info->board->irq ||
1396 new_serial.port != info->ioaddr)
1397 return -EINVAL;
1398
1399 flags = info->port.flags & ASYNC_SPD_MASK;
1400
1401 if (!capable(CAP_SYS_ADMIN)) {
1402 if ((new_serial.baud_base != info->baud_base) ||
1403 (new_serial.close_delay != info->port.close_delay) ||
1404 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1405 return -EPERM;
1406 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1407 (new_serial.flags & ASYNC_USR_MASK));
1408 } else {
1409 /*
1410 * OK, past this point, all the error checking has been done.
1411 * At this point, we start making changes.....
1412 */
1413 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1414 (new_serial.flags & ASYNC_FLAGS));
1415 info->port.close_delay = new_serial.close_delay * HZ / 100;
1416 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1417 info->port.tty->low_latency =
1418 (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1419 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1420 (new_serial.baud_base != info->baud_base ||
1421 new_serial.custom_divisor !=
1422 info->custom_divisor)) {
1423 baud = new_serial.baud_base / new_serial.custom_divisor;
1424 tty_encode_baud_rate(info->port.tty, baud, baud);
1425 }
1426 }
1427
1428 info->type = new_serial.type;
1429
1430 process_txrx_fifo(info);
1431
1432 if (info->port.flags & ASYNC_INITIALIZED) {
1433 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1434 spin_lock_irqsave(&info->slock, sl_flags);
1435 mxser_change_speed(info, NULL);
1436 spin_unlock_irqrestore(&info->slock, sl_flags);
1437 }
1438 } else
1439 retval = mxser_startup(info);
1440
1441 return retval;
1442 }
1443
1444 /*
1445 * mxser_get_lsr_info - get line status register info
1446 *
1447 * Purpose: Let user call ioctl() to get info when the UART physically
1448 * is emptied. On bus types like RS485, the transmitter must
1449 * release the bus after transmitting. This must be done when
1450 * the transmit shift register is empty, not be done when the
1451 * transmit holding register is empty. This functionality
1452 * allows an RS485 driver to be written in user space.
1453 */
1454 static int mxser_get_lsr_info(struct mxser_port *info,
1455 unsigned int __user *value)
1456 {
1457 unsigned char status;
1458 unsigned int result;
1459 unsigned long flags;
1460
1461 spin_lock_irqsave(&info->slock, flags);
1462 status = inb(info->ioaddr + UART_LSR);
1463 spin_unlock_irqrestore(&info->slock, flags);
1464 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1465 return put_user(result, value);
1466 }
1467
1468 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1469 {
1470 struct mxser_port *info = tty->driver_data;
1471 unsigned char control, status;
1472 unsigned long flags;
1473
1474
1475 if (tty->index == MXSER_PORTS)
1476 return -ENOIOCTLCMD;
1477 if (test_bit(TTY_IO_ERROR, &tty->flags))
1478 return -EIO;
1479
1480 control = info->MCR;
1481
1482 spin_lock_irqsave(&info->slock, flags);
1483 status = inb(info->ioaddr + UART_MSR);
1484 if (status & UART_MSR_ANY_DELTA)
1485 mxser_check_modem_status(info, status);
1486 spin_unlock_irqrestore(&info->slock, flags);
1487 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1488 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1489 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1490 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1491 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1492 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1493 }
1494
1495 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1496 unsigned int set, unsigned int clear)
1497 {
1498 struct mxser_port *info = tty->driver_data;
1499 unsigned long flags;
1500
1501
1502 if (tty->index == MXSER_PORTS)
1503 return -ENOIOCTLCMD;
1504 if (test_bit(TTY_IO_ERROR, &tty->flags))
1505 return -EIO;
1506
1507 spin_lock_irqsave(&info->slock, flags);
1508
1509 if (set & TIOCM_RTS)
1510 info->MCR |= UART_MCR_RTS;
1511 if (set & TIOCM_DTR)
1512 info->MCR |= UART_MCR_DTR;
1513
1514 if (clear & TIOCM_RTS)
1515 info->MCR &= ~UART_MCR_RTS;
1516 if (clear & TIOCM_DTR)
1517 info->MCR &= ~UART_MCR_DTR;
1518
1519 outb(info->MCR, info->ioaddr + UART_MCR);
1520 spin_unlock_irqrestore(&info->slock, flags);
1521 return 0;
1522 }
1523
1524 static int __init mxser_program_mode(int port)
1525 {
1526 int id, i, j, n;
1527
1528 outb(0, port);
1529 outb(0, port);
1530 outb(0, port);
1531 (void)inb(port);
1532 (void)inb(port);
1533 outb(0, port);
1534 (void)inb(port);
1535
1536 id = inb(port + 1) & 0x1F;
1537 if ((id != C168_ASIC_ID) &&
1538 (id != C104_ASIC_ID) &&
1539 (id != C102_ASIC_ID) &&
1540 (id != CI132_ASIC_ID) &&
1541 (id != CI134_ASIC_ID) &&
1542 (id != CI104J_ASIC_ID))
1543 return -1;
1544 for (i = 0, j = 0; i < 4; i++) {
1545 n = inb(port + 2);
1546 if (n == 'M') {
1547 j = 1;
1548 } else if ((j == 1) && (n == 1)) {
1549 j = 2;
1550 break;
1551 } else
1552 j = 0;
1553 }
1554 if (j != 2)
1555 id = -2;
1556 return id;
1557 }
1558
1559 static void __init mxser_normal_mode(int port)
1560 {
1561 int i, n;
1562
1563 outb(0xA5, port + 1);
1564 outb(0x80, port + 3);
1565 outb(12, port + 0); /* 9600 bps */
1566 outb(0, port + 1);
1567 outb(0x03, port + 3); /* 8 data bits */
1568 outb(0x13, port + 4); /* loop back mode */
1569 for (i = 0; i < 16; i++) {
1570 n = inb(port + 5);
1571 if ((n & 0x61) == 0x60)
1572 break;
1573 if ((n & 1) == 1)
1574 (void)inb(port);
1575 }
1576 outb(0x00, port + 4);
1577 }
1578
1579 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1580 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1581 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1582 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1583 #define EN_CCMD 0x000 /* Chip's command register */
1584 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1585 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1586 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1587 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1588 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1589 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1590 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1591 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1592 static int __init mxser_read_register(int port, unsigned short *regs)
1593 {
1594 int i, k, value, id;
1595 unsigned int j;
1596
1597 id = mxser_program_mode(port);
1598 if (id < 0)
1599 return id;
1600 for (i = 0; i < 14; i++) {
1601 k = (i & 0x3F) | 0x180;
1602 for (j = 0x100; j > 0; j >>= 1) {
1603 outb(CHIP_CS, port);
1604 if (k & j) {
1605 outb(CHIP_CS | CHIP_DO, port);
1606 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1607 } else {
1608 outb(CHIP_CS, port);
1609 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1610 }
1611 }
1612 (void)inb(port);
1613 value = 0;
1614 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1615 outb(CHIP_CS, port);
1616 outb(CHIP_CS | CHIP_SK, port);
1617 if (inb(port) & CHIP_DI)
1618 value |= j;
1619 }
1620 regs[i] = value;
1621 outb(0, port);
1622 }
1623 mxser_normal_mode(port);
1624 return id;
1625 }
1626
1627 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1628 {
1629 struct mxser_port *port;
1630 int result, status;
1631 unsigned int i, j;
1632 int ret = 0;
1633
1634 switch (cmd) {
1635 case MOXA_GET_MAJOR:
1636 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl %x, fix "
1637 "your userspace\n", current->comm, cmd);
1638 return put_user(ttymajor, (int __user *)argp);
1639
1640 case MOXA_CHKPORTENABLE:
1641 result = 0;
1642 lock_kernel();
1643 for (i = 0; i < MXSER_BOARDS; i++)
1644 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1645 if (mxser_boards[i].ports[j].ioaddr)
1646 result |= (1 << i);
1647 unlock_kernel();
1648 return put_user(result, (unsigned long __user *)argp);
1649 case MOXA_GETDATACOUNT:
1650 lock_kernel();
1651 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1652 ret = -EFAULT;
1653 unlock_kernel();
1654 return ret;
1655 case MOXA_GETMSTATUS:
1656 lock_kernel();
1657 for (i = 0; i < MXSER_BOARDS; i++)
1658 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1659 port = &mxser_boards[i].ports[j];
1660
1661 GMStatus[i].ri = 0;
1662 if (!port->ioaddr) {
1663 GMStatus[i].dcd = 0;
1664 GMStatus[i].dsr = 0;
1665 GMStatus[i].cts = 0;
1666 continue;
1667 }
1668
1669 if (!port->port.tty || !port->port.tty->termios)
1670 GMStatus[i].cflag =
1671 port->normal_termios.c_cflag;
1672 else
1673 GMStatus[i].cflag =
1674 port->port.tty->termios->c_cflag;
1675
1676 status = inb(port->ioaddr + UART_MSR);
1677 if (status & 0x80 /*UART_MSR_DCD */ )
1678 GMStatus[i].dcd = 1;
1679 else
1680 GMStatus[i].dcd = 0;
1681
1682 if (status & 0x20 /*UART_MSR_DSR */ )
1683 GMStatus[i].dsr = 1;
1684 else
1685 GMStatus[i].dsr = 0;
1686
1687
1688 if (status & 0x10 /*UART_MSR_CTS */ )
1689 GMStatus[i].cts = 1;
1690 else
1691 GMStatus[i].cts = 0;
1692 }
1693 unlock_kernel();
1694 if (copy_to_user(argp, GMStatus,
1695 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1696 return -EFAULT;
1697 return 0;
1698 case MOXA_ASPP_MON_EXT: {
1699 int p, shiftbit;
1700 unsigned long opmode;
1701 unsigned cflag, iflag;
1702
1703 lock_kernel();
1704 for (i = 0; i < MXSER_BOARDS; i++) {
1705 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1706 port = &mxser_boards[i].ports[j];
1707 if (!port->ioaddr)
1708 continue;
1709
1710 status = mxser_get_msr(port->ioaddr, 0, i);
1711
1712 if (status & UART_MSR_TERI)
1713 port->icount.rng++;
1714 if (status & UART_MSR_DDSR)
1715 port->icount.dsr++;
1716 if (status & UART_MSR_DDCD)
1717 port->icount.dcd++;
1718 if (status & UART_MSR_DCTS)
1719 port->icount.cts++;
1720
1721 port->mon_data.modem_status = status;
1722 mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
1723 mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
1724 mon_data_ext.up_rxcnt[i] =
1725 port->mon_data.up_rxcnt;
1726 mon_data_ext.up_txcnt[i] =
1727 port->mon_data.up_txcnt;
1728 mon_data_ext.modem_status[i] =
1729 port->mon_data.modem_status;
1730 mon_data_ext.baudrate[i] =
1731 tty_get_baud_rate(port->port.tty);
1732
1733 if (!port->port.tty || !port->port.tty->termios) {
1734 cflag = port->normal_termios.c_cflag;
1735 iflag = port->normal_termios.c_iflag;
1736 } else {
1737 cflag = port->port.tty->termios->c_cflag;
1738 iflag = port->port.tty->termios->c_iflag;
1739 }
1740
1741 mon_data_ext.databits[i] = cflag & CSIZE;
1742
1743 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1744
1745 mon_data_ext.parity[i] =
1746 cflag & (PARENB | PARODD | CMSPAR);
1747
1748 mon_data_ext.flowctrl[i] = 0x00;
1749
1750 if (cflag & CRTSCTS)
1751 mon_data_ext.flowctrl[i] |= 0x03;
1752
1753 if (iflag & (IXON | IXOFF))
1754 mon_data_ext.flowctrl[i] |= 0x0C;
1755
1756 if (port->type == PORT_16550A)
1757 mon_data_ext.fifo[i] = 1;
1758 else
1759 mon_data_ext.fifo[i] = 0;
1760
1761 p = i % 4;
1762 shiftbit = p * 2;
1763 opmode = inb(port->opmode_ioaddr) >> shiftbit;
1764 opmode &= OP_MODE_MASK;
1765
1766 mon_data_ext.iftype[i] = opmode;
1767
1768 }
1769 }
1770 unlock_kernel();
1771 if (copy_to_user(argp, &mon_data_ext,
1772 sizeof(mon_data_ext)))
1773 return -EFAULT;
1774 return 0;
1775 }
1776 default:
1777 return -ENOIOCTLCMD;
1778 }
1779 return 0;
1780 }
1781
1782 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1783 struct async_icount *cprev)
1784 {
1785 struct async_icount cnow;
1786 unsigned long flags;
1787 int ret;
1788
1789 spin_lock_irqsave(&info->slock, flags);
1790 cnow = info->icount; /* atomic copy */
1791 spin_unlock_irqrestore(&info->slock, flags);
1792
1793 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1794 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1795 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1796 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1797
1798 *cprev = cnow;
1799
1800 return ret;
1801 }
1802
1803 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1804 unsigned int cmd, unsigned long arg)
1805 {
1806 struct mxser_port *info = tty->driver_data;
1807 struct async_icount cnow;
1808 unsigned long flags;
1809 void __user *argp = (void __user *)arg;
1810 int retval;
1811
1812 if (tty->index == MXSER_PORTS)
1813 return mxser_ioctl_special(cmd, argp);
1814
1815 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1816 int p;
1817 unsigned long opmode;
1818 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1819 int shiftbit;
1820 unsigned char val, mask;
1821
1822 p = tty->index % 4;
1823 if (cmd == MOXA_SET_OP_MODE) {
1824 if (get_user(opmode, (int __user *) argp))
1825 return -EFAULT;
1826 if (opmode != RS232_MODE &&
1827 opmode != RS485_2WIRE_MODE &&
1828 opmode != RS422_MODE &&
1829 opmode != RS485_4WIRE_MODE)
1830 return -EFAULT;
1831 lock_kernel();
1832 mask = ModeMask[p];
1833 shiftbit = p * 2;
1834 val = inb(info->opmode_ioaddr);
1835 val &= mask;
1836 val |= (opmode << shiftbit);
1837 outb(val, info->opmode_ioaddr);
1838 unlock_kernel();
1839 } else {
1840 lock_kernel();
1841 shiftbit = p * 2;
1842 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1843 opmode &= OP_MODE_MASK;
1844 unlock_kernel();
1845 if (put_user(opmode, (int __user *)argp))
1846 return -EFAULT;
1847 }
1848 return 0;
1849 }
1850
1851 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1852 test_bit(TTY_IO_ERROR, &tty->flags))
1853 return -EIO;
1854
1855 switch (cmd) {
1856 case TIOCGSERIAL:
1857 lock_kernel();
1858 retval = mxser_get_serial_info(info, argp);
1859 unlock_kernel();
1860 return retval;
1861 case TIOCSSERIAL:
1862 lock_kernel();
1863 retval = mxser_set_serial_info(info, argp);
1864 unlock_kernel();
1865 return retval;
1866 case TIOCSERGETLSR: /* Get line status register */
1867 return mxser_get_lsr_info(info, argp);
1868 /*
1869 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1870 * - mask passed in arg for lines of interest
1871 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1872 * Caller should use TIOCGICOUNT to see which one it was
1873 */
1874 case TIOCMIWAIT:
1875 spin_lock_irqsave(&info->slock, flags);
1876 cnow = info->icount; /* note the counters on entry */
1877 spin_unlock_irqrestore(&info->slock, flags);
1878
1879 return wait_event_interruptible(info->delta_msr_wait,
1880 mxser_cflags_changed(info, arg, &cnow));
1881 /*
1882 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1883 * Return: write counters to the user passed counter struct
1884 * NB: both 1->0 and 0->1 transitions are counted except for
1885 * RI where only 0->1 is counted.
1886 */
1887 case TIOCGICOUNT: {
1888 struct serial_icounter_struct icnt = { 0 };
1889 spin_lock_irqsave(&info->slock, flags);
1890 cnow = info->icount;
1891 spin_unlock_irqrestore(&info->slock, flags);
1892
1893 icnt.frame = cnow.frame;
1894 icnt.brk = cnow.brk;
1895 icnt.overrun = cnow.overrun;
1896 icnt.buf_overrun = cnow.buf_overrun;
1897 icnt.parity = cnow.parity;
1898 icnt.rx = cnow.rx;
1899 icnt.tx = cnow.tx;
1900 icnt.cts = cnow.cts;
1901 icnt.dsr = cnow.dsr;
1902 icnt.rng = cnow.rng;
1903 icnt.dcd = cnow.dcd;
1904
1905 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1906 }
1907 case MOXA_HighSpeedOn:
1908 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1909 case MOXA_SDS_RSTICOUNTER:
1910 lock_kernel();
1911 info->mon_data.rxcnt = 0;
1912 info->mon_data.txcnt = 0;
1913 unlock_kernel();
1914 return 0;
1915
1916 case MOXA_ASPP_OQUEUE:{
1917 int len, lsr;
1918
1919 lock_kernel();
1920 len = mxser_chars_in_buffer(tty);
1921 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1922 len += (lsr ? 0 : 1);
1923 unlock_kernel();
1924
1925 return put_user(len, (int __user *)argp);
1926 }
1927 case MOXA_ASPP_MON: {
1928 int mcr, status;
1929
1930 lock_kernel();
1931 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1932 mxser_check_modem_status(info, status);
1933
1934 mcr = inb(info->ioaddr + UART_MCR);
1935 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1936 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1937 else
1938 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1939
1940 if (mcr & MOXA_MUST_MCR_TX_XON)
1941 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1942 else
1943 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1944
1945 if (info->port.tty->hw_stopped)
1946 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1947 else
1948 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1949 unlock_kernel();
1950 if (copy_to_user(argp, &info->mon_data,
1951 sizeof(struct mxser_mon)))
1952 return -EFAULT;
1953
1954 return 0;
1955 }
1956 case MOXA_ASPP_LSTATUS: {
1957 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1958 return -EFAULT;
1959
1960 info->err_shadow = 0;
1961 return 0;
1962 }
1963 case MOXA_SET_BAUD_METHOD: {
1964 int method;
1965
1966 if (get_user(method, (int __user *)argp))
1967 return -EFAULT;
1968 mxser_set_baud_method[tty->index] = method;
1969 return put_user(method, (int __user *)argp);
1970 }
1971 default:
1972 return -ENOIOCTLCMD;
1973 }
1974 return 0;
1975 }
1976
1977 static void mxser_stoprx(struct tty_struct *tty)
1978 {
1979 struct mxser_port *info = tty->driver_data;
1980
1981 info->ldisc_stop_rx = 1;
1982 if (I_IXOFF(tty)) {
1983 if (info->board->chip_flag) {
1984 info->IER &= ~MOXA_MUST_RECV_ISR;
1985 outb(info->IER, info->ioaddr + UART_IER);
1986 } else {
1987 info->x_char = STOP_CHAR(tty);
1988 outb(0, info->ioaddr + UART_IER);
1989 info->IER |= UART_IER_THRI;
1990 outb(info->IER, info->ioaddr + UART_IER);
1991 }
1992 }
1993
1994 if (info->port.tty->termios->c_cflag & CRTSCTS) {
1995 info->MCR &= ~UART_MCR_RTS;
1996 outb(info->MCR, info->ioaddr + UART_MCR);
1997 }
1998 }
1999
2000 /*
2001 * This routine is called by the upper-layer tty layer to signal that
2002 * incoming characters should be throttled.
2003 */
2004 static void mxser_throttle(struct tty_struct *tty)
2005 {
2006 mxser_stoprx(tty);
2007 }
2008
2009 static void mxser_unthrottle(struct tty_struct *tty)
2010 {
2011 struct mxser_port *info = tty->driver_data;
2012
2013 /* startrx */
2014 info->ldisc_stop_rx = 0;
2015 if (I_IXOFF(tty)) {
2016 if (info->x_char)
2017 info->x_char = 0;
2018 else {
2019 if (info->board->chip_flag) {
2020 info->IER |= MOXA_MUST_RECV_ISR;
2021 outb(info->IER, info->ioaddr + UART_IER);
2022 } else {
2023 info->x_char = START_CHAR(tty);
2024 outb(0, info->ioaddr + UART_IER);
2025 info->IER |= UART_IER_THRI;
2026 outb(info->IER, info->ioaddr + UART_IER);
2027 }
2028 }
2029 }
2030
2031 if (info->port.tty->termios->c_cflag & CRTSCTS) {
2032 info->MCR |= UART_MCR_RTS;
2033 outb(info->MCR, info->ioaddr + UART_MCR);
2034 }
2035 }
2036
2037 /*
2038 * mxser_stop() and mxser_start()
2039 *
2040 * This routines are called before setting or resetting tty->stopped.
2041 * They enable or disable transmitter interrupts, as necessary.
2042 */
2043 static void mxser_stop(struct tty_struct *tty)
2044 {
2045 struct mxser_port *info = tty->driver_data;
2046 unsigned long flags;
2047
2048 spin_lock_irqsave(&info->slock, flags);
2049 if (info->IER & UART_IER_THRI) {
2050 info->IER &= ~UART_IER_THRI;
2051 outb(info->IER, info->ioaddr + UART_IER);
2052 }
2053 spin_unlock_irqrestore(&info->slock, flags);
2054 }
2055
2056 static void mxser_start(struct tty_struct *tty)
2057 {
2058 struct mxser_port *info = tty->driver_data;
2059 unsigned long flags;
2060
2061 spin_lock_irqsave(&info->slock, flags);
2062 if (info->xmit_cnt && info->port.xmit_buf) {
2063 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
2064 info->IER |= UART_IER_THRI;
2065 outb(info->IER, info->ioaddr + UART_IER);
2066 }
2067 spin_unlock_irqrestore(&info->slock, flags);
2068 }
2069
2070 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2071 {
2072 struct mxser_port *info = tty->driver_data;
2073 unsigned long flags;
2074
2075 spin_lock_irqsave(&info->slock, flags);
2076 mxser_change_speed(info, old_termios);
2077 spin_unlock_irqrestore(&info->slock, flags);
2078
2079 if ((old_termios->c_cflag & CRTSCTS) &&
2080 !(tty->termios->c_cflag & CRTSCTS)) {
2081 tty->hw_stopped = 0;
2082 mxser_start(tty);
2083 }
2084
2085 /* Handle sw stopped */
2086 if ((old_termios->c_iflag & IXON) &&
2087 !(tty->termios->c_iflag & IXON)) {
2088 tty->stopped = 0;
2089
2090 if (info->board->chip_flag) {
2091 spin_lock_irqsave(&info->slock, flags);
2092 mxser_disable_must_rx_software_flow_control(
2093 info->ioaddr);
2094 spin_unlock_irqrestore(&info->slock, flags);
2095 }
2096
2097 mxser_start(tty);
2098 }
2099 }
2100
2101 /*
2102 * mxser_wait_until_sent() --- wait until the transmitter is empty
2103 */
2104 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2105 {
2106 struct mxser_port *info = tty->driver_data;
2107 unsigned long orig_jiffies, char_time;
2108 int lsr;
2109
2110 if (info->type == PORT_UNKNOWN)
2111 return;
2112
2113 if (info->xmit_fifo_size == 0)
2114 return; /* Just in case.... */
2115
2116 orig_jiffies = jiffies;
2117 /*
2118 * Set the check interval to be 1/5 of the estimated time to
2119 * send a single character, and make it at least 1. The check
2120 * interval should also be less than the timeout.
2121 *
2122 * Note: we have to use pretty tight timings here to satisfy
2123 * the NIST-PCTS.
2124 */
2125 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2126 char_time = char_time / 5;
2127 if (char_time == 0)
2128 char_time = 1;
2129 if (timeout && timeout < char_time)
2130 char_time = timeout;
2131 /*
2132 * If the transmitter hasn't cleared in twice the approximate
2133 * amount of time to send the entire FIFO, it probably won't
2134 * ever clear. This assumes the UART isn't doing flow
2135 * control, which is currently the case. Hence, if it ever
2136 * takes longer than info->timeout, this is probably due to a
2137 * UART bug of some kind. So, we clamp the timeout parameter at
2138 * 2*info->timeout.
2139 */
2140 if (!timeout || timeout > 2 * info->timeout)
2141 timeout = 2 * info->timeout;
2142 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2143 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2144 timeout, char_time);
2145 printk("jiff=%lu...", jiffies);
2146 #endif
2147 lock_kernel();
2148 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2149 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2150 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2151 #endif
2152 schedule_timeout_interruptible(char_time);
2153 if (signal_pending(current))
2154 break;
2155 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2156 break;
2157 }
2158 set_current_state(TASK_RUNNING);
2159 unlock_kernel();
2160
2161 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2162 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2163 #endif
2164 }
2165
2166 /*
2167 * This routine is called by tty_hangup() when a hangup is signaled.
2168 */
2169 static void mxser_hangup(struct tty_struct *tty)
2170 {
2171 struct mxser_port *info = tty->driver_data;
2172
2173 mxser_flush_buffer(tty);
2174 mxser_shutdown(info);
2175 info->port.count = 0;
2176 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
2177 info->port.tty = NULL;
2178 wake_up_interruptible(&info->port.open_wait);
2179 }
2180
2181 /*
2182 * mxser_rs_break() --- routine which turns the break handling on or off
2183 */
2184 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2185 {
2186 struct mxser_port *info = tty->driver_data;
2187 unsigned long flags;
2188
2189 spin_lock_irqsave(&info->slock, flags);
2190 if (break_state == -1)
2191 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2192 info->ioaddr + UART_LCR);
2193 else
2194 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2195 info->ioaddr + UART_LCR);
2196 spin_unlock_irqrestore(&info->slock, flags);
2197 return 0;
2198 }
2199
2200 static void mxser_receive_chars(struct mxser_port *port, int *status)
2201 {
2202 struct tty_struct *tty = port->port.tty;
2203 unsigned char ch, gdl;
2204 int ignored = 0;
2205 int cnt = 0;
2206 int recv_room;
2207 int max = 256;
2208
2209 recv_room = tty->receive_room;
2210 if ((recv_room == 0) && (!port->ldisc_stop_rx))
2211 mxser_stoprx(tty);
2212
2213 if (port->board->chip_flag != MOXA_OTHER_UART) {
2214
2215 if (*status & UART_LSR_SPECIAL)
2216 goto intr_old;
2217 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2218 (*status & MOXA_MUST_LSR_RERR))
2219 goto intr_old;
2220 if (*status & MOXA_MUST_LSR_RERR)
2221 goto intr_old;
2222
2223 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2224
2225 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2226 gdl &= MOXA_MUST_GDL_MASK;
2227 if (gdl >= recv_room) {
2228 if (!port->ldisc_stop_rx)
2229 mxser_stoprx(tty);
2230 }
2231 while (gdl--) {
2232 ch = inb(port->ioaddr + UART_RX);
2233 tty_insert_flip_char(tty, ch, 0);
2234 cnt++;
2235 }
2236 goto end_intr;
2237 }
2238 intr_old:
2239
2240 do {
2241 if (max-- < 0)
2242 break;
2243
2244 ch = inb(port->ioaddr + UART_RX);
2245 if (port->board->chip_flag && (*status & UART_LSR_OE))
2246 outb(0x23, port->ioaddr + UART_FCR);
2247 *status &= port->read_status_mask;
2248 if (*status & port->ignore_status_mask) {
2249 if (++ignored > 100)
2250 break;
2251 } else {
2252 char flag = 0;
2253 if (*status & UART_LSR_SPECIAL) {
2254 if (*status & UART_LSR_BI) {
2255 flag = TTY_BREAK;
2256 port->icount.brk++;
2257
2258 if (port->port.flags & ASYNC_SAK)
2259 do_SAK(tty);
2260 } else if (*status & UART_LSR_PE) {
2261 flag = TTY_PARITY;
2262 port->icount.parity++;
2263 } else if (*status & UART_LSR_FE) {
2264 flag = TTY_FRAME;
2265 port->icount.frame++;
2266 } else if (*status & UART_LSR_OE) {
2267 flag = TTY_OVERRUN;
2268 port->icount.overrun++;
2269 } else
2270 flag = TTY_BREAK;
2271 }
2272 tty_insert_flip_char(tty, ch, flag);
2273 cnt++;
2274 if (cnt >= recv_room) {
2275 if (!port->ldisc_stop_rx)
2276 mxser_stoprx(tty);
2277 break;
2278 }
2279
2280 }
2281
2282 if (port->board->chip_flag)
2283 break;
2284
2285 *status = inb(port->ioaddr + UART_LSR);
2286 } while (*status & UART_LSR_DR);
2287
2288 end_intr:
2289 mxvar_log.rxcnt[port->port.tty->index] += cnt;
2290 port->mon_data.rxcnt += cnt;
2291 port->mon_data.up_rxcnt += cnt;
2292
2293 /*
2294 * We are called from an interrupt context with &port->slock
2295 * being held. Drop it temporarily in order to prevent
2296 * recursive locking.
2297 */
2298 spin_unlock(&port->slock);
2299 tty_flip_buffer_push(tty);
2300 spin_lock(&port->slock);
2301 }
2302
2303 static void mxser_transmit_chars(struct mxser_port *port)
2304 {
2305 int count, cnt;
2306
2307 if (port->x_char) {
2308 outb(port->x_char, port->ioaddr + UART_TX);
2309 port->x_char = 0;
2310 mxvar_log.txcnt[port->port.tty->index]++;
2311 port->mon_data.txcnt++;
2312 port->mon_data.up_txcnt++;
2313 port->icount.tx++;
2314 return;
2315 }
2316
2317 if (port->port.xmit_buf == NULL)
2318 return;
2319
2320 if ((port->xmit_cnt <= 0) || port->port.tty->stopped ||
2321 (port->port.tty->hw_stopped &&
2322 (port->type != PORT_16550A) &&
2323 (!port->board->chip_flag))) {
2324 port->IER &= ~UART_IER_THRI;
2325 outb(port->IER, port->ioaddr + UART_IER);
2326 return;
2327 }
2328
2329 cnt = port->xmit_cnt;
2330 count = port->xmit_fifo_size;
2331 do {
2332 outb(port->port.xmit_buf[port->xmit_tail++],
2333 port->ioaddr + UART_TX);
2334 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2335 if (--port->xmit_cnt <= 0)
2336 break;
2337 } while (--count > 0);
2338 mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt);
2339
2340 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2341 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2342 port->icount.tx += (cnt - port->xmit_cnt);
2343
2344 if (port->xmit_cnt < WAKEUP_CHARS)
2345 tty_wakeup(port->port.tty);
2346
2347 if (port->xmit_cnt <= 0) {
2348 port->IER &= ~UART_IER_THRI;
2349 outb(port->IER, port->ioaddr + UART_IER);
2350 }
2351 }
2352
2353 /*
2354 * This is the serial driver's generic interrupt routine
2355 */
2356 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2357 {
2358 int status, iir, i;
2359 struct mxser_board *brd = NULL;
2360 struct mxser_port *port;
2361 int max, irqbits, bits, msr;
2362 unsigned int int_cnt, pass_counter = 0;
2363 int handled = IRQ_NONE;
2364
2365 for (i = 0; i < MXSER_BOARDS; i++)
2366 if (dev_id == &mxser_boards[i]) {
2367 brd = dev_id;
2368 break;
2369 }
2370
2371 if (i == MXSER_BOARDS)
2372 goto irq_stop;
2373 if (brd == NULL)
2374 goto irq_stop;
2375 max = brd->info->nports;
2376 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2377 irqbits = inb(brd->vector) & brd->vector_mask;
2378 if (irqbits == brd->vector_mask)
2379 break;
2380
2381 handled = IRQ_HANDLED;
2382 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2383 if (irqbits == brd->vector_mask)
2384 break;
2385 if (bits & irqbits)
2386 continue;
2387 port = &brd->ports[i];
2388
2389 int_cnt = 0;
2390 spin_lock(&port->slock);
2391 do {
2392 iir = inb(port->ioaddr + UART_IIR);
2393 if (iir & UART_IIR_NO_INT)
2394 break;
2395 iir &= MOXA_MUST_IIR_MASK;
2396 if (!port->port.tty ||
2397 (port->port.flags & ASYNC_CLOSING) ||
2398 !(port->port.flags &
2399 ASYNC_INITIALIZED)) {
2400 status = inb(port->ioaddr + UART_LSR);
2401 outb(0x27, port->ioaddr + UART_FCR);
2402 inb(port->ioaddr + UART_MSR);
2403 break;
2404 }
2405
2406 status = inb(port->ioaddr + UART_LSR);
2407
2408 if (status & UART_LSR_PE)
2409 port->err_shadow |= NPPI_NOTIFY_PARITY;
2410 if (status & UART_LSR_FE)
2411 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2412 if (status & UART_LSR_OE)
2413 port->err_shadow |=
2414 NPPI_NOTIFY_HW_OVERRUN;
2415 if (status & UART_LSR_BI)
2416 port->err_shadow |= NPPI_NOTIFY_BREAK;
2417
2418 if (port->board->chip_flag) {
2419 if (iir == MOXA_MUST_IIR_GDA ||
2420 iir == MOXA_MUST_IIR_RDA ||
2421 iir == MOXA_MUST_IIR_RTO ||
2422 iir == MOXA_MUST_IIR_LSR)
2423 mxser_receive_chars(port,
2424 &status);
2425
2426 } else {
2427 status &= port->read_status_mask;
2428 if (status & UART_LSR_DR)
2429 mxser_receive_chars(port,
2430 &status);
2431 }
2432 msr = inb(port->ioaddr + UART_MSR);
2433 if (msr & UART_MSR_ANY_DELTA)
2434 mxser_check_modem_status(port, msr);
2435
2436 if (port->board->chip_flag) {
2437 if (iir == 0x02 && (status &
2438 UART_LSR_THRE))
2439 mxser_transmit_chars(port);
2440 } else {
2441 if (status & UART_LSR_THRE)
2442 mxser_transmit_chars(port);
2443 }
2444 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2445 spin_unlock(&port->slock);
2446 }
2447 }
2448
2449 irq_stop:
2450 return handled;
2451 }
2452
2453 static const struct tty_operations mxser_ops = {
2454 .open = mxser_open,
2455 .close = mxser_close,
2456 .write = mxser_write,
2457 .put_char = mxser_put_char,
2458 .flush_chars = mxser_flush_chars,
2459 .write_room = mxser_write_room,
2460 .chars_in_buffer = mxser_chars_in_buffer,
2461 .flush_buffer = mxser_flush_buffer,
2462 .ioctl = mxser_ioctl,
2463 .throttle = mxser_throttle,
2464 .unthrottle = mxser_unthrottle,
2465 .set_termios = mxser_set_termios,
2466 .stop = mxser_stop,
2467 .start = mxser_start,
2468 .hangup = mxser_hangup,
2469 .break_ctl = mxser_rs_break,
2470 .wait_until_sent = mxser_wait_until_sent,
2471 .tiocmget = mxser_tiocmget,
2472 .tiocmset = mxser_tiocmset,
2473 };
2474
2475 /*
2476 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2477 */
2478
2479 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2480 unsigned int irq)
2481 {
2482 if (irq)
2483 free_irq(brd->irq, brd);
2484 if (pdev != NULL) { /* PCI */
2485 #ifdef CONFIG_PCI
2486 pci_release_region(pdev, 2);
2487 pci_release_region(pdev, 3);
2488 #endif
2489 } else {
2490 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2491 release_region(brd->vector, 1);
2492 }
2493 }
2494
2495 static int __devinit mxser_initbrd(struct mxser_board *brd,
2496 struct pci_dev *pdev)
2497 {
2498 struct mxser_port *info;
2499 unsigned int i;
2500 int retval;
2501
2502 printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
2503
2504 for (i = 0; i < brd->info->nports; i++) {
2505 info = &brd->ports[i];
2506 tty_port_init(&info->port);
2507 info->board = brd;
2508 info->stop_rx = 0;
2509 info->ldisc_stop_rx = 0;
2510
2511 /* Enhance mode enabled here */
2512 if (brd->chip_flag != MOXA_OTHER_UART)
2513 mxser_enable_must_enchance_mode(info->ioaddr);
2514
2515 info->port.flags = ASYNC_SHARE_IRQ;
2516 info->type = brd->uart_type;
2517
2518 process_txrx_fifo(info);
2519
2520 info->custom_divisor = info->baud_base * 16;
2521 info->port.close_delay = 5 * HZ / 10;
2522 info->port.closing_wait = 30 * HZ;
2523 info->normal_termios = mxvar_sdriver->init_termios;
2524 init_waitqueue_head(&info->delta_msr_wait);
2525 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2526 info->err_shadow = 0;
2527 spin_lock_init(&info->slock);
2528
2529 /* before set INT ISR, disable all int */
2530 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2531 info->ioaddr + UART_IER);
2532 }
2533
2534 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2535 brd);
2536 if (retval) {
2537 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2538 "conflict with another device.\n",
2539 brd->info->name, brd->irq);
2540 /* We hold resources, we need to release them. */
2541 mxser_release_res(brd, pdev, 0);
2542 }
2543 return retval;
2544 }
2545
2546 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2547 {
2548 int id, i, bits;
2549 unsigned short regs[16], irq;
2550 unsigned char scratch, scratch2;
2551
2552 brd->chip_flag = MOXA_OTHER_UART;
2553
2554 id = mxser_read_register(cap, regs);
2555 switch (id) {
2556 case C168_ASIC_ID:
2557 brd->info = &mxser_cards[0];
2558 break;
2559 case C104_ASIC_ID:
2560 brd->info = &mxser_cards[1];
2561 break;
2562 case CI104J_ASIC_ID:
2563 brd->info = &mxser_cards[2];
2564 break;
2565 case C102_ASIC_ID:
2566 brd->info = &mxser_cards[5];
2567 break;
2568 case CI132_ASIC_ID:
2569 brd->info = &mxser_cards[6];
2570 break;
2571 case CI134_ASIC_ID:
2572 brd->info = &mxser_cards[7];
2573 break;
2574 default:
2575 return 0;
2576 }
2577
2578 irq = 0;
2579 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2580 Flag-hack checks if configuration should be read as 2-port here. */
2581 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2582 irq = regs[9] & 0xF000;
2583 irq = irq | (irq >> 4);
2584 if (irq != (regs[9] & 0xFF00))
2585 return MXSER_ERR_IRQ_CONFLIT;
2586 } else if (brd->info->nports == 4) {
2587 irq = regs[9] & 0xF000;
2588 irq = irq | (irq >> 4);
2589 irq = irq | (irq >> 8);
2590 if (irq != regs[9])
2591 return MXSER_ERR_IRQ_CONFLIT;
2592 } else if (brd->info->nports == 8) {
2593 irq = regs[9] & 0xF000;
2594 irq = irq | (irq >> 4);
2595 irq = irq | (irq >> 8);
2596 if ((irq != regs[9]) || (irq != regs[10]))
2597 return MXSER_ERR_IRQ_CONFLIT;
2598 }
2599
2600 if (!irq)
2601 return MXSER_ERR_IRQ;
2602 brd->irq = ((int)(irq & 0xF000) >> 12);
2603 for (i = 0; i < 8; i++)
2604 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2605 if ((regs[12] & 0x80) == 0)
2606 return MXSER_ERR_VECTOR;
2607 brd->vector = (int)regs[11]; /* interrupt vector */
2608 if (id == 1)
2609 brd->vector_mask = 0x00FF;
2610 else
2611 brd->vector_mask = 0x000F;
2612 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2613 if (regs[12] & bits) {
2614 brd->ports[i].baud_base = 921600;
2615 brd->ports[i].max_baud = 921600;
2616 } else {
2617 brd->ports[i].baud_base = 115200;
2618 brd->ports[i].max_baud = 115200;
2619 }
2620 }
2621 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2622 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2623 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2624 outb(scratch2, cap + UART_LCR);
2625 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2626 scratch = inb(cap + UART_IIR);
2627
2628 if (scratch & 0xC0)
2629 brd->uart_type = PORT_16550A;
2630 else
2631 brd->uart_type = PORT_16450;
2632 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2633 "mxser(IO)"))
2634 return MXSER_ERR_IOADDR;
2635 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2636 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2637 return MXSER_ERR_VECTOR;
2638 }
2639 return brd->info->nports;
2640 }
2641
2642 static int __devinit mxser_probe(struct pci_dev *pdev,
2643 const struct pci_device_id *ent)
2644 {
2645 #ifdef CONFIG_PCI
2646 struct mxser_board *brd;
2647 unsigned int i, j;
2648 unsigned long ioaddress;
2649 int retval = -EINVAL;
2650
2651 for (i = 0; i < MXSER_BOARDS; i++)
2652 if (mxser_boards[i].info == NULL)
2653 break;
2654
2655 if (i >= MXSER_BOARDS) {
2656 printk(KERN_ERR "Too many Smartio/Industio family boards found "
2657 "(maximum %d), board not configured\n", MXSER_BOARDS);
2658 goto err;
2659 }
2660
2661 brd = &mxser_boards[i];
2662 brd->idx = i * MXSER_PORTS_PER_BOARD;
2663 printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2664 mxser_cards[ent->driver_data].name,
2665 pdev->bus->number, PCI_SLOT(pdev->devfn));
2666
2667 retval = pci_enable_device(pdev);
2668 if (retval) {
2669 printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
2670 goto err;
2671 }
2672
2673 /* io address */
2674 ioaddress = pci_resource_start(pdev, 2);
2675 retval = pci_request_region(pdev, 2, "mxser(IO)");
2676 if (retval)
2677 goto err;
2678
2679 brd->info = &mxser_cards[ent->driver_data];
2680 for (i = 0; i < brd->info->nports; i++)
2681 brd->ports[i].ioaddr = ioaddress + 8 * i;
2682
2683 /* vector */
2684 ioaddress = pci_resource_start(pdev, 3);
2685 retval = pci_request_region(pdev, 3, "mxser(vector)");
2686 if (retval)
2687 goto err_relio;
2688 brd->vector = ioaddress;
2689
2690 /* irq */
2691 brd->irq = pdev->irq;
2692
2693 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2694 brd->uart_type = PORT_16550A;
2695 brd->vector_mask = 0;
2696
2697 for (i = 0; i < brd->info->nports; i++) {
2698 for (j = 0; j < UART_INFO_NUM; j++) {
2699 if (Gpci_uart_info[j].type == brd->chip_flag) {
2700 brd->ports[i].max_baud =
2701 Gpci_uart_info[j].max_baud;
2702
2703 /* exception....CP-102 */
2704 if (brd->info->flags & MXSER_HIGHBAUD)
2705 brd->ports[i].max_baud = 921600;
2706 break;
2707 }
2708 }
2709 }
2710
2711 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2712 for (i = 0; i < brd->info->nports; i++) {
2713 if (i < 4)
2714 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2715 else
2716 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2717 }
2718 outb(0, ioaddress + 4); /* default set to RS232 mode */
2719 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2720 }
2721
2722 for (i = 0; i < brd->info->nports; i++) {
2723 brd->vector_mask |= (1 << i);
2724 brd->ports[i].baud_base = 921600;
2725 }
2726
2727 /* mxser_initbrd will hook ISR. */
2728 retval = mxser_initbrd(brd, pdev);
2729 if (retval)
2730 goto err_null;
2731
2732 for (i = 0; i < brd->info->nports; i++)
2733 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2734
2735 pci_set_drvdata(pdev, brd);
2736
2737 return 0;
2738 err_relio:
2739 pci_release_region(pdev, 2);
2740 err_null:
2741 brd->info = NULL;
2742 err:
2743 return retval;
2744 #else
2745 return -ENODEV;
2746 #endif
2747 }
2748
2749 static void __devexit mxser_remove(struct pci_dev *pdev)
2750 {
2751 struct mxser_board *brd = pci_get_drvdata(pdev);
2752 unsigned int i;
2753
2754 for (i = 0; i < brd->info->nports; i++)
2755 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2756
2757 mxser_release_res(brd, pdev, 1);
2758 brd->info = NULL;
2759 }
2760
2761 static struct pci_driver mxser_driver = {
2762 .name = "mxser",
2763 .id_table = mxser_pcibrds,
2764 .probe = mxser_probe,
2765 .remove = __devexit_p(mxser_remove)
2766 };
2767
2768 static int __init mxser_module_init(void)
2769 {
2770 struct mxser_board *brd;
2771 unsigned long cap;
2772 unsigned int i, m, isaloop;
2773 int retval, b;
2774
2775 pr_debug("Loading module mxser ...\n");
2776
2777 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2778 if (!mxvar_sdriver)
2779 return -ENOMEM;
2780
2781 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2782 MXSER_VERSION);
2783
2784 /* Initialize the tty_driver structure */
2785 mxvar_sdriver->owner = THIS_MODULE;
2786 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2787 mxvar_sdriver->name = "ttyMI";
2788 mxvar_sdriver->major = ttymajor;
2789 mxvar_sdriver->minor_start = 0;
2790 mxvar_sdriver->num = MXSER_PORTS + 1;
2791 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2792 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2793 mxvar_sdriver->init_termios = tty_std_termios;
2794 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2795 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2796 tty_set_operations(mxvar_sdriver, &mxser_ops);
2797
2798 retval = tty_register_driver(mxvar_sdriver);
2799 if (retval) {
2800 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2801 "tty driver !\n");
2802 goto err_put;
2803 }
2804
2805 mxvar_diagflag = 0;
2806
2807 m = 0;
2808 /* Start finding ISA boards here */
2809 for (isaloop = 0; isaloop < 2; isaloop++)
2810 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2811 if (!isaloop)
2812 cap = mxserBoardCAP[b]; /* predefined */
2813 else
2814 cap = ioaddr[b]; /* module param */
2815
2816 if (!cap)
2817 continue;
2818
2819 brd = &mxser_boards[m];
2820 retval = mxser_get_ISA_conf(cap, brd);
2821
2822 if (retval != 0)
2823 printk(KERN_INFO "Found MOXA %s board "
2824 "(CAP=0x%x)\n",
2825 brd->info->name, ioaddr[b]);
2826
2827 if (retval <= 0) {
2828 if (retval == MXSER_ERR_IRQ)
2829 printk(KERN_ERR "Invalid interrupt "
2830 "number, board not "
2831 "configured\n");
2832 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2833 printk(KERN_ERR "Invalid interrupt "
2834 "number, board not "
2835 "configured\n");
2836 else if (retval == MXSER_ERR_VECTOR)
2837 printk(KERN_ERR "Invalid interrupt "
2838 "vector, board not "
2839 "configured\n");
2840 else if (retval == MXSER_ERR_IOADDR)
2841 printk(KERN_ERR "Invalid I/O address, "
2842 "board not configured\n");
2843
2844 brd->info = NULL;
2845 continue;
2846 }
2847
2848 /* mxser_initbrd will hook ISR. */
2849 if (mxser_initbrd(brd, NULL) < 0) {
2850 brd->info = NULL;
2851 continue;
2852 }
2853
2854 brd->idx = m * MXSER_PORTS_PER_BOARD;
2855 for (i = 0; i < brd->info->nports; i++)
2856 tty_register_device(mxvar_sdriver, brd->idx + i,
2857 NULL);
2858
2859 m++;
2860 }
2861
2862 retval = pci_register_driver(&mxser_driver);
2863 if (retval) {
2864 printk(KERN_ERR "Can't register pci driver\n");
2865 if (!m) {
2866 retval = -ENODEV;
2867 goto err_unr;
2868 } /* else: we have some ISA cards under control */
2869 }
2870
2871 pr_debug("Done.\n");
2872
2873 return 0;
2874 err_unr:
2875 tty_unregister_driver(mxvar_sdriver);
2876 err_put:
2877 put_tty_driver(mxvar_sdriver);
2878 return retval;
2879 }
2880
2881 static void __exit mxser_module_exit(void)
2882 {
2883 unsigned int i, j;
2884
2885 pr_debug("Unloading module mxser ...\n");
2886
2887 pci_unregister_driver(&mxser_driver);
2888
2889 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2890 if (mxser_boards[i].info != NULL)
2891 for (j = 0; j < mxser_boards[i].info->nports; j++)
2892 tty_unregister_device(mxvar_sdriver,
2893 mxser_boards[i].idx + j);
2894 tty_unregister_driver(mxvar_sdriver);
2895 put_tty_driver(mxvar_sdriver);
2896
2897 for (i = 0; i < MXSER_BOARDS; i++)
2898 if (mxser_boards[i].info != NULL)
2899 mxser_release_res(&mxser_boards[i], NULL, 1);
2900
2901 pr_debug("Done.\n");
2902 }
2903
2904 module_init(mxser_module_init);
2905 module_exit(mxser_module_exit);
Linux 2.6 libata-dev (mirror)