2 * OMAP2/3/4 powerdomain control
4 * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
5 * Copyright (C) 2007-2011 Nokia Corporation
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * XXX This should be moved to the mach-omap2/ directory at the earliest
17 #ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
18 #define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
20 #include <linux/types.h>
21 #include <linux/list.h>
22 #include <linux/spinlock.h>
26 /* Powerdomain basic power states */
27 #define PWRDM_POWER_OFF 0x0
28 #define PWRDM_POWER_RET 0x1
29 #define PWRDM_POWER_INACTIVE 0x2
30 #define PWRDM_POWER_ON 0x3
32 #define PWRDM_MAX_PWRSTS 4
34 /* Powerdomain allowable state bitfields */
35 #define PWRSTS_ON (1 << PWRDM_POWER_ON)
36 #define PWRSTS_INACTIVE (1 << PWRDM_POWER_INACTIVE)
37 #define PWRSTS_RET (1 << PWRDM_POWER_RET)
38 #define PWRSTS_OFF (1 << PWRDM_POWER_OFF)
40 #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON)
41 #define PWRSTS_OFF_RET (PWRSTS_OFF | PWRSTS_RET)
42 #define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON)
43 #define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | PWRSTS_ON)
46 /* Powerdomain flags */
47 #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */
48 #define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits
49 * in MEM bank 1 position. This is
52 #define PWRDM_HAS_LOWPOWERSTATECHANGE (1 << 2) /*
53 * support to transition from a
54 * sleep state to a lower sleep
55 * state without waking up the
60 * Number of memory banks that are power-controllable. On OMAP4430, the
63 #define PWRDM_MAX_MEM_BANKS 5
66 * Maximum number of clockdomains that can be associated with a powerdomain.
67 * PER powerdomain on AM33XX is the worst case
69 #define PWRDM_MAX_CLKDMS 11
71 /* XXX A completely arbitrary number. What is reasonable here? */
72 #define PWRDM_TRANSITION_BAILOUT 100000
78 * struct powerdomain - OMAP powerdomain
79 * @name: Powerdomain name
80 * @voltdm: voltagedomain containing this powerdomain
81 * @prcm_offs: the address offset from CM_BASE/PRM_BASE
82 * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
83 * @pwrsts: Possible powerdomain power states
84 * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
85 * @flags: Powerdomain flags
86 * @banks: Number of software-controllable memory banks in this powerdomain
87 * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
88 * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
89 * @pwrdm_clkdms: Clockdomains in this powerdomain
90 * @node: list_head linking all powerdomains
91 * @voltdm_node: list_head linking all powerdomains in a voltagedomain
92 * @pwrstctrl_offs: (AM33XX only) XXX_PWRSTCTRL reg offset from prcm_offs
93 * @pwrstst_offs: (AM33XX only) XXX_PWRSTST reg offset from prcm_offs
94 * @logicretstate_mask: (AM33XX only) mask for logic retention bitfield
96 * @mem_on_mask: (AM33XX only) mask for mem on bitfield in @pwrstctrl_offs
97 * @mem_ret_mask: (AM33XX only) mask for mem ret bitfield in @pwrstctrl_offs
98 * @mem_pwrst_mask: (AM33XX only) mask for mem state bitfield in @pwrstst_offs
99 * @mem_retst_mask: (AM33XX only) mask for mem retention state bitfield
105 * @_lock: spinlock used to serialize powerdomain and some clockdomain ops
106 * @_lock_flags: stored flags when @_lock is taken
108 * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
114 struct voltagedomain
*ptr
;
118 const u8 pwrsts_logic_ret
;
121 const u8 pwrsts_mem_ret
[PWRDM_MAX_MEM_BANKS
];
122 const u8 pwrsts_mem_on
[PWRDM_MAX_MEM_BANKS
];
123 const u8 prcm_partition
;
124 struct clockdomain
*pwrdm_clkdms
[PWRDM_MAX_CLKDMS
];
125 struct list_head node
;
126 struct list_head voltdm_node
;
128 unsigned state_counter
[PWRDM_MAX_PWRSTS
];
129 unsigned ret_logic_off_counter
;
130 unsigned ret_mem_off_counter
[PWRDM_MAX_MEM_BANKS
];
132 unsigned long _lock_flags
;
133 const u8 pwrstctrl_offs
;
134 const u8 pwrstst_offs
;
135 const u32 logicretstate_mask
;
136 const u32 mem_on_mask
[PWRDM_MAX_MEM_BANKS
];
137 const u32 mem_ret_mask
[PWRDM_MAX_MEM_BANKS
];
138 const u32 mem_pwrst_mask
[PWRDM_MAX_MEM_BANKS
];
139 const u32 mem_retst_mask
[PWRDM_MAX_MEM_BANKS
];
141 #ifdef CONFIG_PM_DEBUG
143 s64 state_timer
[PWRDM_MAX_PWRSTS
];
148 * struct pwrdm_ops - Arch specific function implementations
149 * @pwrdm_set_next_pwrst: Set the target power state for a pd
150 * @pwrdm_read_next_pwrst: Read the target power state set for a pd
151 * @pwrdm_read_pwrst: Read the current power state of a pd
152 * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
153 * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
154 * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
155 * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
156 * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
157 * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
158 * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
159 * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
160 * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
161 * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
162 * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
163 * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
164 * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
165 * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
166 * @pwrdm_wait_transition: Wait for a pd state transition to complete
168 * Regarding @pwrdm_set_lowpwrstchange: On the OMAP2 and 3-family
169 * chips, a powerdomain's power state is not allowed to directly
170 * transition from one low-power state (e.g., CSWR) to another
171 * low-power state (e.g., OFF) without first waking up the
172 * powerdomain. This wastes energy. So OMAP4 chips support the
173 * ability to transition a powerdomain power state directly from one
174 * low-power state to another. The function pointed to by
175 * @pwrdm_set_lowpwrstchange is intended to configure the OMAP4
176 * hardware powerdomain state machine to enable this feature.
179 int (*pwrdm_set_next_pwrst
)(struct powerdomain
*pwrdm
, u8 pwrst
);
180 int (*pwrdm_read_next_pwrst
)(struct powerdomain
*pwrdm
);
181 int (*pwrdm_read_pwrst
)(struct powerdomain
*pwrdm
);
182 int (*pwrdm_read_prev_pwrst
)(struct powerdomain
*pwrdm
);
183 int (*pwrdm_set_logic_retst
)(struct powerdomain
*pwrdm
, u8 pwrst
);
184 int (*pwrdm_set_mem_onst
)(struct powerdomain
*pwrdm
, u8 bank
, u8 pwrst
);
185 int (*pwrdm_set_mem_retst
)(struct powerdomain
*pwrdm
, u8 bank
, u8 pwrst
);
186 int (*pwrdm_read_logic_pwrst
)(struct powerdomain
*pwrdm
);
187 int (*pwrdm_read_prev_logic_pwrst
)(struct powerdomain
*pwrdm
);
188 int (*pwrdm_read_logic_retst
)(struct powerdomain
*pwrdm
);
189 int (*pwrdm_read_mem_pwrst
)(struct powerdomain
*pwrdm
, u8 bank
);
190 int (*pwrdm_read_prev_mem_pwrst
)(struct powerdomain
*pwrdm
, u8 bank
);
191 int (*pwrdm_read_mem_retst
)(struct powerdomain
*pwrdm
, u8 bank
);
192 int (*pwrdm_clear_all_prev_pwrst
)(struct powerdomain
*pwrdm
);
193 int (*pwrdm_enable_hdwr_sar
)(struct powerdomain
*pwrdm
);
194 int (*pwrdm_disable_hdwr_sar
)(struct powerdomain
*pwrdm
);
195 int (*pwrdm_set_lowpwrstchange
)(struct powerdomain
*pwrdm
);
196 int (*pwrdm_wait_transition
)(struct powerdomain
*pwrdm
);
199 int pwrdm_register_platform_funcs(struct pwrdm_ops
*custom_funcs
);
200 int pwrdm_register_pwrdms(struct powerdomain
**pwrdm_list
);
201 int pwrdm_complete_init(void);
203 struct powerdomain
*pwrdm_lookup(const char *name
);
205 int pwrdm_for_each(int (*fn
)(struct powerdomain
*pwrdm
, void *user
),
207 int pwrdm_for_each_nolock(int (*fn
)(struct powerdomain
*pwrdm
, void *user
),
210 int pwrdm_add_clkdm(struct powerdomain
*pwrdm
, struct clockdomain
*clkdm
);
211 int pwrdm_del_clkdm(struct powerdomain
*pwrdm
, struct clockdomain
*clkdm
);
212 int pwrdm_for_each_clkdm(struct powerdomain
*pwrdm
,
213 int (*fn
)(struct powerdomain
*pwrdm
,
214 struct clockdomain
*clkdm
));
215 struct voltagedomain
*pwrdm_get_voltdm(struct powerdomain
*pwrdm
);
217 int pwrdm_get_mem_bank_count(struct powerdomain
*pwrdm
);
219 int pwrdm_set_next_pwrst(struct powerdomain
*pwrdm
, u8 pwrst
);
220 int pwrdm_read_next_pwrst(struct powerdomain
*pwrdm
);
221 int pwrdm_read_pwrst(struct powerdomain
*pwrdm
);
222 int pwrdm_read_prev_pwrst(struct powerdomain
*pwrdm
);
223 int pwrdm_clear_all_prev_pwrst(struct powerdomain
*pwrdm
);
225 int pwrdm_set_logic_retst(struct powerdomain
*pwrdm
, u8 pwrst
);
226 int pwrdm_set_mem_onst(struct powerdomain
*pwrdm
, u8 bank
, u8 pwrst
);
227 int pwrdm_set_mem_retst(struct powerdomain
*pwrdm
, u8 bank
, u8 pwrst
);
229 int pwrdm_read_logic_pwrst(struct powerdomain
*pwrdm
);
230 int pwrdm_read_prev_logic_pwrst(struct powerdomain
*pwrdm
);
231 int pwrdm_read_logic_retst(struct powerdomain
*pwrdm
);
232 int pwrdm_read_mem_pwrst(struct powerdomain
*pwrdm
, u8 bank
);
233 int pwrdm_read_prev_mem_pwrst(struct powerdomain
*pwrdm
, u8 bank
);
234 int pwrdm_read_mem_retst(struct powerdomain
*pwrdm
, u8 bank
);
236 int pwrdm_enable_hdwr_sar(struct powerdomain
*pwrdm
);
237 int pwrdm_disable_hdwr_sar(struct powerdomain
*pwrdm
);
238 bool pwrdm_has_hdwr_sar(struct powerdomain
*pwrdm
);
240 int pwrdm_state_switch_nolock(struct powerdomain
*pwrdm
);
241 int pwrdm_state_switch(struct powerdomain
*pwrdm
);
242 int pwrdm_pre_transition(struct powerdomain
*pwrdm
);
243 int pwrdm_post_transition(struct powerdomain
*pwrdm
);
244 int pwrdm_get_context_loss_count(struct powerdomain
*pwrdm
);
245 bool pwrdm_can_ever_lose_context(struct powerdomain
*pwrdm
);
247 extern int omap_set_pwrdm_state(struct powerdomain
*pwrdm
, u8 state
);
249 extern void omap242x_powerdomains_init(void);
250 extern void omap243x_powerdomains_init(void);
251 extern void omap3xxx_powerdomains_init(void);
252 extern void am33xx_powerdomains_init(void);
253 extern void omap44xx_powerdomains_init(void);
255 extern struct pwrdm_ops omap2_pwrdm_operations
;
256 extern struct pwrdm_ops omap3_pwrdm_operations
;
257 extern struct pwrdm_ops am33xx_pwrdm_operations
;
258 extern struct pwrdm_ops omap4_pwrdm_operations
;
260 /* Common Internal functions used across OMAP rev's */
261 extern u32
omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank
);
262 extern u32
omap2_pwrdm_get_mem_bank_retst_mask(u8 bank
);
263 extern u32
omap2_pwrdm_get_mem_bank_stst_mask(u8 bank
);
265 extern struct powerdomain wkup_omap2_pwrdm
;
266 extern struct powerdomain gfx_omap2_pwrdm
;
268 extern void pwrdm_lock(struct powerdomain
*pwrdm
);
269 extern void pwrdm_unlock(struct powerdomain
*pwrdm
);