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[PATCH] e1000: Fix TX timeout logic
[linux-2.6/libata-dev.git] / drivers / net / e1000 / e1000_main.c
blobd2e77ee103bb3ebc89852ebd1ec13757adf15ab6
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 /* Change Log
32 * 6.0.58 4/20/05
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
34 * 6.0.44+ 2/15/05
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
37 */
38
39 char e1000_driver_name[] = "e1000";
40 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
41 #ifndef CONFIG_E1000_NAPI
42 #define DRIVERNAPI
43 #else
44 #define DRIVERNAPI "-NAPI"
45 #endif
46 #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
47 char e1000_driver_version[] = DRV_VERSION;
48 static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
49
50 /* e1000_pci_tbl - PCI Device ID Table
51 *
52 * Last entry must be all 0s
53 *
54 * Macro expands to...
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56 */
57 static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
83 INTEL_E1000_ETHERNET_DEVICE(0x105E),
84 INTEL_E1000_ETHERNET_DEVICE(0x105F),
85 INTEL_E1000_ETHERNET_DEVICE(0x1060),
86 INTEL_E1000_ETHERNET_DEVICE(0x1075),
87 INTEL_E1000_ETHERNET_DEVICE(0x1076),
88 INTEL_E1000_ETHERNET_DEVICE(0x1077),
89 INTEL_E1000_ETHERNET_DEVICE(0x1078),
90 INTEL_E1000_ETHERNET_DEVICE(0x1079),
91 INTEL_E1000_ETHERNET_DEVICE(0x107A),
92 INTEL_E1000_ETHERNET_DEVICE(0x107B),
93 INTEL_E1000_ETHERNET_DEVICE(0x107C),
94 INTEL_E1000_ETHERNET_DEVICE(0x107D),
95 INTEL_E1000_ETHERNET_DEVICE(0x107E),
96 INTEL_E1000_ETHERNET_DEVICE(0x107F),
97 INTEL_E1000_ETHERNET_DEVICE(0x108A),
98 INTEL_E1000_ETHERNET_DEVICE(0x108B),
99 INTEL_E1000_ETHERNET_DEVICE(0x108C),
100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
101 /* required last entry */
102 {0,}
103 };
104
105 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
106
107 int e1000_up(struct e1000_adapter *adapter);
108 void e1000_down(struct e1000_adapter *adapter);
109 void e1000_reset(struct e1000_adapter *adapter);
110 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
111 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
112 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
113 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
114 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
115 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
116 struct e1000_tx_ring *txdr);
117 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
118 struct e1000_rx_ring *rxdr);
119 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
120 struct e1000_tx_ring *tx_ring);
121 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
122 struct e1000_rx_ring *rx_ring);
123 void e1000_update_stats(struct e1000_adapter *adapter);
124
125 /* Local Function Prototypes */
126
127 static int e1000_init_module(void);
128 static void e1000_exit_module(void);
129 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
130 static void __devexit e1000_remove(struct pci_dev *pdev);
131 static int e1000_alloc_queues(struct e1000_adapter *adapter);
132 #ifdef CONFIG_E1000_MQ
133 static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
134 #endif
135 static int e1000_sw_init(struct e1000_adapter *adapter);
136 static int e1000_open(struct net_device *netdev);
137 static int e1000_close(struct net_device *netdev);
138 static void e1000_configure_tx(struct e1000_adapter *adapter);
139 static void e1000_configure_rx(struct e1000_adapter *adapter);
140 static void e1000_setup_rctl(struct e1000_adapter *adapter);
141 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
142 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
143 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
144 struct e1000_tx_ring *tx_ring);
145 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
146 struct e1000_rx_ring *rx_ring);
147 static void e1000_set_multi(struct net_device *netdev);
148 static void e1000_update_phy_info(unsigned long data);
149 static void e1000_watchdog(unsigned long data);
150 static void e1000_watchdog_task(struct e1000_adapter *adapter);
151 static void e1000_82547_tx_fifo_stall(unsigned long data);
152 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155 static int e1000_set_mac(struct net_device *netdev, void *p);
156 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
157 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
159 #ifdef CONFIG_E1000_NAPI
160 static int e1000_clean(struct net_device *poll_dev, int *budget);
161 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
162 struct e1000_rx_ring *rx_ring,
163 int *work_done, int work_to_do);
164 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
165 struct e1000_rx_ring *rx_ring,
166 int *work_done, int work_to_do);
167 #else
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172 #endif
173 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring);
175 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
178 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
179 int cmd);
180 void e1000_set_ethtool_ops(struct net_device *netdev);
181 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
182 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
183 static void e1000_tx_timeout(struct net_device *dev);
184 static void e1000_tx_timeout_task(struct net_device *dev);
185 static void e1000_smartspeed(struct e1000_adapter *adapter);
186 static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
187 struct sk_buff *skb);
188
189 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
190 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
191 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
192 static void e1000_restore_vlan(struct e1000_adapter *adapter);
193
194 #ifdef CONFIG_PM
195 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
196 static int e1000_resume(struct pci_dev *pdev);
197 #endif
198
199 #ifdef CONFIG_NET_POLL_CONTROLLER
200 /* for netdump / net console */
201 static void e1000_netpoll (struct net_device *netdev);
202 #endif
203
204 #ifdef CONFIG_E1000_MQ
205 /* for multiple Rx queues */
206 void e1000_rx_schedule(void *data);
207 #endif
208
209 /* Exported from other modules */
210
211 extern void e1000_check_options(struct e1000_adapter *adapter);
212
213 static struct pci_driver e1000_driver = {
214 .name = e1000_driver_name,
215 .id_table = e1000_pci_tbl,
216 .probe = e1000_probe,
217 .remove = __devexit_p(e1000_remove),
218 /* Power Managment Hooks */
219 #ifdef CONFIG_PM
220 .suspend = e1000_suspend,
221 .resume = e1000_resume
222 #endif
223 };
224
225 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
226 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
227 MODULE_LICENSE("GPL");
228 MODULE_VERSION(DRV_VERSION);
229
230 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
231 module_param(debug, int, 0);
232 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
233
234 /**
235 * e1000_init_module - Driver Registration Routine
236 *
237 * e1000_init_module is the first routine called when the driver is
238 * loaded. All it does is register with the PCI subsystem.
239 **/
240
241 static int __init
242 e1000_init_module(void)
243 {
244 int ret;
245 printk(KERN_INFO "%s - version %s\n",
246 e1000_driver_string, e1000_driver_version);
247
248 printk(KERN_INFO "%s\n", e1000_copyright);
249
250 ret = pci_module_init(&e1000_driver);
251
252 return ret;
253 }
254
255 module_init(e1000_init_module);
256
257 /**
258 * e1000_exit_module - Driver Exit Cleanup Routine
259 *
260 * e1000_exit_module is called just before the driver is removed
261 * from memory.
262 **/
263
264 static void __exit
265 e1000_exit_module(void)
266 {
267 pci_unregister_driver(&e1000_driver);
268 }
269
270 module_exit(e1000_exit_module);
271
272 /**
273 * e1000_irq_disable - Mask off interrupt generation on the NIC
274 * @adapter: board private structure
275 **/
276
277 static inline void
278 e1000_irq_disable(struct e1000_adapter *adapter)
279 {
280 atomic_inc(&adapter->irq_sem);
281 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
282 E1000_WRITE_FLUSH(&adapter->hw);
283 synchronize_irq(adapter->pdev->irq);
284 }
285
286 /**
287 * e1000_irq_enable - Enable default interrupt generation settings
288 * @adapter: board private structure
289 **/
290
291 static inline void
292 e1000_irq_enable(struct e1000_adapter *adapter)
293 {
294 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
295 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
296 E1000_WRITE_FLUSH(&adapter->hw);
297 }
298 }
299
300 static void
301 e1000_update_mng_vlan(struct e1000_adapter *adapter)
302 {
303 struct net_device *netdev = adapter->netdev;
304 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
305 uint16_t old_vid = adapter->mng_vlan_id;
306 if(adapter->vlgrp) {
307 if(!adapter->vlgrp->vlan_devices[vid]) {
308 if(adapter->hw.mng_cookie.status &
309 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
310 e1000_vlan_rx_add_vid(netdev, vid);
311 adapter->mng_vlan_id = vid;
312 } else
313 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
314
315 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
316 (vid != old_vid) &&
317 !adapter->vlgrp->vlan_devices[old_vid])
318 e1000_vlan_rx_kill_vid(netdev, old_vid);
319 }
320 }
321 }
322
323 /**
324 * e1000_release_hw_control - release control of the h/w to f/w
325 * @adapter: address of board private structure
326 *
327 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
328 * For ASF and Pass Through versions of f/w this means that the
329 * driver is no longer loaded. For AMT version (only with 82573) i
330 * of the f/w this means that the netowrk i/f is closed.
331 *
332 **/
333
334 static inline void
335 e1000_release_hw_control(struct e1000_adapter *adapter)
336 {
337 uint32_t ctrl_ext;
338 uint32_t swsm;
339
340 /* Let firmware taken over control of h/w */
341 switch (adapter->hw.mac_type) {
342 case e1000_82571:
343 case e1000_82572:
344 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
345 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
346 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
347 break;
348 case e1000_82573:
349 swsm = E1000_READ_REG(&adapter->hw, SWSM);
350 E1000_WRITE_REG(&adapter->hw, SWSM,
351 swsm & ~E1000_SWSM_DRV_LOAD);
352 default:
353 break;
354 }
355 }
356
357 /**
358 * e1000_get_hw_control - get control of the h/w from f/w
359 * @adapter: address of board private structure
360 *
361 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
362 * For ASF and Pass Through versions of f/w this means that
363 * the driver is loaded. For AMT version (only with 82573)
364 * of the f/w this means that the netowrk i/f is open.
365 *
366 **/
367
368 static inline void
369 e1000_get_hw_control(struct e1000_adapter *adapter)
370 {
371 uint32_t ctrl_ext;
372 uint32_t swsm;
373 /* Let firmware know the driver has taken over */
374 switch (adapter->hw.mac_type) {
375 case e1000_82571:
376 case e1000_82572:
377 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
378 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
379 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
380 break;
381 case e1000_82573:
382 swsm = E1000_READ_REG(&adapter->hw, SWSM);
383 E1000_WRITE_REG(&adapter->hw, SWSM,
384 swsm | E1000_SWSM_DRV_LOAD);
385 break;
386 default:
387 break;
388 }
389 }
390
391 int
392 e1000_up(struct e1000_adapter *adapter)
393 {
394 struct net_device *netdev = adapter->netdev;
395 int i, err;
396
397 /* hardware has been reset, we need to reload some things */
398
399 /* Reset the PHY if it was previously powered down */
400 if(adapter->hw.media_type == e1000_media_type_copper) {
401 uint16_t mii_reg;
402 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
403 if(mii_reg & MII_CR_POWER_DOWN)
404 e1000_phy_reset(&adapter->hw);
405 }
406
407 e1000_set_multi(netdev);
408
409 e1000_restore_vlan(adapter);
410
411 e1000_configure_tx(adapter);
412 e1000_setup_rctl(adapter);
413 e1000_configure_rx(adapter);
414 for (i = 0; i < adapter->num_rx_queues; i++) {
415 adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
416 }
417
418 #ifdef CONFIG_PCI_MSI
419 if(adapter->hw.mac_type > e1000_82547_rev_2) {
420 adapter->have_msi = TRUE;
421 if((err = pci_enable_msi(adapter->pdev))) {
422 DPRINTK(PROBE, ERR,
423 "Unable to allocate MSI interrupt Error: %d\n", err);
424 adapter->have_msi = FALSE;
425 }
426 }
427 #endif
428 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
429 SA_SHIRQ | SA_SAMPLE_RANDOM,
430 netdev->name, netdev))) {
431 DPRINTK(PROBE, ERR,
432 "Unable to allocate interrupt Error: %d\n", err);
433 return err;
434 }
435
436 #ifdef CONFIG_E1000_MQ
437 e1000_setup_queue_mapping(adapter);
438 #endif
439
440 adapter->tx_queue_len = netdev->tx_queue_len;
441
442 mod_timer(&adapter->watchdog_timer, jiffies);
443
444 #ifdef CONFIG_E1000_NAPI
445 netif_poll_enable(netdev);
446 #endif
447 e1000_irq_enable(adapter);
448
449 return 0;
450 }
451
452 void
453 e1000_down(struct e1000_adapter *adapter)
454 {
455 struct net_device *netdev = adapter->netdev;
456 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
457 e1000_check_mng_mode(&adapter->hw);
458
459 e1000_irq_disable(adapter);
460 #ifdef CONFIG_E1000_MQ
461 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
462 #endif
463 free_irq(adapter->pdev->irq, netdev);
464 #ifdef CONFIG_PCI_MSI
465 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
466 adapter->have_msi == TRUE)
467 pci_disable_msi(adapter->pdev);
468 #endif
469 del_timer_sync(&adapter->tx_fifo_stall_timer);
470 del_timer_sync(&adapter->watchdog_timer);
471 del_timer_sync(&adapter->phy_info_timer);
472
473 #ifdef CONFIG_E1000_NAPI
474 netif_poll_disable(netdev);
475 #endif
476 netdev->tx_queue_len = adapter->tx_queue_len;
477 adapter->link_speed = 0;
478 adapter->link_duplex = 0;
479 netif_carrier_off(netdev);
480 netif_stop_queue(netdev);
481
482 e1000_reset(adapter);
483 e1000_clean_all_tx_rings(adapter);
484 e1000_clean_all_rx_rings(adapter);
485
486 /* Power down the PHY so no link is implied when interface is down *
487 * The PHY cannot be powered down if any of the following is TRUE *
488 * (a) WoL is enabled
489 * (b) AMT is active
490 * (c) SoL/IDER session is active */
491 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
492 adapter->hw.media_type == e1000_media_type_copper &&
493 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
494 !mng_mode_enabled &&
495 !e1000_check_phy_reset_block(&adapter->hw)) {
496 uint16_t mii_reg;
497 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
498 mii_reg |= MII_CR_POWER_DOWN;
499 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
500 mdelay(1);
501 }
502 }
503
504 void
505 e1000_reset(struct e1000_adapter *adapter)
506 {
507 uint32_t pba, manc;
508 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
509
510 /* Repartition Pba for greater than 9k mtu
511 * To take effect CTRL.RST is required.
512 */
513
514 switch (adapter->hw.mac_type) {
515 case e1000_82547:
516 case e1000_82547_rev_2:
517 pba = E1000_PBA_30K;
518 break;
519 case e1000_82571:
520 case e1000_82572:
521 pba = E1000_PBA_38K;
522 break;
523 case e1000_82573:
524 pba = E1000_PBA_12K;
525 break;
526 default:
527 pba = E1000_PBA_48K;
528 break;
529 }
530
531 if((adapter->hw.mac_type != e1000_82573) &&
532 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
533 pba -= 8; /* allocate more FIFO for Tx */
534
535
536 if(adapter->hw.mac_type == e1000_82547) {
537 adapter->tx_fifo_head = 0;
538 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
539 adapter->tx_fifo_size =
540 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
541 atomic_set(&adapter->tx_fifo_stall, 0);
542 }
543
544 E1000_WRITE_REG(&adapter->hw, PBA, pba);
545
546 /* flow control settings */
547 /* Set the FC high water mark to 90% of the FIFO size.
548 * Required to clear last 3 LSB */
549 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
550
551 adapter->hw.fc_high_water = fc_high_water_mark;
552 adapter->hw.fc_low_water = fc_high_water_mark - 8;
553 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
554 adapter->hw.fc_send_xon = 1;
555 adapter->hw.fc = adapter->hw.original_fc;
556
557 /* Allow time for pending master requests to run */
558 e1000_reset_hw(&adapter->hw);
559 if(adapter->hw.mac_type >= e1000_82544)
560 E1000_WRITE_REG(&adapter->hw, WUC, 0);
561 if(e1000_init_hw(&adapter->hw))
562 DPRINTK(PROBE, ERR, "Hardware Error\n");
563 e1000_update_mng_vlan(adapter);
564 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
565 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
566
567 e1000_reset_adaptive(&adapter->hw);
568 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
569 if (adapter->en_mng_pt) {
570 manc = E1000_READ_REG(&adapter->hw, MANC);
571 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
572 E1000_WRITE_REG(&adapter->hw, MANC, manc);
573 }
574 }
575
576 /**
577 * e1000_probe - Device Initialization Routine
578 * @pdev: PCI device information struct
579 * @ent: entry in e1000_pci_tbl
580 *
581 * Returns 0 on success, negative on failure
582 *
583 * e1000_probe initializes an adapter identified by a pci_dev structure.
584 * The OS initialization, configuring of the adapter private structure,
585 * and a hardware reset occur.
586 **/
587
588 static int __devinit
589 e1000_probe(struct pci_dev *pdev,
590 const struct pci_device_id *ent)
591 {
592 struct net_device *netdev;
593 struct e1000_adapter *adapter;
594 unsigned long mmio_start, mmio_len;
595
596 static int cards_found = 0;
597 int i, err, pci_using_dac;
598 uint16_t eeprom_data;
599 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
600 if((err = pci_enable_device(pdev)))
601 return err;
602
603 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
604 pci_using_dac = 1;
605 } else {
606 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
607 E1000_ERR("No usable DMA configuration, aborting\n");
608 return err;
609 }
610 pci_using_dac = 0;
611 }
612
613 if((err = pci_request_regions(pdev, e1000_driver_name)))
614 return err;
615
616 pci_set_master(pdev);
617
618 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
619 if(!netdev) {
620 err = -ENOMEM;
621 goto err_alloc_etherdev;
622 }
623
624 SET_MODULE_OWNER(netdev);
625 SET_NETDEV_DEV(netdev, &pdev->dev);
626
627 pci_set_drvdata(pdev, netdev);
628 adapter = netdev_priv(netdev);
629 adapter->netdev = netdev;
630 adapter->pdev = pdev;
631 adapter->hw.back = adapter;
632 adapter->msg_enable = (1 << debug) - 1;
633
634 mmio_start = pci_resource_start(pdev, BAR_0);
635 mmio_len = pci_resource_len(pdev, BAR_0);
636
637 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
638 if(!adapter->hw.hw_addr) {
639 err = -EIO;
640 goto err_ioremap;
641 }
642
643 for(i = BAR_1; i <= BAR_5; i++) {
644 if(pci_resource_len(pdev, i) == 0)
645 continue;
646 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
647 adapter->hw.io_base = pci_resource_start(pdev, i);
648 break;
649 }
650 }
651
652 netdev->open = &e1000_open;
653 netdev->stop = &e1000_close;
654 netdev->hard_start_xmit = &e1000_xmit_frame;
655 netdev->get_stats = &e1000_get_stats;
656 netdev->set_multicast_list = &e1000_set_multi;
657 netdev->set_mac_address = &e1000_set_mac;
658 netdev->change_mtu = &e1000_change_mtu;
659 netdev->do_ioctl = &e1000_ioctl;
660 e1000_set_ethtool_ops(netdev);
661 netdev->tx_timeout = &e1000_tx_timeout;
662 netdev->watchdog_timeo = 5 * HZ;
663 #ifdef CONFIG_E1000_NAPI
664 netdev->poll = &e1000_clean;
665 netdev->weight = 64;
666 #endif
667 netdev->vlan_rx_register = e1000_vlan_rx_register;
668 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
669 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
670 #ifdef CONFIG_NET_POLL_CONTROLLER
671 netdev->poll_controller = e1000_netpoll;
672 #endif
673 strcpy(netdev->name, pci_name(pdev));
674
675 netdev->mem_start = mmio_start;
676 netdev->mem_end = mmio_start + mmio_len;
677 netdev->base_addr = adapter->hw.io_base;
678
679 adapter->bd_number = cards_found;
680
681 /* setup the private structure */
682
683 if((err = e1000_sw_init(adapter)))
684 goto err_sw_init;
685
686 if((err = e1000_check_phy_reset_block(&adapter->hw)))
687 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
688
689 if(adapter->hw.mac_type >= e1000_82543) {
690 netdev->features = NETIF_F_SG |
691 NETIF_F_HW_CSUM |
692 NETIF_F_HW_VLAN_TX |
693 NETIF_F_HW_VLAN_RX |
694 NETIF_F_HW_VLAN_FILTER;
695 }
696
697 #ifdef NETIF_F_TSO
698 if((adapter->hw.mac_type >= e1000_82544) &&
699 (adapter->hw.mac_type != e1000_82547))
700 netdev->features |= NETIF_F_TSO;
701
702 #ifdef NETIF_F_TSO_IPV6
703 if(adapter->hw.mac_type > e1000_82547_rev_2)
704 netdev->features |= NETIF_F_TSO_IPV6;
705 #endif
706 #endif
707 if(pci_using_dac)
708 netdev->features |= NETIF_F_HIGHDMA;
709
710 /* hard_start_xmit is safe against parallel locking */
711 netdev->features |= NETIF_F_LLTX;
712
713 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
714
715 /* before reading the EEPROM, reset the controller to
716 * put the device in a known good starting state */
717
718 e1000_reset_hw(&adapter->hw);
719
720 /* make sure the EEPROM is good */
721
722 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
723 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
724 err = -EIO;
725 goto err_eeprom;
726 }
727
728 /* copy the MAC address out of the EEPROM */
729
730 if(e1000_read_mac_addr(&adapter->hw))
731 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
732 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
733 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
734
735 if(!is_valid_ether_addr(netdev->perm_addr)) {
736 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
737 err = -EIO;
738 goto err_eeprom;
739 }
740
741 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
742
743 e1000_get_bus_info(&adapter->hw);
744
745 init_timer(&adapter->tx_fifo_stall_timer);
746 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
747 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
748
749 init_timer(&adapter->watchdog_timer);
750 adapter->watchdog_timer.function = &e1000_watchdog;
751 adapter->watchdog_timer.data = (unsigned long) adapter;
752
753 INIT_WORK(&adapter->watchdog_task,
754 (void (*)(void *))e1000_watchdog_task, adapter);
755
756 init_timer(&adapter->phy_info_timer);
757 adapter->phy_info_timer.function = &e1000_update_phy_info;
758 adapter->phy_info_timer.data = (unsigned long) adapter;
759
760 INIT_WORK(&adapter->tx_timeout_task,
761 (void (*)(void *))e1000_tx_timeout_task, netdev);
762
763 /* we're going to reset, so assume we have no link for now */
764
765 netif_carrier_off(netdev);
766 netif_stop_queue(netdev);
767
768 e1000_check_options(adapter);
769
770 /* Initial Wake on LAN setting
771 * If APM wake is enabled in the EEPROM,
772 * enable the ACPI Magic Packet filter
773 */
774
775 switch(adapter->hw.mac_type) {
776 case e1000_82542_rev2_0:
777 case e1000_82542_rev2_1:
778 case e1000_82543:
779 break;
780 case e1000_82544:
781 e1000_read_eeprom(&adapter->hw,
782 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
783 eeprom_apme_mask = E1000_EEPROM_82544_APM;
784 break;
785 case e1000_82546:
786 case e1000_82546_rev_3:
787 case e1000_82571:
788 if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
789 && (adapter->hw.media_type == e1000_media_type_copper)) {
790 e1000_read_eeprom(&adapter->hw,
791 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
792 break;
793 }
794 /* Fall Through */
795 default:
796 e1000_read_eeprom(&adapter->hw,
797 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
798 break;
799 }
800 if(eeprom_data & eeprom_apme_mask)
801 adapter->wol |= E1000_WUFC_MAG;
802
803 /* reset the hardware with the new settings */
804 e1000_reset(adapter);
805
806 /* If the controller is 82573 and f/w is AMT, do not set
807 * DRV_LOAD until the interface is up. For all other cases,
808 * let the f/w know that the h/w is now under the control
809 * of the driver. */
810 if (adapter->hw.mac_type != e1000_82573 ||
811 !e1000_check_mng_mode(&adapter->hw))
812 e1000_get_hw_control(adapter);
813
814 strcpy(netdev->name, "eth%d");
815 if((err = register_netdev(netdev)))
816 goto err_register;
817
818 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
819
820 cards_found++;
821 return 0;
822
823 err_register:
824 err_sw_init:
825 err_eeprom:
826 iounmap(adapter->hw.hw_addr);
827 err_ioremap:
828 free_netdev(netdev);
829 err_alloc_etherdev:
830 pci_release_regions(pdev);
831 return err;
832 }
833
834 /**
835 * e1000_remove - Device Removal Routine
836 * @pdev: PCI device information struct
837 *
838 * e1000_remove is called by the PCI subsystem to alert the driver
839 * that it should release a PCI device. The could be caused by a
840 * Hot-Plug event, or because the driver is going to be removed from
841 * memory.
842 **/
843
844 static void __devexit
845 e1000_remove(struct pci_dev *pdev)
846 {
847 struct net_device *netdev = pci_get_drvdata(pdev);
848 struct e1000_adapter *adapter = netdev_priv(netdev);
849 uint32_t manc;
850 #ifdef CONFIG_E1000_NAPI
851 int i;
852 #endif
853
854 flush_scheduled_work();
855
856 if(adapter->hw.mac_type >= e1000_82540 &&
857 adapter->hw.media_type == e1000_media_type_copper) {
858 manc = E1000_READ_REG(&adapter->hw, MANC);
859 if(manc & E1000_MANC_SMBUS_EN) {
860 manc |= E1000_MANC_ARP_EN;
861 E1000_WRITE_REG(&adapter->hw, MANC, manc);
862 }
863 }
864
865 /* Release control of h/w to f/w. If f/w is AMT enabled, this
866 * would have already happened in close and is redundant. */
867 e1000_release_hw_control(adapter);
868
869 unregister_netdev(netdev);
870 #ifdef CONFIG_E1000_NAPI
871 for (i = 0; i < adapter->num_rx_queues; i++)
872 __dev_put(&adapter->polling_netdev[i]);
873 #endif
874
875 if(!e1000_check_phy_reset_block(&adapter->hw))
876 e1000_phy_hw_reset(&adapter->hw);
877
878 kfree(adapter->tx_ring);
879 kfree(adapter->rx_ring);
880 #ifdef CONFIG_E1000_NAPI
881 kfree(adapter->polling_netdev);
882 #endif
883
884 iounmap(adapter->hw.hw_addr);
885 pci_release_regions(pdev);
886
887 #ifdef CONFIG_E1000_MQ
888 free_percpu(adapter->cpu_netdev);
889 free_percpu(adapter->cpu_tx_ring);
890 #endif
891 free_netdev(netdev);
892
893 pci_disable_device(pdev);
894 }
895
896 /**
897 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
898 * @adapter: board private structure to initialize
899 *
900 * e1000_sw_init initializes the Adapter private data structure.
901 * Fields are initialized based on PCI device information and
902 * OS network device settings (MTU size).
903 **/
904
905 static int __devinit
906 e1000_sw_init(struct e1000_adapter *adapter)
907 {
908 struct e1000_hw *hw = &adapter->hw;
909 struct net_device *netdev = adapter->netdev;
910 struct pci_dev *pdev = adapter->pdev;
911 #ifdef CONFIG_E1000_NAPI
912 int i;
913 #endif
914
915 /* PCI config space info */
916
917 hw->vendor_id = pdev->vendor;
918 hw->device_id = pdev->device;
919 hw->subsystem_vendor_id = pdev->subsystem_vendor;
920 hw->subsystem_id = pdev->subsystem_device;
921
922 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
923
924 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
925
926 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
927 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
928 hw->max_frame_size = netdev->mtu +
929 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
930 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
931
932 /* identify the MAC */
933
934 if(e1000_set_mac_type(hw)) {
935 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
936 return -EIO;
937 }
938
939 /* initialize eeprom parameters */
940
941 if(e1000_init_eeprom_params(hw)) {
942 E1000_ERR("EEPROM initialization failed\n");
943 return -EIO;
944 }
945
946 switch(hw->mac_type) {
947 default:
948 break;
949 case e1000_82541:
950 case e1000_82547:
951 case e1000_82541_rev_2:
952 case e1000_82547_rev_2:
953 hw->phy_init_script = 1;
954 break;
955 }
956
957 e1000_set_media_type(hw);
958
959 hw->wait_autoneg_complete = FALSE;
960 hw->tbi_compatibility_en = TRUE;
961 hw->adaptive_ifs = TRUE;
962
963 /* Copper options */
964
965 if(hw->media_type == e1000_media_type_copper) {
966 hw->mdix = AUTO_ALL_MODES;
967 hw->disable_polarity_correction = FALSE;
968 hw->master_slave = E1000_MASTER_SLAVE;
969 }
970
971 #ifdef CONFIG_E1000_MQ
972 /* Number of supported queues */
973 switch (hw->mac_type) {
974 case e1000_82571:
975 case e1000_82572:
976 /* These controllers support 2 tx queues, but with a single
977 * qdisc implementation, multiple tx queues aren't quite as
978 * interesting. If we can find a logical way of mapping
979 * flows to a queue, then perhaps we can up the num_tx_queue
980 * count back to its default. Until then, we run the risk of
981 * terrible performance due to SACK overload. */
982 adapter->num_tx_queues = 1;
983 adapter->num_rx_queues = 2;
984 break;
985 default:
986 adapter->num_tx_queues = 1;
987 adapter->num_rx_queues = 1;
988 break;
989 }
990 adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
991 adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
992 DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
993 adapter->num_rx_queues,
994 ((adapter->num_rx_queues == 1)
995 ? ((num_online_cpus() > 1)
996 ? "(due to unsupported feature in current adapter)"
997 : "(due to unsupported system configuration)")
998 : ""));
999 DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
1000 adapter->num_tx_queues);
1001 #else
1002 adapter->num_tx_queues = 1;
1003 adapter->num_rx_queues = 1;
1004 #endif
1005
1006 if (e1000_alloc_queues(adapter)) {
1007 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1008 return -ENOMEM;
1009 }
1010
1011 #ifdef CONFIG_E1000_NAPI
1012 for (i = 0; i < adapter->num_rx_queues; i++) {
1013 adapter->polling_netdev[i].priv = adapter;
1014 adapter->polling_netdev[i].poll = &e1000_clean;
1015 adapter->polling_netdev[i].weight = 64;
1016 dev_hold(&adapter->polling_netdev[i]);
1017 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1018 }
1019 spin_lock_init(&adapter->tx_queue_lock);
1020 #endif
1021
1022 atomic_set(&adapter->irq_sem, 1);
1023 spin_lock_init(&adapter->stats_lock);
1024
1025 return 0;
1026 }
1027
1028 /**
1029 * e1000_alloc_queues - Allocate memory for all rings
1030 * @adapter: board private structure to initialize
1031 *
1032 * We allocate one ring per queue at run-time since we don't know the
1033 * number of queues at compile-time. The polling_netdev array is
1034 * intended for Multiqueue, but should work fine with a single queue.
1035 **/
1036
1037 static int __devinit
1038 e1000_alloc_queues(struct e1000_adapter *adapter)
1039 {
1040 int size;
1041
1042 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1043 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1044 if (!adapter->tx_ring)
1045 return -ENOMEM;
1046 memset(adapter->tx_ring, 0, size);
1047
1048 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1049 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1050 if (!adapter->rx_ring) {
1051 kfree(adapter->tx_ring);
1052 return -ENOMEM;
1053 }
1054 memset(adapter->rx_ring, 0, size);
1055
1056 #ifdef CONFIG_E1000_NAPI
1057 size = sizeof(struct net_device) * adapter->num_rx_queues;
1058 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1059 if (!adapter->polling_netdev) {
1060 kfree(adapter->tx_ring);
1061 kfree(adapter->rx_ring);
1062 return -ENOMEM;
1063 }
1064 memset(adapter->polling_netdev, 0, size);
1065 #endif
1066
1067 #ifdef CONFIG_E1000_MQ
1068 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1069 adapter->rx_sched_call_data.info = adapter->netdev;
1070
1071 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1072 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1073 #endif
1074
1075 return E1000_SUCCESS;
1076 }
1077
1078 #ifdef CONFIG_E1000_MQ
1079 static void __devinit
1080 e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1081 {
1082 int i, cpu;
1083
1084 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1085 adapter->rx_sched_call_data.info = adapter->netdev;
1086 cpus_clear(adapter->rx_sched_call_data.cpumask);
1087
1088 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1089 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1090
1091 lock_cpu_hotplug();
1092 i = 0;
1093 for_each_online_cpu(cpu) {
1094 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
1095 /* This is incomplete because we'd like to assign separate
1096 * physical cpus to these netdev polling structures and
1097 * avoid saturating a subset of cpus.
1098 */
1099 if (i < adapter->num_rx_queues) {
1100 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
1101 adapter->rx_ring[i].cpu = cpu;
1102 cpu_set(cpu, adapter->cpumask);
1103 } else
1104 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1105
1106 i++;
1107 }
1108 unlock_cpu_hotplug();
1109 }
1110 #endif
1111
1112 /**
1113 * e1000_open - Called when a network interface is made active
1114 * @netdev: network interface device structure
1115 *
1116 * Returns 0 on success, negative value on failure
1117 *
1118 * The open entry point is called when a network interface is made
1119 * active by the system (IFF_UP). At this point all resources needed
1120 * for transmit and receive operations are allocated, the interrupt
1121 * handler is registered with the OS, the watchdog timer is started,
1122 * and the stack is notified that the interface is ready.
1123 **/
1124
1125 static int
1126 e1000_open(struct net_device *netdev)
1127 {
1128 struct e1000_adapter *adapter = netdev_priv(netdev);
1129 int err;
1130
1131 /* allocate transmit descriptors */
1132
1133 if ((err = e1000_setup_all_tx_resources(adapter)))
1134 goto err_setup_tx;
1135
1136 /* allocate receive descriptors */
1137
1138 if ((err = e1000_setup_all_rx_resources(adapter)))
1139 goto err_setup_rx;
1140
1141 if((err = e1000_up(adapter)))
1142 goto err_up;
1143 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1144 if((adapter->hw.mng_cookie.status &
1145 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1146 e1000_update_mng_vlan(adapter);
1147 }
1148
1149 /* If AMT is enabled, let the firmware know that the network
1150 * interface is now open */
1151 if (adapter->hw.mac_type == e1000_82573 &&
1152 e1000_check_mng_mode(&adapter->hw))
1153 e1000_get_hw_control(adapter);
1154
1155 return E1000_SUCCESS;
1156
1157 err_up:
1158 e1000_free_all_rx_resources(adapter);
1159 err_setup_rx:
1160 e1000_free_all_tx_resources(adapter);
1161 err_setup_tx:
1162 e1000_reset(adapter);
1163
1164 return err;
1165 }
1166
1167 /**
1168 * e1000_close - Disables a network interface
1169 * @netdev: network interface device structure
1170 *
1171 * Returns 0, this is not allowed to fail
1172 *
1173 * The close entry point is called when an interface is de-activated
1174 * by the OS. The hardware is still under the drivers control, but
1175 * needs to be disabled. A global MAC reset is issued to stop the
1176 * hardware, and all transmit and receive resources are freed.
1177 **/
1178
1179 static int
1180 e1000_close(struct net_device *netdev)
1181 {
1182 struct e1000_adapter *adapter = netdev_priv(netdev);
1183
1184 e1000_down(adapter);
1185
1186 e1000_free_all_tx_resources(adapter);
1187 e1000_free_all_rx_resources(adapter);
1188
1189 if((adapter->hw.mng_cookie.status &
1190 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1191 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1192 }
1193
1194 /* If AMT is enabled, let the firmware know that the network
1195 * interface is now closed */
1196 if (adapter->hw.mac_type == e1000_82573 &&
1197 e1000_check_mng_mode(&adapter->hw))
1198 e1000_release_hw_control(adapter);
1199
1200 return 0;
1201 }
1202
1203 /**
1204 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1205 * @adapter: address of board private structure
1206 * @start: address of beginning of memory
1207 * @len: length of memory
1208 **/
1209 static inline boolean_t
1210 e1000_check_64k_bound(struct e1000_adapter *adapter,
1211 void *start, unsigned long len)
1212 {
1213 unsigned long begin = (unsigned long) start;
1214 unsigned long end = begin + len;
1215
1216 /* First rev 82545 and 82546 need to not allow any memory
1217 * write location to cross 64k boundary due to errata 23 */
1218 if (adapter->hw.mac_type == e1000_82545 ||
1219 adapter->hw.mac_type == e1000_82546) {
1220 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1221 }
1222
1223 return TRUE;
1224 }
1225
1226 /**
1227 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1228 * @adapter: board private structure
1229 * @txdr: tx descriptor ring (for a specific queue) to setup
1230 *
1231 * Return 0 on success, negative on failure
1232 **/
1233
1234 static int
1235 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1236 struct e1000_tx_ring *txdr)
1237 {
1238 struct pci_dev *pdev = adapter->pdev;
1239 int size;
1240
1241 size = sizeof(struct e1000_buffer) * txdr->count;
1242
1243 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1244 if(!txdr->buffer_info) {
1245 DPRINTK(PROBE, ERR,
1246 "Unable to allocate memory for the transmit descriptor ring\n");
1247 return -ENOMEM;
1248 }
1249 memset(txdr->buffer_info, 0, size);
1250
1251 /* round up to nearest 4K */
1252
1253 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1254 E1000_ROUNDUP(txdr->size, 4096);
1255
1256 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1257 if(!txdr->desc) {
1258 setup_tx_desc_die:
1259 vfree(txdr->buffer_info);
1260 DPRINTK(PROBE, ERR,
1261 "Unable to allocate memory for the transmit descriptor ring\n");
1262 return -ENOMEM;
1263 }
1264
1265 /* Fix for errata 23, can't cross 64kB boundary */
1266 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1267 void *olddesc = txdr->desc;
1268 dma_addr_t olddma = txdr->dma;
1269 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1270 "at %p\n", txdr->size, txdr->desc);
1271 /* Try again, without freeing the previous */
1272 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1273 if(!txdr->desc) {
1274 /* Failed allocation, critical failure */
1275 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1276 goto setup_tx_desc_die;
1277 }
1278
1279 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1280 /* give up */
1281 pci_free_consistent(pdev, txdr->size, txdr->desc,
1282 txdr->dma);
1283 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1284 DPRINTK(PROBE, ERR,
1285 "Unable to allocate aligned memory "
1286 "for the transmit descriptor ring\n");
1287 vfree(txdr->buffer_info);
1288 return -ENOMEM;
1289 } else {
1290 /* Free old allocation, new allocation was successful */
1291 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1292 }
1293 }
1294 memset(txdr->desc, 0, txdr->size);
1295
1296 txdr->next_to_use = 0;
1297 txdr->next_to_clean = 0;
1298 spin_lock_init(&txdr->tx_lock);
1299
1300 return 0;
1301 }
1302
1303 /**
1304 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1305 * (Descriptors) for all queues
1306 * @adapter: board private structure
1307 *
1308 * If this function returns with an error, then it's possible one or
1309 * more of the rings is populated (while the rest are not). It is the
1310 * callers duty to clean those orphaned rings.
1311 *
1312 * Return 0 on success, negative on failure
1313 **/
1314
1315 int
1316 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1317 {
1318 int i, err = 0;
1319
1320 for (i = 0; i < adapter->num_tx_queues; i++) {
1321 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1322 if (err) {
1323 DPRINTK(PROBE, ERR,
1324 "Allocation for Tx Queue %u failed\n", i);
1325 break;
1326 }
1327 }
1328
1329 return err;
1330 }
1331
1332 /**
1333 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1334 * @adapter: board private structure
1335 *
1336 * Configure the Tx unit of the MAC after a reset.
1337 **/
1338
1339 static void
1340 e1000_configure_tx(struct e1000_adapter *adapter)
1341 {
1342 uint64_t tdba;
1343 struct e1000_hw *hw = &adapter->hw;
1344 uint32_t tdlen, tctl, tipg, tarc;
1345
1346 /* Setup the HW Tx Head and Tail descriptor pointers */
1347
1348 switch (adapter->num_tx_queues) {
1349 case 2:
1350 tdba = adapter->tx_ring[1].dma;
1351 tdlen = adapter->tx_ring[1].count *
1352 sizeof(struct e1000_tx_desc);
1353 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1354 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1355 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1356 E1000_WRITE_REG(hw, TDH1, 0);
1357 E1000_WRITE_REG(hw, TDT1, 0);
1358 adapter->tx_ring[1].tdh = E1000_TDH1;
1359 adapter->tx_ring[1].tdt = E1000_TDT1;
1360 /* Fall Through */
1361 case 1:
1362 default:
1363 tdba = adapter->tx_ring[0].dma;
1364 tdlen = adapter->tx_ring[0].count *
1365 sizeof(struct e1000_tx_desc);
1366 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1367 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1368 E1000_WRITE_REG(hw, TDLEN, tdlen);
1369 E1000_WRITE_REG(hw, TDH, 0);
1370 E1000_WRITE_REG(hw, TDT, 0);
1371 adapter->tx_ring[0].tdh = E1000_TDH;
1372 adapter->tx_ring[0].tdt = E1000_TDT;
1373 break;
1374 }
1375
1376 /* Set the default values for the Tx Inter Packet Gap timer */
1377
1378 switch (hw->mac_type) {
1379 case e1000_82542_rev2_0:
1380 case e1000_82542_rev2_1:
1381 tipg = DEFAULT_82542_TIPG_IPGT;
1382 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1383 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1384 break;
1385 default:
1386 if (hw->media_type == e1000_media_type_fiber ||
1387 hw->media_type == e1000_media_type_internal_serdes)
1388 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1389 else
1390 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1391 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1392 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1393 }
1394 E1000_WRITE_REG(hw, TIPG, tipg);
1395
1396 /* Set the Tx Interrupt Delay register */
1397
1398 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1399 if (hw->mac_type >= e1000_82540)
1400 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1401
1402 /* Program the Transmit Control Register */
1403
1404 tctl = E1000_READ_REG(hw, TCTL);
1405
1406 tctl &= ~E1000_TCTL_CT;
1407 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1408 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1409
1410 E1000_WRITE_REG(hw, TCTL, tctl);
1411
1412 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1413 tarc = E1000_READ_REG(hw, TARC0);
1414 tarc |= ((1 << 25) | (1 << 21));
1415 E1000_WRITE_REG(hw, TARC0, tarc);
1416 tarc = E1000_READ_REG(hw, TARC1);
1417 tarc |= (1 << 25);
1418 if (tctl & E1000_TCTL_MULR)
1419 tarc &= ~(1 << 28);
1420 else
1421 tarc |= (1 << 28);
1422 E1000_WRITE_REG(hw, TARC1, tarc);
1423 }
1424
1425 e1000_config_collision_dist(hw);
1426
1427 /* Setup Transmit Descriptor Settings for eop descriptor */
1428 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1429 E1000_TXD_CMD_IFCS;
1430
1431 if (hw->mac_type < e1000_82543)
1432 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1433 else
1434 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1435
1436 /* Cache if we're 82544 running in PCI-X because we'll
1437 * need this to apply a workaround later in the send path. */
1438 if (hw->mac_type == e1000_82544 &&
1439 hw->bus_type == e1000_bus_type_pcix)
1440 adapter->pcix_82544 = 1;
1441 }
1442
1443 /**
1444 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1445 * @adapter: board private structure
1446 * @rxdr: rx descriptor ring (for a specific queue) to setup
1447 *
1448 * Returns 0 on success, negative on failure
1449 **/
1450
1451 static int
1452 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1453 struct e1000_rx_ring *rxdr)
1454 {
1455 struct pci_dev *pdev = adapter->pdev;
1456 int size, desc_len;
1457
1458 size = sizeof(struct e1000_buffer) * rxdr->count;
1459 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1460 if (!rxdr->buffer_info) {
1461 DPRINTK(PROBE, ERR,
1462 "Unable to allocate memory for the receive descriptor ring\n");
1463 return -ENOMEM;
1464 }
1465 memset(rxdr->buffer_info, 0, size);
1466
1467 size = sizeof(struct e1000_ps_page) * rxdr->count;
1468 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1469 if(!rxdr->ps_page) {
1470 vfree(rxdr->buffer_info);
1471 DPRINTK(PROBE, ERR,
1472 "Unable to allocate memory for the receive descriptor ring\n");
1473 return -ENOMEM;
1474 }
1475 memset(rxdr->ps_page, 0, size);
1476
1477 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1478 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1479 if(!rxdr->ps_page_dma) {
1480 vfree(rxdr->buffer_info);
1481 kfree(rxdr->ps_page);
1482 DPRINTK(PROBE, ERR,
1483 "Unable to allocate memory for the receive descriptor ring\n");
1484 return -ENOMEM;
1485 }
1486 memset(rxdr->ps_page_dma, 0, size);
1487
1488 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1489 desc_len = sizeof(struct e1000_rx_desc);
1490 else
1491 desc_len = sizeof(union e1000_rx_desc_packet_split);
1492
1493 /* Round up to nearest 4K */
1494
1495 rxdr->size = rxdr->count * desc_len;
1496 E1000_ROUNDUP(rxdr->size, 4096);
1497
1498 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1499
1500 if (!rxdr->desc) {
1501 DPRINTK(PROBE, ERR,
1502 "Unable to allocate memory for the receive descriptor ring\n");
1503 setup_rx_desc_die:
1504 vfree(rxdr->buffer_info);
1505 kfree(rxdr->ps_page);
1506 kfree(rxdr->ps_page_dma);
1507 return -ENOMEM;
1508 }
1509
1510 /* Fix for errata 23, can't cross 64kB boundary */
1511 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1512 void *olddesc = rxdr->desc;
1513 dma_addr_t olddma = rxdr->dma;
1514 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1515 "at %p\n", rxdr->size, rxdr->desc);
1516 /* Try again, without freeing the previous */
1517 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1518 /* Failed allocation, critical failure */
1519 if (!rxdr->desc) {
1520 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1521 DPRINTK(PROBE, ERR,
1522 "Unable to allocate memory "
1523 "for the receive descriptor ring\n");
1524 goto setup_rx_desc_die;
1525 }
1526
1527 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1528 /* give up */
1529 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1530 rxdr->dma);
1531 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1532 DPRINTK(PROBE, ERR,
1533 "Unable to allocate aligned memory "
1534 "for the receive descriptor ring\n");
1535 goto setup_rx_desc_die;
1536 } else {
1537 /* Free old allocation, new allocation was successful */
1538 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1539 }
1540 }
1541 memset(rxdr->desc, 0, rxdr->size);
1542
1543 rxdr->next_to_clean = 0;
1544 rxdr->next_to_use = 0;
1545 rxdr->rx_skb_top = NULL;
1546 rxdr->rx_skb_prev = NULL;
1547
1548 return 0;
1549 }
1550
1551 /**
1552 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1553 * (Descriptors) for all queues
1554 * @adapter: board private structure
1555 *
1556 * If this function returns with an error, then it's possible one or
1557 * more of the rings is populated (while the rest are not). It is the
1558 * callers duty to clean those orphaned rings.
1559 *
1560 * Return 0 on success, negative on failure
1561 **/
1562
1563 int
1564 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1565 {
1566 int i, err = 0;
1567
1568 for (i = 0; i < adapter->num_rx_queues; i++) {
1569 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1570 if (err) {
1571 DPRINTK(PROBE, ERR,
1572 "Allocation for Rx Queue %u failed\n", i);
1573 break;
1574 }
1575 }
1576
1577 return err;
1578 }
1579
1580 /**
1581 * e1000_setup_rctl - configure the receive control registers
1582 * @adapter: Board private structure
1583 **/
1584 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1585 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1586 static void
1587 e1000_setup_rctl(struct e1000_adapter *adapter)
1588 {
1589 uint32_t rctl, rfctl;
1590 uint32_t psrctl = 0;
1591 #ifdef CONFIG_E1000_PACKET_SPLIT
1592 uint32_t pages = 0;
1593 #endif
1594
1595 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1596
1597 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1598
1599 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1600 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1601 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1602
1603 if(adapter->hw.tbi_compatibility_on == 1)
1604 rctl |= E1000_RCTL_SBP;
1605 else
1606 rctl &= ~E1000_RCTL_SBP;
1607
1608 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1609 rctl &= ~E1000_RCTL_LPE;
1610 else
1611 rctl |= E1000_RCTL_LPE;
1612
1613 /* Setup buffer sizes */
1614 if(adapter->hw.mac_type >= e1000_82571) {
1615 /* We can now specify buffers in 1K increments.
1616 * BSIZE and BSEX are ignored in this case. */
1617 rctl |= adapter->rx_buffer_len << 0x11;
1618 } else {
1619 rctl &= ~E1000_RCTL_SZ_4096;
1620 rctl |= E1000_RCTL_BSEX;
1621 switch (adapter->rx_buffer_len) {
1622 case E1000_RXBUFFER_2048:
1623 default:
1624 rctl |= E1000_RCTL_SZ_2048;
1625 rctl &= ~E1000_RCTL_BSEX;
1626 break;
1627 case E1000_RXBUFFER_4096:
1628 rctl |= E1000_RCTL_SZ_4096;
1629 break;
1630 case E1000_RXBUFFER_8192:
1631 rctl |= E1000_RCTL_SZ_8192;
1632 break;
1633 case E1000_RXBUFFER_16384:
1634 rctl |= E1000_RCTL_SZ_16384;
1635 break;
1636 }
1637 }
1638
1639 #ifdef CONFIG_E1000_PACKET_SPLIT
1640 /* 82571 and greater support packet-split where the protocol
1641 * header is placed in skb->data and the packet data is
1642 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1643 * In the case of a non-split, skb->data is linearly filled,
1644 * followed by the page buffers. Therefore, skb->data is
1645 * sized to hold the largest protocol header.
1646 */
1647 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1648 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1649 PAGE_SIZE <= 16384)
1650 adapter->rx_ps_pages = pages;
1651 else
1652 adapter->rx_ps_pages = 0;
1653 #endif
1654 if (adapter->rx_ps_pages) {
1655 /* Configure extra packet-split registers */
1656 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1657 rfctl |= E1000_RFCTL_EXTEN;
1658 /* disable IPv6 packet split support */
1659 rfctl |= E1000_RFCTL_IPV6_DIS;
1660 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1661
1662 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1663
1664 psrctl |= adapter->rx_ps_bsize0 >>
1665 E1000_PSRCTL_BSIZE0_SHIFT;
1666
1667 switch (adapter->rx_ps_pages) {
1668 case 3:
1669 psrctl |= PAGE_SIZE <<
1670 E1000_PSRCTL_BSIZE3_SHIFT;
1671 case 2:
1672 psrctl |= PAGE_SIZE <<
1673 E1000_PSRCTL_BSIZE2_SHIFT;
1674 case 1:
1675 psrctl |= PAGE_SIZE >>
1676 E1000_PSRCTL_BSIZE1_SHIFT;
1677 break;
1678 }
1679
1680 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1681 }
1682
1683 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1684 }
1685
1686 /**
1687 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1688 * @adapter: board private structure
1689 *
1690 * Configure the Rx unit of the MAC after a reset.
1691 **/
1692
1693 static void
1694 e1000_configure_rx(struct e1000_adapter *adapter)
1695 {
1696 uint64_t rdba;
1697 struct e1000_hw *hw = &adapter->hw;
1698 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1699 #ifdef CONFIG_E1000_MQ
1700 uint32_t reta, mrqc;
1701 int i;
1702 #endif
1703
1704 if (adapter->rx_ps_pages) {
1705 rdlen = adapter->rx_ring[0].count *
1706 sizeof(union e1000_rx_desc_packet_split);
1707 adapter->clean_rx = e1000_clean_rx_irq_ps;
1708 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1709 } else {
1710 rdlen = adapter->rx_ring[0].count *
1711 sizeof(struct e1000_rx_desc);
1712 adapter->clean_rx = e1000_clean_rx_irq;
1713 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1714 }
1715
1716 /* disable receives while setting up the descriptors */
1717 rctl = E1000_READ_REG(hw, RCTL);
1718 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1719
1720 /* set the Receive Delay Timer Register */
1721 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1722
1723 if (hw->mac_type >= e1000_82540) {
1724 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1725 if(adapter->itr > 1)
1726 E1000_WRITE_REG(hw, ITR,
1727 1000000000 / (adapter->itr * 256));
1728 }
1729
1730 if (hw->mac_type >= e1000_82571) {
1731 /* Reset delay timers after every interrupt */
1732 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1733 ctrl_ext |= E1000_CTRL_EXT_CANC;
1734 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1735 E1000_WRITE_FLUSH(hw);
1736 }
1737
1738 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1739 * the Base and Length of the Rx Descriptor Ring */
1740 switch (adapter->num_rx_queues) {
1741 #ifdef CONFIG_E1000_MQ
1742 case 2:
1743 rdba = adapter->rx_ring[1].dma;
1744 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1745 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1746 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1747 E1000_WRITE_REG(hw, RDH1, 0);
1748 E1000_WRITE_REG(hw, RDT1, 0);
1749 adapter->rx_ring[1].rdh = E1000_RDH1;
1750 adapter->rx_ring[1].rdt = E1000_RDT1;
1751 /* Fall Through */
1752 #endif
1753 case 1:
1754 default:
1755 rdba = adapter->rx_ring[0].dma;
1756 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1757 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1758 E1000_WRITE_REG(hw, RDLEN, rdlen);
1759 E1000_WRITE_REG(hw, RDH, 0);
1760 E1000_WRITE_REG(hw, RDT, 0);
1761 adapter->rx_ring[0].rdh = E1000_RDH;
1762 adapter->rx_ring[0].rdt = E1000_RDT;
1763 break;
1764 }
1765
1766 #ifdef CONFIG_E1000_MQ
1767 if (adapter->num_rx_queues > 1) {
1768 uint32_t random[10];
1769
1770 get_random_bytes(&random[0], 40);
1771
1772 if (hw->mac_type <= e1000_82572) {
1773 E1000_WRITE_REG(hw, RSSIR, 0);
1774 E1000_WRITE_REG(hw, RSSIM, 0);
1775 }
1776
1777 switch (adapter->num_rx_queues) {
1778 case 2:
1779 default:
1780 reta = 0x00800080;
1781 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1782 break;
1783 }
1784
1785 /* Fill out redirection table */
1786 for (i = 0; i < 32; i++)
1787 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1788 /* Fill out hash function seeds */
1789 for (i = 0; i < 10; i++)
1790 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1791
1792 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1793 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1794 E1000_WRITE_REG(hw, MRQC, mrqc);
1795 }
1796
1797 /* Multiqueue and packet checksumming are mutually exclusive. */
1798 if (hw->mac_type >= e1000_82571) {
1799 rxcsum = E1000_READ_REG(hw, RXCSUM);
1800 rxcsum |= E1000_RXCSUM_PCSD;
1801 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1802 }
1803
1804 #else
1805
1806 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1807 if (hw->mac_type >= e1000_82543) {
1808 rxcsum = E1000_READ_REG(hw, RXCSUM);
1809 if(adapter->rx_csum == TRUE) {
1810 rxcsum |= E1000_RXCSUM_TUOFL;
1811
1812 /* Enable 82571 IPv4 payload checksum for UDP fragments
1813 * Must be used in conjunction with packet-split. */
1814 if ((hw->mac_type >= e1000_82571) &&
1815 (adapter->rx_ps_pages)) {
1816 rxcsum |= E1000_RXCSUM_IPPCSE;
1817 }
1818 } else {
1819 rxcsum &= ~E1000_RXCSUM_TUOFL;
1820 /* don't need to clear IPPCSE as it defaults to 0 */
1821 }
1822 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1823 }
1824 #endif /* CONFIG_E1000_MQ */
1825
1826 if (hw->mac_type == e1000_82573)
1827 E1000_WRITE_REG(hw, ERT, 0x0100);
1828
1829 /* Enable Receives */
1830 E1000_WRITE_REG(hw, RCTL, rctl);
1831 }
1832
1833 /**
1834 * e1000_free_tx_resources - Free Tx Resources per Queue
1835 * @adapter: board private structure
1836 * @tx_ring: Tx descriptor ring for a specific queue
1837 *
1838 * Free all transmit software resources
1839 **/
1840
1841 static void
1842 e1000_free_tx_resources(struct e1000_adapter *adapter,
1843 struct e1000_tx_ring *tx_ring)
1844 {
1845 struct pci_dev *pdev = adapter->pdev;
1846
1847 e1000_clean_tx_ring(adapter, tx_ring);
1848
1849 vfree(tx_ring->buffer_info);
1850 tx_ring->buffer_info = NULL;
1851
1852 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1853
1854 tx_ring->desc = NULL;
1855 }
1856
1857 /**
1858 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1859 * @adapter: board private structure
1860 *
1861 * Free all transmit software resources
1862 **/
1863
1864 void
1865 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1866 {
1867 int i;
1868
1869 for (i = 0; i < adapter->num_tx_queues; i++)
1870 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1871 }
1872
1873 static inline void
1874 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1875 struct e1000_buffer *buffer_info)
1876 {
1877 if(buffer_info->dma) {
1878 pci_unmap_page(adapter->pdev,
1879 buffer_info->dma,
1880 buffer_info->length,
1881 PCI_DMA_TODEVICE);
1882 buffer_info->dma = 0;
1883 }
1884 if(buffer_info->skb) {
1885 dev_kfree_skb_any(buffer_info->skb);
1886 buffer_info->skb = NULL;
1887 }
1888 }
1889
1890 /**
1891 * e1000_clean_tx_ring - Free Tx Buffers
1892 * @adapter: board private structure
1893 * @tx_ring: ring to be cleaned
1894 **/
1895
1896 static void
1897 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1898 struct e1000_tx_ring *tx_ring)
1899 {
1900 struct e1000_buffer *buffer_info;
1901 unsigned long size;
1902 unsigned int i;
1903
1904 /* Free all the Tx ring sk_buffs */
1905
1906 for(i = 0; i < tx_ring->count; i++) {
1907 buffer_info = &tx_ring->buffer_info[i];
1908 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1909 }
1910
1911 size = sizeof(struct e1000_buffer) * tx_ring->count;
1912 memset(tx_ring->buffer_info, 0, size);
1913
1914 /* Zero out the descriptor ring */
1915
1916 memset(tx_ring->desc, 0, tx_ring->size);
1917
1918 tx_ring->next_to_use = 0;
1919 tx_ring->next_to_clean = 0;
1920 tx_ring->last_tx_tso = 0;
1921
1922 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1923 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1924 }
1925
1926 /**
1927 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1928 * @adapter: board private structure
1929 **/
1930
1931 static void
1932 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1933 {
1934 int i;
1935
1936 for (i = 0; i < adapter->num_tx_queues; i++)
1937 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1938 }
1939
1940 /**
1941 * e1000_free_rx_resources - Free Rx Resources
1942 * @adapter: board private structure
1943 * @rx_ring: ring to clean the resources from
1944 *
1945 * Free all receive software resources
1946 **/
1947
1948 static void
1949 e1000_free_rx_resources(struct e1000_adapter *adapter,
1950 struct e1000_rx_ring *rx_ring)
1951 {
1952 struct pci_dev *pdev = adapter->pdev;
1953
1954 e1000_clean_rx_ring(adapter, rx_ring);
1955
1956 vfree(rx_ring->buffer_info);
1957 rx_ring->buffer_info = NULL;
1958 kfree(rx_ring->ps_page);
1959 rx_ring->ps_page = NULL;
1960 kfree(rx_ring->ps_page_dma);
1961 rx_ring->ps_page_dma = NULL;
1962
1963 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1964
1965 rx_ring->desc = NULL;
1966 }
1967
1968 /**
1969 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1970 * @adapter: board private structure
1971 *
1972 * Free all receive software resources
1973 **/
1974
1975 void
1976 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1977 {
1978 int i;
1979
1980 for (i = 0; i < adapter->num_rx_queues; i++)
1981 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1982 }
1983
1984 /**
1985 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1986 * @adapter: board private structure
1987 * @rx_ring: ring to free buffers from
1988 **/
1989
1990 static void
1991 e1000_clean_rx_ring(struct e1000_adapter *adapter,
1992 struct e1000_rx_ring *rx_ring)
1993 {
1994 struct e1000_buffer *buffer_info;
1995 struct e1000_ps_page *ps_page;
1996 struct e1000_ps_page_dma *ps_page_dma;
1997 struct pci_dev *pdev = adapter->pdev;
1998 unsigned long size;
1999 unsigned int i, j;
2000
2001 /* Free all the Rx ring sk_buffs */
2002
2003 for(i = 0; i < rx_ring->count; i++) {
2004 buffer_info = &rx_ring->buffer_info[i];
2005 if(buffer_info->skb) {
2006 ps_page = &rx_ring->ps_page[i];
2007 ps_page_dma = &rx_ring->ps_page_dma[i];
2008 pci_unmap_single(pdev,
2009 buffer_info->dma,
2010 buffer_info->length,
2011 PCI_DMA_FROMDEVICE);
2012
2013 dev_kfree_skb(buffer_info->skb);
2014 buffer_info->skb = NULL;
2015 }
2016 ps_page = &rx_ring->ps_page[i];
2017 ps_page_dma = &rx_ring->ps_page_dma[i];
2018 for (j = 0; j < adapter->rx_ps_pages; j++) {
2019 if (!ps_page->ps_page[j]) break;
2020 pci_unmap_page(pdev,
2021 ps_page_dma->ps_page_dma[j],
2022 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2023 ps_page_dma->ps_page_dma[j] = 0;
2024 put_page(ps_page->ps_page[j]);
2025 ps_page->ps_page[j] = NULL;
2026 }
2027 }
2028
2029 /* there also may be some cached data in our adapter */
2030 if (rx_ring->rx_skb_top) {
2031 dev_kfree_skb(rx_ring->rx_skb_top);
2032
2033 /* rx_skb_prev will be wiped out by rx_skb_top */
2034 rx_ring->rx_skb_top = NULL;
2035 rx_ring->rx_skb_prev = NULL;
2036 }
2037
2038
2039 size = sizeof(struct e1000_buffer) * rx_ring->count;
2040 memset(rx_ring->buffer_info, 0, size);
2041 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2042 memset(rx_ring->ps_page, 0, size);
2043 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2044 memset(rx_ring->ps_page_dma, 0, size);
2045
2046 /* Zero out the descriptor ring */
2047
2048 memset(rx_ring->desc, 0, rx_ring->size);
2049
2050 rx_ring->next_to_clean = 0;
2051 rx_ring->next_to_use = 0;
2052
2053 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2054 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2055 }
2056
2057 /**
2058 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2059 * @adapter: board private structure
2060 **/
2061
2062 static void
2063 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2064 {
2065 int i;
2066
2067 for (i = 0; i < adapter->num_rx_queues; i++)
2068 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2069 }
2070
2071 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2072 * and memory write and invalidate disabled for certain operations
2073 */
2074 static void
2075 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2076 {
2077 struct net_device *netdev = adapter->netdev;
2078 uint32_t rctl;
2079
2080 e1000_pci_clear_mwi(&adapter->hw);
2081
2082 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2083 rctl |= E1000_RCTL_RST;
2084 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2085 E1000_WRITE_FLUSH(&adapter->hw);
2086 mdelay(5);
2087
2088 if(netif_running(netdev))
2089 e1000_clean_all_rx_rings(adapter);
2090 }
2091
2092 static void
2093 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2094 {
2095 struct net_device *netdev = adapter->netdev;
2096 uint32_t rctl;
2097
2098 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2099 rctl &= ~E1000_RCTL_RST;
2100 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2101 E1000_WRITE_FLUSH(&adapter->hw);
2102 mdelay(5);
2103
2104 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2105 e1000_pci_set_mwi(&adapter->hw);
2106
2107 if(netif_running(netdev)) {
2108 e1000_configure_rx(adapter);
2109 e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
2110 }
2111 }
2112
2113 /**
2114 * e1000_set_mac - Change the Ethernet Address of the NIC
2115 * @netdev: network interface device structure
2116 * @p: pointer to an address structure
2117 *
2118 * Returns 0 on success, negative on failure
2119 **/
2120
2121 static int
2122 e1000_set_mac(struct net_device *netdev, void *p)
2123 {
2124 struct e1000_adapter *adapter = netdev_priv(netdev);
2125 struct sockaddr *addr = p;
2126
2127 if(!is_valid_ether_addr(addr->sa_data))
2128 return -EADDRNOTAVAIL;
2129
2130 /* 82542 2.0 needs to be in reset to write receive address registers */
2131
2132 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2133 e1000_enter_82542_rst(adapter);
2134
2135 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2136 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2137
2138 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2139
2140 /* With 82571 controllers, LAA may be overwritten (with the default)
2141 * due to controller reset from the other port. */
2142 if (adapter->hw.mac_type == e1000_82571) {
2143 /* activate the work around */
2144 adapter->hw.laa_is_present = 1;
2145
2146 /* Hold a copy of the LAA in RAR[14] This is done so that
2147 * between the time RAR[0] gets clobbered and the time it
2148 * gets fixed (in e1000_watchdog), the actual LAA is in one
2149 * of the RARs and no incoming packets directed to this port
2150 * are dropped. Eventaully the LAA will be in RAR[0] and
2151 * RAR[14] */
2152 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2153 E1000_RAR_ENTRIES - 1);
2154 }
2155
2156 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2157 e1000_leave_82542_rst(adapter);
2158
2159 return 0;
2160 }
2161
2162 /**
2163 * e1000_set_multi - Multicast and Promiscuous mode set
2164 * @netdev: network interface device structure
2165 *
2166 * The set_multi entry point is called whenever the multicast address
2167 * list or the network interface flags are updated. This routine is
2168 * responsible for configuring the hardware for proper multicast,
2169 * promiscuous mode, and all-multi behavior.
2170 **/
2171
2172 static void
2173 e1000_set_multi(struct net_device *netdev)
2174 {
2175 struct e1000_adapter *adapter = netdev_priv(netdev);
2176 struct e1000_hw *hw = &adapter->hw;
2177 struct dev_mc_list *mc_ptr;
2178 uint32_t rctl;
2179 uint32_t hash_value;
2180 int i, rar_entries = E1000_RAR_ENTRIES;
2181
2182 /* reserve RAR[14] for LAA over-write work-around */
2183 if (adapter->hw.mac_type == e1000_82571)
2184 rar_entries--;
2185
2186 /* Check for Promiscuous and All Multicast modes */
2187
2188 rctl = E1000_READ_REG(hw, RCTL);
2189
2190 if(netdev->flags & IFF_PROMISC) {
2191 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2192 } else if(netdev->flags & IFF_ALLMULTI) {
2193 rctl |= E1000_RCTL_MPE;
2194 rctl &= ~E1000_RCTL_UPE;
2195 } else {
2196 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2197 }
2198
2199 E1000_WRITE_REG(hw, RCTL, rctl);
2200
2201 /* 82542 2.0 needs to be in reset to write receive address registers */
2202
2203 if(hw->mac_type == e1000_82542_rev2_0)
2204 e1000_enter_82542_rst(adapter);
2205
2206 /* load the first 14 multicast address into the exact filters 1-14
2207 * RAR 0 is used for the station MAC adddress
2208 * if there are not 14 addresses, go ahead and clear the filters
2209 * -- with 82571 controllers only 0-13 entries are filled here
2210 */
2211 mc_ptr = netdev->mc_list;
2212
2213 for(i = 1; i < rar_entries; i++) {
2214 if (mc_ptr) {
2215 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2216 mc_ptr = mc_ptr->next;
2217 } else {
2218 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2219 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2220 }
2221 }
2222
2223 /* clear the old settings from the multicast hash table */
2224
2225 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2226 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2227
2228 /* load any remaining addresses into the hash table */
2229
2230 for(; mc_ptr; mc_ptr = mc_ptr->next) {
2231 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2232 e1000_mta_set(hw, hash_value);
2233 }
2234
2235 if(hw->mac_type == e1000_82542_rev2_0)
2236 e1000_leave_82542_rst(adapter);
2237 }
2238
2239 /* Need to wait a few seconds after link up to get diagnostic information from
2240 * the phy */
2241
2242 static void
2243 e1000_update_phy_info(unsigned long data)
2244 {
2245 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2246 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2247 }
2248
2249 /**
2250 * e1000_82547_tx_fifo_stall - Timer Call-back
2251 * @data: pointer to adapter cast into an unsigned long
2252 **/
2253
2254 static void
2255 e1000_82547_tx_fifo_stall(unsigned long data)
2256 {
2257 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2258 struct net_device *netdev = adapter->netdev;
2259 uint32_t tctl;
2260
2261 if(atomic_read(&adapter->tx_fifo_stall)) {
2262 if((E1000_READ_REG(&adapter->hw, TDT) ==
2263 E1000_READ_REG(&adapter->hw, TDH)) &&
2264 (E1000_READ_REG(&adapter->hw, TDFT) ==
2265 E1000_READ_REG(&adapter->hw, TDFH)) &&
2266 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2267 E1000_READ_REG(&adapter->hw, TDFHS))) {
2268 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2269 E1000_WRITE_REG(&adapter->hw, TCTL,
2270 tctl & ~E1000_TCTL_EN);
2271 E1000_WRITE_REG(&adapter->hw, TDFT,
2272 adapter->tx_head_addr);
2273 E1000_WRITE_REG(&adapter->hw, TDFH,
2274 adapter->tx_head_addr);
2275 E1000_WRITE_REG(&adapter->hw, TDFTS,
2276 adapter->tx_head_addr);
2277 E1000_WRITE_REG(&adapter->hw, TDFHS,
2278 adapter->tx_head_addr);
2279 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2280 E1000_WRITE_FLUSH(&adapter->hw);
2281
2282 adapter->tx_fifo_head = 0;
2283 atomic_set(&adapter->tx_fifo_stall, 0);
2284 netif_wake_queue(netdev);
2285 } else {
2286 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2287 }
2288 }
2289 }
2290
2291 /**
2292 * e1000_watchdog - Timer Call-back
2293 * @data: pointer to adapter cast into an unsigned long
2294 **/
2295 static void
2296 e1000_watchdog(unsigned long data)
2297 {
2298 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2299
2300 /* Do the rest outside of interrupt context */
2301 schedule_work(&adapter->watchdog_task);
2302 }
2303
2304 static void
2305 e1000_watchdog_task(struct e1000_adapter *adapter)
2306 {
2307 struct net_device *netdev = adapter->netdev;
2308 struct e1000_tx_ring *txdr = adapter->tx_ring;
2309 uint32_t link;
2310
2311 e1000_check_for_link(&adapter->hw);
2312 if (adapter->hw.mac_type == e1000_82573) {
2313 e1000_enable_tx_pkt_filtering(&adapter->hw);
2314 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2315 e1000_update_mng_vlan(adapter);
2316 }
2317
2318 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2319 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2320 link = !adapter->hw.serdes_link_down;
2321 else
2322 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2323
2324 if(link) {
2325 if(!netif_carrier_ok(netdev)) {
2326 e1000_get_speed_and_duplex(&adapter->hw,
2327 &adapter->link_speed,
2328 &adapter->link_duplex);
2329
2330 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2331 adapter->link_speed,
2332 adapter->link_duplex == FULL_DUPLEX ?
2333 "Full Duplex" : "Half Duplex");
2334
2335 /* tweak tx_queue_len according to speed/duplex */
2336 netdev->tx_queue_len = adapter->tx_queue_len;
2337 adapter->tx_timeout_factor = 1;
2338 if (adapter->link_duplex == HALF_DUPLEX) {
2339 switch (adapter->link_speed) {
2340 case SPEED_10:
2341 netdev->tx_queue_len = 10;
2342 adapter->tx_timeout_factor = 8;
2343 break;
2344 case SPEED_100:
2345 netdev->tx_queue_len = 100;
2346 break;
2347 }
2348 }
2349
2350 netif_carrier_on(netdev);
2351 netif_wake_queue(netdev);
2352 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2353 adapter->smartspeed = 0;
2354 }
2355 } else {
2356 if(netif_carrier_ok(netdev)) {
2357 adapter->link_speed = 0;
2358 adapter->link_duplex = 0;
2359 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2360 netif_carrier_off(netdev);
2361 netif_stop_queue(netdev);
2362 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2363 }
2364
2365 e1000_smartspeed(adapter);
2366 }
2367
2368 e1000_update_stats(adapter);
2369
2370 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2371 adapter->tpt_old = adapter->stats.tpt;
2372 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2373 adapter->colc_old = adapter->stats.colc;
2374
2375 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2376 adapter->gorcl_old = adapter->stats.gorcl;
2377 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2378 adapter->gotcl_old = adapter->stats.gotcl;
2379
2380 e1000_update_adaptive(&adapter->hw);
2381
2382 #ifdef CONFIG_E1000_MQ
2383 txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2384 #endif
2385 if (!netif_carrier_ok(netdev)) {
2386 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2387 /* We've lost link, so the controller stops DMA,
2388 * but we've got queued Tx work that's never going
2389 * to get done, so reset controller to flush Tx.
2390 * (Do the reset outside of interrupt context). */
2391 schedule_work(&adapter->tx_timeout_task);
2392 }
2393 }
2394
2395 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2396 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2397 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2398 * asymmetrical Tx or Rx gets ITR=8000; everyone
2399 * else is between 2000-8000. */
2400 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2401 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2402 adapter->gotcl - adapter->gorcl :
2403 adapter->gorcl - adapter->gotcl) / 10000;
2404 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2405 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2406 }
2407
2408 /* Cause software interrupt to ensure rx ring is cleaned */
2409 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2410
2411 /* Force detection of hung controller every watchdog period */
2412 adapter->detect_tx_hung = TRUE;
2413
2414 /* With 82571 controllers, LAA may be overwritten due to controller
2415 * reset from the other port. Set the appropriate LAA in RAR[0] */
2416 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2417 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2418
2419 /* Reset the timer */
2420 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2421 }
2422
2423 #define E1000_TX_FLAGS_CSUM 0x00000001
2424 #define E1000_TX_FLAGS_VLAN 0x00000002
2425 #define E1000_TX_FLAGS_TSO 0x00000004
2426 #define E1000_TX_FLAGS_IPV4 0x00000008
2427 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2428 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2429
2430 static inline int
2431 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2432 struct sk_buff *skb)
2433 {
2434 #ifdef NETIF_F_TSO
2435 struct e1000_context_desc *context_desc;
2436 struct e1000_buffer *buffer_info;
2437 unsigned int i;
2438 uint32_t cmd_length = 0;
2439 uint16_t ipcse = 0, tucse, mss;
2440 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2441 int err;
2442
2443 if(skb_shinfo(skb)->tso_size) {
2444 if (skb_header_cloned(skb)) {
2445 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2446 if (err)
2447 return err;
2448 }
2449
2450 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2451 mss = skb_shinfo(skb)->tso_size;
2452 if(skb->protocol == ntohs(ETH_P_IP)) {
2453 skb->nh.iph->tot_len = 0;
2454 skb->nh.iph->check = 0;
2455 skb->h.th->check =
2456 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2457 skb->nh.iph->daddr,
2458 0,
2459 IPPROTO_TCP,
2460 0);
2461 cmd_length = E1000_TXD_CMD_IP;
2462 ipcse = skb->h.raw - skb->data - 1;
2463 #ifdef NETIF_F_TSO_IPV6
2464 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2465 skb->nh.ipv6h->payload_len = 0;
2466 skb->h.th->check =
2467 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2468 &skb->nh.ipv6h->daddr,
2469 0,
2470 IPPROTO_TCP,
2471 0);
2472 ipcse = 0;
2473 #endif
2474 }
2475 ipcss = skb->nh.raw - skb->data;
2476 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2477 tucss = skb->h.raw - skb->data;
2478 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2479 tucse = 0;
2480
2481 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2482 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2483
2484 i = tx_ring->next_to_use;
2485 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2486 buffer_info = &tx_ring->buffer_info[i];
2487
2488 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2489 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2490 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2491 context_desc->upper_setup.tcp_fields.tucss = tucss;
2492 context_desc->upper_setup.tcp_fields.tucso = tucso;
2493 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2494 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2495 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2496 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2497
2498 buffer_info->time_stamp = jiffies;
2499
2500 if (++i == tx_ring->count) i = 0;
2501 tx_ring->next_to_use = i;
2502
2503 return 1;
2504 }
2505 #endif
2506
2507 return 0;
2508 }
2509
2510 static inline boolean_t
2511 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2512 struct sk_buff *skb)
2513 {
2514 struct e1000_context_desc *context_desc;
2515 struct e1000_buffer *buffer_info;
2516 unsigned int i;
2517 uint8_t css;
2518
2519 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2520 css = skb->h.raw - skb->data;
2521
2522 i = tx_ring->next_to_use;
2523 buffer_info = &tx_ring->buffer_info[i];
2524 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2525
2526 context_desc->upper_setup.tcp_fields.tucss = css;
2527 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2528 context_desc->upper_setup.tcp_fields.tucse = 0;
2529 context_desc->tcp_seg_setup.data = 0;
2530 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2531
2532 buffer_info->time_stamp = jiffies;
2533
2534 if (unlikely(++i == tx_ring->count)) i = 0;
2535 tx_ring->next_to_use = i;
2536
2537 return TRUE;
2538 }
2539
2540 return FALSE;
2541 }
2542
2543 #define E1000_MAX_TXD_PWR 12
2544 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2545
2546 static inline int
2547 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2548 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2549 unsigned int nr_frags, unsigned int mss)
2550 {
2551 struct e1000_buffer *buffer_info;
2552 unsigned int len = skb->len;
2553 unsigned int offset = 0, size, count = 0, i;
2554 unsigned int f;
2555 len -= skb->data_len;
2556
2557 i = tx_ring->next_to_use;
2558
2559 while(len) {
2560 buffer_info = &tx_ring->buffer_info[i];
2561 size = min(len, max_per_txd);
2562 #ifdef NETIF_F_TSO
2563 /* Workaround for Controller erratum --
2564 * descriptor for non-tso packet in a linear SKB that follows a
2565 * tso gets written back prematurely before the data is fully
2566 * DMAd to the controller */
2567 if (!skb->data_len && tx_ring->last_tx_tso &&
2568 !skb_shinfo(skb)->tso_size) {
2569 tx_ring->last_tx_tso = 0;
2570 size -= 4;
2571 }
2572
2573 /* Workaround for premature desc write-backs
2574 * in TSO mode. Append 4-byte sentinel desc */
2575 if(unlikely(mss && !nr_frags && size == len && size > 8))
2576 size -= 4;
2577 #endif
2578 /* work-around for errata 10 and it applies
2579 * to all controllers in PCI-X mode
2580 * The fix is to make sure that the first descriptor of a
2581 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2582 */
2583 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2584 (size > 2015) && count == 0))
2585 size = 2015;
2586
2587 /* Workaround for potential 82544 hang in PCI-X. Avoid
2588 * terminating buffers within evenly-aligned dwords. */
2589 if(unlikely(adapter->pcix_82544 &&
2590 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2591 size > 4))
2592 size -= 4;
2593
2594 buffer_info->length = size;
2595 buffer_info->dma =
2596 pci_map_single(adapter->pdev,
2597 skb->data + offset,
2598 size,
2599 PCI_DMA_TODEVICE);
2600 buffer_info->time_stamp = jiffies;
2601
2602 len -= size;
2603 offset += size;
2604 count++;
2605 if(unlikely(++i == tx_ring->count)) i = 0;
2606 }
2607
2608 for(f = 0; f < nr_frags; f++) {
2609 struct skb_frag_struct *frag;
2610
2611 frag = &skb_shinfo(skb)->frags[f];
2612 len = frag->size;
2613 offset = frag->page_offset;
2614
2615 while(len) {
2616 buffer_info = &tx_ring->buffer_info[i];
2617 size = min(len, max_per_txd);
2618 #ifdef NETIF_F_TSO
2619 /* Workaround for premature desc write-backs
2620 * in TSO mode. Append 4-byte sentinel desc */
2621 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2622 size -= 4;
2623 #endif
2624 /* Workaround for potential 82544 hang in PCI-X.
2625 * Avoid terminating buffers within evenly-aligned
2626 * dwords. */
2627 if(unlikely(adapter->pcix_82544 &&
2628 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2629 size > 4))
2630 size -= 4;
2631
2632 buffer_info->length = size;
2633 buffer_info->dma =
2634 pci_map_page(adapter->pdev,
2635 frag->page,
2636 offset,
2637 size,
2638 PCI_DMA_TODEVICE);
2639 buffer_info->time_stamp = jiffies;
2640
2641 len -= size;
2642 offset += size;
2643 count++;
2644 if(unlikely(++i == tx_ring->count)) i = 0;
2645 }
2646 }
2647
2648 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2649 tx_ring->buffer_info[i].skb = skb;
2650 tx_ring->buffer_info[first].next_to_watch = i;
2651
2652 return count;
2653 }
2654
2655 static inline void
2656 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2657 int tx_flags, int count)
2658 {
2659 struct e1000_tx_desc *tx_desc = NULL;
2660 struct e1000_buffer *buffer_info;
2661 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2662 unsigned int i;
2663
2664 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2665 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2666 E1000_TXD_CMD_TSE;
2667 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2668
2669 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2670 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2671 }
2672
2673 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2674 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2675 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2676 }
2677
2678 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2679 txd_lower |= E1000_TXD_CMD_VLE;
2680 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2681 }
2682
2683 i = tx_ring->next_to_use;
2684
2685 while(count--) {
2686 buffer_info = &tx_ring->buffer_info[i];
2687 tx_desc = E1000_TX_DESC(*tx_ring, i);
2688 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2689 tx_desc->lower.data =
2690 cpu_to_le32(txd_lower | buffer_info->length);
2691 tx_desc->upper.data = cpu_to_le32(txd_upper);
2692 if(unlikely(++i == tx_ring->count)) i = 0;
2693 }
2694
2695 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2696
2697 /* Force memory writes to complete before letting h/w
2698 * know there are new descriptors to fetch. (Only
2699 * applicable for weak-ordered memory model archs,
2700 * such as IA-64). */
2701 wmb();
2702
2703 tx_ring->next_to_use = i;
2704 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2705 }
2706
2707 /**
2708 * 82547 workaround to avoid controller hang in half-duplex environment.
2709 * The workaround is to avoid queuing a large packet that would span
2710 * the internal Tx FIFO ring boundary by notifying the stack to resend
2711 * the packet at a later time. This gives the Tx FIFO an opportunity to
2712 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2713 * to the beginning of the Tx FIFO.
2714 **/
2715
2716 #define E1000_FIFO_HDR 0x10
2717 #define E1000_82547_PAD_LEN 0x3E0
2718
2719 static inline int
2720 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2721 {
2722 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2723 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2724
2725 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2726
2727 if(adapter->link_duplex != HALF_DUPLEX)
2728 goto no_fifo_stall_required;
2729
2730 if(atomic_read(&adapter->tx_fifo_stall))
2731 return 1;
2732
2733 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2734 atomic_set(&adapter->tx_fifo_stall, 1);
2735 return 1;
2736 }
2737
2738 no_fifo_stall_required:
2739 adapter->tx_fifo_head += skb_fifo_len;
2740 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2741 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2742 return 0;
2743 }
2744
2745 #define MINIMUM_DHCP_PACKET_SIZE 282
2746 static inline int
2747 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2748 {
2749 struct e1000_hw *hw = &adapter->hw;
2750 uint16_t length, offset;
2751 if(vlan_tx_tag_present(skb)) {
2752 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2753 ( adapter->hw.mng_cookie.status &
2754 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2755 return 0;
2756 }
2757 if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2758 struct ethhdr *eth = (struct ethhdr *) skb->data;
2759 if((htons(ETH_P_IP) == eth->h_proto)) {
2760 const struct iphdr *ip =
2761 (struct iphdr *)((uint8_t *)skb->data+14);
2762 if(IPPROTO_UDP == ip->protocol) {
2763 struct udphdr *udp =
2764 (struct udphdr *)((uint8_t *)ip +
2765 (ip->ihl << 2));
2766 if(ntohs(udp->dest) == 67) {
2767 offset = (uint8_t *)udp + 8 - skb->data;
2768 length = skb->len - offset;
2769
2770 return e1000_mng_write_dhcp_info(hw,
2771 (uint8_t *)udp + 8,
2772 length);
2773 }
2774 }
2775 }
2776 }
2777 return 0;
2778 }
2779
2780 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2781 static int
2782 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2783 {
2784 struct e1000_adapter *adapter = netdev_priv(netdev);
2785 struct e1000_tx_ring *tx_ring;
2786 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2787 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2788 unsigned int tx_flags = 0;
2789 unsigned int len = skb->len;
2790 unsigned long flags;
2791 unsigned int nr_frags = 0;
2792 unsigned int mss = 0;
2793 int count = 0;
2794 int tso;
2795 unsigned int f;
2796 len -= skb->data_len;
2797
2798 #ifdef CONFIG_E1000_MQ
2799 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2800 #else
2801 tx_ring = adapter->tx_ring;
2802 #endif
2803
2804 if (unlikely(skb->len <= 0)) {
2805 dev_kfree_skb_any(skb);
2806 return NETDEV_TX_OK;
2807 }
2808
2809 #ifdef NETIF_F_TSO
2810 mss = skb_shinfo(skb)->tso_size;
2811 /* The controller does a simple calculation to
2812 * make sure there is enough room in the FIFO before
2813 * initiating the DMA for each buffer. The calc is:
2814 * 4 = ceil(buffer len/mss). To make sure we don't
2815 * overrun the FIFO, adjust the max buffer len if mss
2816 * drops. */
2817 if(mss) {
2818 uint8_t hdr_len;
2819 max_per_txd = min(mss << 2, max_per_txd);
2820 max_txd_pwr = fls(max_per_txd) - 1;
2821
2822 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2823 * points to just header, pull a few bytes of payload from
2824 * frags into skb->data */
2825 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2826 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2827 (adapter->hw.mac_type == e1000_82571 ||
2828 adapter->hw.mac_type == e1000_82572)) {
2829 len = skb->len - skb->data_len;
2830 }
2831 }
2832
2833 if((mss) || (skb->ip_summed == CHECKSUM_HW))
2834 /* reserve a descriptor for the offload context */
2835 count++;
2836 count++;
2837 #else
2838 if(skb->ip_summed == CHECKSUM_HW)
2839 count++;
2840 #endif
2841
2842 #ifdef NETIF_F_TSO
2843 /* Controller Erratum workaround */
2844 if (!skb->data_len && tx_ring->last_tx_tso &&
2845 !skb_shinfo(skb)->tso_size)
2846 count++;
2847 #endif
2848
2849 count += TXD_USE_COUNT(len, max_txd_pwr);
2850
2851 if(adapter->pcix_82544)
2852 count++;
2853
2854 /* work-around for errata 10 and it applies to all controllers
2855 * in PCI-X mode, so add one more descriptor to the count
2856 */
2857 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2858 (len > 2015)))
2859 count++;
2860
2861 nr_frags = skb_shinfo(skb)->nr_frags;
2862 for(f = 0; f < nr_frags; f++)
2863 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2864 max_txd_pwr);
2865 if(adapter->pcix_82544)
2866 count += nr_frags;
2867
2868 unsigned int pull_size;
2869 pull_size = min((unsigned int)4, skb->data_len);
2870 if (!__pskb_pull_tail(skb, pull_size)) {
2871 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2872 dev_kfree_skb_any(skb);
2873 return -EFAULT;
2874 }
2875
2876 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2877 e1000_transfer_dhcp_info(adapter, skb);
2878
2879 local_irq_save(flags);
2880 if (!spin_trylock(&tx_ring->tx_lock)) {
2881 /* Collision - tell upper layer to requeue */
2882 local_irq_restore(flags);
2883 return NETDEV_TX_LOCKED;
2884 }
2885
2886 /* need: count + 2 desc gap to keep tail from touching
2887 * head, otherwise try next time */
2888 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
2889 netif_stop_queue(netdev);
2890 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2891 return NETDEV_TX_BUSY;
2892 }
2893
2894 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2895 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2896 netif_stop_queue(netdev);
2897 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
2898 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2899 return NETDEV_TX_BUSY;
2900 }
2901 }
2902
2903 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2904 tx_flags |= E1000_TX_FLAGS_VLAN;
2905 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2906 }
2907
2908 first = tx_ring->next_to_use;
2909
2910 tso = e1000_tso(adapter, tx_ring, skb);
2911 if (tso < 0) {
2912 dev_kfree_skb_any(skb);
2913 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2914 return NETDEV_TX_OK;
2915 }
2916
2917 if (likely(tso)) {
2918 tx_ring->last_tx_tso = 1;
2919 tx_flags |= E1000_TX_FLAGS_TSO;
2920 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
2921 tx_flags |= E1000_TX_FLAGS_CSUM;
2922
2923 /* Old method was to assume IPv4 packet by default if TSO was enabled.
2924 * 82571 hardware supports TSO capabilities for IPv6 as well...
2925 * no longer assume, we must. */
2926 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2927 tx_flags |= E1000_TX_FLAGS_IPV4;
2928
2929 e1000_tx_queue(adapter, tx_ring, tx_flags,
2930 e1000_tx_map(adapter, tx_ring, skb, first,
2931 max_per_txd, nr_frags, mss));
2932
2933 netdev->trans_start = jiffies;
2934
2935 /* Make sure there is space in the ring for the next send. */
2936 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
2937 netif_stop_queue(netdev);
2938
2939 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2940 return NETDEV_TX_OK;
2941 }
2942
2943 /**
2944 * e1000_tx_timeout - Respond to a Tx Hang
2945 * @netdev: network interface device structure
2946 **/
2947
2948 static void
2949 e1000_tx_timeout(struct net_device *netdev)
2950 {
2951 struct e1000_adapter *adapter = netdev_priv(netdev);
2952
2953 /* Do the reset outside of interrupt context */
2954 schedule_work(&adapter->tx_timeout_task);
2955 }
2956
2957 static void
2958 e1000_tx_timeout_task(struct net_device *netdev)
2959 {
2960 struct e1000_adapter *adapter = netdev_priv(netdev);
2961
2962 adapter->tx_timeout_count++;
2963 e1000_down(adapter);
2964 e1000_up(adapter);
2965 }
2966
2967 /**
2968 * e1000_get_stats - Get System Network Statistics
2969 * @netdev: network interface device structure
2970 *
2971 * Returns the address of the device statistics structure.
2972 * The statistics are actually updated from the timer callback.
2973 **/
2974
2975 static struct net_device_stats *
2976 e1000_get_stats(struct net_device *netdev)
2977 {
2978 struct e1000_adapter *adapter = netdev_priv(netdev);
2979
2980 /* only return the current stats */
2981 return &adapter->net_stats;
2982 }
2983
2984 /**
2985 * e1000_change_mtu - Change the Maximum Transfer Unit
2986 * @netdev: network interface device structure
2987 * @new_mtu: new value for maximum frame size
2988 *
2989 * Returns 0 on success, negative on failure
2990 **/
2991
2992 static int
2993 e1000_change_mtu(struct net_device *netdev, int new_mtu)
2994 {
2995 struct e1000_adapter *adapter = netdev_priv(netdev);
2996 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
2997
2998 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2999 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3000 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3001 return -EINVAL;
3002 }
3003
3004 /* Adapter-specific max frame size limits. */
3005 switch (adapter->hw.mac_type) {
3006 case e1000_82542_rev2_0:
3007 case e1000_82542_rev2_1:
3008 case e1000_82573:
3009 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3010 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3011 return -EINVAL;
3012 }
3013 break;
3014 case e1000_82571:
3015 case e1000_82572:
3016 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3017 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3018 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3019 return -EINVAL;
3020 }
3021 break;
3022 default:
3023 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3024 break;
3025 }
3026
3027 /* since the driver code now supports splitting a packet across
3028 * multiple descriptors, most of the fifo related limitations on
3029 * jumbo frame traffic have gone away.
3030 * simply use 2k descriptors for everything.
3031 *
3032 * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3033 * means we reserve 2 more, this pushes us to allocate from the next
3034 * larger slab size
3035 * i.e. RXBUFFER_2048 --> size-4096 slab */
3036
3037 /* recent hardware supports 1KB granularity */
3038 if (adapter->hw.mac_type > e1000_82547_rev_2) {
3039 adapter->rx_buffer_len =
3040 ((max_frame < E1000_RXBUFFER_2048) ?
3041 max_frame : E1000_RXBUFFER_2048);
3042 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
3043 } else
3044 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3045
3046 netdev->mtu = new_mtu;
3047
3048 if(netif_running(netdev)) {
3049 e1000_down(adapter);
3050 e1000_up(adapter);
3051 }
3052
3053 adapter->hw.max_frame_size = max_frame;
3054
3055 return 0;
3056 }
3057
3058 /**
3059 * e1000_update_stats - Update the board statistics counters
3060 * @adapter: board private structure
3061 **/
3062
3063 void
3064 e1000_update_stats(struct e1000_adapter *adapter)
3065 {
3066 struct e1000_hw *hw = &adapter->hw;
3067 unsigned long flags;
3068 uint16_t phy_tmp;
3069
3070 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3071
3072 spin_lock_irqsave(&adapter->stats_lock, flags);
3073
3074 /* these counters are modified from e1000_adjust_tbi_stats,
3075 * called from the interrupt context, so they must only
3076 * be written while holding adapter->stats_lock
3077 */
3078
3079 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3080 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3081 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3082 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3083 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3084 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3085 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3086 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3087 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3088 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3089 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3090 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3091 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3092
3093 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3094 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3095 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3096 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3097 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3098 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3099 adapter->stats.dc += E1000_READ_REG(hw, DC);
3100 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3101 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3102 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3103 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3104 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3105 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3106 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3107 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3108 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3109 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3110 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3111 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3112 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3113 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3114 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3115 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3116 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3117 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3118 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3119 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3120 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3121 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3122 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3123 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3124 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3125 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3126 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3127
3128 /* used for adaptive IFS */
3129
3130 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3131 adapter->stats.tpt += hw->tx_packet_delta;
3132 hw->collision_delta = E1000_READ_REG(hw, COLC);
3133 adapter->stats.colc += hw->collision_delta;
3134
3135 if(hw->mac_type >= e1000_82543) {
3136 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3137 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3138 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3139 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3140 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3141 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3142 }
3143 if(hw->mac_type > e1000_82547_rev_2) {
3144 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3145 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3146 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3147 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3148 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3149 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3150 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3151 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3152 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3153 }
3154
3155 /* Fill out the OS statistics structure */
3156
3157 adapter->net_stats.rx_packets = adapter->stats.gprc;
3158 adapter->net_stats.tx_packets = adapter->stats.gptc;
3159 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3160 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3161 adapter->net_stats.multicast = adapter->stats.mprc;
3162 adapter->net_stats.collisions = adapter->stats.colc;
3163
3164 /* Rx Errors */
3165
3166 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3167 adapter->stats.crcerrs + adapter->stats.algnerrc +
3168 adapter->stats.rlec + adapter->stats.cexterr;
3169 adapter->net_stats.rx_dropped = 0;
3170 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3171 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3172 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3173 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3174
3175 /* Tx Errors */
3176
3177 adapter->net_stats.tx_errors = adapter->stats.ecol +
3178 adapter->stats.latecol;
3179 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3180 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3181 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3182
3183 /* Tx Dropped needs to be maintained elsewhere */
3184
3185 /* Phy Stats */
3186
3187 if(hw->media_type == e1000_media_type_copper) {
3188 if((adapter->link_speed == SPEED_1000) &&
3189 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3190 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3191 adapter->phy_stats.idle_errors += phy_tmp;
3192 }
3193
3194 if((hw->mac_type <= e1000_82546) &&
3195 (hw->phy_type == e1000_phy_m88) &&
3196 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3197 adapter->phy_stats.receive_errors += phy_tmp;
3198 }
3199
3200 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3201 }
3202
3203 #ifdef CONFIG_E1000_MQ
3204 void
3205 e1000_rx_schedule(void *data)
3206 {
3207 struct net_device *poll_dev, *netdev = data;
3208 struct e1000_adapter *adapter = netdev->priv;
3209 int this_cpu = get_cpu();
3210
3211 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3212 if (poll_dev == NULL) {
3213 put_cpu();
3214 return;
3215 }
3216
3217 if (likely(netif_rx_schedule_prep(poll_dev)))
3218 __netif_rx_schedule(poll_dev);
3219 else
3220 e1000_irq_enable(adapter);
3221
3222 put_cpu();
3223 }
3224 #endif
3225
3226 /**
3227 * e1000_intr - Interrupt Handler
3228 * @irq: interrupt number
3229 * @data: pointer to a network interface device structure
3230 * @pt_regs: CPU registers structure
3231 **/
3232
3233 static irqreturn_t
3234 e1000_intr(int irq, void *data, struct pt_regs *regs)
3235 {
3236 struct net_device *netdev = data;
3237 struct e1000_adapter *adapter = netdev_priv(netdev);
3238 struct e1000_hw *hw = &adapter->hw;
3239 uint32_t icr = E1000_READ_REG(hw, ICR);
3240 #if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
3241 int i;
3242 #endif
3243
3244 if(unlikely(!icr))
3245 return IRQ_NONE; /* Not our interrupt */
3246
3247 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3248 hw->get_link_status = 1;
3249 mod_timer(&adapter->watchdog_timer, jiffies);
3250 }
3251
3252 #ifdef CONFIG_E1000_NAPI
3253 atomic_inc(&adapter->irq_sem);
3254 E1000_WRITE_REG(hw, IMC, ~0);
3255 E1000_WRITE_FLUSH(hw);
3256 #ifdef CONFIG_E1000_MQ
3257 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
3258 /* We must setup the cpumask once count == 0 since
3259 * each cpu bit is cleared when the work is done. */
3260 adapter->rx_sched_call_data.cpumask = adapter->cpumask;
3261 atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
3262 atomic_set(&adapter->rx_sched_call_data.count,
3263 adapter->num_rx_queues);
3264 smp_call_async_mask(&adapter->rx_sched_call_data);
3265 } else {
3266 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
3267 }
3268 #else /* if !CONFIG_E1000_MQ */
3269 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3270 __netif_rx_schedule(&adapter->polling_netdev[0]);
3271 else
3272 e1000_irq_enable(adapter);
3273 #endif /* CONFIG_E1000_MQ */
3274
3275 #else /* if !CONFIG_E1000_NAPI */
3276 /* Writing IMC and IMS is needed for 82547.
3277 Due to Hub Link bus being occupied, an interrupt
3278 de-assertion message is not able to be sent.
3279 When an interrupt assertion message is generated later,
3280 two messages are re-ordered and sent out.
3281 That causes APIC to think 82547 is in de-assertion
3282 state, while 82547 is in assertion state, resulting
3283 in dead lock. Writing IMC forces 82547 into
3284 de-assertion state.
3285 */
3286 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3287 atomic_inc(&adapter->irq_sem);
3288 E1000_WRITE_REG(hw, IMC, ~0);
3289 }
3290
3291 for(i = 0; i < E1000_MAX_INTR; i++)
3292 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3293 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3294 break;
3295
3296 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3297 e1000_irq_enable(adapter);
3298
3299 #endif /* CONFIG_E1000_NAPI */
3300
3301 return IRQ_HANDLED;
3302 }
3303
3304 #ifdef CONFIG_E1000_NAPI
3305 /**
3306 * e1000_clean - NAPI Rx polling callback
3307 * @adapter: board private structure
3308 **/
3309
3310 static int
3311 e1000_clean(struct net_device *poll_dev, int *budget)
3312 {
3313 struct e1000_adapter *adapter;
3314 int work_to_do = min(*budget, poll_dev->quota);
3315 int tx_cleaned, i = 0, work_done = 0;
3316
3317 /* Must NOT use netdev_priv macro here. */
3318 adapter = poll_dev->priv;
3319
3320 /* Keep link state information with original netdev */
3321 if (!netif_carrier_ok(adapter->netdev))
3322 goto quit_polling;
3323
3324 while (poll_dev != &adapter->polling_netdev[i]) {
3325 i++;
3326 if (unlikely(i == adapter->num_rx_queues))
3327 BUG();
3328 }
3329
3330 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3331 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3332 &work_done, work_to_do);
3333
3334 *budget -= work_done;
3335 poll_dev->quota -= work_done;
3336
3337 /* If no Tx and not enough Rx work done, exit the polling mode */
3338 if((!tx_cleaned && (work_done == 0)) ||
3339 !netif_running(adapter->netdev)) {
3340 quit_polling:
3341 netif_rx_complete(poll_dev);
3342 e1000_irq_enable(adapter);
3343 return 0;
3344 }
3345
3346 return 1;
3347 }
3348
3349 #endif
3350 /**
3351 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3352 * @adapter: board private structure
3353 **/
3354
3355 static boolean_t
3356 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3357 struct e1000_tx_ring *tx_ring)
3358 {
3359 struct net_device *netdev = adapter->netdev;
3360 struct e1000_tx_desc *tx_desc, *eop_desc;
3361 struct e1000_buffer *buffer_info;
3362 unsigned int i, eop;
3363 boolean_t cleaned = FALSE;
3364
3365 i = tx_ring->next_to_clean;
3366 eop = tx_ring->buffer_info[i].next_to_watch;
3367 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3368
3369 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3370 for(cleaned = FALSE; !cleaned; ) {
3371 tx_desc = E1000_TX_DESC(*tx_ring, i);
3372 buffer_info = &tx_ring->buffer_info[i];
3373 cleaned = (i == eop);
3374
3375 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3376
3377 tx_desc->buffer_addr = 0;
3378 tx_desc->lower.data = 0;
3379 tx_desc->upper.data = 0;
3380
3381 if(unlikely(++i == tx_ring->count)) i = 0;
3382 }
3383
3384 #ifdef CONFIG_E1000_MQ
3385 tx_ring->tx_stats.packets++;
3386 #endif
3387
3388 eop = tx_ring->buffer_info[i].next_to_watch;
3389 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3390 }
3391
3392 tx_ring->next_to_clean = i;
3393
3394 spin_lock(&tx_ring->tx_lock);
3395
3396 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3397 netif_carrier_ok(netdev)))
3398 netif_wake_queue(netdev);
3399
3400 spin_unlock(&tx_ring->tx_lock);
3401
3402 if (adapter->detect_tx_hung) {
3403 /* Detect a transmit hang in hardware, this serializes the
3404 * check with the clearing of time_stamp and movement of i */
3405 adapter->detect_tx_hung = FALSE;
3406 if (tx_ring->buffer_info[eop].dma &&
3407 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3408 adapter->tx_timeout_factor * HZ)
3409 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3410 E1000_STATUS_TXOFF)) {
3411
3412 /* detected Tx unit hang */
3413 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3414 " Tx Queue <%lu>\n"
3415 " TDH <%x>\n"
3416 " TDT <%x>\n"
3417 " next_to_use <%x>\n"
3418 " next_to_clean <%x>\n"
3419 "buffer_info[next_to_clean]\n"
3420 " time_stamp <%lx>\n"
3421 " next_to_watch <%x>\n"
3422 " jiffies <%lx>\n"
3423 " next_to_watch.status <%x>\n",
3424 (unsigned long)((tx_ring - adapter->tx_ring) /
3425 sizeof(struct e1000_tx_ring)),
3426 readl(adapter->hw.hw_addr + tx_ring->tdh),
3427 readl(adapter->hw.hw_addr + tx_ring->tdt),
3428 tx_ring->next_to_use,
3429 tx_ring->next_to_clean,
3430 tx_ring->buffer_info[eop].time_stamp,
3431 eop,
3432 jiffies,
3433 eop_desc->upper.fields.status);
3434 netif_stop_queue(netdev);
3435 }
3436 }
3437 return cleaned;
3438 }
3439
3440 /**
3441 * e1000_rx_checksum - Receive Checksum Offload for 82543
3442 * @adapter: board private structure
3443 * @status_err: receive descriptor status and error fields
3444 * @csum: receive descriptor csum field
3445 * @sk_buff: socket buffer with received data
3446 **/
3447
3448 static inline void
3449 e1000_rx_checksum(struct e1000_adapter *adapter,
3450 uint32_t status_err, uint32_t csum,
3451 struct sk_buff *skb)
3452 {
3453 uint16_t status = (uint16_t)status_err;
3454 uint8_t errors = (uint8_t)(status_err >> 24);
3455 skb->ip_summed = CHECKSUM_NONE;
3456
3457 /* 82543 or newer only */
3458 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
3459 /* Ignore Checksum bit is set */
3460 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3461 /* TCP/UDP checksum error bit is set */
3462 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
3463 /* let the stack verify checksum errors */
3464 adapter->hw_csum_err++;
3465 return;
3466 }
3467 /* TCP/UDP Checksum has not been calculated */
3468 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3469 if(!(status & E1000_RXD_STAT_TCPCS))
3470 return;
3471 } else {
3472 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3473 return;
3474 }
3475 /* It must be a TCP or UDP packet with a valid checksum */
3476 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3477 /* TCP checksum is good */
3478 skb->ip_summed = CHECKSUM_UNNECESSARY;
3479 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3480 /* IP fragment with UDP payload */
3481 /* Hardware complements the payload checksum, so we undo it
3482 * and then put the value in host order for further stack use.
3483 */
3484 csum = ntohl(csum ^ 0xFFFF);
3485 skb->csum = csum;
3486 skb->ip_summed = CHECKSUM_HW;
3487 }
3488 adapter->hw_csum_good++;
3489 }
3490
3491 /**
3492 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3493 * @adapter: board private structure
3494 **/
3495
3496 static boolean_t
3497 #ifdef CONFIG_E1000_NAPI
3498 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3499 struct e1000_rx_ring *rx_ring,
3500 int *work_done, int work_to_do)
3501 #else
3502 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3503 struct e1000_rx_ring *rx_ring)
3504 #endif
3505 {
3506 struct net_device *netdev = adapter->netdev;
3507 struct pci_dev *pdev = adapter->pdev;
3508 struct e1000_rx_desc *rx_desc;
3509 struct e1000_buffer *buffer_info;
3510 struct sk_buff *skb;
3511 unsigned long flags;
3512 uint32_t length;
3513 uint8_t last_byte;
3514 unsigned int i;
3515 boolean_t cleaned = FALSE;
3516
3517 i = rx_ring->next_to_clean;
3518 rx_desc = E1000_RX_DESC(*rx_ring, i);
3519
3520 while(rx_desc->status & E1000_RXD_STAT_DD) {
3521 buffer_info = &rx_ring->buffer_info[i];
3522 #ifdef CONFIG_E1000_NAPI
3523 if(*work_done >= work_to_do)
3524 break;
3525 (*work_done)++;
3526 #endif
3527 cleaned = TRUE;
3528
3529 pci_unmap_single(pdev,
3530 buffer_info->dma,
3531 buffer_info->length,
3532 PCI_DMA_FROMDEVICE);
3533
3534 skb = buffer_info->skb;
3535 length = le16_to_cpu(rx_desc->length);
3536
3537 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3538 /* All receives must fit into a single buffer */
3539 E1000_DBG("%s: Receive packet consumed multiple"
3540 " buffers\n", netdev->name);
3541 dev_kfree_skb_irq(skb);
3542 goto next_desc;
3543 }
3544
3545 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3546 last_byte = *(skb->data + length - 1);
3547 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3548 rx_desc->errors, length, last_byte)) {
3549 spin_lock_irqsave(&adapter->stats_lock, flags);
3550 e1000_tbi_adjust_stats(&adapter->hw,
3551 &adapter->stats,
3552 length, skb->data);
3553 spin_unlock_irqrestore(&adapter->stats_lock,
3554 flags);
3555 length--;
3556 } else {
3557 dev_kfree_skb_irq(skb);
3558 goto next_desc;
3559 }
3560 }
3561
3562 /* Good Receive */
3563 skb_put(skb, length - ETHERNET_FCS_SIZE);
3564
3565 /* Receive Checksum Offload */
3566 e1000_rx_checksum(adapter,
3567 (uint32_t)(rx_desc->status) |
3568 ((uint32_t)(rx_desc->errors) << 24),
3569 rx_desc->csum, skb);
3570 skb->protocol = eth_type_trans(skb, netdev);
3571 #ifdef CONFIG_E1000_NAPI
3572 if(unlikely(adapter->vlgrp &&
3573 (rx_desc->status & E1000_RXD_STAT_VP))) {
3574 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3575 le16_to_cpu(rx_desc->special) &
3576 E1000_RXD_SPC_VLAN_MASK);
3577 } else {
3578 netif_receive_skb(skb);
3579 }
3580 #else /* CONFIG_E1000_NAPI */
3581 if(unlikely(adapter->vlgrp &&
3582 (rx_desc->status & E1000_RXD_STAT_VP))) {
3583 vlan_hwaccel_rx(skb, adapter->vlgrp,
3584 le16_to_cpu(rx_desc->special) &
3585 E1000_RXD_SPC_VLAN_MASK);
3586 } else {
3587 netif_rx(skb);
3588 }
3589 #endif /* CONFIG_E1000_NAPI */
3590 netdev->last_rx = jiffies;
3591 #ifdef CONFIG_E1000_MQ
3592 rx_ring->rx_stats.packets++;
3593 rx_ring->rx_stats.bytes += length;
3594 #endif
3595
3596 next_desc:
3597 rx_desc->status = 0;
3598 buffer_info->skb = NULL;
3599 if(unlikely(++i == rx_ring->count)) i = 0;
3600
3601 rx_desc = E1000_RX_DESC(*rx_ring, i);
3602 }
3603 rx_ring->next_to_clean = i;
3604 adapter->alloc_rx_buf(adapter, rx_ring);
3605
3606 return cleaned;
3607 }
3608
3609 /**
3610 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3611 * @adapter: board private structure
3612 **/
3613
3614 static boolean_t
3615 #ifdef CONFIG_E1000_NAPI
3616 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3617 struct e1000_rx_ring *rx_ring,
3618 int *work_done, int work_to_do)
3619 #else
3620 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3621 struct e1000_rx_ring *rx_ring)
3622 #endif
3623 {
3624 union e1000_rx_desc_packet_split *rx_desc;
3625 struct net_device *netdev = adapter->netdev;
3626 struct pci_dev *pdev = adapter->pdev;
3627 struct e1000_buffer *buffer_info;
3628 struct e1000_ps_page *ps_page;
3629 struct e1000_ps_page_dma *ps_page_dma;
3630 struct sk_buff *skb;
3631 unsigned int i, j;
3632 uint32_t length, staterr;
3633 boolean_t cleaned = FALSE;
3634
3635 i = rx_ring->next_to_clean;
3636 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3637 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3638
3639 while(staterr & E1000_RXD_STAT_DD) {
3640 buffer_info = &rx_ring->buffer_info[i];
3641 ps_page = &rx_ring->ps_page[i];
3642 ps_page_dma = &rx_ring->ps_page_dma[i];
3643 #ifdef CONFIG_E1000_NAPI
3644 if(unlikely(*work_done >= work_to_do))
3645 break;
3646 (*work_done)++;
3647 #endif
3648 cleaned = TRUE;
3649 pci_unmap_single(pdev, buffer_info->dma,
3650 buffer_info->length,
3651 PCI_DMA_FROMDEVICE);
3652
3653 skb = buffer_info->skb;
3654
3655 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3656 E1000_DBG("%s: Packet Split buffers didn't pick up"
3657 " the full packet\n", netdev->name);
3658 dev_kfree_skb_irq(skb);
3659 goto next_desc;
3660 }
3661
3662 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3663 dev_kfree_skb_irq(skb);
3664 goto next_desc;
3665 }
3666
3667 length = le16_to_cpu(rx_desc->wb.middle.length0);
3668
3669 if(unlikely(!length)) {
3670 E1000_DBG("%s: Last part of the packet spanning"
3671 " multiple descriptors\n", netdev->name);
3672 dev_kfree_skb_irq(skb);
3673 goto next_desc;
3674 }
3675
3676 /* Good Receive */
3677 skb_put(skb, length);
3678
3679 for(j = 0; j < adapter->rx_ps_pages; j++) {
3680 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3681 break;
3682
3683 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3684 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3685 ps_page_dma->ps_page_dma[j] = 0;
3686 skb_shinfo(skb)->frags[j].page =
3687 ps_page->ps_page[j];
3688 ps_page->ps_page[j] = NULL;
3689 skb_shinfo(skb)->frags[j].page_offset = 0;
3690 skb_shinfo(skb)->frags[j].size = length;
3691 skb_shinfo(skb)->nr_frags++;
3692 skb->len += length;
3693 skb->data_len += length;
3694 }
3695
3696 e1000_rx_checksum(adapter, staterr,
3697 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3698 skb->protocol = eth_type_trans(skb, netdev);
3699
3700 if(likely(rx_desc->wb.upper.header_status &
3701 E1000_RXDPS_HDRSTAT_HDRSP)) {
3702 adapter->rx_hdr_split++;
3703 #ifdef HAVE_RX_ZERO_COPY
3704 skb_shinfo(skb)->zero_copy = TRUE;
3705 #endif
3706 }
3707 #ifdef CONFIG_E1000_NAPI
3708 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3709 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3710 le16_to_cpu(rx_desc->wb.middle.vlan) &
3711 E1000_RXD_SPC_VLAN_MASK);
3712 } else {
3713 netif_receive_skb(skb);
3714 }
3715 #else /* CONFIG_E1000_NAPI */
3716 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3717 vlan_hwaccel_rx(skb, adapter->vlgrp,
3718 le16_to_cpu(rx_desc->wb.middle.vlan) &
3719 E1000_RXD_SPC_VLAN_MASK);
3720 } else {
3721 netif_rx(skb);
3722 }
3723 #endif /* CONFIG_E1000_NAPI */
3724 netdev->last_rx = jiffies;
3725 #ifdef CONFIG_E1000_MQ
3726 rx_ring->rx_stats.packets++;
3727 rx_ring->rx_stats.bytes += length;
3728 #endif
3729
3730 next_desc:
3731 rx_desc->wb.middle.status_error &= ~0xFF;
3732 buffer_info->skb = NULL;
3733 if(unlikely(++i == rx_ring->count)) i = 0;
3734
3735 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3736 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3737 }
3738 rx_ring->next_to_clean = i;
3739 adapter->alloc_rx_buf(adapter, rx_ring);
3740
3741 return cleaned;
3742 }
3743
3744 /**
3745 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
3746 * @adapter: address of board private structure
3747 **/
3748
3749 static void
3750 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3751 struct e1000_rx_ring *rx_ring)
3752 {
3753 struct net_device *netdev = adapter->netdev;
3754 struct pci_dev *pdev = adapter->pdev;
3755 struct e1000_rx_desc *rx_desc;
3756 struct e1000_buffer *buffer_info;
3757 struct sk_buff *skb;
3758 unsigned int i;
3759 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
3760
3761 i = rx_ring->next_to_use;
3762 buffer_info = &rx_ring->buffer_info[i];
3763
3764 while(!buffer_info->skb) {
3765 skb = dev_alloc_skb(bufsz);
3766
3767 if(unlikely(!skb)) {
3768 /* Better luck next round */
3769 break;
3770 }
3771
3772 /* Fix for errata 23, can't cross 64kB boundary */
3773 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3774 struct sk_buff *oldskb = skb;
3775 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3776 "at %p\n", bufsz, skb->data);
3777 /* Try again, without freeing the previous */
3778 skb = dev_alloc_skb(bufsz);
3779 /* Failed allocation, critical failure */
3780 if (!skb) {
3781 dev_kfree_skb(oldskb);
3782 break;
3783 }
3784
3785 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3786 /* give up */
3787 dev_kfree_skb(skb);
3788 dev_kfree_skb(oldskb);
3789 break; /* while !buffer_info->skb */
3790 } else {
3791 /* Use new allocation */
3792 dev_kfree_skb(oldskb);
3793 }
3794 }
3795 /* Make buffer alignment 2 beyond a 16 byte boundary
3796 * this will result in a 16 byte aligned IP header after
3797 * the 14 byte MAC header is removed
3798 */
3799 skb_reserve(skb, NET_IP_ALIGN);
3800
3801 skb->dev = netdev;
3802
3803 buffer_info->skb = skb;
3804 buffer_info->length = adapter->rx_buffer_len;
3805 buffer_info->dma = pci_map_single(pdev,
3806 skb->data,
3807 adapter->rx_buffer_len,
3808 PCI_DMA_FROMDEVICE);
3809
3810 /* Fix for errata 23, can't cross 64kB boundary */
3811 if (!e1000_check_64k_bound(adapter,
3812 (void *)(unsigned long)buffer_info->dma,
3813 adapter->rx_buffer_len)) {
3814 DPRINTK(RX_ERR, ERR,
3815 "dma align check failed: %u bytes at %p\n",
3816 adapter->rx_buffer_len,
3817 (void *)(unsigned long)buffer_info->dma);
3818 dev_kfree_skb(skb);
3819 buffer_info->skb = NULL;
3820
3821 pci_unmap_single(pdev, buffer_info->dma,
3822 adapter->rx_buffer_len,
3823 PCI_DMA_FROMDEVICE);
3824
3825 break; /* while !buffer_info->skb */
3826 }
3827 rx_desc = E1000_RX_DESC(*rx_ring, i);
3828 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3829
3830 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3831 /* Force memory writes to complete before letting h/w
3832 * know there are new descriptors to fetch. (Only
3833 * applicable for weak-ordered memory model archs,
3834 * such as IA-64). */
3835 wmb();
3836 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3837 }
3838
3839 if(unlikely(++i == rx_ring->count)) i = 0;
3840 buffer_info = &rx_ring->buffer_info[i];
3841 }
3842
3843 rx_ring->next_to_use = i;
3844 }
3845
3846 /**
3847 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3848 * @adapter: address of board private structure
3849 **/
3850
3851 static void
3852 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3853 struct e1000_rx_ring *rx_ring)
3854 {
3855 struct net_device *netdev = adapter->netdev;
3856 struct pci_dev *pdev = adapter->pdev;
3857 union e1000_rx_desc_packet_split *rx_desc;
3858 struct e1000_buffer *buffer_info;
3859 struct e1000_ps_page *ps_page;
3860 struct e1000_ps_page_dma *ps_page_dma;
3861 struct sk_buff *skb;
3862 unsigned int i, j;
3863
3864 i = rx_ring->next_to_use;
3865 buffer_info = &rx_ring->buffer_info[i];
3866 ps_page = &rx_ring->ps_page[i];
3867 ps_page_dma = &rx_ring->ps_page_dma[i];
3868
3869 while(!buffer_info->skb) {
3870 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3871
3872 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
3873 if (j < adapter->rx_ps_pages) {
3874 if (likely(!ps_page->ps_page[j])) {
3875 ps_page->ps_page[j] =
3876 alloc_page(GFP_ATOMIC);
3877 if (unlikely(!ps_page->ps_page[j]))
3878 goto no_buffers;
3879 ps_page_dma->ps_page_dma[j] =
3880 pci_map_page(pdev,
3881 ps_page->ps_page[j],
3882 0, PAGE_SIZE,
3883 PCI_DMA_FROMDEVICE);
3884 }
3885 /* Refresh the desc even if buffer_addrs didn't
3886 * change because each write-back erases
3887 * this info.
3888 */
3889 rx_desc->read.buffer_addr[j+1] =
3890 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3891 } else
3892 rx_desc->read.buffer_addr[j+1] = ~0;
3893 }
3894
3895 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3896
3897 if(unlikely(!skb))
3898 break;
3899
3900 /* Make buffer alignment 2 beyond a 16 byte boundary
3901 * this will result in a 16 byte aligned IP header after
3902 * the 14 byte MAC header is removed
3903 */
3904 skb_reserve(skb, NET_IP_ALIGN);
3905
3906 skb->dev = netdev;
3907
3908 buffer_info->skb = skb;
3909 buffer_info->length = adapter->rx_ps_bsize0;
3910 buffer_info->dma = pci_map_single(pdev, skb->data,
3911 adapter->rx_ps_bsize0,
3912 PCI_DMA_FROMDEVICE);
3913
3914 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3915
3916 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3917 /* Force memory writes to complete before letting h/w
3918 * know there are new descriptors to fetch. (Only
3919 * applicable for weak-ordered memory model archs,
3920 * such as IA-64). */
3921 wmb();
3922 /* Hardware increments by 16 bytes, but packet split
3923 * descriptors are 32 bytes...so we increment tail
3924 * twice as much.
3925 */
3926 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
3927 }
3928
3929 if(unlikely(++i == rx_ring->count)) i = 0;
3930 buffer_info = &rx_ring->buffer_info[i];
3931 ps_page = &rx_ring->ps_page[i];
3932 ps_page_dma = &rx_ring->ps_page_dma[i];
3933 }
3934
3935 no_buffers:
3936 rx_ring->next_to_use = i;
3937 }
3938
3939 /**
3940 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3941 * @adapter:
3942 **/
3943
3944 static void
3945 e1000_smartspeed(struct e1000_adapter *adapter)
3946 {
3947 uint16_t phy_status;
3948 uint16_t phy_ctrl;
3949
3950 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
3951 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
3952 return;
3953
3954 if(adapter->smartspeed == 0) {
3955 /* If Master/Slave config fault is asserted twice,
3956 * we assume back-to-back */
3957 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3958 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3959 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3960 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3961 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3962 if(phy_ctrl & CR_1000T_MS_ENABLE) {
3963 phy_ctrl &= ~CR_1000T_MS_ENABLE;
3964 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
3965 phy_ctrl);
3966 adapter->smartspeed++;
3967 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3968 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
3969 &phy_ctrl)) {
3970 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3971 MII_CR_RESTART_AUTO_NEG);
3972 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
3973 phy_ctrl);
3974 }
3975 }
3976 return;
3977 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
3978 /* If still no link, perhaps using 2/3 pair cable */
3979 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3980 phy_ctrl |= CR_1000T_MS_ENABLE;
3981 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
3982 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3983 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
3984 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3985 MII_CR_RESTART_AUTO_NEG);
3986 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
3987 }
3988 }
3989 /* Restart process after E1000_SMARTSPEED_MAX iterations */
3990 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
3991 adapter->smartspeed = 0;
3992 }
3993
3994 /**
3995 * e1000_ioctl -
3996 * @netdev:
3997 * @ifreq:
3998 * @cmd:
3999 **/
4000
4001 static int
4002 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4003 {
4004 switch (cmd) {
4005 case SIOCGMIIPHY:
4006 case SIOCGMIIREG:
4007 case SIOCSMIIREG:
4008 return e1000_mii_ioctl(netdev, ifr, cmd);
4009 default:
4010 return -EOPNOTSUPP;
4011 }
4012 }
4013
4014 /**
4015 * e1000_mii_ioctl -
4016 * @netdev:
4017 * @ifreq:
4018 * @cmd:
4019 **/
4020
4021 static int
4022 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4023 {
4024 struct e1000_adapter *adapter = netdev_priv(netdev);
4025 struct mii_ioctl_data *data = if_mii(ifr);
4026 int retval;
4027 uint16_t mii_reg;
4028 uint16_t spddplx;
4029 unsigned long flags;
4030
4031 if(adapter->hw.media_type != e1000_media_type_copper)
4032 return -EOPNOTSUPP;
4033
4034 switch (cmd) {
4035 case SIOCGMIIPHY:
4036 data->phy_id = adapter->hw.phy_addr;
4037 break;
4038 case SIOCGMIIREG:
4039 if(!capable(CAP_NET_ADMIN))
4040 return -EPERM;
4041 spin_lock_irqsave(&adapter->stats_lock, flags);
4042 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4043 &data->val_out)) {
4044 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4045 return -EIO;
4046 }
4047 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4048 break;
4049 case SIOCSMIIREG:
4050 if(!capable(CAP_NET_ADMIN))
4051 return -EPERM;
4052 if(data->reg_num & ~(0x1F))
4053 return -EFAULT;
4054 mii_reg = data->val_in;
4055 spin_lock_irqsave(&adapter->stats_lock, flags);
4056 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
4057 mii_reg)) {
4058 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4059 return -EIO;
4060 }
4061 if(adapter->hw.phy_type == e1000_phy_m88) {
4062 switch (data->reg_num) {
4063 case PHY_CTRL:
4064 if(mii_reg & MII_CR_POWER_DOWN)
4065 break;
4066 if(mii_reg & MII_CR_AUTO_NEG_EN) {
4067 adapter->hw.autoneg = 1;
4068 adapter->hw.autoneg_advertised = 0x2F;
4069 } else {
4070 if (mii_reg & 0x40)
4071 spddplx = SPEED_1000;
4072 else if (mii_reg & 0x2000)
4073 spddplx = SPEED_100;
4074 else
4075 spddplx = SPEED_10;
4076 spddplx += (mii_reg & 0x100)
4077 ? FULL_DUPLEX :
4078 HALF_DUPLEX;
4079 retval = e1000_set_spd_dplx(adapter,
4080 spddplx);
4081 if(retval) {
4082 spin_unlock_irqrestore(
4083 &adapter->stats_lock,
4084 flags);
4085 return retval;
4086 }
4087 }
4088 if(netif_running(adapter->netdev)) {
4089 e1000_down(adapter);
4090 e1000_up(adapter);
4091 } else
4092 e1000_reset(adapter);
4093 break;
4094 case M88E1000_PHY_SPEC_CTRL:
4095 case M88E1000_EXT_PHY_SPEC_CTRL:
4096 if(e1000_phy_reset(&adapter->hw)) {
4097 spin_unlock_irqrestore(
4098 &adapter->stats_lock, flags);
4099 return -EIO;
4100 }
4101 break;
4102 }
4103 } else {
4104 switch (data->reg_num) {
4105 case PHY_CTRL:
4106 if(mii_reg & MII_CR_POWER_DOWN)
4107 break;
4108 if(netif_running(adapter->netdev)) {
4109 e1000_down(adapter);
4110 e1000_up(adapter);
4111 } else
4112 e1000_reset(adapter);
4113 break;
4114 }
4115 }
4116 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4117 break;
4118 default:
4119 return -EOPNOTSUPP;
4120 }
4121 return E1000_SUCCESS;
4122 }
4123
4124 void
4125 e1000_pci_set_mwi(struct e1000_hw *hw)
4126 {
4127 struct e1000_adapter *adapter = hw->back;
4128 int ret_val = pci_set_mwi(adapter->pdev);
4129
4130 if(ret_val)
4131 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4132 }
4133
4134 void
4135 e1000_pci_clear_mwi(struct e1000_hw *hw)
4136 {
4137 struct e1000_adapter *adapter = hw->back;
4138
4139 pci_clear_mwi(adapter->pdev);
4140 }
4141
4142 void
4143 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4144 {
4145 struct e1000_adapter *adapter = hw->back;
4146
4147 pci_read_config_word(adapter->pdev, reg, value);
4148 }
4149
4150 void
4151 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4152 {
4153 struct e1000_adapter *adapter = hw->back;
4154
4155 pci_write_config_word(adapter->pdev, reg, *value);
4156 }
4157
4158 uint32_t
4159 e1000_io_read(struct e1000_hw *hw, unsigned long port)
4160 {
4161 return inl(port);
4162 }
4163
4164 void
4165 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4166 {
4167 outl(value, port);
4168 }
4169
4170 static void
4171 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4172 {
4173 struct e1000_adapter *adapter = netdev_priv(netdev);
4174 uint32_t ctrl, rctl;
4175
4176 e1000_irq_disable(adapter);
4177 adapter->vlgrp = grp;
4178
4179 if(grp) {
4180 /* enable VLAN tag insert/strip */
4181 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4182 ctrl |= E1000_CTRL_VME;
4183 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4184
4185 /* enable VLAN receive filtering */
4186 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4187 rctl |= E1000_RCTL_VFE;
4188 rctl &= ~E1000_RCTL_CFIEN;
4189 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4190 e1000_update_mng_vlan(adapter);
4191 } else {
4192 /* disable VLAN tag insert/strip */
4193 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4194 ctrl &= ~E1000_CTRL_VME;
4195 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4196
4197 /* disable VLAN filtering */
4198 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4199 rctl &= ~E1000_RCTL_VFE;
4200 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4201 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4202 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4203 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4204 }
4205 }
4206
4207 e1000_irq_enable(adapter);
4208 }
4209
4210 static void
4211 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4212 {
4213 struct e1000_adapter *adapter = netdev_priv(netdev);
4214 uint32_t vfta, index;
4215 if((adapter->hw.mng_cookie.status &
4216 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4217 (vid == adapter->mng_vlan_id))
4218 return;
4219 /* add VID to filter table */
4220 index = (vid >> 5) & 0x7F;
4221 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4222 vfta |= (1 << (vid & 0x1F));
4223 e1000_write_vfta(&adapter->hw, index, vfta);
4224 }
4225
4226 static void
4227 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4228 {
4229 struct e1000_adapter *adapter = netdev_priv(netdev);
4230 uint32_t vfta, index;
4231
4232 e1000_irq_disable(adapter);
4233
4234 if(adapter->vlgrp)
4235 adapter->vlgrp->vlan_devices[vid] = NULL;
4236
4237 e1000_irq_enable(adapter);
4238
4239 if((adapter->hw.mng_cookie.status &
4240 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4241 (vid == adapter->mng_vlan_id))
4242 return;
4243 /* remove VID from filter table */
4244 index = (vid >> 5) & 0x7F;
4245 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4246 vfta &= ~(1 << (vid & 0x1F));
4247 e1000_write_vfta(&adapter->hw, index, vfta);
4248 }
4249
4250 static void
4251 e1000_restore_vlan(struct e1000_adapter *adapter)
4252 {
4253 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4254
4255 if(adapter->vlgrp) {
4256 uint16_t vid;
4257 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4258 if(!adapter->vlgrp->vlan_devices[vid])
4259 continue;
4260 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4261 }
4262 }
4263 }
4264
4265 int
4266 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4267 {
4268 adapter->hw.autoneg = 0;
4269
4270 /* Fiber NICs only allow 1000 gbps Full duplex */
4271 if((adapter->hw.media_type == e1000_media_type_fiber) &&
4272 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4273 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4274 return -EINVAL;
4275 }
4276
4277 switch(spddplx) {
4278 case SPEED_10 + DUPLEX_HALF:
4279 adapter->hw.forced_speed_duplex = e1000_10_half;
4280 break;
4281 case SPEED_10 + DUPLEX_FULL:
4282 adapter->hw.forced_speed_duplex = e1000_10_full;
4283 break;
4284 case SPEED_100 + DUPLEX_HALF:
4285 adapter->hw.forced_speed_duplex = e1000_100_half;
4286 break;
4287 case SPEED_100 + DUPLEX_FULL:
4288 adapter->hw.forced_speed_duplex = e1000_100_full;
4289 break;
4290 case SPEED_1000 + DUPLEX_FULL:
4291 adapter->hw.autoneg = 1;
4292 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4293 break;
4294 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4295 default:
4296 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4297 return -EINVAL;
4298 }
4299 return 0;
4300 }
4301
4302 #ifdef CONFIG_PM
4303 static int
4304 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4305 {
4306 struct net_device *netdev = pci_get_drvdata(pdev);
4307 struct e1000_adapter *adapter = netdev_priv(netdev);
4308 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4309 uint32_t wufc = adapter->wol;
4310
4311 netif_device_detach(netdev);
4312
4313 if(netif_running(netdev))
4314 e1000_down(adapter);
4315
4316 status = E1000_READ_REG(&adapter->hw, STATUS);
4317 if(status & E1000_STATUS_LU)
4318 wufc &= ~E1000_WUFC_LNKC;
4319
4320 if(wufc) {
4321 e1000_setup_rctl(adapter);
4322 e1000_set_multi(netdev);
4323
4324 /* turn on all-multi mode if wake on multicast is enabled */
4325 if(adapter->wol & E1000_WUFC_MC) {
4326 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4327 rctl |= E1000_RCTL_MPE;
4328 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4329 }
4330
4331 if(adapter->hw.mac_type >= e1000_82540) {
4332 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4333 /* advertise wake from D3Cold */
4334 #define E1000_CTRL_ADVD3WUC 0x00100000
4335 /* phy power management enable */
4336 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4337 ctrl |= E1000_CTRL_ADVD3WUC |
4338 E1000_CTRL_EN_PHY_PWR_MGMT;
4339 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4340 }
4341
4342 if(adapter->hw.media_type == e1000_media_type_fiber ||
4343 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4344 /* keep the laser running in D3 */
4345 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4346 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4347 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4348 }
4349
4350 /* Allow time for pending master requests to run */
4351 e1000_disable_pciex_master(&adapter->hw);
4352
4353 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4354 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4355 pci_enable_wake(pdev, 3, 1);
4356 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4357 } else {
4358 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4359 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4360 pci_enable_wake(pdev, 3, 0);
4361 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4362 }
4363
4364 pci_save_state(pdev);
4365
4366 if(adapter->hw.mac_type >= e1000_82540 &&
4367 adapter->hw.media_type == e1000_media_type_copper) {
4368 manc = E1000_READ_REG(&adapter->hw, MANC);
4369 if(manc & E1000_MANC_SMBUS_EN) {
4370 manc |= E1000_MANC_ARP_EN;
4371 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4372 pci_enable_wake(pdev, 3, 1);
4373 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4374 }
4375 }
4376
4377 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4378 * would have already happened in close and is redundant. */
4379 e1000_release_hw_control(adapter);
4380
4381 pci_disable_device(pdev);
4382 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4383
4384 return 0;
4385 }
4386
4387 static int
4388 e1000_resume(struct pci_dev *pdev)
4389 {
4390 struct net_device *netdev = pci_get_drvdata(pdev);
4391 struct e1000_adapter *adapter = netdev_priv(netdev);
4392 uint32_t manc, ret_val;
4393
4394 pci_set_power_state(pdev, PCI_D0);
4395 pci_restore_state(pdev);
4396 ret_val = pci_enable_device(pdev);
4397 pci_set_master(pdev);
4398
4399 pci_enable_wake(pdev, PCI_D3hot, 0);
4400 pci_enable_wake(pdev, PCI_D3cold, 0);
4401
4402 e1000_reset(adapter);
4403 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4404
4405 if(netif_running(netdev))
4406 e1000_up(adapter);
4407
4408 netif_device_attach(netdev);
4409
4410 if(adapter->hw.mac_type >= e1000_82540 &&
4411 adapter->hw.media_type == e1000_media_type_copper) {
4412 manc = E1000_READ_REG(&adapter->hw, MANC);
4413 manc &= ~(E1000_MANC_ARP_EN);
4414 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4415 }
4416
4417 /* If the controller is 82573 and f/w is AMT, do not set
4418 * DRV_LOAD until the interface is up. For all other cases,
4419 * let the f/w know that the h/w is now under the control
4420 * of the driver. */
4421 if (adapter->hw.mac_type != e1000_82573 ||
4422 !e1000_check_mng_mode(&adapter->hw))
4423 e1000_get_hw_control(adapter);
4424
4425 return 0;
4426 }
4427 #endif
4428 #ifdef CONFIG_NET_POLL_CONTROLLER
4429 /*
4430 * Polling 'interrupt' - used by things like netconsole to send skbs
4431 * without having to re-enable interrupts. It's not called while
4432 * the interrupt routine is executing.
4433 */
4434 static void
4435 e1000_netpoll(struct net_device *netdev)
4436 {
4437 struct e1000_adapter *adapter = netdev_priv(netdev);
4438 disable_irq(adapter->pdev->irq);
4439 e1000_intr(adapter->pdev->irq, netdev, NULL);
4440 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4441 enable_irq(adapter->pdev->irq);
4442 }
4443 #endif
4444
4445 /* e1000_main.c */
Linux 2.6 libata-dev (mirror)