2 * twl6030-irq.c - TWL6030 irq support
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/init.h>
35 #include <linux/export.h>
36 #include <linux/interrupt.h>
37 #include <linux/irq.h>
38 #include <linux/kthread.h>
39 #include <linux/i2c/twl.h>
40 #include <linux/platform_device.h>
41 #include <linux/suspend.h>
43 #include <linux/irqdomain.h>
48 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
49 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
50 * It exposes status bits saying who has raised an interrupt. There are
51 * three mask registers that corresponds to these status registers, that
52 * enables/disables these interrupts.
54 * We set up IRQs starting at a platform-specified base. An interrupt map table,
55 * specifies mapping between interrupt number and the associated module.
57 #define TWL6030_NR_IRQS 20
59 static int twl6030_interrupt_mapping
[24] = {
60 PWR_INTR_OFFSET
, /* Bit 0 PWRON */
61 PWR_INTR_OFFSET
, /* Bit 1 RPWRON */
62 PWR_INTR_OFFSET
, /* Bit 2 BAT_VLOW */
63 RTC_INTR_OFFSET
, /* Bit 3 RTC_ALARM */
64 RTC_INTR_OFFSET
, /* Bit 4 RTC_PERIOD */
65 HOTDIE_INTR_OFFSET
, /* Bit 5 HOT_DIE */
66 SMPSLDO_INTR_OFFSET
, /* Bit 6 VXXX_SHORT */
67 SMPSLDO_INTR_OFFSET
, /* Bit 7 VMMC_SHORT */
69 SMPSLDO_INTR_OFFSET
, /* Bit 8 VUSIM_SHORT */
70 BATDETECT_INTR_OFFSET
, /* Bit 9 BAT */
71 SIMDETECT_INTR_OFFSET
, /* Bit 10 SIM */
72 MMCDETECT_INTR_OFFSET
, /* Bit 11 MMC */
73 RSV_INTR_OFFSET
, /* Bit 12 Reserved */
74 MADC_INTR_OFFSET
, /* Bit 13 GPADC_RT_EOC */
75 MADC_INTR_OFFSET
, /* Bit 14 GPADC_SW_EOC */
76 GASGAUGE_INTR_OFFSET
, /* Bit 15 CC_AUTOCAL */
78 USBOTG_INTR_OFFSET
, /* Bit 16 ID_WKUP */
79 USBOTG_INTR_OFFSET
, /* Bit 17 VBUS_WKUP */
80 USBOTG_INTR_OFFSET
, /* Bit 18 ID */
81 USB_PRES_INTR_OFFSET
, /* Bit 19 VBUS */
82 CHARGER_INTR_OFFSET
, /* Bit 20 CHRG_CTRL */
83 CHARGERFAULT_INTR_OFFSET
, /* Bit 21 EXT_CHRG */
84 CHARGERFAULT_INTR_OFFSET
, /* Bit 22 INT_CHRG */
85 RSV_INTR_OFFSET
, /* Bit 23 Reserved */
87 /*----------------------------------------------------------------------*/
89 static unsigned twl6030_irq_base
;
91 static bool twl_irq_wake_enabled
;
93 static struct completion irq_event
;
94 static atomic_t twl6030_wakeirqs
= ATOMIC_INIT(0);
96 static int twl6030_irq_pm_notifier(struct notifier_block
*notifier
,
97 unsigned long pm_event
, void *unused
)
102 case PM_SUSPEND_PREPARE
:
103 chained_wakeups
= atomic_read(&twl6030_wakeirqs
);
105 if (chained_wakeups
&& !twl_irq_wake_enabled
) {
106 if (enable_irq_wake(twl_irq
))
107 pr_err("twl6030 IRQ wake enable failed\n");
109 twl_irq_wake_enabled
= true;
110 } else if (!chained_wakeups
&& twl_irq_wake_enabled
) {
111 disable_irq_wake(twl_irq
);
112 twl_irq_wake_enabled
= false;
115 disable_irq(twl_irq
);
118 case PM_POST_SUSPEND
:
129 static struct notifier_block twl6030_irq_pm_notifier_block
= {
130 .notifier_call
= twl6030_irq_pm_notifier
,
134 * This thread processes interrupts reported by the Primary Interrupt Handler.
136 static int twl6030_irq_thread(void *data
)
138 long irq
= (long)data
;
139 static unsigned i2c_errors
;
140 static const unsigned max_i2c_errors
= 100;
143 while (!kthread_should_stop()) {
150 /* Wait for IRQ, then read PIH irq status (also blocking) */
151 wait_for_completion_interruptible(&irq_event
);
153 /* read INT_STS_A, B and C in one shot using a burst read */
154 ret
= twl_i2c_read(TWL_MODULE_PIH
, sts
.bytes
,
157 pr_warning("twl6030: I2C error %d reading PIH ISR\n",
159 if (++i2c_errors
>= max_i2c_errors
) {
160 printk(KERN_ERR
"Maximum I2C error count"
161 " exceeded. Terminating %s.\n",
165 complete(&irq_event
);
171 sts
.bytes
[3] = 0; /* Only 24 bits are valid*/
174 * Since VBUS status bit is not reliable for VBUS disconnect
175 * use CHARGER VBUS detection status bit instead.
177 if (sts
.bytes
[2] & 0x10)
178 sts
.bytes
[2] |= 0x08;
180 for (i
= 0; sts
.int_sts
; sts
.int_sts
>>= 1, i
++) {
182 if (sts
.int_sts
& 0x1) {
183 int module_irq
= twl6030_irq_base
+
184 twl6030_interrupt_mapping
[i
];
185 generic_handle_irq(module_irq
);
193 * Simulation confirms that documentation is wrong w.r.t the
194 * interrupt status clear operation. A single *byte* write to
195 * any one of STS_A to STS_C register results in all three
196 * STS registers being reset. Since it does not matter which
197 * value is written, all three registers are cleared on a
198 * single byte write, so we just use 0x0 to clear.
200 ret
= twl_i2c_write_u8(TWL_MODULE_PIH
, 0x00, REG_INT_STS_A
);
202 pr_warning("twl6030: I2C error in clearing PIH ISR\n");
211 * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
212 * This is a chained interrupt, so there is no desc->action method for it.
213 * Now we need to query the interrupt controller in the twl6030 to determine
214 * which module is generating the interrupt request. However, we can't do i2c
215 * transactions in interrupt context, so we must defer that work to a kernel
216 * thread. All we do here is acknowledge and mask the interrupt and wakeup
219 static irqreturn_t
handle_twl6030_pih(int irq
, void *devid
)
221 disable_irq_nosync(irq
);
226 /*----------------------------------------------------------------------*/
228 static inline void activate_irq(int irq
)
231 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
232 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
234 set_irq_flags(irq
, IRQF_VALID
);
236 /* same effect on other architectures */
237 irq_set_noprobe(irq
);
241 static int twl6030_irq_set_wake(struct irq_data
*d
, unsigned int on
)
244 atomic_inc(&twl6030_wakeirqs
);
246 atomic_dec(&twl6030_wakeirqs
);
251 int twl6030_interrupt_unmask(u8 bit_mask
, u8 offset
)
255 ret
= twl_i2c_read_u8(TWL_MODULE_PIH
, &unmask_value
,
256 REG_INT_STS_A
+ offset
);
257 unmask_value
&= (~(bit_mask
));
258 ret
|= twl_i2c_write_u8(TWL_MODULE_PIH
, unmask_value
,
259 REG_INT_STS_A
+ offset
); /* unmask INT_MSK_A/B/C */
262 EXPORT_SYMBOL(twl6030_interrupt_unmask
);
264 int twl6030_interrupt_mask(u8 bit_mask
, u8 offset
)
268 ret
= twl_i2c_read_u8(TWL_MODULE_PIH
, &mask_value
,
269 REG_INT_STS_A
+ offset
);
270 mask_value
|= (bit_mask
);
271 ret
|= twl_i2c_write_u8(TWL_MODULE_PIH
, mask_value
,
272 REG_INT_STS_A
+ offset
); /* mask INT_MSK_A/B/C */
275 EXPORT_SYMBOL(twl6030_interrupt_mask
);
277 int twl6030_mmc_card_detect_config(void)
282 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
283 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK
,
285 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK
,
288 * Initially Configuring MMC_CTRL for receiving interrupts &
289 * Card status on TWL6030 for MMC1
291 ret
= twl_i2c_read_u8(TWL6030_MODULE_ID0
, ®_val
, TWL6030_MMCCTRL
);
293 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret
);
296 reg_val
&= ~VMMC_AUTO_OFF
;
298 ret
= twl_i2c_write_u8(TWL6030_MODULE_ID0
, reg_val
, TWL6030_MMCCTRL
);
300 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret
);
304 /* Configuring PullUp-PullDown register */
305 ret
= twl_i2c_read_u8(TWL6030_MODULE_ID0
, ®_val
,
306 TWL6030_CFG_INPUT_PUPD3
);
308 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
312 reg_val
&= ~(MMC_PU
| MMC_PD
);
313 ret
= twl_i2c_write_u8(TWL6030_MODULE_ID0
, reg_val
,
314 TWL6030_CFG_INPUT_PUPD3
);
316 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
321 return twl6030_irq_base
+ MMCDETECT_INTR_OFFSET
;
323 EXPORT_SYMBOL(twl6030_mmc_card_detect_config
);
325 int twl6030_mmc_card_detect(struct device
*dev
, int slot
)
329 struct platform_device
*pdev
= to_platform_device(dev
);
332 /* TWL6030 provide's Card detect support for
333 * only MMC1 controller.
335 pr_err("Unknown MMC controller %d in %s\n", pdev
->id
, __func__
);
339 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
340 * 0 - Card not present ,1 - Card present
342 ret
= twl_i2c_read_u8(TWL6030_MODULE_ID0
, &read_reg
,
345 ret
= read_reg
& STS_MMC
;
348 EXPORT_SYMBOL(twl6030_mmc_card_detect
);
350 int twl6030_init_irq(struct device
*dev
, int irq_num
)
352 struct device_node
*node
= dev
->of_node
;
353 int nr_irqs
, irq_base
, irq_end
;
354 struct task_struct
*task
;
355 static struct irq_chip twl6030_irq_chip
;
360 nr_irqs
= TWL6030_NR_IRQS
;
362 irq_base
= irq_alloc_descs(-1, 0, nr_irqs
, 0);
363 if (IS_ERR_VALUE(irq_base
)) {
364 dev_err(dev
, "Fail to allocate IRQ descs\n");
368 irq_domain_add_legacy(node
, nr_irqs
, irq_base
, 0,
369 &irq_domain_simple_ops
, NULL
);
371 irq_end
= irq_base
+ nr_irqs
;
377 /* mask all int lines */
378 twl_i2c_write(TWL_MODULE_PIH
, &mask
[0], REG_INT_MSK_LINE_A
, 3);
379 /* mask all int sts */
380 twl_i2c_write(TWL_MODULE_PIH
, &mask
[0], REG_INT_MSK_STS_A
, 3);
381 /* clear INT_STS_A,B,C */
382 twl_i2c_write(TWL_MODULE_PIH
, &mask
[0], REG_INT_STS_A
, 3);
384 twl6030_irq_base
= irq_base
;
387 * install an irq handler for each of the modules;
388 * clone dummy irq_chip since PIH can't *do* anything
390 twl6030_irq_chip
= dummy_irq_chip
;
391 twl6030_irq_chip
.name
= "twl6030";
392 twl6030_irq_chip
.irq_set_type
= NULL
;
393 twl6030_irq_chip
.irq_set_wake
= twl6030_irq_set_wake
;
395 for (i
= irq_base
; i
< irq_end
; i
++) {
396 irq_set_chip_and_handler(i
, &twl6030_irq_chip
,
398 irq_set_chip_data(i
, (void *)irq_num
);
402 dev_info(dev
, "PIH (irq %d) chaining IRQs %d..%d\n",
403 irq_num
, irq_base
, irq_end
);
405 /* install an irq handler to demultiplex the TWL6030 interrupt */
406 init_completion(&irq_event
);
408 status
= request_irq(irq_num
, handle_twl6030_pih
, 0, "TWL6030-PIH",
411 dev_err(dev
, "could not claim irq %d: %d\n", irq_num
, status
);
415 task
= kthread_run(twl6030_irq_thread
, (void *)irq_num
, "twl6030-irq");
417 dev_err(dev
, "could not create irq %d thread!\n", irq_num
);
418 status
= PTR_ERR(task
);
423 register_pm_notifier(&twl6030_irq_pm_notifier_block
);
427 free_irq(irq_num
, &irq_event
);
430 for (i
= irq_base
; i
< irq_end
; i
++)
431 irq_set_chip_and_handler(i
, NULL
, NULL
);
436 int twl6030_exit_irq(void)
438 unregister_pm_notifier(&twl6030_irq_pm_notifier_block
);
440 if (twl6030_irq_base
) {
441 pr_err("twl6030: can't yet clean up IRQs?\n");