Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[linux-2.6/libata-dev.git] / drivers / net / wireless / ath / ath9k / recv.c
blob70dc8ecdad4d7994caf7083dbe7e2cc1a9101f5b
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/dma-mapping.h>
18 #include "ath9k.h"
19 #include "ar9003_mac.h"
21 #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
23 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
24 int mindelta, int main_rssi_avg,
25 int alt_rssi_avg, int pkt_count)
27 return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
28 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
29 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
32 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
33 int curr_main_set, int curr_alt_set,
34 int alt_rssi_avg, int main_rssi_avg)
36 bool result = false;
37 switch (div_group) {
38 case 0:
39 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
40 result = true;
41 break;
42 case 1:
43 case 2:
44 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
45 (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
46 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
47 ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
48 (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
49 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
50 (alt_rssi_avg >= 4))
51 result = true;
52 else
53 result = false;
54 break;
57 return result;
60 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
62 return sc->ps_enabled &&
63 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
67 * Setup and link descriptors.
69 * 11N: we can no longer afford to self link the last descriptor.
70 * MAC acknowledges BA status as long as it copies frames to host
71 * buffer (or rx fifo). This can incorrectly acknowledge packets
72 * to a sender if last desc is self-linked.
74 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
76 struct ath_hw *ah = sc->sc_ah;
77 struct ath_common *common = ath9k_hw_common(ah);
78 struct ath_desc *ds;
79 struct sk_buff *skb;
81 ATH_RXBUF_RESET(bf);
83 ds = bf->bf_desc;
84 ds->ds_link = 0; /* link to null */
85 ds->ds_data = bf->bf_buf_addr;
87 /* virtual addr of the beginning of the buffer. */
88 skb = bf->bf_mpdu;
89 BUG_ON(skb == NULL);
90 ds->ds_vdata = skb->data;
93 * setup rx descriptors. The rx_bufsize here tells the hardware
94 * how much data it can DMA to us and that we are prepared
95 * to process
97 ath9k_hw_setuprxdesc(ah, ds,
98 common->rx_bufsize,
99 0);
101 if (sc->rx.rxlink == NULL)
102 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
103 else
104 *sc->rx.rxlink = bf->bf_daddr;
106 sc->rx.rxlink = &ds->ds_link;
109 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
111 /* XXX block beacon interrupts */
112 ath9k_hw_setantenna(sc->sc_ah, antenna);
113 sc->rx.defant = antenna;
114 sc->rx.rxotherant = 0;
117 static void ath_opmode_init(struct ath_softc *sc)
119 struct ath_hw *ah = sc->sc_ah;
120 struct ath_common *common = ath9k_hw_common(ah);
122 u32 rfilt, mfilt[2];
124 /* configure rx filter */
125 rfilt = ath_calcrxfilter(sc);
126 ath9k_hw_setrxfilter(ah, rfilt);
128 /* configure bssid mask */
129 ath_hw_setbssidmask(common);
131 /* configure operational mode */
132 ath9k_hw_setopmode(ah);
134 /* calculate and install multicast filter */
135 mfilt[0] = mfilt[1] = ~0;
136 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
139 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
140 enum ath9k_rx_qtype qtype)
142 struct ath_hw *ah = sc->sc_ah;
143 struct ath_rx_edma *rx_edma;
144 struct sk_buff *skb;
145 struct ath_buf *bf;
147 rx_edma = &sc->rx.rx_edma[qtype];
148 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
149 return false;
151 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
152 list_del_init(&bf->list);
154 skb = bf->bf_mpdu;
156 ATH_RXBUF_RESET(bf);
157 memset(skb->data, 0, ah->caps.rx_status_len);
158 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
159 ah->caps.rx_status_len, DMA_TO_DEVICE);
161 SKB_CB_ATHBUF(skb) = bf;
162 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
163 skb_queue_tail(&rx_edma->rx_fifo, skb);
165 return true;
168 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
169 enum ath9k_rx_qtype qtype, int size)
171 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
172 u32 nbuf = 0;
174 if (list_empty(&sc->rx.rxbuf)) {
175 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
176 return;
179 while (!list_empty(&sc->rx.rxbuf)) {
180 nbuf++;
182 if (!ath_rx_edma_buf_link(sc, qtype))
183 break;
185 if (nbuf >= size)
186 break;
190 static void ath_rx_remove_buffer(struct ath_softc *sc,
191 enum ath9k_rx_qtype qtype)
193 struct ath_buf *bf;
194 struct ath_rx_edma *rx_edma;
195 struct sk_buff *skb;
197 rx_edma = &sc->rx.rx_edma[qtype];
199 while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
200 bf = SKB_CB_ATHBUF(skb);
201 BUG_ON(!bf);
202 list_add_tail(&bf->list, &sc->rx.rxbuf);
206 static void ath_rx_edma_cleanup(struct ath_softc *sc)
208 struct ath_buf *bf;
210 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
211 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
213 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
214 if (bf->bf_mpdu)
215 dev_kfree_skb_any(bf->bf_mpdu);
218 INIT_LIST_HEAD(&sc->rx.rxbuf);
220 kfree(sc->rx.rx_bufptr);
221 sc->rx.rx_bufptr = NULL;
224 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
226 skb_queue_head_init(&rx_edma->rx_fifo);
227 skb_queue_head_init(&rx_edma->rx_buffers);
228 rx_edma->rx_fifo_hwsize = size;
231 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
233 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
234 struct ath_hw *ah = sc->sc_ah;
235 struct sk_buff *skb;
236 struct ath_buf *bf;
237 int error = 0, i;
238 u32 size;
240 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
241 ah->caps.rx_status_len);
243 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
244 ah->caps.rx_lp_qdepth);
245 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
246 ah->caps.rx_hp_qdepth);
248 size = sizeof(struct ath_buf) * nbufs;
249 bf = kzalloc(size, GFP_KERNEL);
250 if (!bf)
251 return -ENOMEM;
253 INIT_LIST_HEAD(&sc->rx.rxbuf);
254 sc->rx.rx_bufptr = bf;
256 for (i = 0; i < nbufs; i++, bf++) {
257 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
258 if (!skb) {
259 error = -ENOMEM;
260 goto rx_init_fail;
263 memset(skb->data, 0, common->rx_bufsize);
264 bf->bf_mpdu = skb;
266 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
267 common->rx_bufsize,
268 DMA_BIDIRECTIONAL);
269 if (unlikely(dma_mapping_error(sc->dev,
270 bf->bf_buf_addr))) {
271 dev_kfree_skb_any(skb);
272 bf->bf_mpdu = NULL;
273 bf->bf_buf_addr = 0;
274 ath_err(common,
275 "dma_mapping_error() on RX init\n");
276 error = -ENOMEM;
277 goto rx_init_fail;
280 list_add_tail(&bf->list, &sc->rx.rxbuf);
283 return 0;
285 rx_init_fail:
286 ath_rx_edma_cleanup(sc);
287 return error;
290 static void ath_edma_start_recv(struct ath_softc *sc)
292 spin_lock_bh(&sc->rx.rxbuflock);
294 ath9k_hw_rxena(sc->sc_ah);
296 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
297 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
299 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
300 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
302 ath_opmode_init(sc);
304 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
306 spin_unlock_bh(&sc->rx.rxbuflock);
309 static void ath_edma_stop_recv(struct ath_softc *sc)
311 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
312 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
315 int ath_rx_init(struct ath_softc *sc, int nbufs)
317 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
318 struct sk_buff *skb;
319 struct ath_buf *bf;
320 int error = 0;
322 spin_lock_init(&sc->sc_pcu_lock);
323 sc->sc_flags &= ~SC_OP_RXFLUSH;
324 spin_lock_init(&sc->rx.rxbuflock);
326 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
327 sc->sc_ah->caps.rx_status_len;
329 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
330 return ath_rx_edma_init(sc, nbufs);
331 } else {
332 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
333 common->cachelsz, common->rx_bufsize);
335 /* Initialize rx descriptors */
337 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
338 "rx", nbufs, 1, 0);
339 if (error != 0) {
340 ath_err(common,
341 "failed to allocate rx descriptors: %d\n",
342 error);
343 goto err;
346 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
347 skb = ath_rxbuf_alloc(common, common->rx_bufsize,
348 GFP_KERNEL);
349 if (skb == NULL) {
350 error = -ENOMEM;
351 goto err;
354 bf->bf_mpdu = skb;
355 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
356 common->rx_bufsize,
357 DMA_FROM_DEVICE);
358 if (unlikely(dma_mapping_error(sc->dev,
359 bf->bf_buf_addr))) {
360 dev_kfree_skb_any(skb);
361 bf->bf_mpdu = NULL;
362 bf->bf_buf_addr = 0;
363 ath_err(common,
364 "dma_mapping_error() on RX init\n");
365 error = -ENOMEM;
366 goto err;
369 sc->rx.rxlink = NULL;
372 err:
373 if (error)
374 ath_rx_cleanup(sc);
376 return error;
379 void ath_rx_cleanup(struct ath_softc *sc)
381 struct ath_hw *ah = sc->sc_ah;
382 struct ath_common *common = ath9k_hw_common(ah);
383 struct sk_buff *skb;
384 struct ath_buf *bf;
386 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
387 ath_rx_edma_cleanup(sc);
388 return;
389 } else {
390 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
391 skb = bf->bf_mpdu;
392 if (skb) {
393 dma_unmap_single(sc->dev, bf->bf_buf_addr,
394 common->rx_bufsize,
395 DMA_FROM_DEVICE);
396 dev_kfree_skb(skb);
397 bf->bf_buf_addr = 0;
398 bf->bf_mpdu = NULL;
402 if (sc->rx.rxdma.dd_desc_len != 0)
403 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
408 * Calculate the receive filter according to the
409 * operating mode and state:
411 * o always accept unicast, broadcast, and multicast traffic
412 * o maintain current state of phy error reception (the hal
413 * may enable phy error frames for noise immunity work)
414 * o probe request frames are accepted only when operating in
415 * hostap, adhoc, or monitor modes
416 * o enable promiscuous mode according to the interface state
417 * o accept beacons:
418 * - when operating in adhoc mode so the 802.11 layer creates
419 * node table entries for peers,
420 * - when operating in station mode for collecting rssi data when
421 * the station is otherwise quiet, or
422 * - when operating as a repeater so we see repeater-sta beacons
423 * - when scanning
426 u32 ath_calcrxfilter(struct ath_softc *sc)
428 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
430 u32 rfilt;
432 rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
433 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
434 | ATH9K_RX_FILTER_MCAST;
436 if (sc->rx.rxfilter & FIF_PROBE_REQ)
437 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
440 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
441 * mode interface or when in monitor mode. AP mode does not need this
442 * since it receives all in-BSS frames anyway.
444 if (sc->sc_ah->is_monitoring)
445 rfilt |= ATH9K_RX_FILTER_PROM;
447 if (sc->rx.rxfilter & FIF_CONTROL)
448 rfilt |= ATH9K_RX_FILTER_CONTROL;
450 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
451 (sc->nvifs <= 1) &&
452 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
453 rfilt |= ATH9K_RX_FILTER_MYBEACON;
454 else
455 rfilt |= ATH9K_RX_FILTER_BEACON;
457 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
458 (sc->rx.rxfilter & FIF_PSPOLL))
459 rfilt |= ATH9K_RX_FILTER_PSPOLL;
461 if (conf_is_ht(&sc->hw->conf))
462 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
464 if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
465 /* The following may also be needed for other older chips */
466 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
467 rfilt |= ATH9K_RX_FILTER_PROM;
468 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
471 return rfilt;
473 #undef RX_FILTER_PRESERVE
476 int ath_startrecv(struct ath_softc *sc)
478 struct ath_hw *ah = sc->sc_ah;
479 struct ath_buf *bf, *tbf;
481 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
482 ath_edma_start_recv(sc);
483 return 0;
486 spin_lock_bh(&sc->rx.rxbuflock);
487 if (list_empty(&sc->rx.rxbuf))
488 goto start_recv;
490 sc->rx.rxlink = NULL;
491 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
492 ath_rx_buf_link(sc, bf);
495 /* We could have deleted elements so the list may be empty now */
496 if (list_empty(&sc->rx.rxbuf))
497 goto start_recv;
499 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
500 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
501 ath9k_hw_rxena(ah);
503 start_recv:
504 ath_opmode_init(sc);
505 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
507 spin_unlock_bh(&sc->rx.rxbuflock);
509 return 0;
512 bool ath_stoprecv(struct ath_softc *sc)
514 struct ath_hw *ah = sc->sc_ah;
515 bool stopped, reset = false;
517 spin_lock_bh(&sc->rx.rxbuflock);
518 ath9k_hw_abortpcurecv(ah);
519 ath9k_hw_setrxfilter(ah, 0);
520 stopped = ath9k_hw_stopdmarecv(ah, &reset);
522 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
523 ath_edma_stop_recv(sc);
524 else
525 sc->rx.rxlink = NULL;
526 spin_unlock_bh(&sc->rx.rxbuflock);
528 if (!(ah->ah_flags & AH_UNPLUGGED) &&
529 unlikely(!stopped)) {
530 ath_err(ath9k_hw_common(sc->sc_ah),
531 "Could not stop RX, we could be "
532 "confusing the DMA engine when we start RX up\n");
533 ATH_DBG_WARN_ON_ONCE(!stopped);
535 return stopped && !reset;
538 void ath_flushrecv(struct ath_softc *sc)
540 sc->sc_flags |= SC_OP_RXFLUSH;
541 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
542 ath_rx_tasklet(sc, 1, true);
543 ath_rx_tasklet(sc, 1, false);
544 sc->sc_flags &= ~SC_OP_RXFLUSH;
547 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
549 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
550 struct ieee80211_mgmt *mgmt;
551 u8 *pos, *end, id, elen;
552 struct ieee80211_tim_ie *tim;
554 mgmt = (struct ieee80211_mgmt *)skb->data;
555 pos = mgmt->u.beacon.variable;
556 end = skb->data + skb->len;
558 while (pos + 2 < end) {
559 id = *pos++;
560 elen = *pos++;
561 if (pos + elen > end)
562 break;
564 if (id == WLAN_EID_TIM) {
565 if (elen < sizeof(*tim))
566 break;
567 tim = (struct ieee80211_tim_ie *) pos;
568 if (tim->dtim_count != 0)
569 break;
570 return tim->bitmap_ctrl & 0x01;
573 pos += elen;
576 return false;
579 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
581 struct ieee80211_mgmt *mgmt;
582 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
584 if (skb->len < 24 + 8 + 2 + 2)
585 return;
587 mgmt = (struct ieee80211_mgmt *)skb->data;
588 if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
589 /* TODO: This doesn't work well if you have stations
590 * associated to two different APs because curbssid
591 * is just the last AP that any of the stations associated
592 * with.
594 return; /* not from our current AP */
597 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
599 if (sc->ps_flags & PS_BEACON_SYNC) {
600 sc->ps_flags &= ~PS_BEACON_SYNC;
601 ath_dbg(common, ATH_DBG_PS,
602 "Reconfigure Beacon timers based on timestamp from the AP\n");
603 ath_set_beacon(sc);
604 sc->ps_flags &= ~PS_TSFOOR_SYNC;
607 if (ath_beacon_dtim_pending_cab(skb)) {
609 * Remain awake waiting for buffered broadcast/multicast
610 * frames. If the last broadcast/multicast frame is not
611 * received properly, the next beacon frame will work as
612 * a backup trigger for returning into NETWORK SLEEP state,
613 * so we are waiting for it as well.
615 ath_dbg(common, ATH_DBG_PS,
616 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
617 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
618 return;
621 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
623 * This can happen if a broadcast frame is dropped or the AP
624 * fails to send a frame indicating that all CAB frames have
625 * been delivered.
627 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
628 ath_dbg(common, ATH_DBG_PS,
629 "PS wait for CAB frames timed out\n");
633 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
635 struct ieee80211_hdr *hdr;
636 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
638 hdr = (struct ieee80211_hdr *)skb->data;
640 /* Process Beacon and CAB receive in PS state */
641 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
642 && ieee80211_is_beacon(hdr->frame_control))
643 ath_rx_ps_beacon(sc, skb);
644 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
645 (ieee80211_is_data(hdr->frame_control) ||
646 ieee80211_is_action(hdr->frame_control)) &&
647 is_multicast_ether_addr(hdr->addr1) &&
648 !ieee80211_has_moredata(hdr->frame_control)) {
650 * No more broadcast/multicast frames to be received at this
651 * point.
653 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
654 ath_dbg(common, ATH_DBG_PS,
655 "All PS CAB frames received, back to sleep\n");
656 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
657 !is_multicast_ether_addr(hdr->addr1) &&
658 !ieee80211_has_morefrags(hdr->frame_control)) {
659 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
660 ath_dbg(common, ATH_DBG_PS,
661 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
662 sc->ps_flags & (PS_WAIT_FOR_BEACON |
663 PS_WAIT_FOR_CAB |
664 PS_WAIT_FOR_PSPOLL_DATA |
665 PS_WAIT_FOR_TX_ACK));
669 static bool ath_edma_get_buffers(struct ath_softc *sc,
670 enum ath9k_rx_qtype qtype)
672 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
673 struct ath_hw *ah = sc->sc_ah;
674 struct ath_common *common = ath9k_hw_common(ah);
675 struct sk_buff *skb;
676 struct ath_buf *bf;
677 int ret;
679 skb = skb_peek(&rx_edma->rx_fifo);
680 if (!skb)
681 return false;
683 bf = SKB_CB_ATHBUF(skb);
684 BUG_ON(!bf);
686 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
687 common->rx_bufsize, DMA_FROM_DEVICE);
689 ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
690 if (ret == -EINPROGRESS) {
691 /*let device gain the buffer again*/
692 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
693 common->rx_bufsize, DMA_FROM_DEVICE);
694 return false;
697 __skb_unlink(skb, &rx_edma->rx_fifo);
698 if (ret == -EINVAL) {
699 /* corrupt descriptor, skip this one and the following one */
700 list_add_tail(&bf->list, &sc->rx.rxbuf);
701 ath_rx_edma_buf_link(sc, qtype);
702 skb = skb_peek(&rx_edma->rx_fifo);
703 if (!skb)
704 return true;
706 bf = SKB_CB_ATHBUF(skb);
707 BUG_ON(!bf);
709 __skb_unlink(skb, &rx_edma->rx_fifo);
710 list_add_tail(&bf->list, &sc->rx.rxbuf);
711 ath_rx_edma_buf_link(sc, qtype);
712 return true;
714 skb_queue_tail(&rx_edma->rx_buffers, skb);
716 return true;
719 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
720 struct ath_rx_status *rs,
721 enum ath9k_rx_qtype qtype)
723 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
724 struct sk_buff *skb;
725 struct ath_buf *bf;
727 while (ath_edma_get_buffers(sc, qtype));
728 skb = __skb_dequeue(&rx_edma->rx_buffers);
729 if (!skb)
730 return NULL;
732 bf = SKB_CB_ATHBUF(skb);
733 ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
734 return bf;
737 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
738 struct ath_rx_status *rs)
740 struct ath_hw *ah = sc->sc_ah;
741 struct ath_common *common = ath9k_hw_common(ah);
742 struct ath_desc *ds;
743 struct ath_buf *bf;
744 int ret;
746 if (list_empty(&sc->rx.rxbuf)) {
747 sc->rx.rxlink = NULL;
748 return NULL;
751 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
752 ds = bf->bf_desc;
755 * Must provide the virtual address of the current
756 * descriptor, the physical address, and the virtual
757 * address of the next descriptor in the h/w chain.
758 * This allows the HAL to look ahead to see if the
759 * hardware is done with a descriptor by checking the
760 * done bit in the following descriptor and the address
761 * of the current descriptor the DMA engine is working
762 * on. All this is necessary because of our use of
763 * a self-linked list to avoid rx overruns.
765 ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
766 if (ret == -EINPROGRESS) {
767 struct ath_rx_status trs;
768 struct ath_buf *tbf;
769 struct ath_desc *tds;
771 memset(&trs, 0, sizeof(trs));
772 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
773 sc->rx.rxlink = NULL;
774 return NULL;
777 tbf = list_entry(bf->list.next, struct ath_buf, list);
780 * On some hardware the descriptor status words could
781 * get corrupted, including the done bit. Because of
782 * this, check if the next descriptor's done bit is
783 * set or not.
785 * If the next descriptor's done bit is set, the current
786 * descriptor has been corrupted. Force s/w to discard
787 * this descriptor and continue...
790 tds = tbf->bf_desc;
791 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
792 if (ret == -EINPROGRESS)
793 return NULL;
796 if (!bf->bf_mpdu)
797 return bf;
800 * Synchronize the DMA transfer with CPU before
801 * 1. accessing the frame
802 * 2. requeueing the same buffer to h/w
804 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
805 common->rx_bufsize,
806 DMA_FROM_DEVICE);
808 return bf;
811 /* Assumes you've already done the endian to CPU conversion */
812 static bool ath9k_rx_accept(struct ath_common *common,
813 struct ieee80211_hdr *hdr,
814 struct ieee80211_rx_status *rxs,
815 struct ath_rx_status *rx_stats,
816 bool *decrypt_error)
818 #define is_mc_or_valid_tkip_keyix ((is_mc || \
819 (rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && \
820 test_bit(rx_stats->rs_keyix, common->tkip_keymap))))
822 struct ath_hw *ah = common->ah;
823 __le16 fc;
824 u8 rx_status_len = ah->caps.rx_status_len;
826 fc = hdr->frame_control;
828 if (!rx_stats->rs_datalen)
829 return false;
831 * rs_status follows rs_datalen so if rs_datalen is too large
832 * we can take a hint that hardware corrupted it, so ignore
833 * those frames.
835 if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
836 return false;
838 /* Only use error bits from the last fragment */
839 if (rx_stats->rs_more)
840 return true;
843 * The rx_stats->rs_status will not be set until the end of the
844 * chained descriptors so it can be ignored if rs_more is set. The
845 * rs_more will be false at the last element of the chained
846 * descriptors.
848 if (rx_stats->rs_status != 0) {
849 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
850 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
851 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
852 return false;
854 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
855 *decrypt_error = true;
856 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
857 bool is_mc;
859 * The MIC error bit is only valid if the frame
860 * is not a control frame or fragment, and it was
861 * decrypted using a valid TKIP key.
863 is_mc = !!is_multicast_ether_addr(hdr->addr1);
865 if (!ieee80211_is_ctl(fc) &&
866 !ieee80211_has_morefrags(fc) &&
867 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
868 is_mc_or_valid_tkip_keyix)
869 rxs->flag |= RX_FLAG_MMIC_ERROR;
870 else
871 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
874 * Reject error frames with the exception of
875 * decryption and MIC failures. For monitor mode,
876 * we also ignore the CRC error.
878 if (ah->is_monitoring) {
879 if (rx_stats->rs_status &
880 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
881 ATH9K_RXERR_CRC))
882 return false;
883 } else {
884 if (rx_stats->rs_status &
885 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
886 return false;
890 return true;
893 static int ath9k_process_rate(struct ath_common *common,
894 struct ieee80211_hw *hw,
895 struct ath_rx_status *rx_stats,
896 struct ieee80211_rx_status *rxs)
898 struct ieee80211_supported_band *sband;
899 enum ieee80211_band band;
900 unsigned int i = 0;
902 band = hw->conf.channel->band;
903 sband = hw->wiphy->bands[band];
905 if (rx_stats->rs_rate & 0x80) {
906 /* HT rate */
907 rxs->flag |= RX_FLAG_HT;
908 if (rx_stats->rs_flags & ATH9K_RX_2040)
909 rxs->flag |= RX_FLAG_40MHZ;
910 if (rx_stats->rs_flags & ATH9K_RX_GI)
911 rxs->flag |= RX_FLAG_SHORT_GI;
912 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
913 return 0;
916 for (i = 0; i < sband->n_bitrates; i++) {
917 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
918 rxs->rate_idx = i;
919 return 0;
921 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
922 rxs->flag |= RX_FLAG_SHORTPRE;
923 rxs->rate_idx = i;
924 return 0;
929 * No valid hardware bitrate found -- we should not get here
930 * because hardware has already validated this frame as OK.
932 ath_dbg(common, ATH_DBG_XMIT,
933 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
934 rx_stats->rs_rate);
936 return -EINVAL;
939 static void ath9k_process_rssi(struct ath_common *common,
940 struct ieee80211_hw *hw,
941 struct ieee80211_hdr *hdr,
942 struct ath_rx_status *rx_stats)
944 struct ath_softc *sc = hw->priv;
945 struct ath_hw *ah = common->ah;
946 int last_rssi;
947 __le16 fc;
949 if ((ah->opmode != NL80211_IFTYPE_STATION) &&
950 (ah->opmode != NL80211_IFTYPE_ADHOC))
951 return;
953 fc = hdr->frame_control;
954 if (!ieee80211_is_beacon(fc) ||
955 compare_ether_addr(hdr->addr3, common->curbssid)) {
956 /* TODO: This doesn't work well if you have stations
957 * associated to two different APs because curbssid
958 * is just the last AP that any of the stations associated
959 * with.
961 return;
964 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
965 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
967 last_rssi = sc->last_rssi;
968 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
969 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
970 ATH_RSSI_EP_MULTIPLIER);
971 if (rx_stats->rs_rssi < 0)
972 rx_stats->rs_rssi = 0;
974 /* Update Beacon RSSI, this is used by ANI. */
975 ah->stats.avgbrssi = rx_stats->rs_rssi;
979 * For Decrypt or Demic errors, we only mark packet status here and always push
980 * up the frame up to let mac80211 handle the actual error case, be it no
981 * decryption key or real decryption error. This let us keep statistics there.
983 static int ath9k_rx_skb_preprocess(struct ath_common *common,
984 struct ieee80211_hw *hw,
985 struct ieee80211_hdr *hdr,
986 struct ath_rx_status *rx_stats,
987 struct ieee80211_rx_status *rx_status,
988 bool *decrypt_error)
990 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
993 * everything but the rate is checked here, the rate check is done
994 * separately to avoid doing two lookups for a rate for each frame.
996 if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
997 return -EINVAL;
999 /* Only use status info from the last fragment */
1000 if (rx_stats->rs_more)
1001 return 0;
1003 ath9k_process_rssi(common, hw, hdr, rx_stats);
1005 if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1006 return -EINVAL;
1008 rx_status->band = hw->conf.channel->band;
1009 rx_status->freq = hw->conf.channel->center_freq;
1010 rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1011 rx_status->antenna = rx_stats->rs_antenna;
1012 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1014 return 0;
1017 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1018 struct sk_buff *skb,
1019 struct ath_rx_status *rx_stats,
1020 struct ieee80211_rx_status *rxs,
1021 bool decrypt_error)
1023 struct ath_hw *ah = common->ah;
1024 struct ieee80211_hdr *hdr;
1025 int hdrlen, padpos, padsize;
1026 u8 keyix;
1027 __le16 fc;
1029 /* see if any padding is done by the hw and remove it */
1030 hdr = (struct ieee80211_hdr *) skb->data;
1031 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1032 fc = hdr->frame_control;
1033 padpos = ath9k_cmn_padpos(hdr->frame_control);
1035 /* The MAC header is padded to have 32-bit boundary if the
1036 * packet payload is non-zero. The general calculation for
1037 * padsize would take into account odd header lengths:
1038 * padsize = (4 - padpos % 4) % 4; However, since only
1039 * even-length headers are used, padding can only be 0 or 2
1040 * bytes and we can optimize this a bit. In addition, we must
1041 * not try to remove padding from short control frames that do
1042 * not have payload. */
1043 padsize = padpos & 3;
1044 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1045 memmove(skb->data + padsize, skb->data, padpos);
1046 skb_pull(skb, padsize);
1049 keyix = rx_stats->rs_keyix;
1051 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1052 ieee80211_has_protected(fc)) {
1053 rxs->flag |= RX_FLAG_DECRYPTED;
1054 } else if (ieee80211_has_protected(fc)
1055 && !decrypt_error && skb->len >= hdrlen + 4) {
1056 keyix = skb->data[hdrlen + 3] >> 6;
1058 if (test_bit(keyix, common->keymap))
1059 rxs->flag |= RX_FLAG_DECRYPTED;
1061 if (ah->sw_mgmt_crypto &&
1062 (rxs->flag & RX_FLAG_DECRYPTED) &&
1063 ieee80211_is_mgmt(fc))
1064 /* Use software decrypt for management frames. */
1065 rxs->flag &= ~RX_FLAG_DECRYPTED;
1068 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1069 struct ath_hw_antcomb_conf ant_conf,
1070 int main_rssi_avg)
1072 antcomb->quick_scan_cnt = 0;
1074 if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1075 antcomb->rssi_lna2 = main_rssi_avg;
1076 else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1077 antcomb->rssi_lna1 = main_rssi_avg;
1079 switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1080 case 0x10: /* LNA2 A-B */
1081 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1082 antcomb->first_quick_scan_conf =
1083 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1084 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1085 break;
1086 case 0x20: /* LNA1 A-B */
1087 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1088 antcomb->first_quick_scan_conf =
1089 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1090 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1091 break;
1092 case 0x21: /* LNA1 LNA2 */
1093 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1094 antcomb->first_quick_scan_conf =
1095 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1096 antcomb->second_quick_scan_conf =
1097 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1098 break;
1099 case 0x12: /* LNA2 LNA1 */
1100 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1101 antcomb->first_quick_scan_conf =
1102 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1103 antcomb->second_quick_scan_conf =
1104 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1105 break;
1106 case 0x13: /* LNA2 A+B */
1107 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1108 antcomb->first_quick_scan_conf =
1109 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1110 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1111 break;
1112 case 0x23: /* LNA1 A+B */
1113 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1114 antcomb->first_quick_scan_conf =
1115 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1116 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1117 break;
1118 default:
1119 break;
1123 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1124 struct ath_hw_antcomb_conf *div_ant_conf,
1125 int main_rssi_avg, int alt_rssi_avg,
1126 int alt_ratio)
1128 /* alt_good */
1129 switch (antcomb->quick_scan_cnt) {
1130 case 0:
1131 /* set alt to main, and alt to first conf */
1132 div_ant_conf->main_lna_conf = antcomb->main_conf;
1133 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1134 break;
1135 case 1:
1136 /* set alt to main, and alt to first conf */
1137 div_ant_conf->main_lna_conf = antcomb->main_conf;
1138 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1139 antcomb->rssi_first = main_rssi_avg;
1140 antcomb->rssi_second = alt_rssi_avg;
1142 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1143 /* main is LNA1 */
1144 if (ath_is_alt_ant_ratio_better(alt_ratio,
1145 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1146 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1147 main_rssi_avg, alt_rssi_avg,
1148 antcomb->total_pkt_count))
1149 antcomb->first_ratio = true;
1150 else
1151 antcomb->first_ratio = false;
1152 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1153 if (ath_is_alt_ant_ratio_better(alt_ratio,
1154 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1155 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1156 main_rssi_avg, alt_rssi_avg,
1157 antcomb->total_pkt_count))
1158 antcomb->first_ratio = true;
1159 else
1160 antcomb->first_ratio = false;
1161 } else {
1162 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1163 (alt_rssi_avg > main_rssi_avg +
1164 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1165 (alt_rssi_avg > main_rssi_avg)) &&
1166 (antcomb->total_pkt_count > 50))
1167 antcomb->first_ratio = true;
1168 else
1169 antcomb->first_ratio = false;
1171 break;
1172 case 2:
1173 antcomb->alt_good = false;
1174 antcomb->scan_not_start = false;
1175 antcomb->scan = false;
1176 antcomb->rssi_first = main_rssi_avg;
1177 antcomb->rssi_third = alt_rssi_avg;
1179 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1180 antcomb->rssi_lna1 = alt_rssi_avg;
1181 else if (antcomb->second_quick_scan_conf ==
1182 ATH_ANT_DIV_COMB_LNA2)
1183 antcomb->rssi_lna2 = alt_rssi_avg;
1184 else if (antcomb->second_quick_scan_conf ==
1185 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1186 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1187 antcomb->rssi_lna2 = main_rssi_avg;
1188 else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1189 antcomb->rssi_lna1 = main_rssi_avg;
1192 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1193 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1194 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1195 else
1196 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1198 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1199 if (ath_is_alt_ant_ratio_better(alt_ratio,
1200 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1201 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1202 main_rssi_avg, alt_rssi_avg,
1203 antcomb->total_pkt_count))
1204 antcomb->second_ratio = true;
1205 else
1206 antcomb->second_ratio = false;
1207 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1208 if (ath_is_alt_ant_ratio_better(alt_ratio,
1209 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1210 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1211 main_rssi_avg, alt_rssi_avg,
1212 antcomb->total_pkt_count))
1213 antcomb->second_ratio = true;
1214 else
1215 antcomb->second_ratio = false;
1216 } else {
1217 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1218 (alt_rssi_avg > main_rssi_avg +
1219 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1220 (alt_rssi_avg > main_rssi_avg)) &&
1221 (antcomb->total_pkt_count > 50))
1222 antcomb->second_ratio = true;
1223 else
1224 antcomb->second_ratio = false;
1227 /* set alt to the conf with maximun ratio */
1228 if (antcomb->first_ratio && antcomb->second_ratio) {
1229 if (antcomb->rssi_second > antcomb->rssi_third) {
1230 /* first alt*/
1231 if ((antcomb->first_quick_scan_conf ==
1232 ATH_ANT_DIV_COMB_LNA1) ||
1233 (antcomb->first_quick_scan_conf ==
1234 ATH_ANT_DIV_COMB_LNA2))
1235 /* Set alt LNA1 or LNA2*/
1236 if (div_ant_conf->main_lna_conf ==
1237 ATH_ANT_DIV_COMB_LNA2)
1238 div_ant_conf->alt_lna_conf =
1239 ATH_ANT_DIV_COMB_LNA1;
1240 else
1241 div_ant_conf->alt_lna_conf =
1242 ATH_ANT_DIV_COMB_LNA2;
1243 else
1244 /* Set alt to A+B or A-B */
1245 div_ant_conf->alt_lna_conf =
1246 antcomb->first_quick_scan_conf;
1247 } else if ((antcomb->second_quick_scan_conf ==
1248 ATH_ANT_DIV_COMB_LNA1) ||
1249 (antcomb->second_quick_scan_conf ==
1250 ATH_ANT_DIV_COMB_LNA2)) {
1251 /* Set alt LNA1 or LNA2 */
1252 if (div_ant_conf->main_lna_conf ==
1253 ATH_ANT_DIV_COMB_LNA2)
1254 div_ant_conf->alt_lna_conf =
1255 ATH_ANT_DIV_COMB_LNA1;
1256 else
1257 div_ant_conf->alt_lna_conf =
1258 ATH_ANT_DIV_COMB_LNA2;
1259 } else {
1260 /* Set alt to A+B or A-B */
1261 div_ant_conf->alt_lna_conf =
1262 antcomb->second_quick_scan_conf;
1264 } else if (antcomb->first_ratio) {
1265 /* first alt */
1266 if ((antcomb->first_quick_scan_conf ==
1267 ATH_ANT_DIV_COMB_LNA1) ||
1268 (antcomb->first_quick_scan_conf ==
1269 ATH_ANT_DIV_COMB_LNA2))
1270 /* Set alt LNA1 or LNA2 */
1271 if (div_ant_conf->main_lna_conf ==
1272 ATH_ANT_DIV_COMB_LNA2)
1273 div_ant_conf->alt_lna_conf =
1274 ATH_ANT_DIV_COMB_LNA1;
1275 else
1276 div_ant_conf->alt_lna_conf =
1277 ATH_ANT_DIV_COMB_LNA2;
1278 else
1279 /* Set alt to A+B or A-B */
1280 div_ant_conf->alt_lna_conf =
1281 antcomb->first_quick_scan_conf;
1282 } else if (antcomb->second_ratio) {
1283 /* second alt */
1284 if ((antcomb->second_quick_scan_conf ==
1285 ATH_ANT_DIV_COMB_LNA1) ||
1286 (antcomb->second_quick_scan_conf ==
1287 ATH_ANT_DIV_COMB_LNA2))
1288 /* Set alt LNA1 or LNA2 */
1289 if (div_ant_conf->main_lna_conf ==
1290 ATH_ANT_DIV_COMB_LNA2)
1291 div_ant_conf->alt_lna_conf =
1292 ATH_ANT_DIV_COMB_LNA1;
1293 else
1294 div_ant_conf->alt_lna_conf =
1295 ATH_ANT_DIV_COMB_LNA2;
1296 else
1297 /* Set alt to A+B or A-B */
1298 div_ant_conf->alt_lna_conf =
1299 antcomb->second_quick_scan_conf;
1300 } else {
1301 /* main is largest */
1302 if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1303 (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1304 /* Set alt LNA1 or LNA2 */
1305 if (div_ant_conf->main_lna_conf ==
1306 ATH_ANT_DIV_COMB_LNA2)
1307 div_ant_conf->alt_lna_conf =
1308 ATH_ANT_DIV_COMB_LNA1;
1309 else
1310 div_ant_conf->alt_lna_conf =
1311 ATH_ANT_DIV_COMB_LNA2;
1312 else
1313 /* Set alt to A+B or A-B */
1314 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1316 break;
1317 default:
1318 break;
1322 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1323 struct ath_ant_comb *antcomb, int alt_ratio)
1325 if (ant_conf->div_group == 0) {
1326 /* Adjust the fast_div_bias based on main and alt lna conf */
1327 switch ((ant_conf->main_lna_conf << 4) |
1328 ant_conf->alt_lna_conf) {
1329 case 0x01: /* A-B LNA2 */
1330 ant_conf->fast_div_bias = 0x3b;
1331 break;
1332 case 0x02: /* A-B LNA1 */
1333 ant_conf->fast_div_bias = 0x3d;
1334 break;
1335 case 0x03: /* A-B A+B */
1336 ant_conf->fast_div_bias = 0x1;
1337 break;
1338 case 0x10: /* LNA2 A-B */
1339 ant_conf->fast_div_bias = 0x7;
1340 break;
1341 case 0x12: /* LNA2 LNA1 */
1342 ant_conf->fast_div_bias = 0x2;
1343 break;
1344 case 0x13: /* LNA2 A+B */
1345 ant_conf->fast_div_bias = 0x7;
1346 break;
1347 case 0x20: /* LNA1 A-B */
1348 ant_conf->fast_div_bias = 0x6;
1349 break;
1350 case 0x21: /* LNA1 LNA2 */
1351 ant_conf->fast_div_bias = 0x0;
1352 break;
1353 case 0x23: /* LNA1 A+B */
1354 ant_conf->fast_div_bias = 0x6;
1355 break;
1356 case 0x30: /* A+B A-B */
1357 ant_conf->fast_div_bias = 0x1;
1358 break;
1359 case 0x31: /* A+B LNA2 */
1360 ant_conf->fast_div_bias = 0x3b;
1361 break;
1362 case 0x32: /* A+B LNA1 */
1363 ant_conf->fast_div_bias = 0x3d;
1364 break;
1365 default:
1366 break;
1368 } else if (ant_conf->div_group == 1) {
1369 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1370 switch ((ant_conf->main_lna_conf << 4) |
1371 ant_conf->alt_lna_conf) {
1372 case 0x01: /* A-B LNA2 */
1373 ant_conf->fast_div_bias = 0x1;
1374 ant_conf->main_gaintb = 0;
1375 ant_conf->alt_gaintb = 0;
1376 break;
1377 case 0x02: /* A-B LNA1 */
1378 ant_conf->fast_div_bias = 0x1;
1379 ant_conf->main_gaintb = 0;
1380 ant_conf->alt_gaintb = 0;
1381 break;
1382 case 0x03: /* A-B A+B */
1383 ant_conf->fast_div_bias = 0x1;
1384 ant_conf->main_gaintb = 0;
1385 ant_conf->alt_gaintb = 0;
1386 break;
1387 case 0x10: /* LNA2 A-B */
1388 if (!(antcomb->scan) &&
1389 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1390 ant_conf->fast_div_bias = 0x3f;
1391 else
1392 ant_conf->fast_div_bias = 0x1;
1393 ant_conf->main_gaintb = 0;
1394 ant_conf->alt_gaintb = 0;
1395 break;
1396 case 0x12: /* LNA2 LNA1 */
1397 ant_conf->fast_div_bias = 0x1;
1398 ant_conf->main_gaintb = 0;
1399 ant_conf->alt_gaintb = 0;
1400 break;
1401 case 0x13: /* LNA2 A+B */
1402 if (!(antcomb->scan) &&
1403 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1404 ant_conf->fast_div_bias = 0x3f;
1405 else
1406 ant_conf->fast_div_bias = 0x1;
1407 ant_conf->main_gaintb = 0;
1408 ant_conf->alt_gaintb = 0;
1409 break;
1410 case 0x20: /* LNA1 A-B */
1411 if (!(antcomb->scan) &&
1412 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1413 ant_conf->fast_div_bias = 0x3f;
1414 else
1415 ant_conf->fast_div_bias = 0x1;
1416 ant_conf->main_gaintb = 0;
1417 ant_conf->alt_gaintb = 0;
1418 break;
1419 case 0x21: /* LNA1 LNA2 */
1420 ant_conf->fast_div_bias = 0x1;
1421 ant_conf->main_gaintb = 0;
1422 ant_conf->alt_gaintb = 0;
1423 break;
1424 case 0x23: /* LNA1 A+B */
1425 if (!(antcomb->scan) &&
1426 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1427 ant_conf->fast_div_bias = 0x3f;
1428 else
1429 ant_conf->fast_div_bias = 0x1;
1430 ant_conf->main_gaintb = 0;
1431 ant_conf->alt_gaintb = 0;
1432 break;
1433 case 0x30: /* A+B A-B */
1434 ant_conf->fast_div_bias = 0x1;
1435 ant_conf->main_gaintb = 0;
1436 ant_conf->alt_gaintb = 0;
1437 break;
1438 case 0x31: /* A+B LNA2 */
1439 ant_conf->fast_div_bias = 0x1;
1440 ant_conf->main_gaintb = 0;
1441 ant_conf->alt_gaintb = 0;
1442 break;
1443 case 0x32: /* A+B LNA1 */
1444 ant_conf->fast_div_bias = 0x1;
1445 ant_conf->main_gaintb = 0;
1446 ant_conf->alt_gaintb = 0;
1447 break;
1448 default:
1449 break;
1451 } else if (ant_conf->div_group == 2) {
1452 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1453 switch ((ant_conf->main_lna_conf << 4) |
1454 ant_conf->alt_lna_conf) {
1455 case 0x01: /* A-B LNA2 */
1456 ant_conf->fast_div_bias = 0x1;
1457 ant_conf->main_gaintb = 0;
1458 ant_conf->alt_gaintb = 0;
1459 break;
1460 case 0x02: /* A-B LNA1 */
1461 ant_conf->fast_div_bias = 0x1;
1462 ant_conf->main_gaintb = 0;
1463 ant_conf->alt_gaintb = 0;
1464 break;
1465 case 0x03: /* A-B A+B */
1466 ant_conf->fast_div_bias = 0x1;
1467 ant_conf->main_gaintb = 0;
1468 ant_conf->alt_gaintb = 0;
1469 break;
1470 case 0x10: /* LNA2 A-B */
1471 if (!(antcomb->scan) &&
1472 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1473 ant_conf->fast_div_bias = 0x1;
1474 else
1475 ant_conf->fast_div_bias = 0x2;
1476 ant_conf->main_gaintb = 0;
1477 ant_conf->alt_gaintb = 0;
1478 break;
1479 case 0x12: /* LNA2 LNA1 */
1480 ant_conf->fast_div_bias = 0x1;
1481 ant_conf->main_gaintb = 0;
1482 ant_conf->alt_gaintb = 0;
1483 break;
1484 case 0x13: /* LNA2 A+B */
1485 if (!(antcomb->scan) &&
1486 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1487 ant_conf->fast_div_bias = 0x1;
1488 else
1489 ant_conf->fast_div_bias = 0x2;
1490 ant_conf->main_gaintb = 0;
1491 ant_conf->alt_gaintb = 0;
1492 break;
1493 case 0x20: /* LNA1 A-B */
1494 if (!(antcomb->scan) &&
1495 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1496 ant_conf->fast_div_bias = 0x1;
1497 else
1498 ant_conf->fast_div_bias = 0x2;
1499 ant_conf->main_gaintb = 0;
1500 ant_conf->alt_gaintb = 0;
1501 break;
1502 case 0x21: /* LNA1 LNA2 */
1503 ant_conf->fast_div_bias = 0x1;
1504 ant_conf->main_gaintb = 0;
1505 ant_conf->alt_gaintb = 0;
1506 break;
1507 case 0x23: /* LNA1 A+B */
1508 if (!(antcomb->scan) &&
1509 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1510 ant_conf->fast_div_bias = 0x1;
1511 else
1512 ant_conf->fast_div_bias = 0x2;
1513 ant_conf->main_gaintb = 0;
1514 ant_conf->alt_gaintb = 0;
1515 break;
1516 case 0x30: /* A+B A-B */
1517 ant_conf->fast_div_bias = 0x1;
1518 ant_conf->main_gaintb = 0;
1519 ant_conf->alt_gaintb = 0;
1520 break;
1521 case 0x31: /* A+B LNA2 */
1522 ant_conf->fast_div_bias = 0x1;
1523 ant_conf->main_gaintb = 0;
1524 ant_conf->alt_gaintb = 0;
1525 break;
1526 case 0x32: /* A+B LNA1 */
1527 ant_conf->fast_div_bias = 0x1;
1528 ant_conf->main_gaintb = 0;
1529 ant_conf->alt_gaintb = 0;
1530 break;
1531 default:
1532 break;
1537 /* Antenna diversity and combining */
1538 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1540 struct ath_hw_antcomb_conf div_ant_conf;
1541 struct ath_ant_comb *antcomb = &sc->ant_comb;
1542 int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1543 int curr_main_set;
1544 int main_rssi = rs->rs_rssi_ctl0;
1545 int alt_rssi = rs->rs_rssi_ctl1;
1546 int rx_ant_conf, main_ant_conf;
1547 bool short_scan = false;
1549 rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1550 ATH_ANT_RX_MASK;
1551 main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1552 ATH_ANT_RX_MASK;
1554 /* Record packet only when both main_rssi and alt_rssi is positive */
1555 if (main_rssi > 0 && alt_rssi > 0) {
1556 antcomb->total_pkt_count++;
1557 antcomb->main_total_rssi += main_rssi;
1558 antcomb->alt_total_rssi += alt_rssi;
1559 if (main_ant_conf == rx_ant_conf)
1560 antcomb->main_recv_cnt++;
1561 else
1562 antcomb->alt_recv_cnt++;
1565 /* Short scan check */
1566 if (antcomb->scan && antcomb->alt_good) {
1567 if (time_after(jiffies, antcomb->scan_start_time +
1568 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1569 short_scan = true;
1570 else
1571 if (antcomb->total_pkt_count ==
1572 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1573 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1574 antcomb->total_pkt_count);
1575 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1576 short_scan = true;
1580 if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1581 rs->rs_moreaggr) && !short_scan)
1582 return;
1584 if (antcomb->total_pkt_count) {
1585 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1586 antcomb->total_pkt_count);
1587 main_rssi_avg = (antcomb->main_total_rssi /
1588 antcomb->total_pkt_count);
1589 alt_rssi_avg = (antcomb->alt_total_rssi /
1590 antcomb->total_pkt_count);
1594 ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1595 curr_alt_set = div_ant_conf.alt_lna_conf;
1596 curr_main_set = div_ant_conf.main_lna_conf;
1598 antcomb->count++;
1600 if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1601 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1602 ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1603 main_rssi_avg);
1604 antcomb->alt_good = true;
1605 } else {
1606 antcomb->alt_good = false;
1609 antcomb->count = 0;
1610 antcomb->scan = true;
1611 antcomb->scan_not_start = true;
1614 if (!antcomb->scan) {
1615 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1616 alt_ratio, curr_main_set, curr_alt_set,
1617 alt_rssi_avg, main_rssi_avg)) {
1618 if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1619 /* Switch main and alt LNA */
1620 div_ant_conf.main_lna_conf =
1621 ATH_ANT_DIV_COMB_LNA2;
1622 div_ant_conf.alt_lna_conf =
1623 ATH_ANT_DIV_COMB_LNA1;
1624 } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1625 div_ant_conf.main_lna_conf =
1626 ATH_ANT_DIV_COMB_LNA1;
1627 div_ant_conf.alt_lna_conf =
1628 ATH_ANT_DIV_COMB_LNA2;
1631 goto div_comb_done;
1632 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1633 (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1634 /* Set alt to another LNA */
1635 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1636 div_ant_conf.alt_lna_conf =
1637 ATH_ANT_DIV_COMB_LNA1;
1638 else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1639 div_ant_conf.alt_lna_conf =
1640 ATH_ANT_DIV_COMB_LNA2;
1642 goto div_comb_done;
1645 if ((alt_rssi_avg < (main_rssi_avg +
1646 div_ant_conf.lna1_lna2_delta)))
1647 goto div_comb_done;
1650 if (!antcomb->scan_not_start) {
1651 switch (curr_alt_set) {
1652 case ATH_ANT_DIV_COMB_LNA2:
1653 antcomb->rssi_lna2 = alt_rssi_avg;
1654 antcomb->rssi_lna1 = main_rssi_avg;
1655 antcomb->scan = true;
1656 /* set to A+B */
1657 div_ant_conf.main_lna_conf =
1658 ATH_ANT_DIV_COMB_LNA1;
1659 div_ant_conf.alt_lna_conf =
1660 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1661 break;
1662 case ATH_ANT_DIV_COMB_LNA1:
1663 antcomb->rssi_lna1 = alt_rssi_avg;
1664 antcomb->rssi_lna2 = main_rssi_avg;
1665 antcomb->scan = true;
1666 /* set to A+B */
1667 div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1668 div_ant_conf.alt_lna_conf =
1669 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1670 break;
1671 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1672 antcomb->rssi_add = alt_rssi_avg;
1673 antcomb->scan = true;
1674 /* set to A-B */
1675 div_ant_conf.alt_lna_conf =
1676 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1677 break;
1678 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1679 antcomb->rssi_sub = alt_rssi_avg;
1680 antcomb->scan = false;
1681 if (antcomb->rssi_lna2 >
1682 (antcomb->rssi_lna1 +
1683 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1684 /* use LNA2 as main LNA */
1685 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1686 (antcomb->rssi_add > antcomb->rssi_sub)) {
1687 /* set to A+B */
1688 div_ant_conf.main_lna_conf =
1689 ATH_ANT_DIV_COMB_LNA2;
1690 div_ant_conf.alt_lna_conf =
1691 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1692 } else if (antcomb->rssi_sub >
1693 antcomb->rssi_lna1) {
1694 /* set to A-B */
1695 div_ant_conf.main_lna_conf =
1696 ATH_ANT_DIV_COMB_LNA2;
1697 div_ant_conf.alt_lna_conf =
1698 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1699 } else {
1700 /* set to LNA1 */
1701 div_ant_conf.main_lna_conf =
1702 ATH_ANT_DIV_COMB_LNA2;
1703 div_ant_conf.alt_lna_conf =
1704 ATH_ANT_DIV_COMB_LNA1;
1706 } else {
1707 /* use LNA1 as main LNA */
1708 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1709 (antcomb->rssi_add > antcomb->rssi_sub)) {
1710 /* set to A+B */
1711 div_ant_conf.main_lna_conf =
1712 ATH_ANT_DIV_COMB_LNA1;
1713 div_ant_conf.alt_lna_conf =
1714 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1715 } else if (antcomb->rssi_sub >
1716 antcomb->rssi_lna1) {
1717 /* set to A-B */
1718 div_ant_conf.main_lna_conf =
1719 ATH_ANT_DIV_COMB_LNA1;
1720 div_ant_conf.alt_lna_conf =
1721 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1722 } else {
1723 /* set to LNA2 */
1724 div_ant_conf.main_lna_conf =
1725 ATH_ANT_DIV_COMB_LNA1;
1726 div_ant_conf.alt_lna_conf =
1727 ATH_ANT_DIV_COMB_LNA2;
1730 break;
1731 default:
1732 break;
1734 } else {
1735 if (!antcomb->alt_good) {
1736 antcomb->scan_not_start = false;
1737 /* Set alt to another LNA */
1738 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1739 div_ant_conf.main_lna_conf =
1740 ATH_ANT_DIV_COMB_LNA2;
1741 div_ant_conf.alt_lna_conf =
1742 ATH_ANT_DIV_COMB_LNA1;
1743 } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1744 div_ant_conf.main_lna_conf =
1745 ATH_ANT_DIV_COMB_LNA1;
1746 div_ant_conf.alt_lna_conf =
1747 ATH_ANT_DIV_COMB_LNA2;
1749 goto div_comb_done;
1753 ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1754 main_rssi_avg, alt_rssi_avg,
1755 alt_ratio);
1757 antcomb->quick_scan_cnt++;
1759 div_comb_done:
1760 ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1761 ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1763 antcomb->scan_start_time = jiffies;
1764 antcomb->total_pkt_count = 0;
1765 antcomb->main_total_rssi = 0;
1766 antcomb->alt_total_rssi = 0;
1767 antcomb->main_recv_cnt = 0;
1768 antcomb->alt_recv_cnt = 0;
1771 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1773 struct ath_buf *bf;
1774 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1775 struct ieee80211_rx_status *rxs;
1776 struct ath_hw *ah = sc->sc_ah;
1777 struct ath_common *common = ath9k_hw_common(ah);
1779 * The hw can technically differ from common->hw when using ath9k
1780 * virtual wiphy so to account for that we iterate over the active
1781 * wiphys and find the appropriate wiphy and therefore hw.
1783 struct ieee80211_hw *hw = sc->hw;
1784 struct ieee80211_hdr *hdr;
1785 int retval;
1786 bool decrypt_error = false;
1787 struct ath_rx_status rs;
1788 enum ath9k_rx_qtype qtype;
1789 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1790 int dma_type;
1791 u8 rx_status_len = ah->caps.rx_status_len;
1792 u64 tsf = 0;
1793 u32 tsf_lower = 0;
1794 unsigned long flags;
1796 if (edma)
1797 dma_type = DMA_BIDIRECTIONAL;
1798 else
1799 dma_type = DMA_FROM_DEVICE;
1801 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1802 spin_lock_bh(&sc->rx.rxbuflock);
1804 tsf = ath9k_hw_gettsf64(ah);
1805 tsf_lower = tsf & 0xffffffff;
1807 do {
1808 /* If handling rx interrupt and flush is in progress => exit */
1809 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1810 break;
1812 memset(&rs, 0, sizeof(rs));
1813 if (edma)
1814 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1815 else
1816 bf = ath_get_next_rx_buf(sc, &rs);
1818 if (!bf)
1819 break;
1821 skb = bf->bf_mpdu;
1822 if (!skb)
1823 continue;
1826 * Take frame header from the first fragment and RX status from
1827 * the last one.
1829 if (sc->rx.frag)
1830 hdr_skb = sc->rx.frag;
1831 else
1832 hdr_skb = skb;
1834 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1835 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1837 ath_debug_stat_rx(sc, &rs);
1840 * If we're asked to flush receive queue, directly
1841 * chain it back at the queue without processing it.
1843 if (flush)
1844 goto requeue_drop_frag;
1846 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1847 rxs, &decrypt_error);
1848 if (retval)
1849 goto requeue_drop_frag;
1851 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1852 if (rs.rs_tstamp > tsf_lower &&
1853 unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1854 rxs->mactime -= 0x100000000ULL;
1856 if (rs.rs_tstamp < tsf_lower &&
1857 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1858 rxs->mactime += 0x100000000ULL;
1860 /* Ensure we always have an skb to requeue once we are done
1861 * processing the current buffer's skb */
1862 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1864 /* If there is no memory we ignore the current RX'd frame,
1865 * tell hardware it can give us a new frame using the old
1866 * skb and put it at the tail of the sc->rx.rxbuf list for
1867 * processing. */
1868 if (!requeue_skb)
1869 goto requeue_drop_frag;
1871 /* Unmap the frame */
1872 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1873 common->rx_bufsize,
1874 dma_type);
1876 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1877 if (ah->caps.rx_status_len)
1878 skb_pull(skb, ah->caps.rx_status_len);
1880 if (!rs.rs_more)
1881 ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1882 rxs, decrypt_error);
1884 /* We will now give hardware our shiny new allocated skb */
1885 bf->bf_mpdu = requeue_skb;
1886 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1887 common->rx_bufsize,
1888 dma_type);
1889 if (unlikely(dma_mapping_error(sc->dev,
1890 bf->bf_buf_addr))) {
1891 dev_kfree_skb_any(requeue_skb);
1892 bf->bf_mpdu = NULL;
1893 bf->bf_buf_addr = 0;
1894 ath_err(common, "dma_mapping_error() on RX\n");
1895 ieee80211_rx(hw, skb);
1896 break;
1899 if (rs.rs_more) {
1901 * rs_more indicates chained descriptors which can be
1902 * used to link buffers together for a sort of
1903 * scatter-gather operation.
1905 if (sc->rx.frag) {
1906 /* too many fragments - cannot handle frame */
1907 dev_kfree_skb_any(sc->rx.frag);
1908 dev_kfree_skb_any(skb);
1909 skb = NULL;
1911 sc->rx.frag = skb;
1912 goto requeue;
1915 if (sc->rx.frag) {
1916 int space = skb->len - skb_tailroom(hdr_skb);
1918 sc->rx.frag = NULL;
1920 if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1921 dev_kfree_skb(skb);
1922 goto requeue_drop_frag;
1925 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1926 skb->len);
1927 dev_kfree_skb_any(skb);
1928 skb = hdr_skb;
1932 * change the default rx antenna if rx diversity chooses the
1933 * other antenna 3 times in a row.
1935 if (sc->rx.defant != rs.rs_antenna) {
1936 if (++sc->rx.rxotherant >= 3)
1937 ath_setdefantenna(sc, rs.rs_antenna);
1938 } else {
1939 sc->rx.rxotherant = 0;
1942 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1944 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1945 PS_WAIT_FOR_CAB |
1946 PS_WAIT_FOR_PSPOLL_DATA)) ||
1947 ath9k_check_auto_sleep(sc))
1948 ath_rx_ps(sc, skb);
1949 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1951 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1952 ath_ant_comb_scan(sc, &rs);
1954 ieee80211_rx(hw, skb);
1956 requeue_drop_frag:
1957 if (sc->rx.frag) {
1958 dev_kfree_skb_any(sc->rx.frag);
1959 sc->rx.frag = NULL;
1961 requeue:
1962 if (edma) {
1963 list_add_tail(&bf->list, &sc->rx.rxbuf);
1964 ath_rx_edma_buf_link(sc, qtype);
1965 } else {
1966 list_move_tail(&bf->list, &sc->rx.rxbuf);
1967 ath_rx_buf_link(sc, bf);
1968 ath9k_hw_rxena(ah);
1970 } while (1);
1972 spin_unlock_bh(&sc->rx.rxbuflock);
1974 return 0;