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mach-ux500: update the DB8500 register file
[linux-2.6/libata-dev.git] / drivers / net / atl1e / atl1e_main.c
blob86a912283134c9424715b003ec459ba47bd1e697
1 /*
2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1e.h"
23
24 #define DRV_VERSION "1.0.0.7-NAPI"
25
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
29 /*
30 * atl1e_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38 static DEFINE_PCI_DEVICE_TABLE(atl1e_pci_tbl) = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
41 /* required last entry */
42 { 0 }
43 };
44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45
46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRV_VERSION);
50
51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
52
53 static const u16
54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
60 };
61
62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63 {
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
67 REG_RXF3_BASE_ADDR_HI
68 };
69
70 static const u16
71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72 {
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
77 };
78
79 static const u16
80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81 {
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
86 };
87
88 static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
90 };
91
92 /*
93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
95 */
96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97 {
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
102 }
103 }
104
105 /*
106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
108 */
109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110 {
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
115 }
116
117 /*
118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
120 */
121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122 {
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
127 }
128
129 /*
130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
132 */
133 static void atl1e_phy_config(unsigned long data)
134 {
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
137 unsigned long flags;
138
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
142 }
143
144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
145 {
146
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
149 msleep(1);
150 atl1e_down(adapter);
151 atl1e_up(adapter);
152 clear_bit(__AT_RESETTING, &adapter->flags);
153 }
154
155 static void atl1e_reset_task(struct work_struct *work)
156 {
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
159
160 atl1e_reinit_locked(adapter);
161 }
162
163 static int atl1e_check_link(struct atl1e_adapter *adapter)
164 {
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
167 int err = 0;
168 u16 speed, duplex, phy_data;
169
170 /* MII_BMSR must read twice */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
174 /* link down */
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
176 u32 value;
177 /* disable rx */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
184 }
185 } else {
186 /* Link Up */
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
188 if (unlikely(err))
189 return err;
190
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
197 netdev_info(netdev,
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
199 adapter->link_speed,
200 adapter->link_duplex == FULL_DUPLEX ?
201 "Full" : "Half");
202 }
203
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
208 }
209 }
210 return 0;
211 }
212
213 /*
214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
216 */
217 static void atl1e_link_chg_task(struct work_struct *work)
218 {
219 struct atl1e_adapter *adapter;
220 unsigned long flags;
221
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
226 }
227
228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
229 {
230 struct net_device *netdev = adapter->netdev;
231 u16 phy_data = 0;
232 u16 link_up = 0;
233
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
240 if (!link_up) {
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
243 netdev_info(netdev, "NIC Link is Down\n");
244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
246 }
247 }
248 schedule_work(&adapter->link_chg_task);
249 }
250
251 static void atl1e_del_timer(struct atl1e_adapter *adapter)
252 {
253 del_timer_sync(&adapter->phy_config_timer);
254 }
255
256 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
257 {
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
260 }
261
262 /*
263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
265 */
266 static void atl1e_tx_timeout(struct net_device *netdev)
267 {
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
272 }
273
274 /*
275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
277 *
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
282 */
283 static void atl1e_set_multi(struct net_device *netdev)
284 {
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
287 struct netdev_hw_addr *ha;
288 u32 mac_ctrl_data = 0;
289 u32 hash_value;
290
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
293
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
299 } else {
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
301 }
302
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
304
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
308
309 /* comoute mc addresses' hash value ,and put it into hash table */
310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
312 atl1e_hash_set(hw, hash_value);
313 }
314 }
315
316 static void atl1e_vlan_rx_register(struct net_device *netdev,
317 struct vlan_group *grp)
318 {
319 struct atl1e_adapter *adapter = netdev_priv(netdev);
320 u32 mac_ctrl_data = 0;
321
322 netdev_dbg(adapter->netdev, "%s\n", __func__);
323
324 atl1e_irq_disable(adapter);
325
326 adapter->vlgrp = grp;
327 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
328
329 if (grp) {
330 /* enable VLAN tag insert/strip */
331 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
332 } else {
333 /* disable VLAN tag insert/strip */
334 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
335 }
336
337 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
338 atl1e_irq_enable(adapter);
339 }
340
341 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
342 {
343 netdev_dbg(adapter->netdev, "%s\n", __func__);
344 atl1e_vlan_rx_register(adapter->netdev, adapter->vlgrp);
345 }
346 /*
347 * atl1e_set_mac - Change the Ethernet Address of the NIC
348 * @netdev: network interface device structure
349 * @p: pointer to an address structure
350 *
351 * Returns 0 on success, negative on failure
352 */
353 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
354 {
355 struct atl1e_adapter *adapter = netdev_priv(netdev);
356 struct sockaddr *addr = p;
357
358 if (!is_valid_ether_addr(addr->sa_data))
359 return -EADDRNOTAVAIL;
360
361 if (netif_running(netdev))
362 return -EBUSY;
363
364 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
365 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
366
367 atl1e_hw_set_mac_addr(&adapter->hw);
368
369 return 0;
370 }
371
372 /*
373 * atl1e_change_mtu - Change the Maximum Transfer Unit
374 * @netdev: network interface device structure
375 * @new_mtu: new value for maximum frame size
376 *
377 * Returns 0 on success, negative on failure
378 */
379 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
380 {
381 struct atl1e_adapter *adapter = netdev_priv(netdev);
382 int old_mtu = netdev->mtu;
383 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
384
385 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
386 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
387 netdev_warn(adapter->netdev, "invalid MTU setting\n");
388 return -EINVAL;
389 }
390 /* set MTU */
391 if (old_mtu != new_mtu && netif_running(netdev)) {
392 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
393 msleep(1);
394 netdev->mtu = new_mtu;
395 adapter->hw.max_frame_size = new_mtu;
396 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
397 atl1e_down(adapter);
398 atl1e_up(adapter);
399 clear_bit(__AT_RESETTING, &adapter->flags);
400 }
401 return 0;
402 }
403
404 /*
405 * caller should hold mdio_lock
406 */
407 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
408 {
409 struct atl1e_adapter *adapter = netdev_priv(netdev);
410 u16 result;
411
412 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
413 return result;
414 }
415
416 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
417 int reg_num, int val)
418 {
419 struct atl1e_adapter *adapter = netdev_priv(netdev);
420
421 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
422 }
423
424 /*
425 * atl1e_mii_ioctl -
426 * @netdev:
427 * @ifreq:
428 * @cmd:
429 */
430 static int atl1e_mii_ioctl(struct net_device *netdev,
431 struct ifreq *ifr, int cmd)
432 {
433 struct atl1e_adapter *adapter = netdev_priv(netdev);
434 struct mii_ioctl_data *data = if_mii(ifr);
435 unsigned long flags;
436 int retval = 0;
437
438 if (!netif_running(netdev))
439 return -EINVAL;
440
441 spin_lock_irqsave(&adapter->mdio_lock, flags);
442 switch (cmd) {
443 case SIOCGMIIPHY:
444 data->phy_id = 0;
445 break;
446
447 case SIOCGMIIREG:
448 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
449 &data->val_out)) {
450 retval = -EIO;
451 goto out;
452 }
453 break;
454
455 case SIOCSMIIREG:
456 if (data->reg_num & ~(0x1F)) {
457 retval = -EFAULT;
458 goto out;
459 }
460
461 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
462 data->reg_num, data->val_in);
463 if (atl1e_write_phy_reg(&adapter->hw,
464 data->reg_num, data->val_in)) {
465 retval = -EIO;
466 goto out;
467 }
468 break;
469
470 default:
471 retval = -EOPNOTSUPP;
472 break;
473 }
474 out:
475 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
476 return retval;
477
478 }
479
480 /*
481 * atl1e_ioctl -
482 * @netdev:
483 * @ifreq:
484 * @cmd:
485 */
486 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
487 {
488 switch (cmd) {
489 case SIOCGMIIPHY:
490 case SIOCGMIIREG:
491 case SIOCSMIIREG:
492 return atl1e_mii_ioctl(netdev, ifr, cmd);
493 default:
494 return -EOPNOTSUPP;
495 }
496 }
497
498 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
499 {
500 u16 cmd;
501
502 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
503 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
504 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
505 pci_write_config_word(pdev, PCI_COMMAND, cmd);
506
507 /*
508 * some motherboards BIOS(PXE/EFI) driver may set PME
509 * while they transfer control to OS (Windows/Linux)
510 * so we should clear this bit before NIC work normally
511 */
512 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
513 msleep(1);
514 }
515
516 /*
517 * atl1e_alloc_queues - Allocate memory for all rings
518 * @adapter: board private structure to initialize
519 *
520 */
521 static int __devinit atl1e_alloc_queues(struct atl1e_adapter *adapter)
522 {
523 return 0;
524 }
525
526 /*
527 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
528 * @adapter: board private structure to initialize
529 *
530 * atl1e_sw_init initializes the Adapter private data structure.
531 * Fields are initialized based on PCI device information and
532 * OS network device settings (MTU size).
533 */
534 static int __devinit atl1e_sw_init(struct atl1e_adapter *adapter)
535 {
536 struct atl1e_hw *hw = &adapter->hw;
537 struct pci_dev *pdev = adapter->pdev;
538 u32 phy_status_data = 0;
539
540 adapter->wol = 0;
541 adapter->link_speed = SPEED_0; /* hardware init */
542 adapter->link_duplex = FULL_DUPLEX;
543 adapter->num_rx_queues = 1;
544
545 /* PCI config space info */
546 hw->vendor_id = pdev->vendor;
547 hw->device_id = pdev->device;
548 hw->subsystem_vendor_id = pdev->subsystem_vendor;
549 hw->subsystem_id = pdev->subsystem_device;
550 hw->revision_id = pdev->revision;
551
552 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
553
554 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
555 /* nic type */
556 if (hw->revision_id >= 0xF0) {
557 hw->nic_type = athr_l2e_revB;
558 } else {
559 if (phy_status_data & PHY_STATUS_100M)
560 hw->nic_type = athr_l1e;
561 else
562 hw->nic_type = athr_l2e_revA;
563 }
564
565 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
566
567 if (phy_status_data & PHY_STATUS_EMI_CA)
568 hw->emi_ca = true;
569 else
570 hw->emi_ca = false;
571
572 hw->phy_configured = false;
573 hw->preamble_len = 7;
574 hw->max_frame_size = adapter->netdev->mtu;
575 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
576 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
577
578 hw->rrs_type = atl1e_rrs_disable;
579 hw->indirect_tab = 0;
580 hw->base_cpu = 0;
581
582 /* need confirm */
583
584 hw->ict = 50000; /* 100ms */
585 hw->smb_timer = 200000; /* 200ms */
586 hw->tpd_burst = 5;
587 hw->rrd_thresh = 1;
588 hw->tpd_thresh = adapter->tx_ring.count / 2;
589 hw->rx_count_down = 4; /* 2us resolution */
590 hw->tx_count_down = hw->imt * 4 / 3;
591 hw->dmar_block = atl1e_dma_req_1024;
592 hw->dmaw_block = atl1e_dma_req_1024;
593 hw->dmar_dly_cnt = 15;
594 hw->dmaw_dly_cnt = 4;
595
596 if (atl1e_alloc_queues(adapter)) {
597 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
598 return -ENOMEM;
599 }
600
601 atomic_set(&adapter->irq_sem, 1);
602 spin_lock_init(&adapter->mdio_lock);
603 spin_lock_init(&adapter->tx_lock);
604
605 set_bit(__AT_DOWN, &adapter->flags);
606
607 return 0;
608 }
609
610 /*
611 * atl1e_clean_tx_ring - Free Tx-skb
612 * @adapter: board private structure
613 */
614 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
615 {
616 struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
617 &adapter->tx_ring;
618 struct atl1e_tx_buffer *tx_buffer = NULL;
619 struct pci_dev *pdev = adapter->pdev;
620 u16 index, ring_count;
621
622 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
623 return;
624
625 ring_count = tx_ring->count;
626 /* first unmmap dma */
627 for (index = 0; index < ring_count; index++) {
628 tx_buffer = &tx_ring->tx_buffer[index];
629 if (tx_buffer->dma) {
630 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
631 pci_unmap_single(pdev, tx_buffer->dma,
632 tx_buffer->length, PCI_DMA_TODEVICE);
633 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
634 pci_unmap_page(pdev, tx_buffer->dma,
635 tx_buffer->length, PCI_DMA_TODEVICE);
636 tx_buffer->dma = 0;
637 }
638 }
639 /* second free skb */
640 for (index = 0; index < ring_count; index++) {
641 tx_buffer = &tx_ring->tx_buffer[index];
642 if (tx_buffer->skb) {
643 dev_kfree_skb_any(tx_buffer->skb);
644 tx_buffer->skb = NULL;
645 }
646 }
647 /* Zero out Tx-buffers */
648 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
649 ring_count);
650 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
651 ring_count);
652 }
653
654 /*
655 * atl1e_clean_rx_ring - Free rx-reservation skbs
656 * @adapter: board private structure
657 */
658 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
659 {
660 struct atl1e_rx_ring *rx_ring =
661 (struct atl1e_rx_ring *)&adapter->rx_ring;
662 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
663 u16 i, j;
664
665
666 if (adapter->ring_vir_addr == NULL)
667 return;
668 /* Zero out the descriptor ring */
669 for (i = 0; i < adapter->num_rx_queues; i++) {
670 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
671 if (rx_page_desc[i].rx_page[j].addr != NULL) {
672 memset(rx_page_desc[i].rx_page[j].addr, 0,
673 rx_ring->real_page_size);
674 }
675 }
676 }
677 }
678
679 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
680 {
681 *ring_size = ((u32)(adapter->tx_ring.count *
682 sizeof(struct atl1e_tpd_desc) + 7
683 /* tx ring, qword align */
684 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
685 adapter->num_rx_queues + 31
686 /* rx ring, 32 bytes align */
687 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
688 sizeof(u32) + 3));
689 /* tx, rx cmd, dword align */
690 }
691
692 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
693 {
694 struct atl1e_rx_ring *rx_ring = NULL;
695
696 rx_ring = &adapter->rx_ring;
697
698 rx_ring->real_page_size = adapter->rx_ring.page_size
699 + adapter->hw.max_frame_size
700 + ETH_HLEN + VLAN_HLEN
701 + ETH_FCS_LEN;
702 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
703 atl1e_cal_ring_size(adapter, &adapter->ring_size);
704
705 adapter->ring_vir_addr = NULL;
706 adapter->rx_ring.desc = NULL;
707 rwlock_init(&adapter->tx_ring.tx_lock);
708 }
709
710 /*
711 * Read / Write Ptr Initialize:
712 */
713 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
714 {
715 struct atl1e_tx_ring *tx_ring = NULL;
716 struct atl1e_rx_ring *rx_ring = NULL;
717 struct atl1e_rx_page_desc *rx_page_desc = NULL;
718 int i, j;
719
720 tx_ring = &adapter->tx_ring;
721 rx_ring = &adapter->rx_ring;
722 rx_page_desc = rx_ring->rx_page_desc;
723
724 tx_ring->next_to_use = 0;
725 atomic_set(&tx_ring->next_to_clean, 0);
726
727 for (i = 0; i < adapter->num_rx_queues; i++) {
728 rx_page_desc[i].rx_using = 0;
729 rx_page_desc[i].rx_nxseq = 0;
730 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
731 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
732 rx_page_desc[i].rx_page[j].read_offset = 0;
733 }
734 }
735 }
736
737 /*
738 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
739 * @adapter: board private structure
740 *
741 * Free all transmit software resources
742 */
743 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
744 {
745 struct pci_dev *pdev = adapter->pdev;
746
747 atl1e_clean_tx_ring(adapter);
748 atl1e_clean_rx_ring(adapter);
749
750 if (adapter->ring_vir_addr) {
751 pci_free_consistent(pdev, adapter->ring_size,
752 adapter->ring_vir_addr, adapter->ring_dma);
753 adapter->ring_vir_addr = NULL;
754 }
755
756 if (adapter->tx_ring.tx_buffer) {
757 kfree(adapter->tx_ring.tx_buffer);
758 adapter->tx_ring.tx_buffer = NULL;
759 }
760 }
761
762 /*
763 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
764 * @adapter: board private structure
765 *
766 * Return 0 on success, negative on failure
767 */
768 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
769 {
770 struct pci_dev *pdev = adapter->pdev;
771 struct atl1e_tx_ring *tx_ring;
772 struct atl1e_rx_ring *rx_ring;
773 struct atl1e_rx_page_desc *rx_page_desc;
774 int size, i, j;
775 u32 offset = 0;
776 int err = 0;
777
778 if (adapter->ring_vir_addr != NULL)
779 return 0; /* alloced already */
780
781 tx_ring = &adapter->tx_ring;
782 rx_ring = &adapter->rx_ring;
783
784 /* real ring DMA buffer */
785
786 size = adapter->ring_size;
787 adapter->ring_vir_addr = pci_alloc_consistent(pdev,
788 adapter->ring_size, &adapter->ring_dma);
789
790 if (adapter->ring_vir_addr == NULL) {
791 netdev_err(adapter->netdev,
792 "pci_alloc_consistent failed, size = D%d\n", size);
793 return -ENOMEM;
794 }
795
796 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
797
798 rx_page_desc = rx_ring->rx_page_desc;
799
800 /* Init TPD Ring */
801 tx_ring->dma = roundup(adapter->ring_dma, 8);
802 offset = tx_ring->dma - adapter->ring_dma;
803 tx_ring->desc = (struct atl1e_tpd_desc *)
804 (adapter->ring_vir_addr + offset);
805 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
806 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
807 if (tx_ring->tx_buffer == NULL) {
808 netdev_err(adapter->netdev, "kzalloc failed, size = D%d\n",
809 size);
810 err = -ENOMEM;
811 goto failed;
812 }
813
814 /* Init RXF-Pages */
815 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
816 offset = roundup(offset, 32);
817
818 for (i = 0; i < adapter->num_rx_queues; i++) {
819 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
820 rx_page_desc[i].rx_page[j].dma =
821 adapter->ring_dma + offset;
822 rx_page_desc[i].rx_page[j].addr =
823 adapter->ring_vir_addr + offset;
824 offset += rx_ring->real_page_size;
825 }
826 }
827
828 /* Init CMB dma address */
829 tx_ring->cmb_dma = adapter->ring_dma + offset;
830 tx_ring->cmb = (u32 *)(adapter->ring_vir_addr + offset);
831 offset += sizeof(u32);
832
833 for (i = 0; i < adapter->num_rx_queues; i++) {
834 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
835 rx_page_desc[i].rx_page[j].write_offset_dma =
836 adapter->ring_dma + offset;
837 rx_page_desc[i].rx_page[j].write_offset_addr =
838 adapter->ring_vir_addr + offset;
839 offset += sizeof(u32);
840 }
841 }
842
843 if (unlikely(offset > adapter->ring_size)) {
844 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
845 offset, adapter->ring_size);
846 err = -1;
847 goto failed;
848 }
849
850 return 0;
851 failed:
852 if (adapter->ring_vir_addr != NULL) {
853 pci_free_consistent(pdev, adapter->ring_size,
854 adapter->ring_vir_addr, adapter->ring_dma);
855 adapter->ring_vir_addr = NULL;
856 }
857 return err;
858 }
859
860 static inline void atl1e_configure_des_ring(const struct atl1e_adapter *adapter)
861 {
862
863 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
864 struct atl1e_rx_ring *rx_ring =
865 (struct atl1e_rx_ring *)&adapter->rx_ring;
866 struct atl1e_tx_ring *tx_ring =
867 (struct atl1e_tx_ring *)&adapter->tx_ring;
868 struct atl1e_rx_page_desc *rx_page_desc = NULL;
869 int i, j;
870
871 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
872 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
873 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
874 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
875 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
876 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
877 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
878
879 rx_page_desc = rx_ring->rx_page_desc;
880 /* RXF Page Physical address / Page Length */
881 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
882 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
883 (u32)((adapter->ring_dma &
884 AT_DMA_HI_ADDR_MASK) >> 32));
885 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
886 u32 page_phy_addr;
887 u32 offset_phy_addr;
888
889 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
890 offset_phy_addr =
891 rx_page_desc[i].rx_page[j].write_offset_dma;
892
893 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
894 page_phy_addr & AT_DMA_LO_ADDR_MASK);
895 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
896 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
897 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
898 }
899 }
900 /* Page Length */
901 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
902 /* Load all of base address above */
903 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
904 }
905
906 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
907 {
908 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
909 u32 dev_ctrl_data = 0;
910 u32 max_pay_load = 0;
911 u32 jumbo_thresh = 0;
912 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
913
914 /* configure TXQ param */
915 if (hw->nic_type != athr_l2e_revB) {
916 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
917 if (hw->max_frame_size <= 1500) {
918 jumbo_thresh = hw->max_frame_size + extra_size;
919 } else if (hw->max_frame_size < 6*1024) {
920 jumbo_thresh =
921 (hw->max_frame_size + extra_size) * 2 / 3;
922 } else {
923 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
924 }
925 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
926 }
927
928 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
929
930 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
931 DEVICE_CTRL_MAX_PAYLOAD_MASK;
932
933 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
934
935 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
936 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
937 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
938
939 if (hw->nic_type != athr_l2e_revB)
940 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
941 atl1e_pay_load_size[hw->dmar_block]);
942 /* enable TXQ */
943 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
944 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
945 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
946 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
947 }
948
949 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
950 {
951 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
952 u32 rxf_len = 0;
953 u32 rxf_low = 0;
954 u32 rxf_high = 0;
955 u32 rxf_thresh_data = 0;
956 u32 rxq_ctrl_data = 0;
957
958 if (hw->nic_type != athr_l2e_revB) {
959 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
960 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
961 RXQ_JMBOSZ_TH_SHIFT |
962 (1 & RXQ_JMBO_LKAH_MASK) <<
963 RXQ_JMBO_LKAH_SHIFT));
964
965 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
966 rxf_high = rxf_len * 4 / 5;
967 rxf_low = rxf_len / 5;
968 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
969 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
970 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
971 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
972
973 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
974 }
975
976 /* RRS */
977 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
978 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
979
980 if (hw->rrs_type & atl1e_rrs_ipv4)
981 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
982
983 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
984 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
985
986 if (hw->rrs_type & atl1e_rrs_ipv6)
987 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
988
989 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
990 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
991
992 if (hw->rrs_type != atl1e_rrs_disable)
993 rxq_ctrl_data |=
994 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
995
996 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
997 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
998
999 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1000 }
1001
1002 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1003 {
1004 struct atl1e_hw *hw = &adapter->hw;
1005 u32 dma_ctrl_data = 0;
1006
1007 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1008 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1009 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1010 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1011 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1012 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1013 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1014 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1015 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1016 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1017
1018 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1019 }
1020
1021 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1022 {
1023 u32 value;
1024 struct atl1e_hw *hw = &adapter->hw;
1025 struct net_device *netdev = adapter->netdev;
1026
1027 /* Config MAC CTRL Register */
1028 value = MAC_CTRL_TX_EN |
1029 MAC_CTRL_RX_EN ;
1030
1031 if (FULL_DUPLEX == adapter->link_duplex)
1032 value |= MAC_CTRL_DUPLX;
1033
1034 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1035 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1036 MAC_CTRL_SPEED_SHIFT);
1037 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1038
1039 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1040 value |= (((u32)adapter->hw.preamble_len &
1041 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1042
1043 if (adapter->vlgrp)
1044 value |= MAC_CTRL_RMV_VLAN;
1045
1046 value |= MAC_CTRL_BC_EN;
1047 if (netdev->flags & IFF_PROMISC)
1048 value |= MAC_CTRL_PROMIS_EN;
1049 if (netdev->flags & IFF_ALLMULTI)
1050 value |= MAC_CTRL_MC_ALL_EN;
1051
1052 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1053 }
1054
1055 /*
1056 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1057 * @adapter: board private structure
1058 *
1059 * Configure the Tx /Rx unit of the MAC after a reset.
1060 */
1061 static int atl1e_configure(struct atl1e_adapter *adapter)
1062 {
1063 struct atl1e_hw *hw = &adapter->hw;
1064
1065 u32 intr_status_data = 0;
1066
1067 /* clear interrupt status */
1068 AT_WRITE_REG(hw, REG_ISR, ~0);
1069
1070 /* 1. set MAC Address */
1071 atl1e_hw_set_mac_addr(hw);
1072
1073 /* 2. Init the Multicast HASH table done by set_muti */
1074
1075 /* 3. Clear any WOL status */
1076 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1077
1078 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1079 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1080 * High 32bits memory */
1081 atl1e_configure_des_ring(adapter);
1082
1083 /* 5. set Interrupt Moderator Timer */
1084 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1085 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1086 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1087 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1088
1089 /* 6. rx/tx threshold to trig interrupt */
1090 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1091 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1092 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1093 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1094
1095 /* 7. set Interrupt Clear Timer */
1096 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1097
1098 /* 8. set MTU */
1099 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1100 VLAN_HLEN + ETH_FCS_LEN);
1101
1102 /* 9. config TXQ early tx threshold */
1103 atl1e_configure_tx(adapter);
1104
1105 /* 10. config RXQ */
1106 atl1e_configure_rx(adapter);
1107
1108 /* 11. config DMA Engine */
1109 atl1e_configure_dma(adapter);
1110
1111 /* 12. smb timer to trig interrupt */
1112 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1113
1114 intr_status_data = AT_READ_REG(hw, REG_ISR);
1115 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1116 netdev_err(adapter->netdev,
1117 "atl1e_configure failed, PCIE phy link down\n");
1118 return -1;
1119 }
1120
1121 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1122 return 0;
1123 }
1124
1125 /*
1126 * atl1e_get_stats - Get System Network Statistics
1127 * @netdev: network interface device structure
1128 *
1129 * Returns the address of the device statistics structure.
1130 * The statistics are actually updated from the timer callback.
1131 */
1132 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1133 {
1134 struct atl1e_adapter *adapter = netdev_priv(netdev);
1135 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1136 struct net_device_stats *net_stats = &netdev->stats;
1137
1138 net_stats->rx_packets = hw_stats->rx_ok;
1139 net_stats->tx_packets = hw_stats->tx_ok;
1140 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1141 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1142 net_stats->multicast = hw_stats->rx_mcast;
1143 net_stats->collisions = hw_stats->tx_1_col +
1144 hw_stats->tx_2_col * 2 +
1145 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1146
1147 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1148 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1149 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1150 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1151 net_stats->rx_length_errors = hw_stats->rx_len_err;
1152 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1153 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1154 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1155
1156 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1157
1158 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1159 hw_stats->tx_underrun + hw_stats->tx_trunc;
1160 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1161 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1162 net_stats->tx_window_errors = hw_stats->tx_late_col;
1163
1164 return net_stats;
1165 }
1166
1167 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1168 {
1169 u16 hw_reg_addr = 0;
1170 unsigned long *stats_item = NULL;
1171
1172 /* update rx status */
1173 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1174 stats_item = &adapter->hw_stats.rx_ok;
1175 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1176 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1177 stats_item++;
1178 hw_reg_addr += 4;
1179 }
1180 /* update tx status */
1181 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1182 stats_item = &adapter->hw_stats.tx_ok;
1183 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1184 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1185 stats_item++;
1186 hw_reg_addr += 4;
1187 }
1188 }
1189
1190 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1191 {
1192 u16 phy_data;
1193
1194 spin_lock(&adapter->mdio_lock);
1195 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1196 spin_unlock(&adapter->mdio_lock);
1197 }
1198
1199 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1200 {
1201 struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
1202 &adapter->tx_ring;
1203 struct atl1e_tx_buffer *tx_buffer = NULL;
1204 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1205 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1206
1207 while (next_to_clean != hw_next_to_clean) {
1208 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1209 if (tx_buffer->dma) {
1210 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1211 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1212 tx_buffer->length, PCI_DMA_TODEVICE);
1213 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1214 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1215 tx_buffer->length, PCI_DMA_TODEVICE);
1216 tx_buffer->dma = 0;
1217 }
1218
1219 if (tx_buffer->skb) {
1220 dev_kfree_skb_irq(tx_buffer->skb);
1221 tx_buffer->skb = NULL;
1222 }
1223
1224 if (++next_to_clean == tx_ring->count)
1225 next_to_clean = 0;
1226 }
1227
1228 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1229
1230 if (netif_queue_stopped(adapter->netdev) &&
1231 netif_carrier_ok(adapter->netdev)) {
1232 netif_wake_queue(adapter->netdev);
1233 }
1234
1235 return true;
1236 }
1237
1238 /*
1239 * atl1e_intr - Interrupt Handler
1240 * @irq: interrupt number
1241 * @data: pointer to a network interface device structure
1242 * @pt_regs: CPU registers structure
1243 */
1244 static irqreturn_t atl1e_intr(int irq, void *data)
1245 {
1246 struct net_device *netdev = data;
1247 struct atl1e_adapter *adapter = netdev_priv(netdev);
1248 struct atl1e_hw *hw = &adapter->hw;
1249 int max_ints = AT_MAX_INT_WORK;
1250 int handled = IRQ_NONE;
1251 u32 status;
1252
1253 do {
1254 status = AT_READ_REG(hw, REG_ISR);
1255 if ((status & IMR_NORMAL_MASK) == 0 ||
1256 (status & ISR_DIS_INT) != 0) {
1257 if (max_ints != AT_MAX_INT_WORK)
1258 handled = IRQ_HANDLED;
1259 break;
1260 }
1261 /* link event */
1262 if (status & ISR_GPHY)
1263 atl1e_clear_phy_int(adapter);
1264 /* Ack ISR */
1265 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1266
1267 handled = IRQ_HANDLED;
1268 /* check if PCIE PHY Link down */
1269 if (status & ISR_PHY_LINKDOWN) {
1270 netdev_err(adapter->netdev,
1271 "pcie phy linkdown %x\n", status);
1272 if (netif_running(adapter->netdev)) {
1273 /* reset MAC */
1274 atl1e_irq_reset(adapter);
1275 schedule_work(&adapter->reset_task);
1276 break;
1277 }
1278 }
1279
1280 /* check if DMA read/write error */
1281 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1282 netdev_err(adapter->netdev,
1283 "PCIE DMA RW error (status = 0x%x)\n",
1284 status);
1285 atl1e_irq_reset(adapter);
1286 schedule_work(&adapter->reset_task);
1287 break;
1288 }
1289
1290 if (status & ISR_SMB)
1291 atl1e_update_hw_stats(adapter);
1292
1293 /* link event */
1294 if (status & (ISR_GPHY | ISR_MANUAL)) {
1295 netdev->stats.tx_carrier_errors++;
1296 atl1e_link_chg_event(adapter);
1297 break;
1298 }
1299
1300 /* transmit event */
1301 if (status & ISR_TX_EVENT)
1302 atl1e_clean_tx_irq(adapter);
1303
1304 if (status & ISR_RX_EVENT) {
1305 /*
1306 * disable rx interrupts, without
1307 * the synchronize_irq bit
1308 */
1309 AT_WRITE_REG(hw, REG_IMR,
1310 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1311 AT_WRITE_FLUSH(hw);
1312 if (likely(napi_schedule_prep(
1313 &adapter->napi)))
1314 __napi_schedule(&adapter->napi);
1315 }
1316 } while (--max_ints > 0);
1317 /* re-enable Interrupt*/
1318 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1319
1320 return handled;
1321 }
1322
1323 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1324 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1325 {
1326 u8 *packet = (u8 *)(prrs + 1);
1327 struct iphdr *iph;
1328 u16 head_len = ETH_HLEN;
1329 u16 pkt_flags;
1330 u16 err_flags;
1331
1332 skb_checksum_none_assert(skb);
1333 pkt_flags = prrs->pkt_flag;
1334 err_flags = prrs->err_flag;
1335 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1336 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1337 if (pkt_flags & RRS_IS_IPV4) {
1338 if (pkt_flags & RRS_IS_802_3)
1339 head_len += 8;
1340 iph = (struct iphdr *) (packet + head_len);
1341 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1342 goto hw_xsum;
1343 }
1344 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1345 skb->ip_summed = CHECKSUM_UNNECESSARY;
1346 return;
1347 }
1348 }
1349
1350 hw_xsum :
1351 return;
1352 }
1353
1354 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1355 u8 que)
1356 {
1357 struct atl1e_rx_page_desc *rx_page_desc =
1358 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1359 u8 rx_using = rx_page_desc[que].rx_using;
1360
1361 return (struct atl1e_rx_page *)&(rx_page_desc[que].rx_page[rx_using]);
1362 }
1363
1364 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1365 int *work_done, int work_to_do)
1366 {
1367 struct net_device *netdev = adapter->netdev;
1368 struct atl1e_rx_ring *rx_ring = (struct atl1e_rx_ring *)
1369 &adapter->rx_ring;
1370 struct atl1e_rx_page_desc *rx_page_desc =
1371 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1372 struct sk_buff *skb = NULL;
1373 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1374 u32 packet_size, write_offset;
1375 struct atl1e_recv_ret_status *prrs;
1376
1377 write_offset = *(rx_page->write_offset_addr);
1378 if (likely(rx_page->read_offset < write_offset)) {
1379 do {
1380 if (*work_done >= work_to_do)
1381 break;
1382 (*work_done)++;
1383 /* get new packet's rrs */
1384 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1385 rx_page->read_offset);
1386 /* check sequence number */
1387 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1388 netdev_err(netdev,
1389 "rx sequence number error (rx=%d) (expect=%d)\n",
1390 prrs->seq_num,
1391 rx_page_desc[que].rx_nxseq);
1392 rx_page_desc[que].rx_nxseq++;
1393 /* just for debug use */
1394 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1395 (((u32)prrs->seq_num) << 16) |
1396 rx_page_desc[que].rx_nxseq);
1397 goto fatal_err;
1398 }
1399 rx_page_desc[que].rx_nxseq++;
1400
1401 /* error packet */
1402 if (prrs->pkt_flag & RRS_IS_ERR_FRAME) {
1403 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1404 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1405 RRS_ERR_TRUNC)) {
1406 /* hardware error, discard this packet*/
1407 netdev_err(netdev,
1408 "rx packet desc error %x\n",
1409 *((u32 *)prrs + 1));
1410 goto skip_pkt;
1411 }
1412 }
1413
1414 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1415 RRS_PKT_SIZE_MASK) - 4; /* CRC */
1416 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1417 if (skb == NULL) {
1418 netdev_warn(netdev,
1419 "Memory squeeze, deferring packet\n");
1420 goto skip_pkt;
1421 }
1422 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1423 skb_put(skb, packet_size);
1424 skb->protocol = eth_type_trans(skb, netdev);
1425 atl1e_rx_checksum(adapter, skb, prrs);
1426
1427 if (unlikely(adapter->vlgrp &&
1428 (prrs->pkt_flag & RRS_IS_VLAN_TAG))) {
1429 u16 vlan_tag = (prrs->vtag >> 4) |
1430 ((prrs->vtag & 7) << 13) |
1431 ((prrs->vtag & 8) << 9);
1432 netdev_dbg(netdev,
1433 "RXD VLAN TAG<RRD>=0x%04x\n",
1434 prrs->vtag);
1435 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1436 vlan_tag);
1437 } else {
1438 netif_receive_skb(skb);
1439 }
1440
1441 skip_pkt:
1442 /* skip current packet whether it's ok or not. */
1443 rx_page->read_offset +=
1444 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1445 RRS_PKT_SIZE_MASK) +
1446 sizeof(struct atl1e_recv_ret_status) + 31) &
1447 0xFFFFFFE0);
1448
1449 if (rx_page->read_offset >= rx_ring->page_size) {
1450 /* mark this page clean */
1451 u16 reg_addr;
1452 u8 rx_using;
1453
1454 rx_page->read_offset =
1455 *(rx_page->write_offset_addr) = 0;
1456 rx_using = rx_page_desc[que].rx_using;
1457 reg_addr =
1458 atl1e_rx_page_vld_regs[que][rx_using];
1459 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1460 rx_page_desc[que].rx_using ^= 1;
1461 rx_page = atl1e_get_rx_page(adapter, que);
1462 }
1463 write_offset = *(rx_page->write_offset_addr);
1464 } while (rx_page->read_offset < write_offset);
1465 }
1466
1467 return;
1468
1469 fatal_err:
1470 if (!test_bit(__AT_DOWN, &adapter->flags))
1471 schedule_work(&adapter->reset_task);
1472 }
1473
1474 /*
1475 * atl1e_clean - NAPI Rx polling callback
1476 * @adapter: board private structure
1477 */
1478 static int atl1e_clean(struct napi_struct *napi, int budget)
1479 {
1480 struct atl1e_adapter *adapter =
1481 container_of(napi, struct atl1e_adapter, napi);
1482 u32 imr_data;
1483 int work_done = 0;
1484
1485 /* Keep link state information with original netdev */
1486 if (!netif_carrier_ok(adapter->netdev))
1487 goto quit_polling;
1488
1489 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1490
1491 /* If no Tx and not enough Rx work done, exit the polling mode */
1492 if (work_done < budget) {
1493 quit_polling:
1494 napi_complete(napi);
1495 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1496 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1497 /* test debug */
1498 if (test_bit(__AT_DOWN, &adapter->flags)) {
1499 atomic_dec(&adapter->irq_sem);
1500 netdev_err(adapter->netdev,
1501 "atl1e_clean is called when AT_DOWN\n");
1502 }
1503 /* reenable RX intr */
1504 /*atl1e_irq_enable(adapter); */
1505
1506 }
1507 return work_done;
1508 }
1509
1510 #ifdef CONFIG_NET_POLL_CONTROLLER
1511
1512 /*
1513 * Polling 'interrupt' - used by things like netconsole to send skbs
1514 * without having to re-enable interrupts. It's not called while
1515 * the interrupt routine is executing.
1516 */
1517 static void atl1e_netpoll(struct net_device *netdev)
1518 {
1519 struct atl1e_adapter *adapter = netdev_priv(netdev);
1520
1521 disable_irq(adapter->pdev->irq);
1522 atl1e_intr(adapter->pdev->irq, netdev);
1523 enable_irq(adapter->pdev->irq);
1524 }
1525 #endif
1526
1527 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1528 {
1529 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1530 u16 next_to_use = 0;
1531 u16 next_to_clean = 0;
1532
1533 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1534 next_to_use = tx_ring->next_to_use;
1535
1536 return (u16)(next_to_clean > next_to_use) ?
1537 (next_to_clean - next_to_use - 1) :
1538 (tx_ring->count + next_to_clean - next_to_use - 1);
1539 }
1540
1541 /*
1542 * get next usable tpd
1543 * Note: should call atl1e_tdp_avail to make sure
1544 * there is enough tpd to use
1545 */
1546 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1547 {
1548 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1549 u16 next_to_use = 0;
1550
1551 next_to_use = tx_ring->next_to_use;
1552 if (++tx_ring->next_to_use == tx_ring->count)
1553 tx_ring->next_to_use = 0;
1554
1555 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1556 return (struct atl1e_tpd_desc *)&tx_ring->desc[next_to_use];
1557 }
1558
1559 static struct atl1e_tx_buffer *
1560 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1561 {
1562 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1563
1564 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1565 }
1566
1567 /* Calculate the transmit packet descript needed*/
1568 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1569 {
1570 int i = 0;
1571 u16 tpd_req = 1;
1572 u16 fg_size = 0;
1573 u16 proto_hdr_len = 0;
1574
1575 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1576 fg_size = skb_shinfo(skb)->frags[i].size;
1577 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1578 }
1579
1580 if (skb_is_gso(skb)) {
1581 if (skb->protocol == htons(ETH_P_IP) ||
1582 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1583 proto_hdr_len = skb_transport_offset(skb) +
1584 tcp_hdrlen(skb);
1585 if (proto_hdr_len < skb_headlen(skb)) {
1586 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1587 MAX_TX_BUF_LEN - 1) >>
1588 MAX_TX_BUF_SHIFT);
1589 }
1590 }
1591
1592 }
1593 return tpd_req;
1594 }
1595
1596 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1597 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1598 {
1599 u8 hdr_len;
1600 u32 real_len;
1601 unsigned short offload_type;
1602 int err;
1603
1604 if (skb_is_gso(skb)) {
1605 if (skb_header_cloned(skb)) {
1606 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1607 if (unlikely(err))
1608 return -1;
1609 }
1610 offload_type = skb_shinfo(skb)->gso_type;
1611
1612 if (offload_type & SKB_GSO_TCPV4) {
1613 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1614 + ntohs(ip_hdr(skb)->tot_len));
1615
1616 if (real_len < skb->len)
1617 pskb_trim(skb, real_len);
1618
1619 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1620 if (unlikely(skb->len == hdr_len)) {
1621 /* only xsum need */
1622 netdev_warn(adapter->netdev,
1623 "IPV4 tso with zero data??\n");
1624 goto check_sum;
1625 } else {
1626 ip_hdr(skb)->check = 0;
1627 ip_hdr(skb)->tot_len = 0;
1628 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1629 ip_hdr(skb)->saddr,
1630 ip_hdr(skb)->daddr,
1631 0, IPPROTO_TCP, 0);
1632 tpd->word3 |= (ip_hdr(skb)->ihl &
1633 TDP_V4_IPHL_MASK) <<
1634 TPD_V4_IPHL_SHIFT;
1635 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1636 TPD_TCPHDRLEN_MASK) <<
1637 TPD_TCPHDRLEN_SHIFT;
1638 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1639 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1640 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1641 }
1642 return 0;
1643 }
1644 }
1645
1646 check_sum:
1647 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1648 u8 css, cso;
1649
1650 cso = skb_checksum_start_offset(skb);
1651 if (unlikely(cso & 0x1)) {
1652 netdev_err(adapter->netdev,
1653 "payload offset should not ant event number\n");
1654 return -1;
1655 } else {
1656 css = cso + skb->csum_offset;
1657 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1658 TPD_PLOADOFFSET_SHIFT;
1659 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1660 TPD_CCSUMOFFSET_SHIFT;
1661 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1662 }
1663 }
1664
1665 return 0;
1666 }
1667
1668 static void atl1e_tx_map(struct atl1e_adapter *adapter,
1669 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1670 {
1671 struct atl1e_tpd_desc *use_tpd = NULL;
1672 struct atl1e_tx_buffer *tx_buffer = NULL;
1673 u16 buf_len = skb_headlen(skb);
1674 u16 map_len = 0;
1675 u16 mapped_len = 0;
1676 u16 hdr_len = 0;
1677 u16 nr_frags;
1678 u16 f;
1679 int segment;
1680
1681 nr_frags = skb_shinfo(skb)->nr_frags;
1682 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1683 if (segment) {
1684 /* TSO */
1685 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1686 use_tpd = tpd;
1687
1688 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1689 tx_buffer->length = map_len;
1690 tx_buffer->dma = pci_map_single(adapter->pdev,
1691 skb->data, hdr_len, PCI_DMA_TODEVICE);
1692 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1693 mapped_len += map_len;
1694 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1695 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1696 ((cpu_to_le32(tx_buffer->length) &
1697 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1698 }
1699
1700 while (mapped_len < buf_len) {
1701 /* mapped_len == 0, means we should use the first tpd,
1702 which is given by caller */
1703 if (mapped_len == 0) {
1704 use_tpd = tpd;
1705 } else {
1706 use_tpd = atl1e_get_tpd(adapter);
1707 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1708 }
1709 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1710 tx_buffer->skb = NULL;
1711
1712 tx_buffer->length = map_len =
1713 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1714 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1715 tx_buffer->dma =
1716 pci_map_single(adapter->pdev, skb->data + mapped_len,
1717 map_len, PCI_DMA_TODEVICE);
1718 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1719 mapped_len += map_len;
1720 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1721 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1722 ((cpu_to_le32(tx_buffer->length) &
1723 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1724 }
1725
1726 for (f = 0; f < nr_frags; f++) {
1727 struct skb_frag_struct *frag;
1728 u16 i;
1729 u16 seg_num;
1730
1731 frag = &skb_shinfo(skb)->frags[f];
1732 buf_len = frag->size;
1733
1734 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1735 for (i = 0; i < seg_num; i++) {
1736 use_tpd = atl1e_get_tpd(adapter);
1737 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1738
1739 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1740 BUG_ON(tx_buffer->skb);
1741
1742 tx_buffer->skb = NULL;
1743 tx_buffer->length =
1744 (buf_len > MAX_TX_BUF_LEN) ?
1745 MAX_TX_BUF_LEN : buf_len;
1746 buf_len -= tx_buffer->length;
1747
1748 tx_buffer->dma =
1749 pci_map_page(adapter->pdev, frag->page,
1750 frag->page_offset +
1751 (i * MAX_TX_BUF_LEN),
1752 tx_buffer->length,
1753 PCI_DMA_TODEVICE);
1754 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1755 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1756 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1757 ((cpu_to_le32(tx_buffer->length) &
1758 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1759 }
1760 }
1761
1762 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1763 /* note this one is a tcp header */
1764 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1765 /* The last tpd */
1766
1767 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1768 /* The last buffer info contain the skb address,
1769 so it will be free after unmap */
1770 tx_buffer->skb = skb;
1771 }
1772
1773 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1774 struct atl1e_tpd_desc *tpd)
1775 {
1776 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1777 /* Force memory writes to complete before letting h/w
1778 * know there are new descriptors to fetch. (Only
1779 * applicable for weak-ordered memory model archs,
1780 * such as IA-64). */
1781 wmb();
1782 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1783 }
1784
1785 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1786 struct net_device *netdev)
1787 {
1788 struct atl1e_adapter *adapter = netdev_priv(netdev);
1789 unsigned long flags;
1790 u16 tpd_req = 1;
1791 struct atl1e_tpd_desc *tpd;
1792
1793 if (test_bit(__AT_DOWN, &adapter->flags)) {
1794 dev_kfree_skb_any(skb);
1795 return NETDEV_TX_OK;
1796 }
1797
1798 if (unlikely(skb->len <= 0)) {
1799 dev_kfree_skb_any(skb);
1800 return NETDEV_TX_OK;
1801 }
1802 tpd_req = atl1e_cal_tdp_req(skb);
1803 if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1804 return NETDEV_TX_LOCKED;
1805
1806 if (atl1e_tpd_avail(adapter) < tpd_req) {
1807 /* no enough descriptor, just stop queue */
1808 netif_stop_queue(netdev);
1809 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1810 return NETDEV_TX_BUSY;
1811 }
1812
1813 tpd = atl1e_get_tpd(adapter);
1814
1815 if (unlikely(vlan_tx_tag_present(skb))) {
1816 u16 vlan_tag = vlan_tx_tag_get(skb);
1817 u16 atl1e_vlan_tag;
1818
1819 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1820 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1821 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1822 TPD_VLAN_SHIFT;
1823 }
1824
1825 if (skb->protocol == htons(ETH_P_8021Q))
1826 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1827
1828 if (skb_network_offset(skb) != ETH_HLEN)
1829 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1830
1831 /* do TSO and check sum */
1832 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1833 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1834 dev_kfree_skb_any(skb);
1835 return NETDEV_TX_OK;
1836 }
1837
1838 atl1e_tx_map(adapter, skb, tpd);
1839 atl1e_tx_queue(adapter, tpd_req, tpd);
1840
1841 netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1842 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1843 return NETDEV_TX_OK;
1844 }
1845
1846 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1847 {
1848 struct net_device *netdev = adapter->netdev;
1849
1850 free_irq(adapter->pdev->irq, netdev);
1851
1852 if (adapter->have_msi)
1853 pci_disable_msi(adapter->pdev);
1854 }
1855
1856 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1857 {
1858 struct pci_dev *pdev = adapter->pdev;
1859 struct net_device *netdev = adapter->netdev;
1860 int flags = 0;
1861 int err = 0;
1862
1863 adapter->have_msi = true;
1864 err = pci_enable_msi(adapter->pdev);
1865 if (err) {
1866 netdev_dbg(adapter->netdev,
1867 "Unable to allocate MSI interrupt Error: %d\n", err);
1868 adapter->have_msi = false;
1869 } else
1870 netdev->irq = pdev->irq;
1871
1872
1873 if (!adapter->have_msi)
1874 flags |= IRQF_SHARED;
1875 err = request_irq(adapter->pdev->irq, atl1e_intr, flags,
1876 netdev->name, netdev);
1877 if (err) {
1878 netdev_dbg(adapter->netdev,
1879 "Unable to allocate interrupt Error: %d\n", err);
1880 if (adapter->have_msi)
1881 pci_disable_msi(adapter->pdev);
1882 return err;
1883 }
1884 netdev_dbg(adapter->netdev, "atl1e_request_irq OK\n");
1885 return err;
1886 }
1887
1888 int atl1e_up(struct atl1e_adapter *adapter)
1889 {
1890 struct net_device *netdev = adapter->netdev;
1891 int err = 0;
1892 u32 val;
1893
1894 /* hardware has been reset, we need to reload some things */
1895 err = atl1e_init_hw(&adapter->hw);
1896 if (err) {
1897 err = -EIO;
1898 return err;
1899 }
1900 atl1e_init_ring_ptrs(adapter);
1901 atl1e_set_multi(netdev);
1902 atl1e_restore_vlan(adapter);
1903
1904 if (atl1e_configure(adapter)) {
1905 err = -EIO;
1906 goto err_up;
1907 }
1908
1909 clear_bit(__AT_DOWN, &adapter->flags);
1910 napi_enable(&adapter->napi);
1911 atl1e_irq_enable(adapter);
1912 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1913 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1914 val | MASTER_CTRL_MANUAL_INT);
1915
1916 err_up:
1917 return err;
1918 }
1919
1920 void atl1e_down(struct atl1e_adapter *adapter)
1921 {
1922 struct net_device *netdev = adapter->netdev;
1923
1924 /* signal that we're down so the interrupt handler does not
1925 * reschedule our watchdog timer */
1926 set_bit(__AT_DOWN, &adapter->flags);
1927
1928 netif_stop_queue(netdev);
1929
1930 /* reset MAC to disable all RX/TX */
1931 atl1e_reset_hw(&adapter->hw);
1932 msleep(1);
1933
1934 napi_disable(&adapter->napi);
1935 atl1e_del_timer(adapter);
1936 atl1e_irq_disable(adapter);
1937
1938 netif_carrier_off(netdev);
1939 adapter->link_speed = SPEED_0;
1940 adapter->link_duplex = -1;
1941 atl1e_clean_tx_ring(adapter);
1942 atl1e_clean_rx_ring(adapter);
1943 }
1944
1945 /*
1946 * atl1e_open - Called when a network interface is made active
1947 * @netdev: network interface device structure
1948 *
1949 * Returns 0 on success, negative value on failure
1950 *
1951 * The open entry point is called when a network interface is made
1952 * active by the system (IFF_UP). At this point all resources needed
1953 * for transmit and receive operations are allocated, the interrupt
1954 * handler is registered with the OS, the watchdog timer is started,
1955 * and the stack is notified that the interface is ready.
1956 */
1957 static int atl1e_open(struct net_device *netdev)
1958 {
1959 struct atl1e_adapter *adapter = netdev_priv(netdev);
1960 int err;
1961
1962 /* disallow open during test */
1963 if (test_bit(__AT_TESTING, &adapter->flags))
1964 return -EBUSY;
1965
1966 /* allocate rx/tx dma buffer & descriptors */
1967 atl1e_init_ring_resources(adapter);
1968 err = atl1e_setup_ring_resources(adapter);
1969 if (unlikely(err))
1970 return err;
1971
1972 err = atl1e_request_irq(adapter);
1973 if (unlikely(err))
1974 goto err_req_irq;
1975
1976 err = atl1e_up(adapter);
1977 if (unlikely(err))
1978 goto err_up;
1979
1980 return 0;
1981
1982 err_up:
1983 atl1e_free_irq(adapter);
1984 err_req_irq:
1985 atl1e_free_ring_resources(adapter);
1986 atl1e_reset_hw(&adapter->hw);
1987
1988 return err;
1989 }
1990
1991 /*
1992 * atl1e_close - Disables a network interface
1993 * @netdev: network interface device structure
1994 *
1995 * Returns 0, this is not allowed to fail
1996 *
1997 * The close entry point is called when an interface is de-activated
1998 * by the OS. The hardware is still under the drivers control, but
1999 * needs to be disabled. A global MAC reset is issued to stop the
2000 * hardware, and all transmit and receive resources are freed.
2001 */
2002 static int atl1e_close(struct net_device *netdev)
2003 {
2004 struct atl1e_adapter *adapter = netdev_priv(netdev);
2005
2006 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2007 atl1e_down(adapter);
2008 atl1e_free_irq(adapter);
2009 atl1e_free_ring_resources(adapter);
2010
2011 return 0;
2012 }
2013
2014 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2015 {
2016 struct net_device *netdev = pci_get_drvdata(pdev);
2017 struct atl1e_adapter *adapter = netdev_priv(netdev);
2018 struct atl1e_hw *hw = &adapter->hw;
2019 u32 ctrl = 0;
2020 u32 mac_ctrl_data = 0;
2021 u32 wol_ctrl_data = 0;
2022 u16 mii_advertise_data = 0;
2023 u16 mii_bmsr_data = 0;
2024 u16 mii_intr_status_data = 0;
2025 u32 wufc = adapter->wol;
2026 u32 i;
2027 #ifdef CONFIG_PM
2028 int retval = 0;
2029 #endif
2030
2031 if (netif_running(netdev)) {
2032 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2033 atl1e_down(adapter);
2034 }
2035 netif_device_detach(netdev);
2036
2037 #ifdef CONFIG_PM
2038 retval = pci_save_state(pdev);
2039 if (retval)
2040 return retval;
2041 #endif
2042
2043 if (wufc) {
2044 /* get link status */
2045 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2046 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2047
2048 mii_advertise_data = ADVERTISE_10HALF;
2049
2050 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2051 (atl1e_write_phy_reg(hw,
2052 MII_ADVERTISE, mii_advertise_data) != 0) ||
2053 (atl1e_phy_commit(hw)) != 0) {
2054 netdev_dbg(adapter->netdev, "set phy register failed\n");
2055 goto wol_dis;
2056 }
2057
2058 hw->phy_configured = false; /* re-init PHY when resume */
2059
2060 /* turn on magic packet wol */
2061 if (wufc & AT_WUFC_MAG)
2062 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2063
2064 if (wufc & AT_WUFC_LNKC) {
2065 /* if orignal link status is link, just wait for retrive link */
2066 if (mii_bmsr_data & BMSR_LSTATUS) {
2067 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2068 msleep(100);
2069 atl1e_read_phy_reg(hw, MII_BMSR,
2070 (u16 *)&mii_bmsr_data);
2071 if (mii_bmsr_data & BMSR_LSTATUS)
2072 break;
2073 }
2074
2075 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2076 netdev_dbg(adapter->netdev,
2077 "Link may change when suspend\n");
2078 }
2079 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2080 /* only link up can wake up */
2081 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2082 netdev_dbg(adapter->netdev,
2083 "read write phy register failed\n");
2084 goto wol_dis;
2085 }
2086 }
2087 /* clear phy interrupt */
2088 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2089 /* Config MAC Ctrl register */
2090 mac_ctrl_data = MAC_CTRL_RX_EN;
2091 /* set to 10/100M halt duplex */
2092 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2093 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2094 MAC_CTRL_PRMLEN_MASK) <<
2095 MAC_CTRL_PRMLEN_SHIFT);
2096
2097 if (adapter->vlgrp)
2098 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2099
2100 /* magic packet maybe Broadcast&multicast&Unicast frame */
2101 if (wufc & AT_WUFC_MAG)
2102 mac_ctrl_data |= MAC_CTRL_BC_EN;
2103
2104 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2105 mac_ctrl_data);
2106
2107 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2108 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2109 /* pcie patch */
2110 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2111 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2112 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2113 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2114 goto suspend_exit;
2115 }
2116 wol_dis:
2117
2118 /* WOL disabled */
2119 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2120
2121 /* pcie patch */
2122 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2123 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2124 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2125
2126 atl1e_force_ps(hw);
2127 hw->phy_configured = false; /* re-init PHY when resume */
2128
2129 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2130
2131 suspend_exit:
2132
2133 if (netif_running(netdev))
2134 atl1e_free_irq(adapter);
2135
2136 pci_disable_device(pdev);
2137
2138 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2139
2140 return 0;
2141 }
2142
2143 #ifdef CONFIG_PM
2144 static int atl1e_resume(struct pci_dev *pdev)
2145 {
2146 struct net_device *netdev = pci_get_drvdata(pdev);
2147 struct atl1e_adapter *adapter = netdev_priv(netdev);
2148 u32 err;
2149
2150 pci_set_power_state(pdev, PCI_D0);
2151 pci_restore_state(pdev);
2152
2153 err = pci_enable_device(pdev);
2154 if (err) {
2155 netdev_err(adapter->netdev,
2156 "Cannot enable PCI device from suspend\n");
2157 return err;
2158 }
2159
2160 pci_set_master(pdev);
2161
2162 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2163
2164 pci_enable_wake(pdev, PCI_D3hot, 0);
2165 pci_enable_wake(pdev, PCI_D3cold, 0);
2166
2167 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2168
2169 if (netif_running(netdev)) {
2170 err = atl1e_request_irq(adapter);
2171 if (err)
2172 return err;
2173 }
2174
2175 atl1e_reset_hw(&adapter->hw);
2176
2177 if (netif_running(netdev))
2178 atl1e_up(adapter);
2179
2180 netif_device_attach(netdev);
2181
2182 return 0;
2183 }
2184 #endif
2185
2186 static void atl1e_shutdown(struct pci_dev *pdev)
2187 {
2188 atl1e_suspend(pdev, PMSG_SUSPEND);
2189 }
2190
2191 static const struct net_device_ops atl1e_netdev_ops = {
2192 .ndo_open = atl1e_open,
2193 .ndo_stop = atl1e_close,
2194 .ndo_start_xmit = atl1e_xmit_frame,
2195 .ndo_get_stats = atl1e_get_stats,
2196 .ndo_set_multicast_list = atl1e_set_multi,
2197 .ndo_validate_addr = eth_validate_addr,
2198 .ndo_set_mac_address = atl1e_set_mac_addr,
2199 .ndo_change_mtu = atl1e_change_mtu,
2200 .ndo_do_ioctl = atl1e_ioctl,
2201 .ndo_tx_timeout = atl1e_tx_timeout,
2202 .ndo_vlan_rx_register = atl1e_vlan_rx_register,
2203 #ifdef CONFIG_NET_POLL_CONTROLLER
2204 .ndo_poll_controller = atl1e_netpoll,
2205 #endif
2206
2207 };
2208
2209 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2210 {
2211 SET_NETDEV_DEV(netdev, &pdev->dev);
2212 pci_set_drvdata(pdev, netdev);
2213
2214 netdev->irq = pdev->irq;
2215 netdev->netdev_ops = &atl1e_netdev_ops;
2216
2217 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2218 atl1e_set_ethtool_ops(netdev);
2219
2220 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2221 NETIF_F_HW_VLAN_TX;
2222 netdev->features = netdev->hw_features |
2223 NETIF_F_HW_VLAN_RX | NETIF_F_LLTX;
2224
2225 return 0;
2226 }
2227
2228 /*
2229 * atl1e_probe - Device Initialization Routine
2230 * @pdev: PCI device information struct
2231 * @ent: entry in atl1e_pci_tbl
2232 *
2233 * Returns 0 on success, negative on failure
2234 *
2235 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2236 * The OS initialization, configuring of the adapter private structure,
2237 * and a hardware reset occur.
2238 */
2239 static int __devinit atl1e_probe(struct pci_dev *pdev,
2240 const struct pci_device_id *ent)
2241 {
2242 struct net_device *netdev;
2243 struct atl1e_adapter *adapter = NULL;
2244 static int cards_found;
2245
2246 int err = 0;
2247
2248 err = pci_enable_device(pdev);
2249 if (err) {
2250 dev_err(&pdev->dev, "cannot enable PCI device\n");
2251 return err;
2252 }
2253
2254 /*
2255 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2256 * shared register for the high 32 bits, so only a single, aligned,
2257 * 4 GB physical address range can be used at a time.
2258 *
2259 * Supporting 64-bit DMA on this hardware is more trouble than it's
2260 * worth. It is far easier to limit to 32-bit DMA than update
2261 * various kernel subsystems to support the mechanics required by a
2262 * fixed-high-32-bit system.
2263 */
2264 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2265 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2266 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2267 goto err_dma;
2268 }
2269
2270 err = pci_request_regions(pdev, atl1e_driver_name);
2271 if (err) {
2272 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2273 goto err_pci_reg;
2274 }
2275
2276 pci_set_master(pdev);
2277
2278 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2279 if (netdev == NULL) {
2280 err = -ENOMEM;
2281 dev_err(&pdev->dev, "etherdev alloc failed\n");
2282 goto err_alloc_etherdev;
2283 }
2284
2285 err = atl1e_init_netdev(netdev, pdev);
2286 if (err) {
2287 netdev_err(netdev, "init netdevice failed\n");
2288 goto err_init_netdev;
2289 }
2290 adapter = netdev_priv(netdev);
2291 adapter->bd_number = cards_found;
2292 adapter->netdev = netdev;
2293 adapter->pdev = pdev;
2294 adapter->hw.adapter = adapter;
2295 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2296 if (!adapter->hw.hw_addr) {
2297 err = -EIO;
2298 netdev_err(netdev, "cannot map device registers\n");
2299 goto err_ioremap;
2300 }
2301 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2302
2303 /* init mii data */
2304 adapter->mii.dev = netdev;
2305 adapter->mii.mdio_read = atl1e_mdio_read;
2306 adapter->mii.mdio_write = atl1e_mdio_write;
2307 adapter->mii.phy_id_mask = 0x1f;
2308 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2309
2310 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2311
2312 init_timer(&adapter->phy_config_timer);
2313 adapter->phy_config_timer.function = atl1e_phy_config;
2314 adapter->phy_config_timer.data = (unsigned long) adapter;
2315
2316 /* get user settings */
2317 atl1e_check_options(adapter);
2318 /*
2319 * Mark all PCI regions associated with PCI device
2320 * pdev as being reserved by owner atl1e_driver_name
2321 * Enables bus-mastering on the device and calls
2322 * pcibios_set_master to do the needed arch specific settings
2323 */
2324 atl1e_setup_pcicmd(pdev);
2325 /* setup the private structure */
2326 err = atl1e_sw_init(adapter);
2327 if (err) {
2328 netdev_err(netdev, "net device private data init failed\n");
2329 goto err_sw_init;
2330 }
2331
2332 /* Init GPHY as early as possible due to power saving issue */
2333 atl1e_phy_init(&adapter->hw);
2334 /* reset the controller to
2335 * put the device in a known good starting state */
2336 err = atl1e_reset_hw(&adapter->hw);
2337 if (err) {
2338 err = -EIO;
2339 goto err_reset;
2340 }
2341
2342 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2343 err = -EIO;
2344 netdev_err(netdev, "get mac address failed\n");
2345 goto err_eeprom;
2346 }
2347
2348 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2349 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2350 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2351
2352 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2353 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2354 err = register_netdev(netdev);
2355 if (err) {
2356 netdev_err(netdev, "register netdevice failed\n");
2357 goto err_register;
2358 }
2359
2360 /* assume we have no link for now */
2361 netif_stop_queue(netdev);
2362 netif_carrier_off(netdev);
2363
2364 cards_found++;
2365
2366 return 0;
2367
2368 err_reset:
2369 err_register:
2370 err_sw_init:
2371 err_eeprom:
2372 iounmap(adapter->hw.hw_addr);
2373 err_init_netdev:
2374 err_ioremap:
2375 free_netdev(netdev);
2376 err_alloc_etherdev:
2377 pci_release_regions(pdev);
2378 err_pci_reg:
2379 err_dma:
2380 pci_disable_device(pdev);
2381 return err;
2382 }
2383
2384 /*
2385 * atl1e_remove - Device Removal Routine
2386 * @pdev: PCI device information struct
2387 *
2388 * atl1e_remove is called by the PCI subsystem to alert the driver
2389 * that it should release a PCI device. The could be caused by a
2390 * Hot-Plug event, or because the driver is going to be removed from
2391 * memory.
2392 */
2393 static void __devexit atl1e_remove(struct pci_dev *pdev)
2394 {
2395 struct net_device *netdev = pci_get_drvdata(pdev);
2396 struct atl1e_adapter *adapter = netdev_priv(netdev);
2397
2398 /*
2399 * flush_scheduled work may reschedule our watchdog task, so
2400 * explicitly disable watchdog tasks from being rescheduled
2401 */
2402 set_bit(__AT_DOWN, &adapter->flags);
2403
2404 atl1e_del_timer(adapter);
2405 atl1e_cancel_work(adapter);
2406
2407 unregister_netdev(netdev);
2408 atl1e_free_ring_resources(adapter);
2409 atl1e_force_ps(&adapter->hw);
2410 iounmap(adapter->hw.hw_addr);
2411 pci_release_regions(pdev);
2412 free_netdev(netdev);
2413 pci_disable_device(pdev);
2414 }
2415
2416 /*
2417 * atl1e_io_error_detected - called when PCI error is detected
2418 * @pdev: Pointer to PCI device
2419 * @state: The current pci connection state
2420 *
2421 * This function is called after a PCI bus error affecting
2422 * this device has been detected.
2423 */
2424 static pci_ers_result_t
2425 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2426 {
2427 struct net_device *netdev = pci_get_drvdata(pdev);
2428 struct atl1e_adapter *adapter = netdev_priv(netdev);
2429
2430 netif_device_detach(netdev);
2431
2432 if (state == pci_channel_io_perm_failure)
2433 return PCI_ERS_RESULT_DISCONNECT;
2434
2435 if (netif_running(netdev))
2436 atl1e_down(adapter);
2437
2438 pci_disable_device(pdev);
2439
2440 /* Request a slot slot reset. */
2441 return PCI_ERS_RESULT_NEED_RESET;
2442 }
2443
2444 /*
2445 * atl1e_io_slot_reset - called after the pci bus has been reset.
2446 * @pdev: Pointer to PCI device
2447 *
2448 * Restart the card from scratch, as if from a cold-boot. Implementation
2449 * resembles the first-half of the e1000_resume routine.
2450 */
2451 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2452 {
2453 struct net_device *netdev = pci_get_drvdata(pdev);
2454 struct atl1e_adapter *adapter = netdev_priv(netdev);
2455
2456 if (pci_enable_device(pdev)) {
2457 netdev_err(adapter->netdev,
2458 "Cannot re-enable PCI device after reset\n");
2459 return PCI_ERS_RESULT_DISCONNECT;
2460 }
2461 pci_set_master(pdev);
2462
2463 pci_enable_wake(pdev, PCI_D3hot, 0);
2464 pci_enable_wake(pdev, PCI_D3cold, 0);
2465
2466 atl1e_reset_hw(&adapter->hw);
2467
2468 return PCI_ERS_RESULT_RECOVERED;
2469 }
2470
2471 /*
2472 * atl1e_io_resume - called when traffic can start flowing again.
2473 * @pdev: Pointer to PCI device
2474 *
2475 * This callback is called when the error recovery driver tells us that
2476 * its OK to resume normal operation. Implementation resembles the
2477 * second-half of the atl1e_resume routine.
2478 */
2479 static void atl1e_io_resume(struct pci_dev *pdev)
2480 {
2481 struct net_device *netdev = pci_get_drvdata(pdev);
2482 struct atl1e_adapter *adapter = netdev_priv(netdev);
2483
2484 if (netif_running(netdev)) {
2485 if (atl1e_up(adapter)) {
2486 netdev_err(adapter->netdev,
2487 "can't bring device back up after reset\n");
2488 return;
2489 }
2490 }
2491
2492 netif_device_attach(netdev);
2493 }
2494
2495 static struct pci_error_handlers atl1e_err_handler = {
2496 .error_detected = atl1e_io_error_detected,
2497 .slot_reset = atl1e_io_slot_reset,
2498 .resume = atl1e_io_resume,
2499 };
2500
2501 static struct pci_driver atl1e_driver = {
2502 .name = atl1e_driver_name,
2503 .id_table = atl1e_pci_tbl,
2504 .probe = atl1e_probe,
2505 .remove = __devexit_p(atl1e_remove),
2506 /* Power Management Hooks */
2507 #ifdef CONFIG_PM
2508 .suspend = atl1e_suspend,
2509 .resume = atl1e_resume,
2510 #endif
2511 .shutdown = atl1e_shutdown,
2512 .err_handler = &atl1e_err_handler
2513 };
2514
2515 /*
2516 * atl1e_init_module - Driver Registration Routine
2517 *
2518 * atl1e_init_module is the first routine called when the driver is
2519 * loaded. All it does is register with the PCI subsystem.
2520 */
2521 static int __init atl1e_init_module(void)
2522 {
2523 return pci_register_driver(&atl1e_driver);
2524 }
2525
2526 /*
2527 * atl1e_exit_module - Driver Exit Cleanup Routine
2528 *
2529 * atl1e_exit_module is called just before the driver is removed
2530 * from memory.
2531 */
2532 static void __exit atl1e_exit_module(void)
2533 {
2534 pci_unregister_driver(&atl1e_driver);
2535 }
2536
2537 module_init(atl1e_init_module);
2538 module_exit(atl1e_exit_module);
Linux 2.6 libata-dev (mirror)