?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
qeth: fix deadlock between recovery and bonding driver
[linux-2.6/libata-dev.git] / drivers / char / pcmcia / synclink_cs.c
blob21721d25e388f2ee6fa3eeed14d4abd550518f4f
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/seq_file.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61 #include <linux/synclink.h>
62
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cistpl.h>
73 #include <pcmcia/cisreg.h>
74 #include <pcmcia/ds.h>
75
76 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
77 #define SYNCLINK_GENERIC_HDLC 1
78 #else
79 #define SYNCLINK_GENERIC_HDLC 0
80 #endif
81
82 #define GET_USER(error,value,addr) error = get_user(value,addr)
83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
86
87 #include <asm/uaccess.h>
88
89 static MGSL_PARAMS default_params = {
90 MGSL_MODE_HDLC, /* unsigned long mode */
91 0, /* unsigned char loopback; */
92 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
93 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
94 0, /* unsigned long clock_speed; */
95 0xff, /* unsigned char addr_filter; */
96 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
97 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
98 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
99 9600, /* unsigned long data_rate; */
100 8, /* unsigned char data_bits; */
101 1, /* unsigned char stop_bits; */
102 ASYNC_PARITY_NONE /* unsigned char parity; */
103 };
104
105 typedef struct
106 {
107 int count;
108 unsigned char status;
109 char data[1];
110 } RXBUF;
111
112 /* The queue of BH actions to be performed */
113
114 #define BH_RECEIVE 1
115 #define BH_TRANSMIT 2
116 #define BH_STATUS 4
117
118 #define IO_PIN_SHUTDOWN_LIMIT 100
119
120 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
121
122 struct _input_signal_events {
123 int ri_up;
124 int ri_down;
125 int dsr_up;
126 int dsr_down;
127 int dcd_up;
128 int dcd_down;
129 int cts_up;
130 int cts_down;
131 };
132
133
134 /*
135 * Device instance data structure
136 */
137
138 typedef struct _mgslpc_info {
139 struct tty_port port;
140 void *if_ptr; /* General purpose pointer (used by SPPP) */
141 int magic;
142 int line;
143
144 struct mgsl_icount icount;
145
146 int timeout;
147 int x_char; /* xon/xoff character */
148 unsigned char read_status_mask;
149 unsigned char ignore_status_mask;
150
151 unsigned char *tx_buf;
152 int tx_put;
153 int tx_get;
154 int tx_count;
155
156 /* circular list of fixed length rx buffers */
157
158 unsigned char *rx_buf; /* memory allocated for all rx buffers */
159 int rx_buf_total_size; /* size of memory allocated for rx buffers */
160 int rx_put; /* index of next empty rx buffer */
161 int rx_get; /* index of next full rx buffer */
162 int rx_buf_size; /* size in bytes of single rx buffer */
163 int rx_buf_count; /* total number of rx buffers */
164 int rx_frame_count; /* number of full rx buffers */
165
166 wait_queue_head_t status_event_wait_q;
167 wait_queue_head_t event_wait_q;
168 struct timer_list tx_timer; /* HDLC transmit timeout timer */
169 struct _mgslpc_info *next_device; /* device list link */
170
171 unsigned short imra_value;
172 unsigned short imrb_value;
173 unsigned char pim_value;
174
175 spinlock_t lock;
176 struct work_struct task; /* task structure for scheduling bh */
177
178 u32 max_frame_size;
179
180 u32 pending_bh;
181
182 bool bh_running;
183 bool bh_requested;
184
185 int dcd_chkcount; /* check counts to prevent */
186 int cts_chkcount; /* too many IRQs if a signal */
187 int dsr_chkcount; /* is floating */
188 int ri_chkcount;
189
190 bool rx_enabled;
191 bool rx_overflow;
192
193 bool tx_enabled;
194 bool tx_active;
195 bool tx_aborting;
196 u32 idle_mode;
197
198 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
199
200 char device_name[25]; /* device instance name */
201
202 unsigned int io_base; /* base I/O address of adapter */
203 unsigned int irq_level;
204
205 MGSL_PARAMS params; /* communications parameters */
206
207 unsigned char serial_signals; /* current serial signal states */
208
209 bool irq_occurred; /* for diagnostics use */
210 char testing_irq;
211 unsigned int init_error; /* startup error (DIAGS) */
212
213 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
214 bool drop_rts_on_tx_done;
215
216 struct _input_signal_events input_signal_events;
217
218 /* PCMCIA support */
219 struct pcmcia_device *p_dev;
220 int stop;
221
222 /* SPPP/Cisco HDLC device parts */
223 int netcount;
224 spinlock_t netlock;
225
226 #if SYNCLINK_GENERIC_HDLC
227 struct net_device *netdev;
228 #endif
229
230 } MGSLPC_INFO;
231
232 #define MGSLPC_MAGIC 0x5402
233
234 /*
235 * The size of the serial xmit buffer is 1 page, or 4096 bytes
236 */
237 #define TXBUFSIZE 4096
238
239
240 #define CHA 0x00 /* channel A offset */
241 #define CHB 0x40 /* channel B offset */
242
243 /*
244 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
245 */
246 #undef PVR
247
248 #define RXFIFO 0
249 #define TXFIFO 0
250 #define STAR 0x20
251 #define CMDR 0x20
252 #define RSTA 0x21
253 #define PRE 0x21
254 #define MODE 0x22
255 #define TIMR 0x23
256 #define XAD1 0x24
257 #define XAD2 0x25
258 #define RAH1 0x26
259 #define RAH2 0x27
260 #define DAFO 0x27
261 #define RAL1 0x28
262 #define RFC 0x28
263 #define RHCR 0x29
264 #define RAL2 0x29
265 #define RBCL 0x2a
266 #define XBCL 0x2a
267 #define RBCH 0x2b
268 #define XBCH 0x2b
269 #define CCR0 0x2c
270 #define CCR1 0x2d
271 #define CCR2 0x2e
272 #define CCR3 0x2f
273 #define VSTR 0x34
274 #define BGR 0x34
275 #define RLCR 0x35
276 #define AML 0x36
277 #define AMH 0x37
278 #define GIS 0x38
279 #define IVA 0x38
280 #define IPC 0x39
281 #define ISR 0x3a
282 #define IMR 0x3a
283 #define PVR 0x3c
284 #define PIS 0x3d
285 #define PIM 0x3d
286 #define PCR 0x3e
287 #define CCR4 0x3f
288
289 // IMR/ISR
290
291 #define IRQ_BREAK_ON BIT15 // rx break detected
292 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
293 #define IRQ_ALLSENT BIT13 // all sent
294 #define IRQ_UNDERRUN BIT12 // transmit data underrun
295 #define IRQ_TIMER BIT11 // timer interrupt
296 #define IRQ_CTS BIT10 // CTS status change
297 #define IRQ_TXREPEAT BIT9 // tx message repeat
298 #define IRQ_TXFIFO BIT8 // transmit pool ready
299 #define IRQ_RXEOM BIT7 // receive message end
300 #define IRQ_EXITHUNT BIT6 // receive frame start
301 #define IRQ_RXTIME BIT6 // rx char timeout
302 #define IRQ_DCD BIT2 // carrier detect status change
303 #define IRQ_OVERRUN BIT1 // receive frame overflow
304 #define IRQ_RXFIFO BIT0 // receive pool full
305
306 // STAR
307
308 #define XFW BIT6 // transmit FIFO write enable
309 #define CEC BIT2 // command executing
310 #define CTS BIT1 // CTS state
311
312 #define PVR_DTR BIT0
313 #define PVR_DSR BIT1
314 #define PVR_RI BIT2
315 #define PVR_AUTOCTS BIT3
316 #define PVR_RS232 0x20 /* 0010b */
317 #define PVR_V35 0xe0 /* 1110b */
318 #define PVR_RS422 0x40 /* 0100b */
319
320 /* Register access functions */
321
322 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
323 #define read_reg(info, reg) inb((info)->io_base + (reg))
324
325 #define read_reg16(info, reg) inw((info)->io_base + (reg))
326 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
327
328 #define set_reg_bits(info, reg, mask) \
329 write_reg(info, (reg), \
330 (unsigned char) (read_reg(info, (reg)) | (mask)))
331 #define clear_reg_bits(info, reg, mask) \
332 write_reg(info, (reg), \
333 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
334 /*
335 * interrupt enable/disable routines
336 */
337 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
338 {
339 if (channel == CHA) {
340 info->imra_value |= mask;
341 write_reg16(info, CHA + IMR, info->imra_value);
342 } else {
343 info->imrb_value |= mask;
344 write_reg16(info, CHB + IMR, info->imrb_value);
345 }
346 }
347 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
348 {
349 if (channel == CHA) {
350 info->imra_value &= ~mask;
351 write_reg16(info, CHA + IMR, info->imra_value);
352 } else {
353 info->imrb_value &= ~mask;
354 write_reg16(info, CHB + IMR, info->imrb_value);
355 }
356 }
357
358 #define port_irq_disable(info, mask) \
359 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
360
361 #define port_irq_enable(info, mask) \
362 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
363
364 static void rx_start(MGSLPC_INFO *info);
365 static void rx_stop(MGSLPC_INFO *info);
366
367 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
368 static void tx_stop(MGSLPC_INFO *info);
369 static void tx_set_idle(MGSLPC_INFO *info);
370
371 static void get_signals(MGSLPC_INFO *info);
372 static void set_signals(MGSLPC_INFO *info);
373
374 static void reset_device(MGSLPC_INFO *info);
375
376 static void hdlc_mode(MGSLPC_INFO *info);
377 static void async_mode(MGSLPC_INFO *info);
378
379 static void tx_timeout(unsigned long context);
380
381 static int carrier_raised(struct tty_port *port);
382 static void dtr_rts(struct tty_port *port, int onoff);
383
384 #if SYNCLINK_GENERIC_HDLC
385 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
386 static void hdlcdev_tx_done(MGSLPC_INFO *info);
387 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
388 static int hdlcdev_init(MGSLPC_INFO *info);
389 static void hdlcdev_exit(MGSLPC_INFO *info);
390 #endif
391
392 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
393
394 static bool register_test(MGSLPC_INFO *info);
395 static bool irq_test(MGSLPC_INFO *info);
396 static int adapter_test(MGSLPC_INFO *info);
397
398 static int claim_resources(MGSLPC_INFO *info);
399 static void release_resources(MGSLPC_INFO *info);
400 static void mgslpc_add_device(MGSLPC_INFO *info);
401 static void mgslpc_remove_device(MGSLPC_INFO *info);
402
403 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
404 static void rx_reset_buffers(MGSLPC_INFO *info);
405 static int rx_alloc_buffers(MGSLPC_INFO *info);
406 static void rx_free_buffers(MGSLPC_INFO *info);
407
408 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
409
410 /*
411 * Bottom half interrupt handlers
412 */
413 static void bh_handler(struct work_struct *work);
414 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
415 static void bh_status(MGSLPC_INFO *info);
416
417 /*
418 * ioctl handlers
419 */
420 static int tiocmget(struct tty_struct *tty);
421 static int tiocmset(struct tty_struct *tty,
422 unsigned int set, unsigned int clear);
423 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
424 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
425 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
426 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
427 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
428 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
429 static int tx_abort(MGSLPC_INFO *info);
430 static int set_rxenable(MGSLPC_INFO *info, int enable);
431 static int wait_events(MGSLPC_INFO *info, int __user *mask);
432
433 static MGSLPC_INFO *mgslpc_device_list = NULL;
434 static int mgslpc_device_count = 0;
435
436 /*
437 * Set this param to non-zero to load eax with the
438 * .text section address and breakpoint on module load.
439 * This is useful for use with gdb and add-symbol-file command.
440 */
441 static bool break_on_load=0;
442
443 /*
444 * Driver major number, defaults to zero to get auto
445 * assigned major number. May be forced as module parameter.
446 */
447 static int ttymajor=0;
448
449 static int debug_level = 0;
450 static int maxframe[MAX_DEVICE_COUNT] = {0,};
451
452 module_param(break_on_load, bool, 0);
453 module_param(ttymajor, int, 0);
454 module_param(debug_level, int, 0);
455 module_param_array(maxframe, int, NULL, 0);
456
457 MODULE_LICENSE("GPL");
458
459 static char *driver_name = "SyncLink PC Card driver";
460 static char *driver_version = "$Revision: 4.34 $";
461
462 static struct tty_driver *serial_driver;
463
464 /* number of characters left in xmit buffer before we ask for more */
465 #define WAKEUP_CHARS 256
466
467 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
468 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
469
470 /* PCMCIA prototypes */
471
472 static int mgslpc_config(struct pcmcia_device *link);
473 static void mgslpc_release(u_long arg);
474 static void mgslpc_detach(struct pcmcia_device *p_dev);
475
476 /*
477 * 1st function defined in .text section. Calling this function in
478 * init_module() followed by a breakpoint allows a remote debugger
479 * (gdb) to get the .text address for the add-symbol-file command.
480 * This allows remote debugging of dynamically loadable modules.
481 */
482 static void* mgslpc_get_text_ptr(void)
483 {
484 return mgslpc_get_text_ptr;
485 }
486
487 /**
488 * line discipline callback wrappers
489 *
490 * The wrappers maintain line discipline references
491 * while calling into the line discipline.
492 *
493 * ldisc_receive_buf - pass receive data to line discipline
494 */
495
496 static void ldisc_receive_buf(struct tty_struct *tty,
497 const __u8 *data, char *flags, int count)
498 {
499 struct tty_ldisc *ld;
500 if (!tty)
501 return;
502 ld = tty_ldisc_ref(tty);
503 if (ld) {
504 if (ld->ops->receive_buf)
505 ld->ops->receive_buf(tty, data, flags, count);
506 tty_ldisc_deref(ld);
507 }
508 }
509
510 static const struct tty_port_operations mgslpc_port_ops = {
511 .carrier_raised = carrier_raised,
512 .dtr_rts = dtr_rts
513 };
514
515 static int mgslpc_probe(struct pcmcia_device *link)
516 {
517 MGSLPC_INFO *info;
518 int ret;
519
520 if (debug_level >= DEBUG_LEVEL_INFO)
521 printk("mgslpc_attach\n");
522
523 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
524 if (!info) {
525 printk("Error can't allocate device instance data\n");
526 return -ENOMEM;
527 }
528
529 info->magic = MGSLPC_MAGIC;
530 tty_port_init(&info->port);
531 info->port.ops = &mgslpc_port_ops;
532 INIT_WORK(&info->task, bh_handler);
533 info->max_frame_size = 4096;
534 info->port.close_delay = 5*HZ/10;
535 info->port.closing_wait = 30*HZ;
536 init_waitqueue_head(&info->status_event_wait_q);
537 init_waitqueue_head(&info->event_wait_q);
538 spin_lock_init(&info->lock);
539 spin_lock_init(&info->netlock);
540 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
541 info->idle_mode = HDLC_TXIDLE_FLAGS;
542 info->imra_value = 0xffff;
543 info->imrb_value = 0xffff;
544 info->pim_value = 0xff;
545
546 info->p_dev = link;
547 link->priv = info;
548
549 /* Initialize the struct pcmcia_device structure */
550
551 ret = mgslpc_config(link);
552 if (ret)
553 return ret;
554
555 mgslpc_add_device(info);
556
557 return 0;
558 }
559
560 /* Card has been inserted.
561 */
562
563 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
564 {
565 return pcmcia_request_io(p_dev);
566 }
567
568 static int mgslpc_config(struct pcmcia_device *link)
569 {
570 MGSLPC_INFO *info = link->priv;
571 int ret;
572
573 if (debug_level >= DEBUG_LEVEL_INFO)
574 printk("mgslpc_config(0x%p)\n", link);
575
576 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
577
578 ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
579 if (ret != 0)
580 goto failed;
581
582 link->config_index = 8;
583 link->config_regs = PRESENT_OPTION;
584
585 ret = pcmcia_request_irq(link, mgslpc_isr);
586 if (ret)
587 goto failed;
588 ret = pcmcia_enable_device(link);
589 if (ret)
590 goto failed;
591
592 info->io_base = link->resource[0]->start;
593 info->irq_level = link->irq;
594 return 0;
595
596 failed:
597 mgslpc_release((u_long)link);
598 return -ENODEV;
599 }
600
601 /* Card has been removed.
602 * Unregister device and release PCMCIA configuration.
603 * If device is open, postpone until it is closed.
604 */
605 static void mgslpc_release(u_long arg)
606 {
607 struct pcmcia_device *link = (struct pcmcia_device *)arg;
608
609 if (debug_level >= DEBUG_LEVEL_INFO)
610 printk("mgslpc_release(0x%p)\n", link);
611
612 pcmcia_disable_device(link);
613 }
614
615 static void mgslpc_detach(struct pcmcia_device *link)
616 {
617 if (debug_level >= DEBUG_LEVEL_INFO)
618 printk("mgslpc_detach(0x%p)\n", link);
619
620 ((MGSLPC_INFO *)link->priv)->stop = 1;
621 mgslpc_release((u_long)link);
622
623 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
624 }
625
626 static int mgslpc_suspend(struct pcmcia_device *link)
627 {
628 MGSLPC_INFO *info = link->priv;
629
630 info->stop = 1;
631
632 return 0;
633 }
634
635 static int mgslpc_resume(struct pcmcia_device *link)
636 {
637 MGSLPC_INFO *info = link->priv;
638
639 info->stop = 0;
640
641 return 0;
642 }
643
644
645 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
646 char *name, const char *routine)
647 {
648 #ifdef MGSLPC_PARANOIA_CHECK
649 static const char *badmagic =
650 "Warning: bad magic number for mgsl struct (%s) in %s\n";
651 static const char *badinfo =
652 "Warning: null mgslpc_info for (%s) in %s\n";
653
654 if (!info) {
655 printk(badinfo, name, routine);
656 return true;
657 }
658 if (info->magic != MGSLPC_MAGIC) {
659 printk(badmagic, name, routine);
660 return true;
661 }
662 #else
663 if (!info)
664 return true;
665 #endif
666 return false;
667 }
668
669
670 #define CMD_RXFIFO BIT7 // release current rx FIFO
671 #define CMD_RXRESET BIT6 // receiver reset
672 #define CMD_RXFIFO_READ BIT5
673 #define CMD_START_TIMER BIT4
674 #define CMD_TXFIFO BIT3 // release current tx FIFO
675 #define CMD_TXEOM BIT1 // transmit end message
676 #define CMD_TXRESET BIT0 // transmit reset
677
678 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
679 {
680 int i = 0;
681 /* wait for command completion */
682 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
683 udelay(1);
684 if (i++ == 1000)
685 return false;
686 }
687 return true;
688 }
689
690 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
691 {
692 wait_command_complete(info, channel);
693 write_reg(info, (unsigned char) (channel + CMDR), cmd);
694 }
695
696 static void tx_pause(struct tty_struct *tty)
697 {
698 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
699 unsigned long flags;
700
701 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
702 return;
703 if (debug_level >= DEBUG_LEVEL_INFO)
704 printk("tx_pause(%s)\n",info->device_name);
705
706 spin_lock_irqsave(&info->lock,flags);
707 if (info->tx_enabled)
708 tx_stop(info);
709 spin_unlock_irqrestore(&info->lock,flags);
710 }
711
712 static void tx_release(struct tty_struct *tty)
713 {
714 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
715 unsigned long flags;
716
717 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
718 return;
719 if (debug_level >= DEBUG_LEVEL_INFO)
720 printk("tx_release(%s)\n",info->device_name);
721
722 spin_lock_irqsave(&info->lock,flags);
723 if (!info->tx_enabled)
724 tx_start(info, tty);
725 spin_unlock_irqrestore(&info->lock,flags);
726 }
727
728 /* Return next bottom half action to perform.
729 * or 0 if nothing to do.
730 */
731 static int bh_action(MGSLPC_INFO *info)
732 {
733 unsigned long flags;
734 int rc = 0;
735
736 spin_lock_irqsave(&info->lock,flags);
737
738 if (info->pending_bh & BH_RECEIVE) {
739 info->pending_bh &= ~BH_RECEIVE;
740 rc = BH_RECEIVE;
741 } else if (info->pending_bh & BH_TRANSMIT) {
742 info->pending_bh &= ~BH_TRANSMIT;
743 rc = BH_TRANSMIT;
744 } else if (info->pending_bh & BH_STATUS) {
745 info->pending_bh &= ~BH_STATUS;
746 rc = BH_STATUS;
747 }
748
749 if (!rc) {
750 /* Mark BH routine as complete */
751 info->bh_running = false;
752 info->bh_requested = false;
753 }
754
755 spin_unlock_irqrestore(&info->lock,flags);
756
757 return rc;
758 }
759
760 static void bh_handler(struct work_struct *work)
761 {
762 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
763 struct tty_struct *tty;
764 int action;
765
766 if (!info)
767 return;
768
769 if (debug_level >= DEBUG_LEVEL_BH)
770 printk( "%s(%d):bh_handler(%s) entry\n",
771 __FILE__,__LINE__,info->device_name);
772
773 info->bh_running = true;
774 tty = tty_port_tty_get(&info->port);
775
776 while((action = bh_action(info)) != 0) {
777
778 /* Process work item */
779 if ( debug_level >= DEBUG_LEVEL_BH )
780 printk( "%s(%d):bh_handler() work item action=%d\n",
781 __FILE__,__LINE__,action);
782
783 switch (action) {
784
785 case BH_RECEIVE:
786 while(rx_get_frame(info, tty));
787 break;
788 case BH_TRANSMIT:
789 bh_transmit(info, tty);
790 break;
791 case BH_STATUS:
792 bh_status(info);
793 break;
794 default:
795 /* unknown work item ID */
796 printk("Unknown work item ID=%08X!\n", action);
797 break;
798 }
799 }
800
801 tty_kref_put(tty);
802 if (debug_level >= DEBUG_LEVEL_BH)
803 printk( "%s(%d):bh_handler(%s) exit\n",
804 __FILE__,__LINE__,info->device_name);
805 }
806
807 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
808 {
809 if (debug_level >= DEBUG_LEVEL_BH)
810 printk("bh_transmit() entry on %s\n", info->device_name);
811
812 if (tty)
813 tty_wakeup(tty);
814 }
815
816 static void bh_status(MGSLPC_INFO *info)
817 {
818 info->ri_chkcount = 0;
819 info->dsr_chkcount = 0;
820 info->dcd_chkcount = 0;
821 info->cts_chkcount = 0;
822 }
823
824 /* eom: non-zero = end of frame */
825 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
826 {
827 unsigned char data[2];
828 unsigned char fifo_count, read_count, i;
829 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
830
831 if (debug_level >= DEBUG_LEVEL_ISR)
832 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
833
834 if (!info->rx_enabled)
835 return;
836
837 if (info->rx_frame_count >= info->rx_buf_count) {
838 /* no more free buffers */
839 issue_command(info, CHA, CMD_RXRESET);
840 info->pending_bh |= BH_RECEIVE;
841 info->rx_overflow = true;
842 info->icount.buf_overrun++;
843 return;
844 }
845
846 if (eom) {
847 /* end of frame, get FIFO count from RBCL register */
848 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
849 fifo_count = 32;
850 } else
851 fifo_count = 32;
852
853 do {
854 if (fifo_count == 1) {
855 read_count = 1;
856 data[0] = read_reg(info, CHA + RXFIFO);
857 } else {
858 read_count = 2;
859 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
860 }
861 fifo_count -= read_count;
862 if (!fifo_count && eom)
863 buf->status = data[--read_count];
864
865 for (i = 0; i < read_count; i++) {
866 if (buf->count >= info->max_frame_size) {
867 /* frame too large, reset receiver and reset current buffer */
868 issue_command(info, CHA, CMD_RXRESET);
869 buf->count = 0;
870 return;
871 }
872 *(buf->data + buf->count) = data[i];
873 buf->count++;
874 }
875 } while (fifo_count);
876
877 if (eom) {
878 info->pending_bh |= BH_RECEIVE;
879 info->rx_frame_count++;
880 info->rx_put++;
881 if (info->rx_put >= info->rx_buf_count)
882 info->rx_put = 0;
883 }
884 issue_command(info, CHA, CMD_RXFIFO);
885 }
886
887 static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
888 {
889 unsigned char data, status, flag;
890 int fifo_count;
891 int work = 0;
892 struct mgsl_icount *icount = &info->icount;
893
894 if (!tty) {
895 /* tty is not available anymore */
896 issue_command(info, CHA, CMD_RXRESET);
897 if (debug_level >= DEBUG_LEVEL_ISR)
898 printk("%s(%d):rx_ready_async(tty=NULL)\n",__FILE__,__LINE__);
899 return;
900 }
901
902 if (tcd) {
903 /* early termination, get FIFO count from RBCL register */
904 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
905
906 /* Zero fifo count could mean 0 or 32 bytes available.
907 * If BIT5 of STAR is set then at least 1 byte is available.
908 */
909 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
910 fifo_count = 32;
911 } else
912 fifo_count = 32;
913
914 tty_buffer_request_room(tty, fifo_count);
915 /* Flush received async data to receive data buffer. */
916 while (fifo_count) {
917 data = read_reg(info, CHA + RXFIFO);
918 status = read_reg(info, CHA + RXFIFO);
919 fifo_count -= 2;
920
921 icount->rx++;
922 flag = TTY_NORMAL;
923
924 // if no frameing/crc error then save data
925 // BIT7:parity error
926 // BIT6:framing error
927
928 if (status & (BIT7 + BIT6)) {
929 if (status & BIT7)
930 icount->parity++;
931 else
932 icount->frame++;
933
934 /* discard char if tty control flags say so */
935 if (status & info->ignore_status_mask)
936 continue;
937
938 status &= info->read_status_mask;
939
940 if (status & BIT7)
941 flag = TTY_PARITY;
942 else if (status & BIT6)
943 flag = TTY_FRAME;
944 }
945 work += tty_insert_flip_char(tty, data, flag);
946 }
947 issue_command(info, CHA, CMD_RXFIFO);
948
949 if (debug_level >= DEBUG_LEVEL_ISR) {
950 printk("%s(%d):rx_ready_async",
951 __FILE__,__LINE__);
952 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
953 __FILE__,__LINE__,icount->rx,icount->brk,
954 icount->parity,icount->frame,icount->overrun);
955 }
956
957 if (work)
958 tty_flip_buffer_push(tty);
959 }
960
961
962 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
963 {
964 if (!info->tx_active)
965 return;
966
967 info->tx_active = false;
968 info->tx_aborting = false;
969
970 if (info->params.mode == MGSL_MODE_ASYNC)
971 return;
972
973 info->tx_count = info->tx_put = info->tx_get = 0;
974 del_timer(&info->tx_timer);
975
976 if (info->drop_rts_on_tx_done) {
977 get_signals(info);
978 if (info->serial_signals & SerialSignal_RTS) {
979 info->serial_signals &= ~SerialSignal_RTS;
980 set_signals(info);
981 }
982 info->drop_rts_on_tx_done = false;
983 }
984
985 #if SYNCLINK_GENERIC_HDLC
986 if (info->netcount)
987 hdlcdev_tx_done(info);
988 else
989 #endif
990 {
991 if (tty && (tty->stopped || tty->hw_stopped)) {
992 tx_stop(info);
993 return;
994 }
995 info->pending_bh |= BH_TRANSMIT;
996 }
997 }
998
999 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
1000 {
1001 unsigned char fifo_count = 32;
1002 int c;
1003
1004 if (debug_level >= DEBUG_LEVEL_ISR)
1005 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1006
1007 if (info->params.mode == MGSL_MODE_HDLC) {
1008 if (!info->tx_active)
1009 return;
1010 } else {
1011 if (tty && (tty->stopped || tty->hw_stopped)) {
1012 tx_stop(info);
1013 return;
1014 }
1015 if (!info->tx_count)
1016 info->tx_active = false;
1017 }
1018
1019 if (!info->tx_count)
1020 return;
1021
1022 while (info->tx_count && fifo_count) {
1023 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1024
1025 if (c == 1) {
1026 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1027 } else {
1028 write_reg16(info, CHA + TXFIFO,
1029 *((unsigned short*)(info->tx_buf + info->tx_get)));
1030 }
1031 info->tx_count -= c;
1032 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1033 fifo_count -= c;
1034 }
1035
1036 if (info->params.mode == MGSL_MODE_ASYNC) {
1037 if (info->tx_count < WAKEUP_CHARS)
1038 info->pending_bh |= BH_TRANSMIT;
1039 issue_command(info, CHA, CMD_TXFIFO);
1040 } else {
1041 if (info->tx_count)
1042 issue_command(info, CHA, CMD_TXFIFO);
1043 else
1044 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1045 }
1046 }
1047
1048 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1049 {
1050 get_signals(info);
1051 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1052 irq_disable(info, CHB, IRQ_CTS);
1053 info->icount.cts++;
1054 if (info->serial_signals & SerialSignal_CTS)
1055 info->input_signal_events.cts_up++;
1056 else
1057 info->input_signal_events.cts_down++;
1058 wake_up_interruptible(&info->status_event_wait_q);
1059 wake_up_interruptible(&info->event_wait_q);
1060
1061 if (tty && tty_port_cts_enabled(&info->port)) {
1062 if (tty->hw_stopped) {
1063 if (info->serial_signals & SerialSignal_CTS) {
1064 if (debug_level >= DEBUG_LEVEL_ISR)
1065 printk("CTS tx start...");
1066 tty->hw_stopped = 0;
1067 tx_start(info, tty);
1068 info->pending_bh |= BH_TRANSMIT;
1069 return;
1070 }
1071 } else {
1072 if (!(info->serial_signals & SerialSignal_CTS)) {
1073 if (debug_level >= DEBUG_LEVEL_ISR)
1074 printk("CTS tx stop...");
1075 tty->hw_stopped = 1;
1076 tx_stop(info);
1077 }
1078 }
1079 }
1080 info->pending_bh |= BH_STATUS;
1081 }
1082
1083 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1084 {
1085 get_signals(info);
1086 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1087 irq_disable(info, CHB, IRQ_DCD);
1088 info->icount.dcd++;
1089 if (info->serial_signals & SerialSignal_DCD) {
1090 info->input_signal_events.dcd_up++;
1091 }
1092 else
1093 info->input_signal_events.dcd_down++;
1094 #if SYNCLINK_GENERIC_HDLC
1095 if (info->netcount) {
1096 if (info->serial_signals & SerialSignal_DCD)
1097 netif_carrier_on(info->netdev);
1098 else
1099 netif_carrier_off(info->netdev);
1100 }
1101 #endif
1102 wake_up_interruptible(&info->status_event_wait_q);
1103 wake_up_interruptible(&info->event_wait_q);
1104
1105 if (info->port.flags & ASYNC_CHECK_CD) {
1106 if (debug_level >= DEBUG_LEVEL_ISR)
1107 printk("%s CD now %s...", info->device_name,
1108 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1109 if (info->serial_signals & SerialSignal_DCD)
1110 wake_up_interruptible(&info->port.open_wait);
1111 else {
1112 if (debug_level >= DEBUG_LEVEL_ISR)
1113 printk("doing serial hangup...");
1114 if (tty)
1115 tty_hangup(tty);
1116 }
1117 }
1118 info->pending_bh |= BH_STATUS;
1119 }
1120
1121 static void dsr_change(MGSLPC_INFO *info)
1122 {
1123 get_signals(info);
1124 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1125 port_irq_disable(info, PVR_DSR);
1126 info->icount.dsr++;
1127 if (info->serial_signals & SerialSignal_DSR)
1128 info->input_signal_events.dsr_up++;
1129 else
1130 info->input_signal_events.dsr_down++;
1131 wake_up_interruptible(&info->status_event_wait_q);
1132 wake_up_interruptible(&info->event_wait_q);
1133 info->pending_bh |= BH_STATUS;
1134 }
1135
1136 static void ri_change(MGSLPC_INFO *info)
1137 {
1138 get_signals(info);
1139 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1140 port_irq_disable(info, PVR_RI);
1141 info->icount.rng++;
1142 if (info->serial_signals & SerialSignal_RI)
1143 info->input_signal_events.ri_up++;
1144 else
1145 info->input_signal_events.ri_down++;
1146 wake_up_interruptible(&info->status_event_wait_q);
1147 wake_up_interruptible(&info->event_wait_q);
1148 info->pending_bh |= BH_STATUS;
1149 }
1150
1151 /* Interrupt service routine entry point.
1152 *
1153 * Arguments:
1154 *
1155 * irq interrupt number that caused interrupt
1156 * dev_id device ID supplied during interrupt registration
1157 */
1158 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1159 {
1160 MGSLPC_INFO *info = dev_id;
1161 struct tty_struct *tty;
1162 unsigned short isr;
1163 unsigned char gis, pis;
1164 int count=0;
1165
1166 if (debug_level >= DEBUG_LEVEL_ISR)
1167 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1168
1169 if (!(info->p_dev->_locked))
1170 return IRQ_HANDLED;
1171
1172 tty = tty_port_tty_get(&info->port);
1173
1174 spin_lock(&info->lock);
1175
1176 while ((gis = read_reg(info, CHA + GIS))) {
1177 if (debug_level >= DEBUG_LEVEL_ISR)
1178 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1179
1180 if ((gis & 0x70) || count > 1000) {
1181 printk("synclink_cs:hardware failed or ejected\n");
1182 break;
1183 }
1184 count++;
1185
1186 if (gis & (BIT1 + BIT0)) {
1187 isr = read_reg16(info, CHB + ISR);
1188 if (isr & IRQ_DCD)
1189 dcd_change(info, tty);
1190 if (isr & IRQ_CTS)
1191 cts_change(info, tty);
1192 }
1193 if (gis & (BIT3 + BIT2))
1194 {
1195 isr = read_reg16(info, CHA + ISR);
1196 if (isr & IRQ_TIMER) {
1197 info->irq_occurred = true;
1198 irq_disable(info, CHA, IRQ_TIMER);
1199 }
1200
1201 /* receive IRQs */
1202 if (isr & IRQ_EXITHUNT) {
1203 info->icount.exithunt++;
1204 wake_up_interruptible(&info->event_wait_q);
1205 }
1206 if (isr & IRQ_BREAK_ON) {
1207 info->icount.brk++;
1208 if (info->port.flags & ASYNC_SAK)
1209 do_SAK(tty);
1210 }
1211 if (isr & IRQ_RXTIME) {
1212 issue_command(info, CHA, CMD_RXFIFO_READ);
1213 }
1214 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1215 if (info->params.mode == MGSL_MODE_HDLC)
1216 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1217 else
1218 rx_ready_async(info, isr & IRQ_RXEOM, tty);
1219 }
1220
1221 /* transmit IRQs */
1222 if (isr & IRQ_UNDERRUN) {
1223 if (info->tx_aborting)
1224 info->icount.txabort++;
1225 else
1226 info->icount.txunder++;
1227 tx_done(info, tty);
1228 }
1229 else if (isr & IRQ_ALLSENT) {
1230 info->icount.txok++;
1231 tx_done(info, tty);
1232 }
1233 else if (isr & IRQ_TXFIFO)
1234 tx_ready(info, tty);
1235 }
1236 if (gis & BIT7) {
1237 pis = read_reg(info, CHA + PIS);
1238 if (pis & BIT1)
1239 dsr_change(info);
1240 if (pis & BIT2)
1241 ri_change(info);
1242 }
1243 }
1244
1245 /* Request bottom half processing if there's something
1246 * for it to do and the bh is not already running
1247 */
1248
1249 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1250 if ( debug_level >= DEBUG_LEVEL_ISR )
1251 printk("%s(%d):%s queueing bh task.\n",
1252 __FILE__,__LINE__,info->device_name);
1253 schedule_work(&info->task);
1254 info->bh_requested = true;
1255 }
1256
1257 spin_unlock(&info->lock);
1258 tty_kref_put(tty);
1259
1260 if (debug_level >= DEBUG_LEVEL_ISR)
1261 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1262 __FILE__, __LINE__, info->irq_level);
1263
1264 return IRQ_HANDLED;
1265 }
1266
1267 /* Initialize and start device.
1268 */
1269 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1270 {
1271 int retval = 0;
1272
1273 if (debug_level >= DEBUG_LEVEL_INFO)
1274 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1275
1276 if (info->port.flags & ASYNC_INITIALIZED)
1277 return 0;
1278
1279 if (!info->tx_buf) {
1280 /* allocate a page of memory for a transmit buffer */
1281 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1282 if (!info->tx_buf) {
1283 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1284 __FILE__,__LINE__,info->device_name);
1285 return -ENOMEM;
1286 }
1287 }
1288
1289 info->pending_bh = 0;
1290
1291 memset(&info->icount, 0, sizeof(info->icount));
1292
1293 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1294
1295 /* Allocate and claim adapter resources */
1296 retval = claim_resources(info);
1297
1298 /* perform existence check and diagnostics */
1299 if ( !retval )
1300 retval = adapter_test(info);
1301
1302 if ( retval ) {
1303 if (capable(CAP_SYS_ADMIN) && tty)
1304 set_bit(TTY_IO_ERROR, &tty->flags);
1305 release_resources(info);
1306 return retval;
1307 }
1308
1309 /* program hardware for current parameters */
1310 mgslpc_change_params(info, tty);
1311
1312 if (tty)
1313 clear_bit(TTY_IO_ERROR, &tty->flags);
1314
1315 info->port.flags |= ASYNC_INITIALIZED;
1316
1317 return 0;
1318 }
1319
1320 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1321 */
1322 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1323 {
1324 unsigned long flags;
1325
1326 if (!(info->port.flags & ASYNC_INITIALIZED))
1327 return;
1328
1329 if (debug_level >= DEBUG_LEVEL_INFO)
1330 printk("%s(%d):mgslpc_shutdown(%s)\n",
1331 __FILE__,__LINE__, info->device_name );
1332
1333 /* clear status wait queue because status changes */
1334 /* can't happen after shutting down the hardware */
1335 wake_up_interruptible(&info->status_event_wait_q);
1336 wake_up_interruptible(&info->event_wait_q);
1337
1338 del_timer_sync(&info->tx_timer);
1339
1340 if (info->tx_buf) {
1341 free_page((unsigned long) info->tx_buf);
1342 info->tx_buf = NULL;
1343 }
1344
1345 spin_lock_irqsave(&info->lock,flags);
1346
1347 rx_stop(info);
1348 tx_stop(info);
1349
1350 /* TODO:disable interrupts instead of reset to preserve signal states */
1351 reset_device(info);
1352
1353 if (!tty || tty->termios.c_cflag & HUPCL) {
1354 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1355 set_signals(info);
1356 }
1357
1358 spin_unlock_irqrestore(&info->lock,flags);
1359
1360 release_resources(info);
1361
1362 if (tty)
1363 set_bit(TTY_IO_ERROR, &tty->flags);
1364
1365 info->port.flags &= ~ASYNC_INITIALIZED;
1366 }
1367
1368 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1369 {
1370 unsigned long flags;
1371
1372 spin_lock_irqsave(&info->lock,flags);
1373
1374 rx_stop(info);
1375 tx_stop(info);
1376 info->tx_count = info->tx_put = info->tx_get = 0;
1377
1378 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1379 hdlc_mode(info);
1380 else
1381 async_mode(info);
1382
1383 set_signals(info);
1384
1385 info->dcd_chkcount = 0;
1386 info->cts_chkcount = 0;
1387 info->ri_chkcount = 0;
1388 info->dsr_chkcount = 0;
1389
1390 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1391 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1392 get_signals(info);
1393
1394 if (info->netcount || (tty && (tty->termios.c_cflag & CREAD)))
1395 rx_start(info);
1396
1397 spin_unlock_irqrestore(&info->lock,flags);
1398 }
1399
1400 /* Reconfigure adapter based on new parameters
1401 */
1402 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1403 {
1404 unsigned cflag;
1405 int bits_per_char;
1406
1407 if (!tty)
1408 return;
1409
1410 if (debug_level >= DEBUG_LEVEL_INFO)
1411 printk("%s(%d):mgslpc_change_params(%s)\n",
1412 __FILE__,__LINE__, info->device_name );
1413
1414 cflag = tty->termios.c_cflag;
1415
1416 /* if B0 rate (hangup) specified then negate DTR and RTS */
1417 /* otherwise assert DTR and RTS */
1418 if (cflag & CBAUD)
1419 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1420 else
1421 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1422
1423 /* byte size and parity */
1424
1425 switch (cflag & CSIZE) {
1426 case CS5: info->params.data_bits = 5; break;
1427 case CS6: info->params.data_bits = 6; break;
1428 case CS7: info->params.data_bits = 7; break;
1429 case CS8: info->params.data_bits = 8; break;
1430 default: info->params.data_bits = 7; break;
1431 }
1432
1433 if (cflag & CSTOPB)
1434 info->params.stop_bits = 2;
1435 else
1436 info->params.stop_bits = 1;
1437
1438 info->params.parity = ASYNC_PARITY_NONE;
1439 if (cflag & PARENB) {
1440 if (cflag & PARODD)
1441 info->params.parity = ASYNC_PARITY_ODD;
1442 else
1443 info->params.parity = ASYNC_PARITY_EVEN;
1444 #ifdef CMSPAR
1445 if (cflag & CMSPAR)
1446 info->params.parity = ASYNC_PARITY_SPACE;
1447 #endif
1448 }
1449
1450 /* calculate number of jiffies to transmit a full
1451 * FIFO (32 bytes) at specified data rate
1452 */
1453 bits_per_char = info->params.data_bits +
1454 info->params.stop_bits + 1;
1455
1456 /* if port data rate is set to 460800 or less then
1457 * allow tty settings to override, otherwise keep the
1458 * current data rate.
1459 */
1460 if (info->params.data_rate <= 460800) {
1461 info->params.data_rate = tty_get_baud_rate(tty);
1462 }
1463
1464 if ( info->params.data_rate ) {
1465 info->timeout = (32*HZ*bits_per_char) /
1466 info->params.data_rate;
1467 }
1468 info->timeout += HZ/50; /* Add .02 seconds of slop */
1469
1470 if (cflag & CRTSCTS)
1471 info->port.flags |= ASYNC_CTS_FLOW;
1472 else
1473 info->port.flags &= ~ASYNC_CTS_FLOW;
1474
1475 if (cflag & CLOCAL)
1476 info->port.flags &= ~ASYNC_CHECK_CD;
1477 else
1478 info->port.flags |= ASYNC_CHECK_CD;
1479
1480 /* process tty input control flags */
1481
1482 info->read_status_mask = 0;
1483 if (I_INPCK(tty))
1484 info->read_status_mask |= BIT7 | BIT6;
1485 if (I_IGNPAR(tty))
1486 info->ignore_status_mask |= BIT7 | BIT6;
1487
1488 mgslpc_program_hw(info, tty);
1489 }
1490
1491 /* Add a character to the transmit buffer
1492 */
1493 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1494 {
1495 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1496 unsigned long flags;
1497
1498 if (debug_level >= DEBUG_LEVEL_INFO) {
1499 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1500 __FILE__,__LINE__,ch,info->device_name);
1501 }
1502
1503 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1504 return 0;
1505
1506 if (!info->tx_buf)
1507 return 0;
1508
1509 spin_lock_irqsave(&info->lock,flags);
1510
1511 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1512 if (info->tx_count < TXBUFSIZE - 1) {
1513 info->tx_buf[info->tx_put++] = ch;
1514 info->tx_put &= TXBUFSIZE-1;
1515 info->tx_count++;
1516 }
1517 }
1518
1519 spin_unlock_irqrestore(&info->lock,flags);
1520 return 1;
1521 }
1522
1523 /* Enable transmitter so remaining characters in the
1524 * transmit buffer are sent.
1525 */
1526 static void mgslpc_flush_chars(struct tty_struct *tty)
1527 {
1528 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1529 unsigned long flags;
1530
1531 if (debug_level >= DEBUG_LEVEL_INFO)
1532 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1533 __FILE__,__LINE__,info->device_name,info->tx_count);
1534
1535 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1536 return;
1537
1538 if (info->tx_count <= 0 || tty->stopped ||
1539 tty->hw_stopped || !info->tx_buf)
1540 return;
1541
1542 if (debug_level >= DEBUG_LEVEL_INFO)
1543 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1544 __FILE__,__LINE__,info->device_name);
1545
1546 spin_lock_irqsave(&info->lock,flags);
1547 if (!info->tx_active)
1548 tx_start(info, tty);
1549 spin_unlock_irqrestore(&info->lock,flags);
1550 }
1551
1552 /* Send a block of data
1553 *
1554 * Arguments:
1555 *
1556 * tty pointer to tty information structure
1557 * buf pointer to buffer containing send data
1558 * count size of send data in bytes
1559 *
1560 * Returns: number of characters written
1561 */
1562 static int mgslpc_write(struct tty_struct * tty,
1563 const unsigned char *buf, int count)
1564 {
1565 int c, ret = 0;
1566 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1567 unsigned long flags;
1568
1569 if (debug_level >= DEBUG_LEVEL_INFO)
1570 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1571 __FILE__,__LINE__,info->device_name,count);
1572
1573 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1574 !info->tx_buf)
1575 goto cleanup;
1576
1577 if (info->params.mode == MGSL_MODE_HDLC) {
1578 if (count > TXBUFSIZE) {
1579 ret = -EIO;
1580 goto cleanup;
1581 }
1582 if (info->tx_active)
1583 goto cleanup;
1584 else if (info->tx_count)
1585 goto start;
1586 }
1587
1588 for (;;) {
1589 c = min(count,
1590 min(TXBUFSIZE - info->tx_count - 1,
1591 TXBUFSIZE - info->tx_put));
1592 if (c <= 0)
1593 break;
1594
1595 memcpy(info->tx_buf + info->tx_put, buf, c);
1596
1597 spin_lock_irqsave(&info->lock,flags);
1598 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1599 info->tx_count += c;
1600 spin_unlock_irqrestore(&info->lock,flags);
1601
1602 buf += c;
1603 count -= c;
1604 ret += c;
1605 }
1606 start:
1607 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1608 spin_lock_irqsave(&info->lock,flags);
1609 if (!info->tx_active)
1610 tx_start(info, tty);
1611 spin_unlock_irqrestore(&info->lock,flags);
1612 }
1613 cleanup:
1614 if (debug_level >= DEBUG_LEVEL_INFO)
1615 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1616 __FILE__,__LINE__,info->device_name,ret);
1617 return ret;
1618 }
1619
1620 /* Return the count of free bytes in transmit buffer
1621 */
1622 static int mgslpc_write_room(struct tty_struct *tty)
1623 {
1624 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1625 int ret;
1626
1627 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1628 return 0;
1629
1630 if (info->params.mode == MGSL_MODE_HDLC) {
1631 /* HDLC (frame oriented) mode */
1632 if (info->tx_active)
1633 return 0;
1634 else
1635 return HDLC_MAX_FRAME_SIZE;
1636 } else {
1637 ret = TXBUFSIZE - info->tx_count - 1;
1638 if (ret < 0)
1639 ret = 0;
1640 }
1641
1642 if (debug_level >= DEBUG_LEVEL_INFO)
1643 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1644 __FILE__,__LINE__, info->device_name, ret);
1645 return ret;
1646 }
1647
1648 /* Return the count of bytes in transmit buffer
1649 */
1650 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1651 {
1652 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1653 int rc;
1654
1655 if (debug_level >= DEBUG_LEVEL_INFO)
1656 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1657 __FILE__,__LINE__, info->device_name );
1658
1659 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1660 return 0;
1661
1662 if (info->params.mode == MGSL_MODE_HDLC)
1663 rc = info->tx_active ? info->max_frame_size : 0;
1664 else
1665 rc = info->tx_count;
1666
1667 if (debug_level >= DEBUG_LEVEL_INFO)
1668 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1669 __FILE__,__LINE__, info->device_name, rc);
1670
1671 return rc;
1672 }
1673
1674 /* Discard all data in the send buffer
1675 */
1676 static void mgslpc_flush_buffer(struct tty_struct *tty)
1677 {
1678 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1679 unsigned long flags;
1680
1681 if (debug_level >= DEBUG_LEVEL_INFO)
1682 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1683 __FILE__,__LINE__, info->device_name );
1684
1685 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1686 return;
1687
1688 spin_lock_irqsave(&info->lock,flags);
1689 info->tx_count = info->tx_put = info->tx_get = 0;
1690 del_timer(&info->tx_timer);
1691 spin_unlock_irqrestore(&info->lock,flags);
1692
1693 wake_up_interruptible(&tty->write_wait);
1694 tty_wakeup(tty);
1695 }
1696
1697 /* Send a high-priority XON/XOFF character
1698 */
1699 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1700 {
1701 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1702 unsigned long flags;
1703
1704 if (debug_level >= DEBUG_LEVEL_INFO)
1705 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1706 __FILE__,__LINE__, info->device_name, ch );
1707
1708 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1709 return;
1710
1711 info->x_char = ch;
1712 if (ch) {
1713 spin_lock_irqsave(&info->lock,flags);
1714 if (!info->tx_enabled)
1715 tx_start(info, tty);
1716 spin_unlock_irqrestore(&info->lock,flags);
1717 }
1718 }
1719
1720 /* Signal remote device to throttle send data (our receive data)
1721 */
1722 static void mgslpc_throttle(struct tty_struct * tty)
1723 {
1724 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1725 unsigned long flags;
1726
1727 if (debug_level >= DEBUG_LEVEL_INFO)
1728 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1729 __FILE__,__LINE__, info->device_name );
1730
1731 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1732 return;
1733
1734 if (I_IXOFF(tty))
1735 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1736
1737 if (tty->termios.c_cflag & CRTSCTS) {
1738 spin_lock_irqsave(&info->lock,flags);
1739 info->serial_signals &= ~SerialSignal_RTS;
1740 set_signals(info);
1741 spin_unlock_irqrestore(&info->lock,flags);
1742 }
1743 }
1744
1745 /* Signal remote device to stop throttling send data (our receive data)
1746 */
1747 static void mgslpc_unthrottle(struct tty_struct * tty)
1748 {
1749 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1750 unsigned long flags;
1751
1752 if (debug_level >= DEBUG_LEVEL_INFO)
1753 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1754 __FILE__,__LINE__, info->device_name );
1755
1756 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1757 return;
1758
1759 if (I_IXOFF(tty)) {
1760 if (info->x_char)
1761 info->x_char = 0;
1762 else
1763 mgslpc_send_xchar(tty, START_CHAR(tty));
1764 }
1765
1766 if (tty->termios.c_cflag & CRTSCTS) {
1767 spin_lock_irqsave(&info->lock,flags);
1768 info->serial_signals |= SerialSignal_RTS;
1769 set_signals(info);
1770 spin_unlock_irqrestore(&info->lock,flags);
1771 }
1772 }
1773
1774 /* get the current serial statistics
1775 */
1776 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1777 {
1778 int err;
1779 if (debug_level >= DEBUG_LEVEL_INFO)
1780 printk("get_params(%s)\n", info->device_name);
1781 if (!user_icount) {
1782 memset(&info->icount, 0, sizeof(info->icount));
1783 } else {
1784 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1785 if (err)
1786 return -EFAULT;
1787 }
1788 return 0;
1789 }
1790
1791 /* get the current serial parameters
1792 */
1793 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1794 {
1795 int err;
1796 if (debug_level >= DEBUG_LEVEL_INFO)
1797 printk("get_params(%s)\n", info->device_name);
1798 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1799 if (err)
1800 return -EFAULT;
1801 return 0;
1802 }
1803
1804 /* set the serial parameters
1805 *
1806 * Arguments:
1807 *
1808 * info pointer to device instance data
1809 * new_params user buffer containing new serial params
1810 *
1811 * Returns: 0 if success, otherwise error code
1812 */
1813 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1814 {
1815 unsigned long flags;
1816 MGSL_PARAMS tmp_params;
1817 int err;
1818
1819 if (debug_level >= DEBUG_LEVEL_INFO)
1820 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1821 info->device_name );
1822 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1823 if (err) {
1824 if ( debug_level >= DEBUG_LEVEL_INFO )
1825 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1826 __FILE__,__LINE__,info->device_name);
1827 return -EFAULT;
1828 }
1829
1830 spin_lock_irqsave(&info->lock,flags);
1831 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1832 spin_unlock_irqrestore(&info->lock,flags);
1833
1834 mgslpc_change_params(info, tty);
1835
1836 return 0;
1837 }
1838
1839 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1840 {
1841 int err;
1842 if (debug_level >= DEBUG_LEVEL_INFO)
1843 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1844 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1845 if (err)
1846 return -EFAULT;
1847 return 0;
1848 }
1849
1850 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1851 {
1852 unsigned long flags;
1853 if (debug_level >= DEBUG_LEVEL_INFO)
1854 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1855 spin_lock_irqsave(&info->lock,flags);
1856 info->idle_mode = idle_mode;
1857 tx_set_idle(info);
1858 spin_unlock_irqrestore(&info->lock,flags);
1859 return 0;
1860 }
1861
1862 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1863 {
1864 int err;
1865 if (debug_level >= DEBUG_LEVEL_INFO)
1866 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1867 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1868 if (err)
1869 return -EFAULT;
1870 return 0;
1871 }
1872
1873 static int set_interface(MGSLPC_INFO * info, int if_mode)
1874 {
1875 unsigned long flags;
1876 unsigned char val;
1877 if (debug_level >= DEBUG_LEVEL_INFO)
1878 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1879 spin_lock_irqsave(&info->lock,flags);
1880 info->if_mode = if_mode;
1881
1882 val = read_reg(info, PVR) & 0x0f;
1883 switch (info->if_mode)
1884 {
1885 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1886 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1887 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1888 }
1889 write_reg(info, PVR, val);
1890
1891 spin_unlock_irqrestore(&info->lock,flags);
1892 return 0;
1893 }
1894
1895 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1896 {
1897 unsigned long flags;
1898
1899 if (debug_level >= DEBUG_LEVEL_INFO)
1900 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1901
1902 spin_lock_irqsave(&info->lock,flags);
1903 if (enable) {
1904 if (!info->tx_enabled)
1905 tx_start(info, tty);
1906 } else {
1907 if (info->tx_enabled)
1908 tx_stop(info);
1909 }
1910 spin_unlock_irqrestore(&info->lock,flags);
1911 return 0;
1912 }
1913
1914 static int tx_abort(MGSLPC_INFO * info)
1915 {
1916 unsigned long flags;
1917
1918 if (debug_level >= DEBUG_LEVEL_INFO)
1919 printk("tx_abort(%s)\n", info->device_name);
1920
1921 spin_lock_irqsave(&info->lock,flags);
1922 if (info->tx_active && info->tx_count &&
1923 info->params.mode == MGSL_MODE_HDLC) {
1924 /* clear data count so FIFO is not filled on next IRQ.
1925 * This results in underrun and abort transmission.
1926 */
1927 info->tx_count = info->tx_put = info->tx_get = 0;
1928 info->tx_aborting = true;
1929 }
1930 spin_unlock_irqrestore(&info->lock,flags);
1931 return 0;
1932 }
1933
1934 static int set_rxenable(MGSLPC_INFO * info, int enable)
1935 {
1936 unsigned long flags;
1937
1938 if (debug_level >= DEBUG_LEVEL_INFO)
1939 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1940
1941 spin_lock_irqsave(&info->lock,flags);
1942 if (enable) {
1943 if (!info->rx_enabled)
1944 rx_start(info);
1945 } else {
1946 if (info->rx_enabled)
1947 rx_stop(info);
1948 }
1949 spin_unlock_irqrestore(&info->lock,flags);
1950 return 0;
1951 }
1952
1953 /* wait for specified event to occur
1954 *
1955 * Arguments: info pointer to device instance data
1956 * mask pointer to bitmask of events to wait for
1957 * Return Value: 0 if successful and bit mask updated with
1958 * of events triggerred,
1959 * otherwise error code
1960 */
1961 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1962 {
1963 unsigned long flags;
1964 int s;
1965 int rc=0;
1966 struct mgsl_icount cprev, cnow;
1967 int events;
1968 int mask;
1969 struct _input_signal_events oldsigs, newsigs;
1970 DECLARE_WAITQUEUE(wait, current);
1971
1972 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1973 if (rc)
1974 return -EFAULT;
1975
1976 if (debug_level >= DEBUG_LEVEL_INFO)
1977 printk("wait_events(%s,%d)\n", info->device_name, mask);
1978
1979 spin_lock_irqsave(&info->lock,flags);
1980
1981 /* return immediately if state matches requested events */
1982 get_signals(info);
1983 s = info->serial_signals;
1984 events = mask &
1985 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1986 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1987 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1988 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1989 if (events) {
1990 spin_unlock_irqrestore(&info->lock,flags);
1991 goto exit;
1992 }
1993
1994 /* save current irq counts */
1995 cprev = info->icount;
1996 oldsigs = info->input_signal_events;
1997
1998 if ((info->params.mode == MGSL_MODE_HDLC) &&
1999 (mask & MgslEvent_ExitHuntMode))
2000 irq_enable(info, CHA, IRQ_EXITHUNT);
2001
2002 set_current_state(TASK_INTERRUPTIBLE);
2003 add_wait_queue(&info->event_wait_q, &wait);
2004
2005 spin_unlock_irqrestore(&info->lock,flags);
2006
2007
2008 for(;;) {
2009 schedule();
2010 if (signal_pending(current)) {
2011 rc = -ERESTARTSYS;
2012 break;
2013 }
2014
2015 /* get current irq counts */
2016 spin_lock_irqsave(&info->lock,flags);
2017 cnow = info->icount;
2018 newsigs = info->input_signal_events;
2019 set_current_state(TASK_INTERRUPTIBLE);
2020 spin_unlock_irqrestore(&info->lock,flags);
2021
2022 /* if no change, wait aborted for some reason */
2023 if (newsigs.dsr_up == oldsigs.dsr_up &&
2024 newsigs.dsr_down == oldsigs.dsr_down &&
2025 newsigs.dcd_up == oldsigs.dcd_up &&
2026 newsigs.dcd_down == oldsigs.dcd_down &&
2027 newsigs.cts_up == oldsigs.cts_up &&
2028 newsigs.cts_down == oldsigs.cts_down &&
2029 newsigs.ri_up == oldsigs.ri_up &&
2030 newsigs.ri_down == oldsigs.ri_down &&
2031 cnow.exithunt == cprev.exithunt &&
2032 cnow.rxidle == cprev.rxidle) {
2033 rc = -EIO;
2034 break;
2035 }
2036
2037 events = mask &
2038 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2039 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2040 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2041 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2042 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2043 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2044 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2045 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2046 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2047 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2048 if (events)
2049 break;
2050
2051 cprev = cnow;
2052 oldsigs = newsigs;
2053 }
2054
2055 remove_wait_queue(&info->event_wait_q, &wait);
2056 set_current_state(TASK_RUNNING);
2057
2058 if (mask & MgslEvent_ExitHuntMode) {
2059 spin_lock_irqsave(&info->lock,flags);
2060 if (!waitqueue_active(&info->event_wait_q))
2061 irq_disable(info, CHA, IRQ_EXITHUNT);
2062 spin_unlock_irqrestore(&info->lock,flags);
2063 }
2064 exit:
2065 if (rc == 0)
2066 PUT_USER(rc, events, mask_ptr);
2067 return rc;
2068 }
2069
2070 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2071 {
2072 unsigned long flags;
2073 int rc;
2074 struct mgsl_icount cprev, cnow;
2075 DECLARE_WAITQUEUE(wait, current);
2076
2077 /* save current irq counts */
2078 spin_lock_irqsave(&info->lock,flags);
2079 cprev = info->icount;
2080 add_wait_queue(&info->status_event_wait_q, &wait);
2081 set_current_state(TASK_INTERRUPTIBLE);
2082 spin_unlock_irqrestore(&info->lock,flags);
2083
2084 for(;;) {
2085 schedule();
2086 if (signal_pending(current)) {
2087 rc = -ERESTARTSYS;
2088 break;
2089 }
2090
2091 /* get new irq counts */
2092 spin_lock_irqsave(&info->lock,flags);
2093 cnow = info->icount;
2094 set_current_state(TASK_INTERRUPTIBLE);
2095 spin_unlock_irqrestore(&info->lock,flags);
2096
2097 /* if no change, wait aborted for some reason */
2098 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2099 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2100 rc = -EIO;
2101 break;
2102 }
2103
2104 /* check for change in caller specified modem input */
2105 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2106 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2107 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2108 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2109 rc = 0;
2110 break;
2111 }
2112
2113 cprev = cnow;
2114 }
2115 remove_wait_queue(&info->status_event_wait_q, &wait);
2116 set_current_state(TASK_RUNNING);
2117 return rc;
2118 }
2119
2120 /* return the state of the serial control and status signals
2121 */
2122 static int tiocmget(struct tty_struct *tty)
2123 {
2124 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2125 unsigned int result;
2126 unsigned long flags;
2127
2128 spin_lock_irqsave(&info->lock,flags);
2129 get_signals(info);
2130 spin_unlock_irqrestore(&info->lock,flags);
2131
2132 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2133 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2134 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2135 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2136 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2137 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2138
2139 if (debug_level >= DEBUG_LEVEL_INFO)
2140 printk("%s(%d):%s tiocmget() value=%08X\n",
2141 __FILE__,__LINE__, info->device_name, result );
2142 return result;
2143 }
2144
2145 /* set modem control signals (DTR/RTS)
2146 */
2147 static int tiocmset(struct tty_struct *tty,
2148 unsigned int set, unsigned int clear)
2149 {
2150 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2151 unsigned long flags;
2152
2153 if (debug_level >= DEBUG_LEVEL_INFO)
2154 printk("%s(%d):%s tiocmset(%x,%x)\n",
2155 __FILE__,__LINE__,info->device_name, set, clear);
2156
2157 if (set & TIOCM_RTS)
2158 info->serial_signals |= SerialSignal_RTS;
2159 if (set & TIOCM_DTR)
2160 info->serial_signals |= SerialSignal_DTR;
2161 if (clear & TIOCM_RTS)
2162 info->serial_signals &= ~SerialSignal_RTS;
2163 if (clear & TIOCM_DTR)
2164 info->serial_signals &= ~SerialSignal_DTR;
2165
2166 spin_lock_irqsave(&info->lock,flags);
2167 set_signals(info);
2168 spin_unlock_irqrestore(&info->lock,flags);
2169
2170 return 0;
2171 }
2172
2173 /* Set or clear transmit break condition
2174 *
2175 * Arguments: tty pointer to tty instance data
2176 * break_state -1=set break condition, 0=clear
2177 */
2178 static int mgslpc_break(struct tty_struct *tty, int break_state)
2179 {
2180 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2181 unsigned long flags;
2182
2183 if (debug_level >= DEBUG_LEVEL_INFO)
2184 printk("%s(%d):mgslpc_break(%s,%d)\n",
2185 __FILE__,__LINE__, info->device_name, break_state);
2186
2187 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2188 return -EINVAL;
2189
2190 spin_lock_irqsave(&info->lock,flags);
2191 if (break_state == -1)
2192 set_reg_bits(info, CHA+DAFO, BIT6);
2193 else
2194 clear_reg_bits(info, CHA+DAFO, BIT6);
2195 spin_unlock_irqrestore(&info->lock,flags);
2196 return 0;
2197 }
2198
2199 static int mgslpc_get_icount(struct tty_struct *tty,
2200 struct serial_icounter_struct *icount)
2201 {
2202 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2203 struct mgsl_icount cnow; /* kernel counter temps */
2204 unsigned long flags;
2205
2206 spin_lock_irqsave(&info->lock,flags);
2207 cnow = info->icount;
2208 spin_unlock_irqrestore(&info->lock,flags);
2209
2210 icount->cts = cnow.cts;
2211 icount->dsr = cnow.dsr;
2212 icount->rng = cnow.rng;
2213 icount->dcd = cnow.dcd;
2214 icount->rx = cnow.rx;
2215 icount->tx = cnow.tx;
2216 icount->frame = cnow.frame;
2217 icount->overrun = cnow.overrun;
2218 icount->parity = cnow.parity;
2219 icount->brk = cnow.brk;
2220 icount->buf_overrun = cnow.buf_overrun;
2221
2222 return 0;
2223 }
2224
2225 /* Service an IOCTL request
2226 *
2227 * Arguments:
2228 *
2229 * tty pointer to tty instance data
2230 * cmd IOCTL command code
2231 * arg command argument/context
2232 *
2233 * Return Value: 0 if success, otherwise error code
2234 */
2235 static int mgslpc_ioctl(struct tty_struct *tty,
2236 unsigned int cmd, unsigned long arg)
2237 {
2238 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2239 void __user *argp = (void __user *)arg;
2240
2241 if (debug_level >= DEBUG_LEVEL_INFO)
2242 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2243 info->device_name, cmd );
2244
2245 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2246 return -ENODEV;
2247
2248 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2249 (cmd != TIOCMIWAIT)) {
2250 if (tty->flags & (1 << TTY_IO_ERROR))
2251 return -EIO;
2252 }
2253
2254 switch (cmd) {
2255 case MGSL_IOCGPARAMS:
2256 return get_params(info, argp);
2257 case MGSL_IOCSPARAMS:
2258 return set_params(info, argp, tty);
2259 case MGSL_IOCGTXIDLE:
2260 return get_txidle(info, argp);
2261 case MGSL_IOCSTXIDLE:
2262 return set_txidle(info, (int)arg);
2263 case MGSL_IOCGIF:
2264 return get_interface(info, argp);
2265 case MGSL_IOCSIF:
2266 return set_interface(info,(int)arg);
2267 case MGSL_IOCTXENABLE:
2268 return set_txenable(info,(int)arg, tty);
2269 case MGSL_IOCRXENABLE:
2270 return set_rxenable(info,(int)arg);
2271 case MGSL_IOCTXABORT:
2272 return tx_abort(info);
2273 case MGSL_IOCGSTATS:
2274 return get_stats(info, argp);
2275 case MGSL_IOCWAITEVENT:
2276 return wait_events(info, argp);
2277 case TIOCMIWAIT:
2278 return modem_input_wait(info,(int)arg);
2279 default:
2280 return -ENOIOCTLCMD;
2281 }
2282 return 0;
2283 }
2284
2285 /* Set new termios settings
2286 *
2287 * Arguments:
2288 *
2289 * tty pointer to tty structure
2290 * termios pointer to buffer to hold returned old termios
2291 */
2292 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2293 {
2294 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2295 unsigned long flags;
2296
2297 if (debug_level >= DEBUG_LEVEL_INFO)
2298 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2299 tty->driver->name );
2300
2301 /* just return if nothing has changed */
2302 if ((tty->termios.c_cflag == old_termios->c_cflag)
2303 && (RELEVANT_IFLAG(tty->termios.c_iflag)
2304 == RELEVANT_IFLAG(old_termios->c_iflag)))
2305 return;
2306
2307 mgslpc_change_params(info, tty);
2308
2309 /* Handle transition to B0 status */
2310 if (old_termios->c_cflag & CBAUD &&
2311 !(tty->termios.c_cflag & CBAUD)) {
2312 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2313 spin_lock_irqsave(&info->lock,flags);
2314 set_signals(info);
2315 spin_unlock_irqrestore(&info->lock,flags);
2316 }
2317
2318 /* Handle transition away from B0 status */
2319 if (!(old_termios->c_cflag & CBAUD) &&
2320 tty->termios.c_cflag & CBAUD) {
2321 info->serial_signals |= SerialSignal_DTR;
2322 if (!(tty->termios.c_cflag & CRTSCTS) ||
2323 !test_bit(TTY_THROTTLED, &tty->flags)) {
2324 info->serial_signals |= SerialSignal_RTS;
2325 }
2326 spin_lock_irqsave(&info->lock,flags);
2327 set_signals(info);
2328 spin_unlock_irqrestore(&info->lock,flags);
2329 }
2330
2331 /* Handle turning off CRTSCTS */
2332 if (old_termios->c_cflag & CRTSCTS &&
2333 !(tty->termios.c_cflag & CRTSCTS)) {
2334 tty->hw_stopped = 0;
2335 tx_release(tty);
2336 }
2337 }
2338
2339 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2340 {
2341 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2342 struct tty_port *port = &info->port;
2343
2344 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2345 return;
2346
2347 if (debug_level >= DEBUG_LEVEL_INFO)
2348 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2349 __FILE__,__LINE__, info->device_name, port->count);
2350
2351 WARN_ON(!port->count);
2352
2353 if (tty_port_close_start(port, tty, filp) == 0)
2354 goto cleanup;
2355
2356 if (port->flags & ASYNC_INITIALIZED)
2357 mgslpc_wait_until_sent(tty, info->timeout);
2358
2359 mgslpc_flush_buffer(tty);
2360
2361 tty_ldisc_flush(tty);
2362 shutdown(info, tty);
2363
2364 tty_port_close_end(port, tty);
2365 tty_port_tty_set(port, NULL);
2366 cleanup:
2367 if (debug_level >= DEBUG_LEVEL_INFO)
2368 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2369 tty->driver->name, port->count);
2370 }
2371
2372 /* Wait until the transmitter is empty.
2373 */
2374 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2375 {
2376 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2377 unsigned long orig_jiffies, char_time;
2378
2379 if (!info )
2380 return;
2381
2382 if (debug_level >= DEBUG_LEVEL_INFO)
2383 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2384 __FILE__,__LINE__, info->device_name );
2385
2386 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2387 return;
2388
2389 if (!(info->port.flags & ASYNC_INITIALIZED))
2390 goto exit;
2391
2392 orig_jiffies = jiffies;
2393
2394 /* Set check interval to 1/5 of estimated time to
2395 * send a character, and make it at least 1. The check
2396 * interval should also be less than the timeout.
2397 * Note: use tight timings here to satisfy the NIST-PCTS.
2398 */
2399
2400 if ( info->params.data_rate ) {
2401 char_time = info->timeout/(32 * 5);
2402 if (!char_time)
2403 char_time++;
2404 } else
2405 char_time = 1;
2406
2407 if (timeout)
2408 char_time = min_t(unsigned long, char_time, timeout);
2409
2410 if (info->params.mode == MGSL_MODE_HDLC) {
2411 while (info->tx_active) {
2412 msleep_interruptible(jiffies_to_msecs(char_time));
2413 if (signal_pending(current))
2414 break;
2415 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2416 break;
2417 }
2418 } else {
2419 while ((info->tx_count || info->tx_active) &&
2420 info->tx_enabled) {
2421 msleep_interruptible(jiffies_to_msecs(char_time));
2422 if (signal_pending(current))
2423 break;
2424 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2425 break;
2426 }
2427 }
2428
2429 exit:
2430 if (debug_level >= DEBUG_LEVEL_INFO)
2431 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2432 __FILE__,__LINE__, info->device_name );
2433 }
2434
2435 /* Called by tty_hangup() when a hangup is signaled.
2436 * This is the same as closing all open files for the port.
2437 */
2438 static void mgslpc_hangup(struct tty_struct *tty)
2439 {
2440 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2441
2442 if (debug_level >= DEBUG_LEVEL_INFO)
2443 printk("%s(%d):mgslpc_hangup(%s)\n",
2444 __FILE__,__LINE__, info->device_name );
2445
2446 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2447 return;
2448
2449 mgslpc_flush_buffer(tty);
2450 shutdown(info, tty);
2451 tty_port_hangup(&info->port);
2452 }
2453
2454 static int carrier_raised(struct tty_port *port)
2455 {
2456 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2457 unsigned long flags;
2458
2459 spin_lock_irqsave(&info->lock,flags);
2460 get_signals(info);
2461 spin_unlock_irqrestore(&info->lock,flags);
2462
2463 if (info->serial_signals & SerialSignal_DCD)
2464 return 1;
2465 return 0;
2466 }
2467
2468 static void dtr_rts(struct tty_port *port, int onoff)
2469 {
2470 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2471 unsigned long flags;
2472
2473 spin_lock_irqsave(&info->lock,flags);
2474 if (onoff)
2475 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2476 else
2477 info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
2478 set_signals(info);
2479 spin_unlock_irqrestore(&info->lock,flags);
2480 }
2481
2482
2483 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2484 {
2485 MGSLPC_INFO *info;
2486 struct tty_port *port;
2487 int retval, line;
2488 unsigned long flags;
2489
2490 /* verify range of specified line number */
2491 line = tty->index;
2492 if (line >= mgslpc_device_count) {
2493 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2494 __FILE__,__LINE__,line);
2495 return -ENODEV;
2496 }
2497
2498 /* find the info structure for the specified line */
2499 info = mgslpc_device_list;
2500 while(info && info->line != line)
2501 info = info->next_device;
2502 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2503 return -ENODEV;
2504
2505 port = &info->port;
2506 tty->driver_data = info;
2507 tty_port_tty_set(port, tty);
2508
2509 if (debug_level >= DEBUG_LEVEL_INFO)
2510 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2511 __FILE__,__LINE__,tty->driver->name, port->count);
2512
2513 /* If port is closing, signal caller to try again */
2514 if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2515 if (port->flags & ASYNC_CLOSING)
2516 interruptible_sleep_on(&port->close_wait);
2517 retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2518 -EAGAIN : -ERESTARTSYS);
2519 goto cleanup;
2520 }
2521
2522 tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2523
2524 spin_lock_irqsave(&info->netlock, flags);
2525 if (info->netcount) {
2526 retval = -EBUSY;
2527 spin_unlock_irqrestore(&info->netlock, flags);
2528 goto cleanup;
2529 }
2530 spin_lock(&port->lock);
2531 port->count++;
2532 spin_unlock(&port->lock);
2533 spin_unlock_irqrestore(&info->netlock, flags);
2534
2535 if (port->count == 1) {
2536 /* 1st open on this device, init hardware */
2537 retval = startup(info, tty);
2538 if (retval < 0)
2539 goto cleanup;
2540 }
2541
2542 retval = tty_port_block_til_ready(&info->port, tty, filp);
2543 if (retval) {
2544 if (debug_level >= DEBUG_LEVEL_INFO)
2545 printk("%s(%d):block_til_ready(%s) returned %d\n",
2546 __FILE__,__LINE__, info->device_name, retval);
2547 goto cleanup;
2548 }
2549
2550 if (debug_level >= DEBUG_LEVEL_INFO)
2551 printk("%s(%d):mgslpc_open(%s) success\n",
2552 __FILE__,__LINE__, info->device_name);
2553 retval = 0;
2554
2555 cleanup:
2556 return retval;
2557 }
2558
2559 /*
2560 * /proc fs routines....
2561 */
2562
2563 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2564 {
2565 char stat_buf[30];
2566 unsigned long flags;
2567
2568 seq_printf(m, "%s:io:%04X irq:%d",
2569 info->device_name, info->io_base, info->irq_level);
2570
2571 /* output current serial signal states */
2572 spin_lock_irqsave(&info->lock,flags);
2573 get_signals(info);
2574 spin_unlock_irqrestore(&info->lock,flags);
2575
2576 stat_buf[0] = 0;
2577 stat_buf[1] = 0;
2578 if (info->serial_signals & SerialSignal_RTS)
2579 strcat(stat_buf, "|RTS");
2580 if (info->serial_signals & SerialSignal_CTS)
2581 strcat(stat_buf, "|CTS");
2582 if (info->serial_signals & SerialSignal_DTR)
2583 strcat(stat_buf, "|DTR");
2584 if (info->serial_signals & SerialSignal_DSR)
2585 strcat(stat_buf, "|DSR");
2586 if (info->serial_signals & SerialSignal_DCD)
2587 strcat(stat_buf, "|CD");
2588 if (info->serial_signals & SerialSignal_RI)
2589 strcat(stat_buf, "|RI");
2590
2591 if (info->params.mode == MGSL_MODE_HDLC) {
2592 seq_printf(m, " HDLC txok:%d rxok:%d",
2593 info->icount.txok, info->icount.rxok);
2594 if (info->icount.txunder)
2595 seq_printf(m, " txunder:%d", info->icount.txunder);
2596 if (info->icount.txabort)
2597 seq_printf(m, " txabort:%d", info->icount.txabort);
2598 if (info->icount.rxshort)
2599 seq_printf(m, " rxshort:%d", info->icount.rxshort);
2600 if (info->icount.rxlong)
2601 seq_printf(m, " rxlong:%d", info->icount.rxlong);
2602 if (info->icount.rxover)
2603 seq_printf(m, " rxover:%d", info->icount.rxover);
2604 if (info->icount.rxcrc)
2605 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2606 } else {
2607 seq_printf(m, " ASYNC tx:%d rx:%d",
2608 info->icount.tx, info->icount.rx);
2609 if (info->icount.frame)
2610 seq_printf(m, " fe:%d", info->icount.frame);
2611 if (info->icount.parity)
2612 seq_printf(m, " pe:%d", info->icount.parity);
2613 if (info->icount.brk)
2614 seq_printf(m, " brk:%d", info->icount.brk);
2615 if (info->icount.overrun)
2616 seq_printf(m, " oe:%d", info->icount.overrun);
2617 }
2618
2619 /* Append serial signal status to end */
2620 seq_printf(m, " %s\n", stat_buf+1);
2621
2622 seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2623 info->tx_active,info->bh_requested,info->bh_running,
2624 info->pending_bh);
2625 }
2626
2627 /* Called to print information about devices
2628 */
2629 static int mgslpc_proc_show(struct seq_file *m, void *v)
2630 {
2631 MGSLPC_INFO *info;
2632
2633 seq_printf(m, "synclink driver:%s\n", driver_version);
2634
2635 info = mgslpc_device_list;
2636 while( info ) {
2637 line_info(m, info);
2638 info = info->next_device;
2639 }
2640 return 0;
2641 }
2642
2643 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2644 {
2645 return single_open(file, mgslpc_proc_show, NULL);
2646 }
2647
2648 static const struct file_operations mgslpc_proc_fops = {
2649 .owner = THIS_MODULE,
2650 .open = mgslpc_proc_open,
2651 .read = seq_read,
2652 .llseek = seq_lseek,
2653 .release = single_release,
2654 };
2655
2656 static int rx_alloc_buffers(MGSLPC_INFO *info)
2657 {
2658 /* each buffer has header and data */
2659 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2660
2661 /* calculate total allocation size for 8 buffers */
2662 info->rx_buf_total_size = info->rx_buf_size * 8;
2663
2664 /* limit total allocated memory */
2665 if (info->rx_buf_total_size > 0x10000)
2666 info->rx_buf_total_size = 0x10000;
2667
2668 /* calculate number of buffers */
2669 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2670
2671 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2672 if (info->rx_buf == NULL)
2673 return -ENOMEM;
2674
2675 rx_reset_buffers(info);
2676 return 0;
2677 }
2678
2679 static void rx_free_buffers(MGSLPC_INFO *info)
2680 {
2681 kfree(info->rx_buf);
2682 info->rx_buf = NULL;
2683 }
2684
2685 static int claim_resources(MGSLPC_INFO *info)
2686 {
2687 if (rx_alloc_buffers(info) < 0 ) {
2688 printk( "Can't allocate rx buffer %s\n", info->device_name);
2689 release_resources(info);
2690 return -ENODEV;
2691 }
2692 return 0;
2693 }
2694
2695 static void release_resources(MGSLPC_INFO *info)
2696 {
2697 if (debug_level >= DEBUG_LEVEL_INFO)
2698 printk("release_resources(%s)\n", info->device_name);
2699 rx_free_buffers(info);
2700 }
2701
2702 /* Add the specified device instance data structure to the
2703 * global linked list of devices and increment the device count.
2704 *
2705 * Arguments: info pointer to device instance data
2706 */
2707 static void mgslpc_add_device(MGSLPC_INFO *info)
2708 {
2709 info->next_device = NULL;
2710 info->line = mgslpc_device_count;
2711 sprintf(info->device_name,"ttySLP%d",info->line);
2712
2713 if (info->line < MAX_DEVICE_COUNT) {
2714 if (maxframe[info->line])
2715 info->max_frame_size = maxframe[info->line];
2716 }
2717
2718 mgslpc_device_count++;
2719
2720 if (!mgslpc_device_list)
2721 mgslpc_device_list = info;
2722 else {
2723 MGSLPC_INFO *current_dev = mgslpc_device_list;
2724 while( current_dev->next_device )
2725 current_dev = current_dev->next_device;
2726 current_dev->next_device = info;
2727 }
2728
2729 if (info->max_frame_size < 4096)
2730 info->max_frame_size = 4096;
2731 else if (info->max_frame_size > 65535)
2732 info->max_frame_size = 65535;
2733
2734 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2735 info->device_name, info->io_base, info->irq_level);
2736
2737 #if SYNCLINK_GENERIC_HDLC
2738 hdlcdev_init(info);
2739 #endif
2740 tty_port_register_device(&info->port, serial_driver, info->line,
2741 &info->p_dev->dev);
2742 }
2743
2744 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2745 {
2746 MGSLPC_INFO *info = mgslpc_device_list;
2747 MGSLPC_INFO *last = NULL;
2748
2749 while(info) {
2750 if (info == remove_info) {
2751 if (last)
2752 last->next_device = info->next_device;
2753 else
2754 mgslpc_device_list = info->next_device;
2755 tty_unregister_device(serial_driver, info->line);
2756 #if SYNCLINK_GENERIC_HDLC
2757 hdlcdev_exit(info);
2758 #endif
2759 release_resources(info);
2760 kfree(info);
2761 mgslpc_device_count--;
2762 return;
2763 }
2764 last = info;
2765 info = info->next_device;
2766 }
2767 }
2768
2769 static const struct pcmcia_device_id mgslpc_ids[] = {
2770 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2771 PCMCIA_DEVICE_NULL
2772 };
2773 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2774
2775 static struct pcmcia_driver mgslpc_driver = {
2776 .owner = THIS_MODULE,
2777 .name = "synclink_cs",
2778 .probe = mgslpc_probe,
2779 .remove = mgslpc_detach,
2780 .id_table = mgslpc_ids,
2781 .suspend = mgslpc_suspend,
2782 .resume = mgslpc_resume,
2783 };
2784
2785 static const struct tty_operations mgslpc_ops = {
2786 .open = mgslpc_open,
2787 .close = mgslpc_close,
2788 .write = mgslpc_write,
2789 .put_char = mgslpc_put_char,
2790 .flush_chars = mgslpc_flush_chars,
2791 .write_room = mgslpc_write_room,
2792 .chars_in_buffer = mgslpc_chars_in_buffer,
2793 .flush_buffer = mgslpc_flush_buffer,
2794 .ioctl = mgslpc_ioctl,
2795 .throttle = mgslpc_throttle,
2796 .unthrottle = mgslpc_unthrottle,
2797 .send_xchar = mgslpc_send_xchar,
2798 .break_ctl = mgslpc_break,
2799 .wait_until_sent = mgslpc_wait_until_sent,
2800 .set_termios = mgslpc_set_termios,
2801 .stop = tx_pause,
2802 .start = tx_release,
2803 .hangup = mgslpc_hangup,
2804 .tiocmget = tiocmget,
2805 .tiocmset = tiocmset,
2806 .get_icount = mgslpc_get_icount,
2807 .proc_fops = &mgslpc_proc_fops,
2808 };
2809
2810 static int __init synclink_cs_init(void)
2811 {
2812 int rc;
2813
2814 if (break_on_load) {
2815 mgslpc_get_text_ptr();
2816 BREAKPOINT();
2817 }
2818
2819 serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2820 TTY_DRIVER_REAL_RAW |
2821 TTY_DRIVER_DYNAMIC_DEV);
2822 if (IS_ERR(serial_driver)) {
2823 rc = PTR_ERR(serial_driver);
2824 goto err;
2825 }
2826
2827 /* Initialize the tty_driver structure */
2828 serial_driver->driver_name = "synclink_cs";
2829 serial_driver->name = "ttySLP";
2830 serial_driver->major = ttymajor;
2831 serial_driver->minor_start = 64;
2832 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2833 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2834 serial_driver->init_termios = tty_std_termios;
2835 serial_driver->init_termios.c_cflag =
2836 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2837 tty_set_operations(serial_driver, &mgslpc_ops);
2838
2839 rc = tty_register_driver(serial_driver);
2840 if (rc < 0) {
2841 printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2842 __FILE__, __LINE__);
2843 goto err_put_tty;
2844 }
2845
2846 rc = pcmcia_register_driver(&mgslpc_driver);
2847 if (rc < 0)
2848 goto err_unreg_tty;
2849
2850 printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2851 serial_driver->major);
2852
2853 return 0;
2854 err_unreg_tty:
2855 tty_unregister_driver(serial_driver);
2856 err_put_tty:
2857 put_tty_driver(serial_driver);
2858 err:
2859 return rc;
2860 }
2861
2862 static void __exit synclink_cs_exit(void)
2863 {
2864 pcmcia_unregister_driver(&mgslpc_driver);
2865 tty_unregister_driver(serial_driver);
2866 put_tty_driver(serial_driver);
2867 }
2868
2869 module_init(synclink_cs_init);
2870 module_exit(synclink_cs_exit);
2871
2872 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2873 {
2874 unsigned int M, N;
2875 unsigned char val;
2876
2877 /* note:standard BRG mode is broken in V3.2 chip
2878 * so enhanced mode is always used
2879 */
2880
2881 if (rate) {
2882 N = 3686400 / rate;
2883 if (!N)
2884 N = 1;
2885 N >>= 1;
2886 for (M = 1; N > 64 && M < 16; M++)
2887 N >>= 1;
2888 N--;
2889
2890 /* BGR[5..0] = N
2891 * BGR[9..6] = M
2892 * BGR[7..0] contained in BGR register
2893 * BGR[9..8] contained in CCR2[7..6]
2894 * divisor = (N+1)*2^M
2895 *
2896 * Note: M *must* not be zero (causes asymetric duty cycle)
2897 */
2898 write_reg(info, (unsigned char) (channel + BGR),
2899 (unsigned char) ((M << 6) + N));
2900 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2901 val |= ((M << 4) & 0xc0);
2902 write_reg(info, (unsigned char) (channel + CCR2), val);
2903 }
2904 }
2905
2906 /* Enabled the AUX clock output at the specified frequency.
2907 */
2908 static void enable_auxclk(MGSLPC_INFO *info)
2909 {
2910 unsigned char val;
2911
2912 /* MODE
2913 *
2914 * 07..06 MDS[1..0] 10 = transparent HDLC mode
2915 * 05 ADM Address Mode, 0 = no addr recognition
2916 * 04 TMD Timer Mode, 0 = external
2917 * 03 RAC Receiver Active, 0 = inactive
2918 * 02 RTS 0=RTS active during xmit, 1=RTS always active
2919 * 01 TRS Timer Resolution, 1=512
2920 * 00 TLP Test Loop, 0 = no loop
2921 *
2922 * 1000 0010
2923 */
2924 val = 0x82;
2925
2926 /* channel B RTS is used to enable AUXCLK driver on SP505 */
2927 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2928 val |= BIT2;
2929 write_reg(info, CHB + MODE, val);
2930
2931 /* CCR0
2932 *
2933 * 07 PU Power Up, 1=active, 0=power down
2934 * 06 MCE Master Clock Enable, 1=enabled
2935 * 05 Reserved, 0
2936 * 04..02 SC[2..0] Encoding
2937 * 01..00 SM[1..0] Serial Mode, 00=HDLC
2938 *
2939 * 11000000
2940 */
2941 write_reg(info, CHB + CCR0, 0xc0);
2942
2943 /* CCR1
2944 *
2945 * 07 SFLG Shared Flag, 0 = disable shared flags
2946 * 06 GALP Go Active On Loop, 0 = not used
2947 * 05 GLP Go On Loop, 0 = not used
2948 * 04 ODS Output Driver Select, 1=TxD is push-pull output
2949 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
2950 * 02..00 CM[2..0] Clock Mode
2951 *
2952 * 0001 0111
2953 */
2954 write_reg(info, CHB + CCR1, 0x17);
2955
2956 /* CCR2 (Channel B)
2957 *
2958 * 07..06 BGR[9..8] Baud rate bits 9..8
2959 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
2960 * 04 SSEL Clock source select, 1=submode b
2961 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
2962 * 02 RWX Read/Write Exchange 0=disabled
2963 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
2964 * 00 DIV, data inversion 0=disabled, 1=enabled
2965 *
2966 * 0011 1000
2967 */
2968 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2969 write_reg(info, CHB + CCR2, 0x38);
2970 else
2971 write_reg(info, CHB + CCR2, 0x30);
2972
2973 /* CCR4
2974 *
2975 * 07 MCK4 Master Clock Divide by 4, 1=enabled
2976 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
2977 * 05 TST1 Test Pin, 0=normal operation
2978 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
2979 * 03..02 Reserved, must be 0
2980 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
2981 *
2982 * 0101 0000
2983 */
2984 write_reg(info, CHB + CCR4, 0x50);
2985
2986 /* if auxclk not enabled, set internal BRG so
2987 * CTS transitions can be detected (requires TxC)
2988 */
2989 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2990 mgslpc_set_rate(info, CHB, info->params.clock_speed);
2991 else
2992 mgslpc_set_rate(info, CHB, 921600);
2993 }
2994
2995 static void loopback_enable(MGSLPC_INFO *info)
2996 {
2997 unsigned char val;
2998
2999 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3000 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3001 write_reg(info, CHA + CCR1, val);
3002
3003 /* CCR2:04 SSEL Clock source select, 1=submode b */
3004 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3005 write_reg(info, CHA + CCR2, val);
3006
3007 /* set LinkSpeed if available, otherwise default to 2Mbps */
3008 if (info->params.clock_speed)
3009 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3010 else
3011 mgslpc_set_rate(info, CHA, 1843200);
3012
3013 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3014 val = read_reg(info, CHA + MODE) | BIT0;
3015 write_reg(info, CHA + MODE, val);
3016 }
3017
3018 static void hdlc_mode(MGSLPC_INFO *info)
3019 {
3020 unsigned char val;
3021 unsigned char clkmode, clksubmode;
3022
3023 /* disable all interrupts */
3024 irq_disable(info, CHA, 0xffff);
3025 irq_disable(info, CHB, 0xffff);
3026 port_irq_disable(info, 0xff);
3027
3028 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3029 clkmode = clksubmode = 0;
3030 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3031 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3032 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3033 clkmode = 7;
3034 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3035 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3036 /* clock mode 7b, rcv = BRG, xmt = BRG */
3037 clkmode = 7;
3038 clksubmode = 1;
3039 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3040 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3041 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3042 clkmode = 6;
3043 clksubmode = 1;
3044 } else {
3045 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3046 clkmode = 6;
3047 }
3048 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3049 /* clock mode 0b, rcv = RxC, xmt = BRG */
3050 clksubmode = 1;
3051 }
3052
3053 /* MODE
3054 *
3055 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3056 * 05 ADM Address Mode, 0 = no addr recognition
3057 * 04 TMD Timer Mode, 0 = external
3058 * 03 RAC Receiver Active, 0 = inactive
3059 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3060 * 01 TRS Timer Resolution, 1=512
3061 * 00 TLP Test Loop, 0 = no loop
3062 *
3063 * 1000 0010
3064 */
3065 val = 0x82;
3066 if (info->params.loopback)
3067 val |= BIT0;
3068
3069 /* preserve RTS state */
3070 if (info->serial_signals & SerialSignal_RTS)
3071 val |= BIT2;
3072 write_reg(info, CHA + MODE, val);
3073
3074 /* CCR0
3075 *
3076 * 07 PU Power Up, 1=active, 0=power down
3077 * 06 MCE Master Clock Enable, 1=enabled
3078 * 05 Reserved, 0
3079 * 04..02 SC[2..0] Encoding
3080 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3081 *
3082 * 11000000
3083 */
3084 val = 0xc0;
3085 switch (info->params.encoding)
3086 {
3087 case HDLC_ENCODING_NRZI:
3088 val |= BIT3;
3089 break;
3090 case HDLC_ENCODING_BIPHASE_SPACE:
3091 val |= BIT4;
3092 break; // FM0
3093 case HDLC_ENCODING_BIPHASE_MARK:
3094 val |= BIT4 + BIT2;
3095 break; // FM1
3096 case HDLC_ENCODING_BIPHASE_LEVEL:
3097 val |= BIT4 + BIT3;
3098 break; // Manchester
3099 }
3100 write_reg(info, CHA + CCR0, val);
3101
3102 /* CCR1
3103 *
3104 * 07 SFLG Shared Flag, 0 = disable shared flags
3105 * 06 GALP Go Active On Loop, 0 = not used
3106 * 05 GLP Go On Loop, 0 = not used
3107 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3108 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3109 * 02..00 CM[2..0] Clock Mode
3110 *
3111 * 0001 0000
3112 */
3113 val = 0x10 + clkmode;
3114 write_reg(info, CHA + CCR1, val);
3115
3116 /* CCR2
3117 *
3118 * 07..06 BGR[9..8] Baud rate bits 9..8
3119 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3120 * 04 SSEL Clock source select, 1=submode b
3121 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3122 * 02 RWX Read/Write Exchange 0=disabled
3123 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3124 * 00 DIV, data inversion 0=disabled, 1=enabled
3125 *
3126 * 0000 0000
3127 */
3128 val = 0x00;
3129 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3130 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3131 val |= BIT5;
3132 if (clksubmode)
3133 val |= BIT4;
3134 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3135 val |= BIT1;
3136 if (info->params.encoding == HDLC_ENCODING_NRZB)
3137 val |= BIT0;
3138 write_reg(info, CHA + CCR2, val);
3139
3140 /* CCR3
3141 *
3142 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3143 * 05 EPT Enable preamble transmission, 1=enabled
3144 * 04 RADD Receive address pushed to FIFO, 0=disabled
3145 * 03 CRL CRC Reset Level, 0=FFFF
3146 * 02 RCRC Rx CRC 0=On 1=Off
3147 * 01 TCRC Tx CRC 0=On 1=Off
3148 * 00 PSD DPLL Phase Shift Disable
3149 *
3150 * 0000 0000
3151 */
3152 val = 0x00;
3153 if (info->params.crc_type == HDLC_CRC_NONE)
3154 val |= BIT2 + BIT1;
3155 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3156 val |= BIT5;
3157 switch (info->params.preamble_length)
3158 {
3159 case HDLC_PREAMBLE_LENGTH_16BITS:
3160 val |= BIT6;
3161 break;
3162 case HDLC_PREAMBLE_LENGTH_32BITS:
3163 val |= BIT6;
3164 break;
3165 case HDLC_PREAMBLE_LENGTH_64BITS:
3166 val |= BIT7 + BIT6;
3167 break;
3168 }
3169 write_reg(info, CHA + CCR3, val);
3170
3171 /* PRE - Preamble pattern */
3172 val = 0;
3173 switch (info->params.preamble)
3174 {
3175 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3176 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3177 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3178 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3179 }
3180 write_reg(info, CHA + PRE, val);
3181
3182 /* CCR4
3183 *
3184 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3185 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3186 * 05 TST1 Test Pin, 0=normal operation
3187 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3188 * 03..02 Reserved, must be 0
3189 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3190 *
3191 * 0101 0000
3192 */
3193 val = 0x50;
3194 write_reg(info, CHA + CCR4, val);
3195 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3196 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3197 else
3198 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3199
3200 /* RLCR Receive length check register
3201 *
3202 * 7 1=enable receive length check
3203 * 6..0 Max frame length = (RL + 1) * 32
3204 */
3205 write_reg(info, CHA + RLCR, 0);
3206
3207 /* XBCH Transmit Byte Count High
3208 *
3209 * 07 DMA mode, 0 = interrupt driven
3210 * 06 NRM, 0=ABM (ignored)
3211 * 05 CAS Carrier Auto Start
3212 * 04 XC Transmit Continuously (ignored)
3213 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3214 *
3215 * 0000 0000
3216 */
3217 val = 0x00;
3218 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3219 val |= BIT5;
3220 write_reg(info, CHA + XBCH, val);
3221 enable_auxclk(info);
3222 if (info->params.loopback || info->testing_irq)
3223 loopback_enable(info);
3224 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3225 {
3226 irq_enable(info, CHB, IRQ_CTS);
3227 /* PVR[3] 1=AUTO CTS active */
3228 set_reg_bits(info, CHA + PVR, BIT3);
3229 } else
3230 clear_reg_bits(info, CHA + PVR, BIT3);
3231
3232 irq_enable(info, CHA,
3233 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3234 IRQ_UNDERRUN + IRQ_TXFIFO);
3235 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3236 wait_command_complete(info, CHA);
3237 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3238
3239 /* Master clock mode enabled above to allow reset commands
3240 * to complete even if no data clocks are present.
3241 *
3242 * Disable master clock mode for normal communications because
3243 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3244 * IRQ when in master clock mode.
3245 *
3246 * Leave master clock mode enabled for IRQ test because the
3247 * timer IRQ used by the test can only happen in master clock mode.
3248 */
3249 if (!info->testing_irq)
3250 clear_reg_bits(info, CHA + CCR0, BIT6);
3251
3252 tx_set_idle(info);
3253
3254 tx_stop(info);
3255 rx_stop(info);
3256 }
3257
3258 static void rx_stop(MGSLPC_INFO *info)
3259 {
3260 if (debug_level >= DEBUG_LEVEL_ISR)
3261 printk("%s(%d):rx_stop(%s)\n",
3262 __FILE__,__LINE__, info->device_name );
3263
3264 /* MODE:03 RAC Receiver Active, 0=inactive */
3265 clear_reg_bits(info, CHA + MODE, BIT3);
3266
3267 info->rx_enabled = false;
3268 info->rx_overflow = false;
3269 }
3270
3271 static void rx_start(MGSLPC_INFO *info)
3272 {
3273 if (debug_level >= DEBUG_LEVEL_ISR)
3274 printk("%s(%d):rx_start(%s)\n",
3275 __FILE__,__LINE__, info->device_name );
3276
3277 rx_reset_buffers(info);
3278 info->rx_enabled = false;
3279 info->rx_overflow = false;
3280
3281 /* MODE:03 RAC Receiver Active, 1=active */
3282 set_reg_bits(info, CHA + MODE, BIT3);
3283
3284 info->rx_enabled = true;
3285 }
3286
3287 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3288 {
3289 if (debug_level >= DEBUG_LEVEL_ISR)
3290 printk("%s(%d):tx_start(%s)\n",
3291 __FILE__,__LINE__, info->device_name );
3292
3293 if (info->tx_count) {
3294 /* If auto RTS enabled and RTS is inactive, then assert */
3295 /* RTS and set a flag indicating that the driver should */
3296 /* negate RTS when the transmission completes. */
3297 info->drop_rts_on_tx_done = false;
3298
3299 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3300 get_signals(info);
3301 if (!(info->serial_signals & SerialSignal_RTS)) {
3302 info->serial_signals |= SerialSignal_RTS;
3303 set_signals(info);
3304 info->drop_rts_on_tx_done = true;
3305 }
3306 }
3307
3308 if (info->params.mode == MGSL_MODE_ASYNC) {
3309 if (!info->tx_active) {
3310 info->tx_active = true;
3311 tx_ready(info, tty);
3312 }
3313 } else {
3314 info->tx_active = true;
3315 tx_ready(info, tty);
3316 mod_timer(&info->tx_timer, jiffies +
3317 msecs_to_jiffies(5000));
3318 }
3319 }
3320
3321 if (!info->tx_enabled)
3322 info->tx_enabled = true;
3323 }
3324
3325 static void tx_stop(MGSLPC_INFO *info)
3326 {
3327 if (debug_level >= DEBUG_LEVEL_ISR)
3328 printk("%s(%d):tx_stop(%s)\n",
3329 __FILE__,__LINE__, info->device_name );
3330
3331 del_timer(&info->tx_timer);
3332
3333 info->tx_enabled = false;
3334 info->tx_active = false;
3335 }
3336
3337 /* Reset the adapter to a known state and prepare it for further use.
3338 */
3339 static void reset_device(MGSLPC_INFO *info)
3340 {
3341 /* power up both channels (set BIT7) */
3342 write_reg(info, CHA + CCR0, 0x80);
3343 write_reg(info, CHB + CCR0, 0x80);
3344 write_reg(info, CHA + MODE, 0);
3345 write_reg(info, CHB + MODE, 0);
3346
3347 /* disable all interrupts */
3348 irq_disable(info, CHA, 0xffff);
3349 irq_disable(info, CHB, 0xffff);
3350 port_irq_disable(info, 0xff);
3351
3352 /* PCR Port Configuration Register
3353 *
3354 * 07..04 DEC[3..0] Serial I/F select outputs
3355 * 03 output, 1=AUTO CTS control enabled
3356 * 02 RI Ring Indicator input 0=active
3357 * 01 DSR input 0=active
3358 * 00 DTR output 0=active
3359 *
3360 * 0000 0110
3361 */
3362 write_reg(info, PCR, 0x06);
3363
3364 /* PVR Port Value Register
3365 *
3366 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3367 * 03 AUTO CTS output 1=enabled
3368 * 02 RI Ring Indicator input
3369 * 01 DSR input
3370 * 00 DTR output (1=inactive)
3371 *
3372 * 0000 0001
3373 */
3374 // write_reg(info, PVR, PVR_DTR);
3375
3376 /* IPC Interrupt Port Configuration
3377 *
3378 * 07 VIS 1=Masked interrupts visible
3379 * 06..05 Reserved, 0
3380 * 04..03 SLA Slave address, 00 ignored
3381 * 02 CASM Cascading Mode, 1=daisy chain
3382 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3383 *
3384 * 0000 0101
3385 */
3386 write_reg(info, IPC, 0x05);
3387 }
3388
3389 static void async_mode(MGSLPC_INFO *info)
3390 {
3391 unsigned char val;
3392
3393 /* disable all interrupts */
3394 irq_disable(info, CHA, 0xffff);
3395 irq_disable(info, CHB, 0xffff);
3396 port_irq_disable(info, 0xff);
3397
3398 /* MODE
3399 *
3400 * 07 Reserved, 0
3401 * 06 FRTS RTS State, 0=active
3402 * 05 FCTS Flow Control on CTS
3403 * 04 FLON Flow Control Enable
3404 * 03 RAC Receiver Active, 0 = inactive
3405 * 02 RTS 0=Auto RTS, 1=manual RTS
3406 * 01 TRS Timer Resolution, 1=512
3407 * 00 TLP Test Loop, 0 = no loop
3408 *
3409 * 0000 0110
3410 */
3411 val = 0x06;
3412 if (info->params.loopback)
3413 val |= BIT0;
3414
3415 /* preserve RTS state */
3416 if (!(info->serial_signals & SerialSignal_RTS))
3417 val |= BIT6;
3418 write_reg(info, CHA + MODE, val);
3419
3420 /* CCR0
3421 *
3422 * 07 PU Power Up, 1=active, 0=power down
3423 * 06 MCE Master Clock Enable, 1=enabled
3424 * 05 Reserved, 0
3425 * 04..02 SC[2..0] Encoding, 000=NRZ
3426 * 01..00 SM[1..0] Serial Mode, 11=Async
3427 *
3428 * 1000 0011
3429 */
3430 write_reg(info, CHA + CCR0, 0x83);
3431
3432 /* CCR1
3433 *
3434 * 07..05 Reserved, 0
3435 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3436 * 03 BCR Bit Clock Rate, 1=16x
3437 * 02..00 CM[2..0] Clock Mode, 111=BRG
3438 *
3439 * 0001 1111
3440 */
3441 write_reg(info, CHA + CCR1, 0x1f);
3442
3443 /* CCR2 (channel A)
3444 *
3445 * 07..06 BGR[9..8] Baud rate bits 9..8
3446 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3447 * 04 SSEL Clock source select, 1=submode b
3448 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3449 * 02 RWX Read/Write Exchange 0=disabled
3450 * 01 Reserved, 0
3451 * 00 DIV, data inversion 0=disabled, 1=enabled
3452 *
3453 * 0001 0000
3454 */
3455 write_reg(info, CHA + CCR2, 0x10);
3456
3457 /* CCR3
3458 *
3459 * 07..01 Reserved, 0
3460 * 00 PSD DPLL Phase Shift Disable
3461 *
3462 * 0000 0000
3463 */
3464 write_reg(info, CHA + CCR3, 0);
3465
3466 /* CCR4
3467 *
3468 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3469 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3470 * 05 TST1 Test Pin, 0=normal operation
3471 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3472 * 03..00 Reserved, must be 0
3473 *
3474 * 0101 0000
3475 */
3476 write_reg(info, CHA + CCR4, 0x50);
3477 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3478
3479 /* DAFO Data Format
3480 *
3481 * 07 Reserved, 0
3482 * 06 XBRK transmit break, 0=normal operation
3483 * 05 Stop bits (0=1, 1=2)
3484 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3485 * 02 PAREN Parity Enable
3486 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3487 *
3488 */
3489 val = 0x00;
3490 if (info->params.data_bits != 8)
3491 val |= BIT0; /* 7 bits */
3492 if (info->params.stop_bits != 1)
3493 val |= BIT5;
3494 if (info->params.parity != ASYNC_PARITY_NONE)
3495 {
3496 val |= BIT2; /* Parity enable */
3497 if (info->params.parity == ASYNC_PARITY_ODD)
3498 val |= BIT3;
3499 else
3500 val |= BIT4;
3501 }
3502 write_reg(info, CHA + DAFO, val);
3503
3504 /* RFC Rx FIFO Control
3505 *
3506 * 07 Reserved, 0
3507 * 06 DPS, 1=parity bit not stored in data byte
3508 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3509 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3510 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3511 * 01 Reserved, 0
3512 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3513 *
3514 * 0101 1100
3515 */
3516 write_reg(info, CHA + RFC, 0x5c);
3517
3518 /* RLCR Receive length check register
3519 *
3520 * Max frame length = (RL + 1) * 32
3521 */
3522 write_reg(info, CHA + RLCR, 0);
3523
3524 /* XBCH Transmit Byte Count High
3525 *
3526 * 07 DMA mode, 0 = interrupt driven
3527 * 06 NRM, 0=ABM (ignored)
3528 * 05 CAS Carrier Auto Start
3529 * 04 XC Transmit Continuously (ignored)
3530 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3531 *
3532 * 0000 0000
3533 */
3534 val = 0x00;
3535 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3536 val |= BIT5;
3537 write_reg(info, CHA + XBCH, val);
3538 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3539 irq_enable(info, CHA, IRQ_CTS);
3540
3541 /* MODE:03 RAC Receiver Active, 1=active */
3542 set_reg_bits(info, CHA + MODE, BIT3);
3543 enable_auxclk(info);
3544 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3545 irq_enable(info, CHB, IRQ_CTS);
3546 /* PVR[3] 1=AUTO CTS active */
3547 set_reg_bits(info, CHA + PVR, BIT3);
3548 } else
3549 clear_reg_bits(info, CHA + PVR, BIT3);
3550 irq_enable(info, CHA,
3551 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3552 IRQ_ALLSENT + IRQ_TXFIFO);
3553 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3554 wait_command_complete(info, CHA);
3555 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3556 }
3557
3558 /* Set the HDLC idle mode for the transmitter.
3559 */
3560 static void tx_set_idle(MGSLPC_INFO *info)
3561 {
3562 /* Note: ESCC2 only supports flags and one idle modes */
3563 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3564 set_reg_bits(info, CHA + CCR1, BIT3);
3565 else
3566 clear_reg_bits(info, CHA + CCR1, BIT3);
3567 }
3568
3569 /* get state of the V24 status (input) signals.
3570 */
3571 static void get_signals(MGSLPC_INFO *info)
3572 {
3573 unsigned char status = 0;
3574
3575 /* preserve DTR and RTS */
3576 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3577
3578 if (read_reg(info, CHB + VSTR) & BIT7)
3579 info->serial_signals |= SerialSignal_DCD;
3580 if (read_reg(info, CHB + STAR) & BIT1)
3581 info->serial_signals |= SerialSignal_CTS;
3582
3583 status = read_reg(info, CHA + PVR);
3584 if (!(status & PVR_RI))
3585 info->serial_signals |= SerialSignal_RI;
3586 if (!(status & PVR_DSR))
3587 info->serial_signals |= SerialSignal_DSR;
3588 }
3589
3590 /* Set the state of DTR and RTS based on contents of
3591 * serial_signals member of device extension.
3592 */
3593 static void set_signals(MGSLPC_INFO *info)
3594 {
3595 unsigned char val;
3596
3597 val = read_reg(info, CHA + MODE);
3598 if (info->params.mode == MGSL_MODE_ASYNC) {
3599 if (info->serial_signals & SerialSignal_RTS)
3600 val &= ~BIT6;
3601 else
3602 val |= BIT6;
3603 } else {
3604 if (info->serial_signals & SerialSignal_RTS)
3605 val |= BIT2;
3606 else
3607 val &= ~BIT2;
3608 }
3609 write_reg(info, CHA + MODE, val);
3610
3611 if (info->serial_signals & SerialSignal_DTR)
3612 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3613 else
3614 set_reg_bits(info, CHA + PVR, PVR_DTR);
3615 }
3616
3617 static void rx_reset_buffers(MGSLPC_INFO *info)
3618 {
3619 RXBUF *buf;
3620 int i;
3621
3622 info->rx_put = 0;
3623 info->rx_get = 0;
3624 info->rx_frame_count = 0;
3625 for (i=0 ; i < info->rx_buf_count ; i++) {
3626 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3627 buf->status = buf->count = 0;
3628 }
3629 }
3630
3631 /* Attempt to return a received HDLC frame
3632 * Only frames received without errors are returned.
3633 *
3634 * Returns true if frame returned, otherwise false
3635 */
3636 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3637 {
3638 unsigned short status;
3639 RXBUF *buf;
3640 unsigned int framesize = 0;
3641 unsigned long flags;
3642 bool return_frame = false;
3643
3644 if (info->rx_frame_count == 0)
3645 return false;
3646
3647 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3648
3649 status = buf->status;
3650
3651 /* 07 VFR 1=valid frame
3652 * 06 RDO 1=data overrun
3653 * 05 CRC 1=OK, 0=error
3654 * 04 RAB 1=frame aborted
3655 */
3656 if ((status & 0xf0) != 0xA0) {
3657 if (!(status & BIT7) || (status & BIT4))
3658 info->icount.rxabort++;
3659 else if (status & BIT6)
3660 info->icount.rxover++;
3661 else if (!(status & BIT5)) {
3662 info->icount.rxcrc++;
3663 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3664 return_frame = true;
3665 }
3666 framesize = 0;
3667 #if SYNCLINK_GENERIC_HDLC
3668 {
3669 info->netdev->stats.rx_errors++;
3670 info->netdev->stats.rx_frame_errors++;
3671 }
3672 #endif
3673 } else
3674 return_frame = true;
3675
3676 if (return_frame)
3677 framesize = buf->count;
3678
3679 if (debug_level >= DEBUG_LEVEL_BH)
3680 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3681 __FILE__,__LINE__,info->device_name,status,framesize);
3682
3683 if (debug_level >= DEBUG_LEVEL_DATA)
3684 trace_block(info, buf->data, framesize, 0);
3685
3686 if (framesize) {
3687 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3688 framesize+1 > info->max_frame_size) ||
3689 framesize > info->max_frame_size)
3690 info->icount.rxlong++;
3691 else {
3692 if (status & BIT5)
3693 info->icount.rxok++;
3694
3695 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3696 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3697 ++framesize;
3698 }
3699
3700 #if SYNCLINK_GENERIC_HDLC
3701 if (info->netcount)
3702 hdlcdev_rx(info, buf->data, framesize);
3703 else
3704 #endif
3705 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3706 }
3707 }
3708
3709 spin_lock_irqsave(&info->lock,flags);
3710 buf->status = buf->count = 0;
3711 info->rx_frame_count--;
3712 info->rx_get++;
3713 if (info->rx_get >= info->rx_buf_count)
3714 info->rx_get = 0;
3715 spin_unlock_irqrestore(&info->lock,flags);
3716
3717 return true;
3718 }
3719
3720 static bool register_test(MGSLPC_INFO *info)
3721 {
3722 static unsigned char patterns[] =
3723 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3724 static unsigned int count = ARRAY_SIZE(patterns);
3725 unsigned int i;
3726 bool rc = true;
3727 unsigned long flags;
3728
3729 spin_lock_irqsave(&info->lock,flags);
3730 reset_device(info);
3731
3732 for (i = 0; i < count; i++) {
3733 write_reg(info, XAD1, patterns[i]);
3734 write_reg(info, XAD2, patterns[(i + 1) % count]);
3735 if ((read_reg(info, XAD1) != patterns[i]) ||
3736 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3737 rc = false;
3738 break;
3739 }
3740 }
3741
3742 spin_unlock_irqrestore(&info->lock,flags);
3743 return rc;
3744 }
3745
3746 static bool irq_test(MGSLPC_INFO *info)
3747 {
3748 unsigned long end_time;
3749 unsigned long flags;
3750
3751 spin_lock_irqsave(&info->lock,flags);
3752 reset_device(info);
3753
3754 info->testing_irq = true;
3755 hdlc_mode(info);
3756
3757 info->irq_occurred = false;
3758
3759 /* init hdlc mode */
3760
3761 irq_enable(info, CHA, IRQ_TIMER);
3762 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3763 issue_command(info, CHA, CMD_START_TIMER);
3764
3765 spin_unlock_irqrestore(&info->lock,flags);
3766
3767 end_time=100;
3768 while(end_time-- && !info->irq_occurred) {
3769 msleep_interruptible(10);
3770 }
3771
3772 info->testing_irq = false;
3773
3774 spin_lock_irqsave(&info->lock,flags);
3775 reset_device(info);
3776 spin_unlock_irqrestore(&info->lock,flags);
3777
3778 return info->irq_occurred;
3779 }
3780
3781 static int adapter_test(MGSLPC_INFO *info)
3782 {
3783 if (!register_test(info)) {
3784 info->init_error = DiagStatus_AddressFailure;
3785 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
3786 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
3787 return -ENODEV;
3788 }
3789
3790 if (!irq_test(info)) {
3791 info->init_error = DiagStatus_IrqFailure;
3792 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3793 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
3794 return -ENODEV;
3795 }
3796
3797 if (debug_level >= DEBUG_LEVEL_INFO)
3798 printk("%s(%d):device %s passed diagnostics\n",
3799 __FILE__,__LINE__,info->device_name);
3800 return 0;
3801 }
3802
3803 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3804 {
3805 int i;
3806 int linecount;
3807 if (xmit)
3808 printk("%s tx data:\n",info->device_name);
3809 else
3810 printk("%s rx data:\n",info->device_name);
3811
3812 while(count) {
3813 if (count > 16)
3814 linecount = 16;
3815 else
3816 linecount = count;
3817
3818 for(i=0;i<linecount;i++)
3819 printk("%02X ",(unsigned char)data[i]);
3820 for(;i<17;i++)
3821 printk(" ");
3822 for(i=0;i<linecount;i++) {
3823 if (data[i]>=040 && data[i]<=0176)
3824 printk("%c",data[i]);
3825 else
3826 printk(".");
3827 }
3828 printk("\n");
3829
3830 data += linecount;
3831 count -= linecount;
3832 }
3833 }
3834
3835 /* HDLC frame time out
3836 * update stats and do tx completion processing
3837 */
3838 static void tx_timeout(unsigned long context)
3839 {
3840 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3841 unsigned long flags;
3842
3843 if ( debug_level >= DEBUG_LEVEL_INFO )
3844 printk( "%s(%d):tx_timeout(%s)\n",
3845 __FILE__,__LINE__,info->device_name);
3846 if(info->tx_active &&
3847 info->params.mode == MGSL_MODE_HDLC) {
3848 info->icount.txtimeout++;
3849 }
3850 spin_lock_irqsave(&info->lock,flags);
3851 info->tx_active = false;
3852 info->tx_count = info->tx_put = info->tx_get = 0;
3853
3854 spin_unlock_irqrestore(&info->lock,flags);
3855
3856 #if SYNCLINK_GENERIC_HDLC
3857 if (info->netcount)
3858 hdlcdev_tx_done(info);
3859 else
3860 #endif
3861 {
3862 struct tty_struct *tty = tty_port_tty_get(&info->port);
3863 bh_transmit(info, tty);
3864 tty_kref_put(tty);
3865 }
3866 }
3867
3868 #if SYNCLINK_GENERIC_HDLC
3869
3870 /**
3871 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3872 * set encoding and frame check sequence (FCS) options
3873 *
3874 * dev pointer to network device structure
3875 * encoding serial encoding setting
3876 * parity FCS setting
3877 *
3878 * returns 0 if success, otherwise error code
3879 */
3880 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3881 unsigned short parity)
3882 {
3883 MGSLPC_INFO *info = dev_to_port(dev);
3884 struct tty_struct *tty;
3885 unsigned char new_encoding;
3886 unsigned short new_crctype;
3887
3888 /* return error if TTY interface open */
3889 if (info->port.count)
3890 return -EBUSY;
3891
3892 switch (encoding)
3893 {
3894 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
3895 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3896 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3897 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3898 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3899 default: return -EINVAL;
3900 }
3901
3902 switch (parity)
3903 {
3904 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
3905 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3906 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3907 default: return -EINVAL;
3908 }
3909
3910 info->params.encoding = new_encoding;
3911 info->params.crc_type = new_crctype;
3912
3913 /* if network interface up, reprogram hardware */
3914 if (info->netcount) {
3915 tty = tty_port_tty_get(&info->port);
3916 mgslpc_program_hw(info, tty);
3917 tty_kref_put(tty);
3918 }
3919
3920 return 0;
3921 }
3922
3923 /**
3924 * called by generic HDLC layer to send frame
3925 *
3926 * skb socket buffer containing HDLC frame
3927 * dev pointer to network device structure
3928 */
3929 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3930 struct net_device *dev)
3931 {
3932 MGSLPC_INFO *info = dev_to_port(dev);
3933 unsigned long flags;
3934
3935 if (debug_level >= DEBUG_LEVEL_INFO)
3936 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
3937
3938 /* stop sending until this frame completes */
3939 netif_stop_queue(dev);
3940
3941 /* copy data to device buffers */
3942 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3943 info->tx_get = 0;
3944 info->tx_put = info->tx_count = skb->len;
3945
3946 /* update network statistics */
3947 dev->stats.tx_packets++;
3948 dev->stats.tx_bytes += skb->len;
3949
3950 /* done with socket buffer, so free it */
3951 dev_kfree_skb(skb);
3952
3953 /* save start time for transmit timeout detection */
3954 dev->trans_start = jiffies;
3955
3956 /* start hardware transmitter if necessary */
3957 spin_lock_irqsave(&info->lock,flags);
3958 if (!info->tx_active) {
3959 struct tty_struct *tty = tty_port_tty_get(&info->port);
3960 tx_start(info, tty);
3961 tty_kref_put(tty);
3962 }
3963 spin_unlock_irqrestore(&info->lock,flags);
3964
3965 return NETDEV_TX_OK;
3966 }
3967
3968 /**
3969 * called by network layer when interface enabled
3970 * claim resources and initialize hardware
3971 *
3972 * dev pointer to network device structure
3973 *
3974 * returns 0 if success, otherwise error code
3975 */
3976 static int hdlcdev_open(struct net_device *dev)
3977 {
3978 MGSLPC_INFO *info = dev_to_port(dev);
3979 struct tty_struct *tty;
3980 int rc;
3981 unsigned long flags;
3982
3983 if (debug_level >= DEBUG_LEVEL_INFO)
3984 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
3985
3986 /* generic HDLC layer open processing */
3987 if ((rc = hdlc_open(dev)))
3988 return rc;
3989
3990 /* arbitrate between network and tty opens */
3991 spin_lock_irqsave(&info->netlock, flags);
3992 if (info->port.count != 0 || info->netcount != 0) {
3993 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
3994 spin_unlock_irqrestore(&info->netlock, flags);
3995 return -EBUSY;
3996 }
3997 info->netcount=1;
3998 spin_unlock_irqrestore(&info->netlock, flags);
3999
4000 tty = tty_port_tty_get(&info->port);
4001 /* claim resources and init adapter */
4002 if ((rc = startup(info, tty)) != 0) {
4003 tty_kref_put(tty);
4004 spin_lock_irqsave(&info->netlock, flags);
4005 info->netcount=0;
4006 spin_unlock_irqrestore(&info->netlock, flags);
4007 return rc;
4008 }
4009 /* assert DTR and RTS, apply hardware settings */
4010 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4011 mgslpc_program_hw(info, tty);
4012 tty_kref_put(tty);
4013
4014 /* enable network layer transmit */
4015 dev->trans_start = jiffies;
4016 netif_start_queue(dev);
4017
4018 /* inform generic HDLC layer of current DCD status */
4019 spin_lock_irqsave(&info->lock, flags);
4020 get_signals(info);
4021 spin_unlock_irqrestore(&info->lock, flags);
4022 if (info->serial_signals & SerialSignal_DCD)
4023 netif_carrier_on(dev);
4024 else
4025 netif_carrier_off(dev);
4026 return 0;
4027 }
4028
4029 /**
4030 * called by network layer when interface is disabled
4031 * shutdown hardware and release resources
4032 *
4033 * dev pointer to network device structure
4034 *
4035 * returns 0 if success, otherwise error code
4036 */
4037 static int hdlcdev_close(struct net_device *dev)
4038 {
4039 MGSLPC_INFO *info = dev_to_port(dev);
4040 struct tty_struct *tty = tty_port_tty_get(&info->port);
4041 unsigned long flags;
4042
4043 if (debug_level >= DEBUG_LEVEL_INFO)
4044 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4045
4046 netif_stop_queue(dev);
4047
4048 /* shutdown adapter and release resources */
4049 shutdown(info, tty);
4050 tty_kref_put(tty);
4051 hdlc_close(dev);
4052
4053 spin_lock_irqsave(&info->netlock, flags);
4054 info->netcount=0;
4055 spin_unlock_irqrestore(&info->netlock, flags);
4056
4057 return 0;
4058 }
4059
4060 /**
4061 * called by network layer to process IOCTL call to network device
4062 *
4063 * dev pointer to network device structure
4064 * ifr pointer to network interface request structure
4065 * cmd IOCTL command code
4066 *
4067 * returns 0 if success, otherwise error code
4068 */
4069 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4070 {
4071 const size_t size = sizeof(sync_serial_settings);
4072 sync_serial_settings new_line;
4073 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4074 MGSLPC_INFO *info = dev_to_port(dev);
4075 unsigned int flags;
4076
4077 if (debug_level >= DEBUG_LEVEL_INFO)
4078 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4079
4080 /* return error if TTY interface open */
4081 if (info->port.count)
4082 return -EBUSY;
4083
4084 if (cmd != SIOCWANDEV)
4085 return hdlc_ioctl(dev, ifr, cmd);
4086
4087 memset(&new_line, 0, size);
4088
4089 switch(ifr->ifr_settings.type) {
4090 case IF_GET_IFACE: /* return current sync_serial_settings */
4091
4092 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4093 if (ifr->ifr_settings.size < size) {
4094 ifr->ifr_settings.size = size; /* data size wanted */
4095 return -ENOBUFS;
4096 }
4097
4098 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4099 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4100 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4101 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4102
4103 switch (flags){
4104 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4105 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4106 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4107 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4108 default: new_line.clock_type = CLOCK_DEFAULT;
4109 }
4110
4111 new_line.clock_rate = info->params.clock_speed;
4112 new_line.loopback = info->params.loopback ? 1:0;
4113
4114 if (copy_to_user(line, &new_line, size))
4115 return -EFAULT;
4116 return 0;
4117
4118 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4119
4120 if(!capable(CAP_NET_ADMIN))
4121 return -EPERM;
4122 if (copy_from_user(&new_line, line, size))
4123 return -EFAULT;
4124
4125 switch (new_line.clock_type)
4126 {
4127 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4128 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4129 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4130 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4131 case CLOCK_DEFAULT: flags = info->params.flags &
4132 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4133 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4134 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4135 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4136 default: return -EINVAL;
4137 }
4138
4139 if (new_line.loopback != 0 && new_line.loopback != 1)
4140 return -EINVAL;
4141
4142 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4143 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4144 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4145 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4146 info->params.flags |= flags;
4147
4148 info->params.loopback = new_line.loopback;
4149
4150 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4151 info->params.clock_speed = new_line.clock_rate;
4152 else
4153 info->params.clock_speed = 0;
4154
4155 /* if network interface up, reprogram hardware */
4156 if (info->netcount) {
4157 struct tty_struct *tty = tty_port_tty_get(&info->port);
4158 mgslpc_program_hw(info, tty);
4159 tty_kref_put(tty);
4160 }
4161 return 0;
4162
4163 default:
4164 return hdlc_ioctl(dev, ifr, cmd);
4165 }
4166 }
4167
4168 /**
4169 * called by network layer when transmit timeout is detected
4170 *
4171 * dev pointer to network device structure
4172 */
4173 static void hdlcdev_tx_timeout(struct net_device *dev)
4174 {
4175 MGSLPC_INFO *info = dev_to_port(dev);
4176 unsigned long flags;
4177
4178 if (debug_level >= DEBUG_LEVEL_INFO)
4179 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4180
4181 dev->stats.tx_errors++;
4182 dev->stats.tx_aborted_errors++;
4183
4184 spin_lock_irqsave(&info->lock,flags);
4185 tx_stop(info);
4186 spin_unlock_irqrestore(&info->lock,flags);
4187
4188 netif_wake_queue(dev);
4189 }
4190
4191 /**
4192 * called by device driver when transmit completes
4193 * reenable network layer transmit if stopped
4194 *
4195 * info pointer to device instance information
4196 */
4197 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4198 {
4199 if (netif_queue_stopped(info->netdev))
4200 netif_wake_queue(info->netdev);
4201 }
4202
4203 /**
4204 * called by device driver when frame received
4205 * pass frame to network layer
4206 *
4207 * info pointer to device instance information
4208 * buf pointer to buffer contianing frame data
4209 * size count of data bytes in buf
4210 */
4211 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4212 {
4213 struct sk_buff *skb = dev_alloc_skb(size);
4214 struct net_device *dev = info->netdev;
4215
4216 if (debug_level >= DEBUG_LEVEL_INFO)
4217 printk("hdlcdev_rx(%s)\n",dev->name);
4218
4219 if (skb == NULL) {
4220 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4221 dev->stats.rx_dropped++;
4222 return;
4223 }
4224
4225 memcpy(skb_put(skb, size), buf, size);
4226
4227 skb->protocol = hdlc_type_trans(skb, dev);
4228
4229 dev->stats.rx_packets++;
4230 dev->stats.rx_bytes += size;
4231
4232 netif_rx(skb);
4233 }
4234
4235 static const struct net_device_ops hdlcdev_ops = {
4236 .ndo_open = hdlcdev_open,
4237 .ndo_stop = hdlcdev_close,
4238 .ndo_change_mtu = hdlc_change_mtu,
4239 .ndo_start_xmit = hdlc_start_xmit,
4240 .ndo_do_ioctl = hdlcdev_ioctl,
4241 .ndo_tx_timeout = hdlcdev_tx_timeout,
4242 };
4243
4244 /**
4245 * called by device driver when adding device instance
4246 * do generic HDLC initialization
4247 *
4248 * info pointer to device instance information
4249 *
4250 * returns 0 if success, otherwise error code
4251 */
4252 static int hdlcdev_init(MGSLPC_INFO *info)
4253 {
4254 int rc;
4255 struct net_device *dev;
4256 hdlc_device *hdlc;
4257
4258 /* allocate and initialize network and HDLC layer objects */
4259
4260 if (!(dev = alloc_hdlcdev(info))) {
4261 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4262 return -ENOMEM;
4263 }
4264
4265 /* for network layer reporting purposes only */
4266 dev->base_addr = info->io_base;
4267 dev->irq = info->irq_level;
4268
4269 /* network layer callbacks and settings */
4270 dev->netdev_ops = &hdlcdev_ops;
4271 dev->watchdog_timeo = 10 * HZ;
4272 dev->tx_queue_len = 50;
4273
4274 /* generic HDLC layer callbacks and settings */
4275 hdlc = dev_to_hdlc(dev);
4276 hdlc->attach = hdlcdev_attach;
4277 hdlc->xmit = hdlcdev_xmit;
4278
4279 /* register objects with HDLC layer */
4280 if ((rc = register_hdlc_device(dev))) {
4281 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4282 free_netdev(dev);
4283 return rc;
4284 }
4285
4286 info->netdev = dev;
4287 return 0;
4288 }
4289
4290 /**
4291 * called by device driver when removing device instance
4292 * do generic HDLC cleanup
4293 *
4294 * info pointer to device instance information
4295 */
4296 static void hdlcdev_exit(MGSLPC_INFO *info)
4297 {
4298 unregister_hdlc_device(info->netdev);
4299 free_netdev(info->netdev);
4300 info->netdev = NULL;
4301 }
4302
4303 #endif /* CONFIG_HDLC */
4304
Linux 2.6 libata-dev (mirror)