drm/i915: use correct SPD type value
[linux-2.6/libata-dev.git] / drivers / gpu / drm / i915 / intel_drv.h
blobbd9a604b73da2f07aefdfae712135a5c256f18f7
1 /*
2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
25 #ifndef __INTEL_DRV_H__
26 #define __INTEL_DRV_H__
28 #include <linux/i2c.h>
29 #include "i915_drv.h"
30 #include "drm_crtc.h"
31 #include "drm_crtc_helper.h"
32 #include "drm_fb_helper.h"
34 #define _wait_for(COND, MS, W) ({ \
35 unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \
36 int ret__ = 0; \
37 while (!(COND)) { \
38 if (time_after(jiffies, timeout__)) { \
39 ret__ = -ETIMEDOUT; \
40 break; \
41 } \
42 if (W && !(in_atomic() || in_dbg_master())) msleep(W); \
43 } \
44 ret__; \
47 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
48 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
50 #define MSLEEP(x) do { \
51 if (in_dbg_master()) \
52 mdelay(x); \
53 else \
54 msleep(x); \
55 } while (0)
57 #define KHz(x) (1000*x)
58 #define MHz(x) KHz(1000*x)
61 * Display related stuff
64 /* store information about an Ixxx DVO */
65 /* The i830->i865 use multiple DVOs with multiple i2cs */
66 /* the i915, i945 have a single sDVO i2c bus - which is different */
67 #define MAX_OUTPUTS 6
68 /* maximum connectors per crtcs in the mode set */
69 #define INTELFB_CONN_LIMIT 4
71 #define INTEL_I2C_BUS_DVO 1
72 #define INTEL_I2C_BUS_SDVO 2
74 /* these are outputs from the chip - integrated only
75 external chips are via DVO or SDVO output */
76 #define INTEL_OUTPUT_UNUSED 0
77 #define INTEL_OUTPUT_ANALOG 1
78 #define INTEL_OUTPUT_DVO 2
79 #define INTEL_OUTPUT_SDVO 3
80 #define INTEL_OUTPUT_LVDS 4
81 #define INTEL_OUTPUT_TVOUT 5
82 #define INTEL_OUTPUT_HDMI 6
83 #define INTEL_OUTPUT_DISPLAYPORT 7
84 #define INTEL_OUTPUT_EDP 8
86 /* Intel Pipe Clone Bit */
87 #define INTEL_HDMIB_CLONE_BIT 1
88 #define INTEL_HDMIC_CLONE_BIT 2
89 #define INTEL_HDMID_CLONE_BIT 3
90 #define INTEL_HDMIE_CLONE_BIT 4
91 #define INTEL_HDMIF_CLONE_BIT 5
92 #define INTEL_SDVO_NON_TV_CLONE_BIT 6
93 #define INTEL_SDVO_TV_CLONE_BIT 7
94 #define INTEL_SDVO_LVDS_CLONE_BIT 8
95 #define INTEL_ANALOG_CLONE_BIT 9
96 #define INTEL_TV_CLONE_BIT 10
97 #define INTEL_DP_B_CLONE_BIT 11
98 #define INTEL_DP_C_CLONE_BIT 12
99 #define INTEL_DP_D_CLONE_BIT 13
100 #define INTEL_LVDS_CLONE_BIT 14
101 #define INTEL_DVO_TMDS_CLONE_BIT 15
102 #define INTEL_DVO_LVDS_CLONE_BIT 16
103 #define INTEL_EDP_CLONE_BIT 17
105 #define INTEL_DVO_CHIP_NONE 0
106 #define INTEL_DVO_CHIP_LVDS 1
107 #define INTEL_DVO_CHIP_TMDS 2
108 #define INTEL_DVO_CHIP_TVOUT 4
110 /* drm_display_mode->private_flags */
111 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
112 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
114 static inline void
115 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
116 int multiplier)
118 mode->clock *= multiplier;
119 mode->private_flags |= multiplier;
122 static inline int
123 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
125 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
128 struct intel_framebuffer {
129 struct drm_framebuffer base;
130 struct drm_i915_gem_object *obj;
133 struct intel_fbdev {
134 struct drm_fb_helper helper;
135 struct intel_framebuffer ifb;
136 struct list_head fbdev_list;
137 struct drm_display_mode *our_mode;
140 struct intel_encoder {
141 struct drm_encoder base;
142 int type;
143 bool needs_tv_clock;
144 void (*hot_plug)(struct intel_encoder *);
145 int crtc_mask;
146 int clone_mask;
149 struct intel_connector {
150 struct drm_connector base;
151 struct intel_encoder *encoder;
154 struct intel_crtc {
155 struct drm_crtc base;
156 enum pipe pipe;
157 enum plane plane;
158 u8 lut_r[256], lut_g[256], lut_b[256];
159 int dpms_mode;
160 bool active; /* is the crtc on? independent of the dpms mode */
161 bool busy; /* is scanout buffer being updated frequently? */
162 struct timer_list idle_timer;
163 bool lowfreq_avail;
164 struct intel_overlay *overlay;
165 struct intel_unpin_work *unpin_work;
166 int fdi_lanes;
168 struct drm_i915_gem_object *cursor_bo;
169 uint32_t cursor_addr;
170 int16_t cursor_x, cursor_y;
171 int16_t cursor_width, cursor_height;
172 bool cursor_visible;
173 unsigned int bpp;
175 bool no_pll; /* tertiary pipe for IVB */
176 bool use_pll_a;
179 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
180 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
181 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
182 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
184 #define DIP_HEADER_SIZE 5
186 #define DIP_TYPE_AVI 0x82
187 #define DIP_VERSION_AVI 0x2
188 #define DIP_LEN_AVI 13
190 #define DIP_TYPE_SPD 0x83
191 #define DIP_VERSION_SPD 0x1
192 #define DIP_LEN_SPD 25
193 #define DIP_SPD_UNKNOWN 0
194 #define DIP_SPD_DSTB 0x1
195 #define DIP_SPD_DVDP 0x2
196 #define DIP_SPD_DVHS 0x3
197 #define DIP_SPD_HDDVR 0x4
198 #define DIP_SPD_DVC 0x5
199 #define DIP_SPD_DSC 0x6
200 #define DIP_SPD_VCD 0x7
201 #define DIP_SPD_GAME 0x8
202 #define DIP_SPD_PC 0x9
203 #define DIP_SPD_BD 0xa
204 #define DIP_SPD_SCD 0xb
206 struct dip_infoframe {
207 uint8_t type; /* HB0 */
208 uint8_t ver; /* HB1 */
209 uint8_t len; /* HB2 - body len, not including checksum */
210 uint8_t ecc; /* Header ECC */
211 uint8_t checksum; /* PB0 */
212 union {
213 struct {
214 /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
215 uint8_t Y_A_B_S;
216 /* PB2 - C 7:6, M 5:4, R 3:0 */
217 uint8_t C_M_R;
218 /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
219 uint8_t ITC_EC_Q_SC;
220 /* PB4 - VIC 6:0 */
221 uint8_t VIC;
222 /* PB5 - PR 3:0 */
223 uint8_t PR;
224 /* PB6 to PB13 */
225 uint16_t top_bar_end;
226 uint16_t bottom_bar_start;
227 uint16_t left_bar_end;
228 uint16_t right_bar_start;
229 } avi;
230 struct {
231 uint8_t vn[8];
232 uint8_t pd[16];
233 uint8_t sdi;
234 } spd;
235 uint8_t payload[27];
236 } __attribute__ ((packed)) body;
237 } __attribute__((packed));
239 static inline struct drm_crtc *
240 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
242 struct drm_i915_private *dev_priv = dev->dev_private;
243 return dev_priv->pipe_to_crtc_mapping[pipe];
246 static inline struct drm_crtc *
247 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
249 struct drm_i915_private *dev_priv = dev->dev_private;
250 return dev_priv->plane_to_crtc_mapping[plane];
253 struct intel_unpin_work {
254 struct work_struct work;
255 struct drm_device *dev;
256 struct drm_i915_gem_object *old_fb_obj;
257 struct drm_i915_gem_object *pending_flip_obj;
258 struct drm_pending_vblank_event *event;
259 int pending;
260 bool enable_stall_check;
263 struct intel_fbc_work {
264 struct delayed_work work;
265 struct drm_crtc *crtc;
266 struct drm_framebuffer *fb;
267 int interval;
270 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
271 extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
273 extern void intel_attach_force_audio_property(struct drm_connector *connector);
274 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
276 extern void intel_crt_init(struct drm_device *dev);
277 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
278 void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
279 extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
280 extern void intel_dvo_init(struct drm_device *dev);
281 extern void intel_tv_init(struct drm_device *dev);
282 extern void intel_mark_busy(struct drm_device *dev,
283 struct drm_i915_gem_object *obj);
284 extern bool intel_lvds_init(struct drm_device *dev);
285 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
286 void
287 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
288 struct drm_display_mode *adjusted_mode);
289 extern bool intel_dpd_is_edp(struct drm_device *dev);
290 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
291 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
293 /* intel_panel.c */
294 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
295 struct drm_display_mode *adjusted_mode);
296 extern void intel_pch_panel_fitting(struct drm_device *dev,
297 int fitting_mode,
298 struct drm_display_mode *mode,
299 struct drm_display_mode *adjusted_mode);
300 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
301 extern u32 intel_panel_get_backlight(struct drm_device *dev);
302 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
303 extern int intel_panel_setup_backlight(struct drm_device *dev);
304 extern void intel_panel_enable_backlight(struct drm_device *dev);
305 extern void intel_panel_disable_backlight(struct drm_device *dev);
306 extern void intel_panel_destroy_backlight(struct drm_device *dev);
307 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
309 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
310 extern void intel_encoder_prepare(struct drm_encoder *encoder);
311 extern void intel_encoder_commit(struct drm_encoder *encoder);
312 extern void intel_encoder_destroy(struct drm_encoder *encoder);
314 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
316 return to_intel_connector(connector)->encoder;
319 extern void intel_connector_attach_encoder(struct intel_connector *connector,
320 struct intel_encoder *encoder);
321 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
323 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
324 struct drm_crtc *crtc);
325 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
326 struct drm_file *file_priv);
327 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
328 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
330 struct intel_load_detect_pipe {
331 struct drm_framebuffer *release_fb;
332 bool load_detect_temp;
333 int dpms_mode;
335 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
336 struct drm_connector *connector,
337 struct drm_display_mode *mode,
338 struct intel_load_detect_pipe *old);
339 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
340 struct drm_connector *connector,
341 struct intel_load_detect_pipe *old);
343 extern void intelfb_restore(void);
344 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
345 u16 blue, int regno);
346 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
347 u16 *blue, int regno);
348 extern void intel_enable_clock_gating(struct drm_device *dev);
349 extern void ironlake_enable_drps(struct drm_device *dev);
350 extern void ironlake_disable_drps(struct drm_device *dev);
351 extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
352 extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
353 extern void gen6_disable_rps(struct drm_device *dev);
354 extern void intel_init_emon(struct drm_device *dev);
356 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
357 struct drm_i915_gem_object *obj,
358 struct intel_ring_buffer *pipelined);
360 extern int intel_framebuffer_init(struct drm_device *dev,
361 struct intel_framebuffer *ifb,
362 struct drm_mode_fb_cmd *mode_cmd,
363 struct drm_i915_gem_object *obj);
364 extern int intel_fbdev_init(struct drm_device *dev);
365 extern void intel_fbdev_fini(struct drm_device *dev);
367 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
368 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
369 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
371 extern void intel_setup_overlay(struct drm_device *dev);
372 extern void intel_cleanup_overlay(struct drm_device *dev);
373 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
374 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
375 struct drm_file *file_priv);
376 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
377 struct drm_file *file_priv);
379 extern void intel_fb_output_poll_changed(struct drm_device *dev);
380 extern void intel_fb_restore_mode(struct drm_device *dev);
382 extern void intel_init_clock_gating(struct drm_device *dev);
383 extern void intel_write_eld(struct drm_encoder *encoder,
384 struct drm_display_mode *mode);
385 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
387 #endif /* __INTEL_DRV_H__ */