2 * MPC8313E RDB Device Tree Source
4 * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "MPC8313ERDB";
16 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <16384>;
38 i-cache-size = <16384>;
39 timebase-frequency = <0>; // from bootloader
40 bus-frequency = <0>; // from bootloader
41 clock-frequency = <0>; // from bootloader
46 device_type = "memory";
47 reg = <0x00000000 0x08000000>; // 128MB at 0
53 compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
54 reg = <0xe0005000 0x1000>;
55 interrupts = <77 0x8>;
56 interrupt-parent = <&ipic>;
58 // CS0 and CS1 are swapped when
59 // booting from nand, but the
60 // addresses are the same.
61 ranges = <0x0 0x0 0xfe000000 0x00800000
62 0x1 0x0 0xe2800000 0x00008000
63 0x2 0x0 0xf0000000 0x00020000
64 0x3 0x0 0xfa000000 0x00008000>;
69 compatible = "cfi-flash";
70 reg = <0x0 0x0 0x800000>;
78 compatible = "fsl,mpc8313-fcm-nand",
80 reg = <0x1 0x0 0x2000>;
88 reg = <0x100000 0x300000>;
92 reg = <0x400000 0x1c00000>;
101 compatible = "simple-bus";
102 ranges = <0x0 0xe0000000 0x00100000>;
103 reg = <0xe0000000 0x00000200>;
107 device_type = "watchdog";
108 compatible = "mpc83xx_wdt";
113 #address-cells = <1>;
115 compatible = "simple-bus";
116 sleep = <&pmc 0x03000000>;
120 #address-cells = <1>;
123 compatible = "fsl-i2c";
124 reg = <0x3000 0x100>;
125 interrupts = <14 0x8>;
126 interrupt-parent = <&ipic>;
129 compatible = "dallas,ds1339";
135 compatible = "fsl,sec2.2", "fsl,sec2.1",
137 reg = <0x30000 0x10000>;
138 interrupts = <11 0x8>;
139 interrupt-parent = <&ipic>;
140 fsl,num-channels = <1>;
141 fsl,channel-fifo-len = <24>;
142 fsl,exec-units-mask = <0x4c>;
143 fsl,descriptor-types-mask = <0x0122003f>;
148 #address-cells = <1>;
151 compatible = "fsl-i2c";
152 reg = <0x3100 0x100>;
153 interrupts = <15 0x8>;
154 interrupt-parent = <&ipic>;
160 compatible = "fsl,spi";
161 reg = <0x7000 0x1000>;
162 interrupts = <16 0x8>;
163 interrupt-parent = <&ipic>;
167 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
169 compatible = "fsl-usb2-dr";
170 reg = <0x23000 0x1000>;
171 #address-cells = <1>;
173 interrupt-parent = <&ipic>;
174 interrupts = <38 0x8>;
175 phy_type = "utmi_wide";
176 sleep = <&pmc 0x00300000>;
179 enet0: ethernet@24000 {
180 #address-cells = <1>;
182 sleep = <&pmc 0x20000000>;
186 device_type = "network";
188 compatible = "gianfar";
189 reg = <0x24000 0x1000>;
190 local-mac-address = [ 00 00 00 00 00 00 ];
191 interrupts = <37 0x8 36 0x8 35 0x8>;
192 interrupt-parent = <&ipic>;
193 tbi-handle = < &tbi0 >;
194 phy-handle = < &phy1 >;
198 #address-cells = <1>;
200 compatible = "fsl,gianfar-mdio";
201 reg = <0x24520 0x20>;
202 phy1: ethernet-phy@1 {
203 interrupt-parent = <&ipic>;
204 interrupts = <19 0x8>;
206 device_type = "ethernet-phy";
208 phy4: ethernet-phy@4 {
209 interrupt-parent = <&ipic>;
210 interrupts = <20 0x8>;
212 device_type = "ethernet-phy";
216 device_type = "tbi-phy";
221 enet1: ethernet@25000 {
222 #address-cells = <1>;
225 device_type = "network";
227 compatible = "gianfar";
228 reg = <0x25000 0x1000>;
229 local-mac-address = [ 00 00 00 00 00 00 ];
230 interrupts = <34 0x8 33 0x8 32 0x8>;
231 interrupt-parent = <&ipic>;
232 tbi-handle = < &tbi1 >;
233 phy-handle = < &phy4 >;
234 sleep = <&pmc 0x10000000>;
238 #address-cells = <1>;
240 compatible = "fsl,gianfar-tbi";
241 reg = <0x25520 0x20>;
245 device_type = "tbi-phy";
252 serial0: serial@4500 {
254 device_type = "serial";
255 compatible = "ns16550";
256 reg = <0x4500 0x100>;
257 clock-frequency = <0>;
258 interrupts = <9 0x8>;
259 interrupt-parent = <&ipic>;
262 serial1: serial@4600 {
264 device_type = "serial";
265 compatible = "ns16550";
266 reg = <0x4600 0x100>;
267 clock-frequency = <0>;
268 interrupts = <10 0x8>;
269 interrupt-parent = <&ipic>;
273 * interrupts cell = <intr #, sense>
274 * sense values match linux IORESOURCE_IRQ_* defines:
275 * sense == 8: Level, low assertion
276 * sense == 2: Edge, high-to-low change
279 interrupt-controller;
280 #address-cells = <0>;
281 #interrupt-cells = <2>;
283 device_type = "ipic";
287 compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
288 reg = <0xb00 0x100 0xa00 0x100>;
290 interrupt-parent = <&ipic>;
291 fsl,mpc8313-wakeup-timer = <>m1>;
293 /* Remove this (or change to "okay") if you have
294 * a REVA3 or later board, if you apply one of the
295 * workarounds listed in section 8.5 of the board
296 * manual, or if you are adapting this device tree
297 * to a different board.
303 compatible = "fsl,mpc8313-gtm", "fsl,gtm";
305 interrupts = <90 8 78 8 84 8 72 8>;
306 interrupt-parent = <&ipic>;
310 compatible = "fsl,mpc8313-gtm", "fsl,gtm";
312 interrupts = <91 8 79 8 85 8 73 8>;
313 interrupt-parent = <&ipic>;
318 #address-cells = <1>;
320 compatible = "simple-bus";
321 sleep = <&pmc 0x00010000>;
326 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
328 /* IDSEL 0x0E -mini PCI */
329 0x7000 0x0 0x0 0x1 &ipic 18 0x8
330 0x7000 0x0 0x0 0x2 &ipic 18 0x8
331 0x7000 0x0 0x0 0x3 &ipic 18 0x8
332 0x7000 0x0 0x0 0x4 &ipic 18 0x8
334 /* IDSEL 0x0F - PCI slot */
335 0x7800 0x0 0x0 0x1 &ipic 17 0x8
336 0x7800 0x0 0x0 0x2 &ipic 18 0x8
337 0x7800 0x0 0x0 0x3 &ipic 17 0x8
338 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
339 interrupt-parent = <&ipic>;
340 interrupts = <66 0x8>;
341 bus-range = <0x0 0x0>;
342 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
343 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
344 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
345 clock-frequency = <66666666>;
346 #interrupt-cells = <1>;
348 #address-cells = <3>;
349 reg = <0xe0008500 0x100 /* internal registers */
350 0xe0008300 0x8>; /* config space access registers */
351 compatible = "fsl,mpc8349-pci";
356 #address-cells = <1>;
358 compatible = "fsl,mpc8313-dma", "fsl,elo-dma";
359 reg = <0xe00082a8 4>;
360 ranges = <0 0xe0008100 0x1a8>;
361 interrupt-parent = <&ipic>;
365 compatible = "fsl,mpc8313-dma-channel",
366 "fsl,elo-dma-channel";
368 interrupt-parent = <&ipic>;
374 compatible = "fsl,mpc8313-dma-channel",
375 "fsl,elo-dma-channel";
377 interrupt-parent = <&ipic>;
383 compatible = "fsl,mpc8313-dma-channel",
384 "fsl,elo-dma-channel";
386 interrupt-parent = <&ipic>;
392 compatible = "fsl,mpc8313-dma-channel",
393 "fsl,elo-dma-channel";
395 interrupt-parent = <&ipic>;