2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include "drm_crtc_helper.h"
30 #include "radeon_drm.h"
31 #include "radeon_reg.h"
35 irqreturn_t
radeon_driver_irq_handler_kms(DRM_IRQ_ARGS
)
37 struct drm_device
*dev
= (struct drm_device
*) arg
;
38 struct radeon_device
*rdev
= dev
->dev_private
;
40 return radeon_irq_process(rdev
);
44 * Handle hotplug events outside the interrupt handler proper.
46 static void radeon_hotplug_work_func(struct work_struct
*work
)
48 struct radeon_device
*rdev
= container_of(work
, struct radeon_device
,
50 struct drm_device
*dev
= rdev
->ddev
;
51 struct drm_mode_config
*mode_config
= &dev
->mode_config
;
52 struct drm_connector
*connector
;
54 if (mode_config
->num_connector
) {
55 list_for_each_entry(connector
, &mode_config
->connector_list
, head
)
56 radeon_connector_hotplug(connector
);
58 /* Just fire off a uevent and let userspace tell us what to do */
59 drm_helper_hpd_irq_event(dev
);
62 void radeon_driver_irq_preinstall_kms(struct drm_device
*dev
)
64 struct radeon_device
*rdev
= dev
->dev_private
;
67 /* Disable *all* interrupts */
68 for (i
= 0; i
< RADEON_NUM_RINGS
; i
++)
69 rdev
->irq
.sw_int
[i
] = false;
70 rdev
->irq
.gui_idle
= false;
71 for (i
= 0; i
< RADEON_MAX_HPD_PINS
; i
++)
72 rdev
->irq
.hpd
[i
] = false;
73 for (i
= 0; i
< RADEON_MAX_CRTCS
; i
++) {
74 rdev
->irq
.crtc_vblank_int
[i
] = false;
75 rdev
->irq
.pflip
[i
] = false;
79 radeon_irq_process(rdev
);
82 int radeon_driver_irq_postinstall_kms(struct drm_device
*dev
)
84 struct radeon_device
*rdev
= dev
->dev_private
;
87 dev
->max_vblank_count
= 0x001fffff;
88 for (i
= 0; i
< RADEON_NUM_RINGS
; i
++)
89 rdev
->irq
.sw_int
[i
] = true;
94 void radeon_driver_irq_uninstall_kms(struct drm_device
*dev
)
96 struct radeon_device
*rdev
= dev
->dev_private
;
102 /* Disable *all* interrupts */
103 for (i
= 0; i
< RADEON_NUM_RINGS
; i
++)
104 rdev
->irq
.sw_int
[i
] = false;
105 rdev
->irq
.gui_idle
= false;
106 for (i
= 0; i
< RADEON_MAX_HPD_PINS
; i
++)
107 rdev
->irq
.hpd
[i
] = false;
108 for (i
= 0; i
< RADEON_MAX_CRTCS
; i
++) {
109 rdev
->irq
.crtc_vblank_int
[i
] = false;
110 rdev
->irq
.pflip
[i
] = false;
112 radeon_irq_set(rdev
);
115 static bool radeon_msi_ok(struct radeon_device
*rdev
)
117 /* RV370/RV380 was first asic with MSI support */
118 if (rdev
->family
< CHIP_RV380
)
121 /* MSIs don't work on AGP */
122 if (rdev
->flags
& RADEON_IS_AGP
)
128 else if (radeon_msi
== 0)
132 /* HP RS690 only seems to work with MSIs. */
133 if ((rdev
->pdev
->device
== 0x791f) &&
134 (rdev
->pdev
->subsystem_vendor
== 0x103c) &&
135 (rdev
->pdev
->subsystem_device
== 0x30c2))
138 /* Dell RS690 only seems to work with MSIs. */
139 if ((rdev
->pdev
->device
== 0x791f) &&
140 (rdev
->pdev
->subsystem_vendor
== 0x1028) &&
141 (rdev
->pdev
->subsystem_device
== 0x01fd))
144 if (rdev
->flags
& RADEON_IS_IGP
) {
145 /* APUs work fine with MSIs */
146 if (rdev
->family
>= CHIP_PALM
)
148 /* lots of IGPs have problems with MSIs */
155 int radeon_irq_kms_init(struct radeon_device
*rdev
)
160 INIT_WORK(&rdev
->hotplug_work
, radeon_hotplug_work_func
);
162 spin_lock_init(&rdev
->irq
.sw_lock
);
163 for (i
= 0; i
< rdev
->num_crtc
; i
++)
164 spin_lock_init(&rdev
->irq
.pflip_lock
[i
]);
165 r
= drm_vblank_init(rdev
->ddev
, rdev
->num_crtc
);
170 rdev
->msi_enabled
= 0;
172 if (radeon_msi_ok(rdev
)) {
173 int ret
= pci_enable_msi(rdev
->pdev
);
175 rdev
->msi_enabled
= 1;
176 dev_info(rdev
->dev
, "radeon: using MSI.\n");
179 rdev
->irq
.installed
= true;
180 r
= drm_irq_install(rdev
->ddev
);
182 rdev
->irq
.installed
= false;
185 DRM_INFO("radeon: irq initialized.\n");
189 void radeon_irq_kms_fini(struct radeon_device
*rdev
)
191 drm_vblank_cleanup(rdev
->ddev
);
192 if (rdev
->irq
.installed
) {
193 drm_irq_uninstall(rdev
->ddev
);
194 rdev
->irq
.installed
= false;
195 if (rdev
->msi_enabled
)
196 pci_disable_msi(rdev
->pdev
);
198 flush_work_sync(&rdev
->hotplug_work
);
201 void radeon_irq_kms_sw_irq_get(struct radeon_device
*rdev
, int ring
)
203 unsigned long irqflags
;
205 spin_lock_irqsave(&rdev
->irq
.sw_lock
, irqflags
);
206 if (rdev
->ddev
->irq_enabled
&& (++rdev
->irq
.sw_refcount
[ring
] == 1)) {
207 rdev
->irq
.sw_int
[ring
] = true;
208 radeon_irq_set(rdev
);
210 spin_unlock_irqrestore(&rdev
->irq
.sw_lock
, irqflags
);
213 void radeon_irq_kms_sw_irq_put(struct radeon_device
*rdev
, int ring
)
215 unsigned long irqflags
;
217 spin_lock_irqsave(&rdev
->irq
.sw_lock
, irqflags
);
218 BUG_ON(rdev
->ddev
->irq_enabled
&& rdev
->irq
.sw_refcount
[ring
] <= 0);
219 if (rdev
->ddev
->irq_enabled
&& (--rdev
->irq
.sw_refcount
[ring
] == 0)) {
220 rdev
->irq
.sw_int
[ring
] = false;
221 radeon_irq_set(rdev
);
223 spin_unlock_irqrestore(&rdev
->irq
.sw_lock
, irqflags
);
226 void radeon_irq_kms_pflip_irq_get(struct radeon_device
*rdev
, int crtc
)
228 unsigned long irqflags
;
230 if (crtc
< 0 || crtc
>= rdev
->num_crtc
)
233 spin_lock_irqsave(&rdev
->irq
.pflip_lock
[crtc
], irqflags
);
234 if (rdev
->ddev
->irq_enabled
&& (++rdev
->irq
.pflip_refcount
[crtc
] == 1)) {
235 rdev
->irq
.pflip
[crtc
] = true;
236 radeon_irq_set(rdev
);
238 spin_unlock_irqrestore(&rdev
->irq
.pflip_lock
[crtc
], irqflags
);
241 void radeon_irq_kms_pflip_irq_put(struct radeon_device
*rdev
, int crtc
)
243 unsigned long irqflags
;
245 if (crtc
< 0 || crtc
>= rdev
->num_crtc
)
248 spin_lock_irqsave(&rdev
->irq
.pflip_lock
[crtc
], irqflags
);
249 BUG_ON(rdev
->ddev
->irq_enabled
&& rdev
->irq
.pflip_refcount
[crtc
] <= 0);
250 if (rdev
->ddev
->irq_enabled
&& (--rdev
->irq
.pflip_refcount
[crtc
] == 0)) {
251 rdev
->irq
.pflip
[crtc
] = false;
252 radeon_irq_set(rdev
);
254 spin_unlock_irqrestore(&rdev
->irq
.pflip_lock
[crtc
], irqflags
);