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hwmon: (w83627ehf) Uninline is_word_sized
[linux-2.6/libata-dev.git] / drivers / hwmon / w83627ehf.c
bloba26830dfea7e7b2380f2ef4aa3d0587e8343d66d
1 /*
2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
8 Daniel J Blueman <daniel.blueman@gmail.com>
9 Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
10
11 Shamelessly ripped from the w83627hf driver
12 Copyright (C) 2003 Mark Studebaker
13
14 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
15 in testing and debugging this driver.
16
17 This driver also supports the W83627EHG, which is the lead-free
18 version of the W83627EHF.
19
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
24
25 This program is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
29
30 You should have received a copy of the GNU General Public License
31 along with this program; if not, write to the Free Software
32 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33
34
35 Supports the following chips:
36
37 Chip #vin #fan #pwm #temp chip IDs man ID
38 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
39 0x8860 0xa1
40 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
42 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
43 w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3
44 nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3
45 nct6776f 9 5 3 9 0xC330 0xc1 0x5ca3
46 */
47
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
49
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/slab.h>
53 #include <linux/jiffies.h>
54 #include <linux/platform_device.h>
55 #include <linux/hwmon.h>
56 #include <linux/hwmon-sysfs.h>
57 #include <linux/hwmon-vid.h>
58 #include <linux/err.h>
59 #include <linux/mutex.h>
60 #include <linux/acpi.h>
61 #include <linux/io.h>
62 #include "lm75.h"
63
64 enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg, w83667hg_b, nct6775,
65 nct6776 };
66
67 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
68 static const char * const w83627ehf_device_names[] = {
69 "w83627ehf",
70 "w83627dhg",
71 "w83627dhg",
72 "w83667hg",
73 "w83667hg",
74 "nct6775",
75 "nct6776",
76 };
77
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
81
82 static unsigned short fan_debounce;
83 module_param(fan_debounce, ushort, 0);
84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
85
86 #define DRVNAME "w83627ehf"
87
88 /*
89 * Super-I/O constants and functions
90 */
91
92 #define W83627EHF_LD_HWM 0x0b
93 #define W83667HG_LD_VID 0x0d
94
95 #define SIO_REG_LDSEL 0x07 /* Logical device select */
96 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
97 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
98 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
99 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
100 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
101 #define SIO_REG_VID_DATA 0xF1 /* VID data */
102
103 #define SIO_W83627EHF_ID 0x8850
104 #define SIO_W83627EHG_ID 0x8860
105 #define SIO_W83627DHG_ID 0xa020
106 #define SIO_W83627DHG_P_ID 0xb070
107 #define SIO_W83667HG_ID 0xa510
108 #define SIO_W83667HG_B_ID 0xb350
109 #define SIO_NCT6775_ID 0xb470
110 #define SIO_NCT6776_ID 0xc330
111 #define SIO_ID_MASK 0xFFF0
112
113 static inline void
114 superio_outb(int ioreg, int reg, int val)
115 {
116 outb(reg, ioreg);
117 outb(val, ioreg + 1);
118 }
119
120 static inline int
121 superio_inb(int ioreg, int reg)
122 {
123 outb(reg, ioreg);
124 return inb(ioreg + 1);
125 }
126
127 static inline void
128 superio_select(int ioreg, int ld)
129 {
130 outb(SIO_REG_LDSEL, ioreg);
131 outb(ld, ioreg + 1);
132 }
133
134 static inline void
135 superio_enter(int ioreg)
136 {
137 outb(0x87, ioreg);
138 outb(0x87, ioreg);
139 }
140
141 static inline void
142 superio_exit(int ioreg)
143 {
144 outb(0xaa, ioreg);
145 outb(0x02, ioreg);
146 outb(0x02, ioreg + 1);
147 }
148
149 /*
150 * ISA constants
151 */
152
153 #define IOREGION_ALIGNMENT (~7)
154 #define IOREGION_OFFSET 5
155 #define IOREGION_LENGTH 2
156 #define ADDR_REG_OFFSET 0
157 #define DATA_REG_OFFSET 1
158
159 #define W83627EHF_REG_BANK 0x4E
160 #define W83627EHF_REG_CONFIG 0x40
161
162 /* Not currently used:
163 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
164 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
165 * REG_MAN_ID is at port 0x4f
166 * REG_CHIP_ID is at port 0x58 */
167
168 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
169 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
170
171 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
172 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
173 (0x554 + (((nr) - 7) * 2)))
174 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
175 (0x555 + (((nr) - 7) * 2)))
176 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
177 (0x550 + (nr) - 7))
178
179 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
180 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
181 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
182 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
183
184 /* Fan clock dividers are spread over the following five registers */
185 #define W83627EHF_REG_FANDIV1 0x47
186 #define W83627EHF_REG_FANDIV2 0x4B
187 #define W83627EHF_REG_VBAT 0x5D
188 #define W83627EHF_REG_DIODE 0x59
189 #define W83627EHF_REG_SMI_OVT 0x4C
190
191 /* NCT6775F has its own fan divider registers */
192 #define NCT6775_REG_FANDIV1 0x506
193 #define NCT6775_REG_FANDIV2 0x507
194 #define NCT6775_REG_FAN_DEBOUNCE 0xf0
195
196 #define W83627EHF_REG_ALARM1 0x459
197 #define W83627EHF_REG_ALARM2 0x45A
198 #define W83627EHF_REG_ALARM3 0x45B
199
200 #define W83627EHF_REG_CASEOPEN_DET 0x42 /* SMI STATUS #2 */
201 #define W83627EHF_REG_CASEOPEN_CLR 0x46 /* SMI MASK #3 */
202
203 /* SmartFan registers */
204 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
205 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
206
207 /* DC or PWM output fan configuration */
208 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
209 0x04, /* SYS FAN0 output mode and PWM mode */
210 0x04, /* CPU FAN0 output mode and PWM mode */
211 0x12, /* AUX FAN mode */
212 0x62, /* CPU FAN1 mode */
213 };
214
215 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
216 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
217
218 /* FAN Duty Cycle, be used to control */
219 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
220 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
221 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
222
223 /* Advanced Fan control, some values are common for all fans */
224 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
225 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
226 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
227
228 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
229 = { 0xff, 0x67, 0xff, 0x69 };
230 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
231 = { 0xff, 0x68, 0xff, 0x6a };
232
233 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
234 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
235 = { 0x68, 0x6a, 0x6c };
236
237 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
238 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
239 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
240 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
241 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
242 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
243 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
244 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
245 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
246 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
247
248 static const u16 NCT6775_REG_TEMP[]
249 = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
250 static const u16 NCT6775_REG_TEMP_CONFIG[]
251 = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
252 static const u16 NCT6775_REG_TEMP_HYST[]
253 = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
254 static const u16 NCT6775_REG_TEMP_OVER[]
255 = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
256 static const u16 NCT6775_REG_TEMP_SOURCE[]
257 = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
258
259 static const char *const w83667hg_b_temp_label[] = {
260 "SYSTIN",
261 "CPUTIN",
262 "AUXTIN",
263 "AMDTSI",
264 "PECI Agent 1",
265 "PECI Agent 2",
266 "PECI Agent 3",
267 "PECI Agent 4"
268 };
269
270 static const char *const nct6775_temp_label[] = {
271 "",
272 "SYSTIN",
273 "CPUTIN",
274 "AUXTIN",
275 "AMD SB-TSI",
276 "PECI Agent 0",
277 "PECI Agent 1",
278 "PECI Agent 2",
279 "PECI Agent 3",
280 "PECI Agent 4",
281 "PECI Agent 5",
282 "PECI Agent 6",
283 "PECI Agent 7",
284 "PCH_CHIP_CPU_MAX_TEMP",
285 "PCH_CHIP_TEMP",
286 "PCH_CPU_TEMP",
287 "PCH_MCH_TEMP",
288 "PCH_DIM0_TEMP",
289 "PCH_DIM1_TEMP",
290 "PCH_DIM2_TEMP",
291 "PCH_DIM3_TEMP"
292 };
293
294 static const char *const nct6776_temp_label[] = {
295 "",
296 "SYSTIN",
297 "CPUTIN",
298 "AUXTIN",
299 "SMBUSMASTER 0",
300 "SMBUSMASTER 1",
301 "SMBUSMASTER 2",
302 "SMBUSMASTER 3",
303 "SMBUSMASTER 4",
304 "SMBUSMASTER 5",
305 "SMBUSMASTER 6",
306 "SMBUSMASTER 7",
307 "PECI Agent 0",
308 "PECI Agent 1",
309 "PCH_CHIP_CPU_MAX_TEMP",
310 "PCH_CHIP_TEMP",
311 "PCH_CPU_TEMP",
312 "PCH_MCH_TEMP",
313 "PCH_DIM0_TEMP",
314 "PCH_DIM1_TEMP",
315 "PCH_DIM2_TEMP",
316 "PCH_DIM3_TEMP",
317 "BYTE_TEMP"
318 };
319
320 #define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)
321
322 static int is_word_sized(u16 reg)
323 {
324 return ((((reg & 0xff00) == 0x100
325 || (reg & 0xff00) == 0x200)
326 && ((reg & 0x00ff) == 0x50
327 || (reg & 0x00ff) == 0x53
328 || (reg & 0x00ff) == 0x55))
329 || (reg & 0xfff0) == 0x630
330 || reg == 0x640 || reg == 0x642
331 || ((reg & 0xfff0) == 0x650
332 && (reg & 0x000f) >= 0x06)
333 || reg == 0x73 || reg == 0x75 || reg == 0x77
334 );
335 }
336
337 /*
338 * Conversions
339 */
340
341 /* 1 is PWM mode, output in ms */
342 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
343 {
344 return mode ? 100 * reg : 400 * reg;
345 }
346
347 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
348 {
349 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
350 (msec + 200) / 400), 1, 255);
351 }
352
353 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
354 {
355 if (reg == 0 || reg == 255)
356 return 0;
357 return 1350000U / (reg << divreg);
358 }
359
360 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
361 {
362 if ((reg & 0xff1f) == 0xff1f)
363 return 0;
364
365 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
366
367 if (reg == 0)
368 return 0;
369
370 return 1350000U / reg;
371 }
372
373 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
374 {
375 if (reg == 0 || reg == 0xffff)
376 return 0;
377
378 /*
379 * Even though the registers are 16 bit wide, the fan divisor
380 * still applies.
381 */
382 return 1350000U / (reg << divreg);
383 }
384
385 static inline unsigned int
386 div_from_reg(u8 reg)
387 {
388 return 1 << reg;
389 }
390
391 static inline int
392 temp_from_reg(u16 reg, s16 regval)
393 {
394 if (is_word_sized(reg))
395 return LM75_TEMP_FROM_REG(regval);
396 return ((s8)regval) * 1000;
397 }
398
399 static inline u16
400 temp_to_reg(u16 reg, long temp)
401 {
402 if (is_word_sized(reg))
403 return LM75_TEMP_TO_REG(temp);
404 return (s8)DIV_ROUND_CLOSEST(SENSORS_LIMIT(temp, -127000, 128000),
405 1000);
406 }
407
408 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
409
410 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
411
412 static inline long in_from_reg(u8 reg, u8 nr)
413 {
414 return reg * scale_in[nr];
415 }
416
417 static inline u8 in_to_reg(u32 val, u8 nr)
418 {
419 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0,
420 255);
421 }
422
423 /*
424 * Data structures and manipulation thereof
425 */
426
427 struct w83627ehf_data {
428 int addr; /* IO base of hw monitor block */
429 const char *name;
430
431 struct device *hwmon_dev;
432 struct mutex lock;
433
434 u16 reg_temp[NUM_REG_TEMP];
435 u16 reg_temp_over[NUM_REG_TEMP];
436 u16 reg_temp_hyst[NUM_REG_TEMP];
437 u16 reg_temp_config[NUM_REG_TEMP];
438 u8 temp_src[NUM_REG_TEMP];
439 const char * const *temp_label;
440
441 const u16 *REG_PWM;
442 const u16 *REG_TARGET;
443 const u16 *REG_FAN;
444 const u16 *REG_FAN_MIN;
445 const u16 *REG_FAN_START_OUTPUT;
446 const u16 *REG_FAN_STOP_OUTPUT;
447 const u16 *REG_FAN_STOP_TIME;
448 const u16 *REG_FAN_MAX_OUTPUT;
449 const u16 *REG_FAN_STEP_OUTPUT;
450
451 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
452 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
453
454 struct mutex update_lock;
455 char valid; /* !=0 if following fields are valid */
456 unsigned long last_updated; /* In jiffies */
457
458 /* Register values */
459 u8 bank; /* current register bank */
460 u8 in_num; /* number of in inputs we have */
461 u8 in[10]; /* Register value */
462 u8 in_max[10]; /* Register value */
463 u8 in_min[10]; /* Register value */
464 unsigned int rpm[5];
465 u16 fan_min[5];
466 u8 fan_div[5];
467 u8 has_fan; /* some fan inputs can be disabled */
468 u8 has_fan_min; /* some fans don't have min register */
469 bool has_fan_div;
470 u8 temp_type[3];
471 s16 temp[9];
472 s16 temp_max[9];
473 s16 temp_max_hyst[9];
474 u32 alarms;
475 u8 caseopen;
476
477 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
478 u8 pwm_enable[4]; /* 1->manual
479 2->thermal cruise mode (also called SmartFan I)
480 3->fan speed cruise mode
481 4->variable thermal cruise (also called
482 SmartFan III)
483 5->enhanced variable thermal cruise (also called
484 SmartFan IV) */
485 u8 pwm_enable_orig[4]; /* original value of pwm_enable */
486 u8 pwm_num; /* number of pwm */
487 u8 pwm[4];
488 u8 target_temp[4];
489 u8 tolerance[4];
490
491 u8 fan_start_output[4]; /* minimum fan speed when spinning up */
492 u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
493 u8 fan_stop_time[4]; /* time at minimum before disabling fan */
494 u8 fan_max_output[4]; /* maximum fan speed */
495 u8 fan_step_output[4]; /* rate of change output value */
496
497 u8 vid;
498 u8 vrm;
499
500 u16 have_temp;
501 u8 in6_skip;
502 };
503
504 struct w83627ehf_sio_data {
505 int sioreg;
506 enum kinds kind;
507 };
508
509 /*
510 * On older chips, only registers 0x50-0x5f are banked.
511 * On more recent chips, all registers are banked.
512 * Assume that is the case and set the bank number for each access.
513 * Cache the bank number so it only needs to be set if it changes.
514 */
515 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
516 {
517 u8 bank = reg >> 8;
518 if (data->bank != bank) {
519 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
520 outb_p(bank, data->addr + DATA_REG_OFFSET);
521 data->bank = bank;
522 }
523 }
524
525 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
526 {
527 int res, word_sized = is_word_sized(reg);
528
529 mutex_lock(&data->lock);
530
531 w83627ehf_set_bank(data, reg);
532 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
533 res = inb_p(data->addr + DATA_REG_OFFSET);
534 if (word_sized) {
535 outb_p((reg & 0xff) + 1,
536 data->addr + ADDR_REG_OFFSET);
537 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
538 }
539
540 mutex_unlock(&data->lock);
541 return res;
542 }
543
544 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
545 u16 value)
546 {
547 int word_sized = is_word_sized(reg);
548
549 mutex_lock(&data->lock);
550
551 w83627ehf_set_bank(data, reg);
552 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
553 if (word_sized) {
554 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
555 outb_p((reg & 0xff) + 1,
556 data->addr + ADDR_REG_OFFSET);
557 }
558 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
559
560 mutex_unlock(&data->lock);
561 return 0;
562 }
563
564 /* This function assumes that the caller holds data->update_lock */
565 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
566 {
567 u8 reg;
568
569 switch (nr) {
570 case 0:
571 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
572 | (data->fan_div[0] & 0x7);
573 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
574 break;
575 case 1:
576 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
577 | ((data->fan_div[1] << 4) & 0x70);
578 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
579 case 2:
580 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
581 | (data->fan_div[2] & 0x7);
582 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
583 break;
584 case 3:
585 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
586 | ((data->fan_div[3] << 4) & 0x70);
587 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
588 break;
589 }
590 }
591
592 /* This function assumes that the caller holds data->update_lock */
593 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
594 {
595 u8 reg;
596
597 switch (nr) {
598 case 0:
599 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
600 | ((data->fan_div[0] & 0x03) << 4);
601 /* fan5 input control bit is write only, compute the value */
602 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
603 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
604 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
605 | ((data->fan_div[0] & 0x04) << 3);
606 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
607 break;
608 case 1:
609 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
610 | ((data->fan_div[1] & 0x03) << 6);
611 /* fan5 input control bit is write only, compute the value */
612 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
613 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
614 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
615 | ((data->fan_div[1] & 0x04) << 4);
616 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
617 break;
618 case 2:
619 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
620 | ((data->fan_div[2] & 0x03) << 6);
621 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
622 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
623 | ((data->fan_div[2] & 0x04) << 5);
624 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
625 break;
626 case 3:
627 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
628 | (data->fan_div[3] & 0x03);
629 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
630 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
631 | ((data->fan_div[3] & 0x04) << 5);
632 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
633 break;
634 case 4:
635 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
636 | ((data->fan_div[4] & 0x03) << 2)
637 | ((data->fan_div[4] & 0x04) << 5);
638 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
639 break;
640 }
641 }
642
643 static void w83627ehf_write_fan_div_common(struct device *dev,
644 struct w83627ehf_data *data, int nr)
645 {
646 struct w83627ehf_sio_data *sio_data = dev->platform_data;
647
648 if (sio_data->kind == nct6776)
649 ; /* no dividers, do nothing */
650 else if (sio_data->kind == nct6775)
651 nct6775_write_fan_div(data, nr);
652 else
653 w83627ehf_write_fan_div(data, nr);
654 }
655
656 static void nct6775_update_fan_div(struct w83627ehf_data *data)
657 {
658 u8 i;
659
660 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
661 data->fan_div[0] = i & 0x7;
662 data->fan_div[1] = (i & 0x70) >> 4;
663 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
664 data->fan_div[2] = i & 0x7;
665 if (data->has_fan & (1<<3))
666 data->fan_div[3] = (i & 0x70) >> 4;
667 }
668
669 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
670 {
671 int i;
672
673 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
674 data->fan_div[0] = (i >> 4) & 0x03;
675 data->fan_div[1] = (i >> 6) & 0x03;
676 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
677 data->fan_div[2] = (i >> 6) & 0x03;
678 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
679 data->fan_div[0] |= (i >> 3) & 0x04;
680 data->fan_div[1] |= (i >> 4) & 0x04;
681 data->fan_div[2] |= (i >> 5) & 0x04;
682 if (data->has_fan & ((1 << 3) | (1 << 4))) {
683 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
684 data->fan_div[3] = i & 0x03;
685 data->fan_div[4] = ((i >> 2) & 0x03)
686 | ((i >> 5) & 0x04);
687 }
688 if (data->has_fan & (1 << 3)) {
689 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
690 data->fan_div[3] |= (i >> 5) & 0x04;
691 }
692 }
693
694 static void w83627ehf_update_fan_div_common(struct device *dev,
695 struct w83627ehf_data *data)
696 {
697 struct w83627ehf_sio_data *sio_data = dev->platform_data;
698
699 if (sio_data->kind == nct6776)
700 ; /* no dividers, do nothing */
701 else if (sio_data->kind == nct6775)
702 nct6775_update_fan_div(data);
703 else
704 w83627ehf_update_fan_div(data);
705 }
706
707 static void nct6775_update_pwm(struct w83627ehf_data *data)
708 {
709 int i;
710 int pwmcfg, fanmodecfg;
711
712 for (i = 0; i < data->pwm_num; i++) {
713 pwmcfg = w83627ehf_read_value(data,
714 W83627EHF_REG_PWM_ENABLE[i]);
715 fanmodecfg = w83627ehf_read_value(data,
716 NCT6775_REG_FAN_MODE[i]);
717 data->pwm_mode[i] =
718 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
719 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
720 data->tolerance[i] = fanmodecfg & 0x0f;
721 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
722 }
723 }
724
725 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
726 {
727 int i;
728 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
729
730 for (i = 0; i < data->pwm_num; i++) {
731 if (!(data->has_fan & (1 << i)))
732 continue;
733
734 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
735 if (i != 1) {
736 pwmcfg = w83627ehf_read_value(data,
737 W83627EHF_REG_PWM_ENABLE[i]);
738 tolerance = w83627ehf_read_value(data,
739 W83627EHF_REG_TOLERANCE[i]);
740 }
741 data->pwm_mode[i] =
742 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
743 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
744 & 3) + 1;
745 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
746
747 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
748 }
749 }
750
751 static void w83627ehf_update_pwm_common(struct device *dev,
752 struct w83627ehf_data *data)
753 {
754 struct w83627ehf_sio_data *sio_data = dev->platform_data;
755
756 if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
757 nct6775_update_pwm(data);
758 else
759 w83627ehf_update_pwm(data);
760 }
761
762 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
763 {
764 struct w83627ehf_data *data = dev_get_drvdata(dev);
765 struct w83627ehf_sio_data *sio_data = dev->platform_data;
766
767 int i;
768
769 mutex_lock(&data->update_lock);
770
771 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
772 || !data->valid) {
773 /* Fan clock dividers */
774 w83627ehf_update_fan_div_common(dev, data);
775
776 /* Measured voltages and limits */
777 for (i = 0; i < data->in_num; i++) {
778 if ((i == 6) && data->in6_skip)
779 continue;
780
781 data->in[i] = w83627ehf_read_value(data,
782 W83627EHF_REG_IN(i));
783 data->in_min[i] = w83627ehf_read_value(data,
784 W83627EHF_REG_IN_MIN(i));
785 data->in_max[i] = w83627ehf_read_value(data,
786 W83627EHF_REG_IN_MAX(i));
787 }
788
789 /* Measured fan speeds and limits */
790 for (i = 0; i < 5; i++) {
791 u16 reg;
792
793 if (!(data->has_fan & (1 << i)))
794 continue;
795
796 reg = w83627ehf_read_value(data, data->REG_FAN[i]);
797 data->rpm[i] = data->fan_from_reg(reg,
798 data->fan_div[i]);
799
800 if (data->has_fan_min & (1 << i))
801 data->fan_min[i] = w83627ehf_read_value(data,
802 data->REG_FAN_MIN[i]);
803
804 /* If we failed to measure the fan speed and clock
805 divider can be increased, let's try that for next
806 time */
807 if (data->has_fan_div
808 && (reg >= 0xff || (sio_data->kind == nct6775
809 && reg == 0x00))
810 && data->fan_div[i] < 0x07) {
811 dev_dbg(dev, "Increasing fan%d "
812 "clock divider from %u to %u\n",
813 i + 1, div_from_reg(data->fan_div[i]),
814 div_from_reg(data->fan_div[i] + 1));
815 data->fan_div[i]++;
816 w83627ehf_write_fan_div_common(dev, data, i);
817 /* Preserve min limit if possible */
818 if ((data->has_fan_min & (1 << i))
819 && data->fan_min[i] >= 2
820 && data->fan_min[i] != 255)
821 w83627ehf_write_value(data,
822 data->REG_FAN_MIN[i],
823 (data->fan_min[i] /= 2));
824 }
825 }
826
827 w83627ehf_update_pwm_common(dev, data);
828
829 for (i = 0; i < data->pwm_num; i++) {
830 if (!(data->has_fan & (1 << i)))
831 continue;
832
833 data->fan_start_output[i] =
834 w83627ehf_read_value(data,
835 data->REG_FAN_START_OUTPUT[i]);
836 data->fan_stop_output[i] =
837 w83627ehf_read_value(data,
838 data->REG_FAN_STOP_OUTPUT[i]);
839 data->fan_stop_time[i] =
840 w83627ehf_read_value(data,
841 data->REG_FAN_STOP_TIME[i]);
842
843 if (data->REG_FAN_MAX_OUTPUT &&
844 data->REG_FAN_MAX_OUTPUT[i] != 0xff)
845 data->fan_max_output[i] =
846 w83627ehf_read_value(data,
847 data->REG_FAN_MAX_OUTPUT[i]);
848
849 if (data->REG_FAN_STEP_OUTPUT &&
850 data->REG_FAN_STEP_OUTPUT[i] != 0xff)
851 data->fan_step_output[i] =
852 w83627ehf_read_value(data,
853 data->REG_FAN_STEP_OUTPUT[i]);
854
855 data->target_temp[i] =
856 w83627ehf_read_value(data,
857 data->REG_TARGET[i]) &
858 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
859 }
860
861 /* Measured temperatures and limits */
862 for (i = 0; i < NUM_REG_TEMP; i++) {
863 if (!(data->have_temp & (1 << i)))
864 continue;
865 data->temp[i] = w83627ehf_read_value(data,
866 data->reg_temp[i]);
867 if (data->reg_temp_over[i])
868 data->temp_max[i]
869 = w83627ehf_read_value(data,
870 data->reg_temp_over[i]);
871 if (data->reg_temp_hyst[i])
872 data->temp_max_hyst[i]
873 = w83627ehf_read_value(data,
874 data->reg_temp_hyst[i]);
875 }
876
877 data->alarms = w83627ehf_read_value(data,
878 W83627EHF_REG_ALARM1) |
879 (w83627ehf_read_value(data,
880 W83627EHF_REG_ALARM2) << 8) |
881 (w83627ehf_read_value(data,
882 W83627EHF_REG_ALARM3) << 16);
883
884 data->caseopen = w83627ehf_read_value(data,
885 W83627EHF_REG_CASEOPEN_DET);
886
887 data->last_updated = jiffies;
888 data->valid = 1;
889 }
890
891 mutex_unlock(&data->update_lock);
892 return data;
893 }
894
895 /*
896 * Sysfs callback functions
897 */
898 #define show_in_reg(reg) \
899 static ssize_t \
900 show_##reg(struct device *dev, struct device_attribute *attr, \
901 char *buf) \
902 { \
903 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
904 struct sensor_device_attribute *sensor_attr = \
905 to_sensor_dev_attr(attr); \
906 int nr = sensor_attr->index; \
907 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
908 }
909 show_in_reg(in)
910 show_in_reg(in_min)
911 show_in_reg(in_max)
912
913 #define store_in_reg(REG, reg) \
914 static ssize_t \
915 store_in_##reg(struct device *dev, struct device_attribute *attr, \
916 const char *buf, size_t count) \
917 { \
918 struct w83627ehf_data *data = dev_get_drvdata(dev); \
919 struct sensor_device_attribute *sensor_attr = \
920 to_sensor_dev_attr(attr); \
921 int nr = sensor_attr->index; \
922 unsigned long val; \
923 int err; \
924 err = strict_strtoul(buf, 10, &val); \
925 if (err < 0) \
926 return err; \
927 mutex_lock(&data->update_lock); \
928 data->in_##reg[nr] = in_to_reg(val, nr); \
929 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
930 data->in_##reg[nr]); \
931 mutex_unlock(&data->update_lock); \
932 return count; \
933 }
934
935 store_in_reg(MIN, min)
936 store_in_reg(MAX, max)
937
938 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
939 char *buf)
940 {
941 struct w83627ehf_data *data = w83627ehf_update_device(dev);
942 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
943 int nr = sensor_attr->index;
944 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
945 }
946
947 static struct sensor_device_attribute sda_in_input[] = {
948 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
949 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
950 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
951 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
952 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
953 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
954 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
955 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
956 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
957 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
958 };
959
960 static struct sensor_device_attribute sda_in_alarm[] = {
961 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
962 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
963 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
964 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
965 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
966 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
967 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
968 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
969 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
970 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
971 };
972
973 static struct sensor_device_attribute sda_in_min[] = {
974 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
975 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
976 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
977 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
978 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
979 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
980 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
981 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
982 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
983 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
984 };
985
986 static struct sensor_device_attribute sda_in_max[] = {
987 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
988 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
989 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
990 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
991 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
992 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
993 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
994 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
995 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
996 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
997 };
998
999 static ssize_t
1000 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1001 {
1002 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1003 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1004 int nr = sensor_attr->index;
1005 return sprintf(buf, "%d\n", data->rpm[nr]);
1006 }
1007
1008 static ssize_t
1009 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1010 {
1011 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1012 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1013 int nr = sensor_attr->index;
1014 return sprintf(buf, "%d\n",
1015 data->fan_from_reg_min(data->fan_min[nr],
1016 data->fan_div[nr]));
1017 }
1018
1019 static ssize_t
1020 show_fan_div(struct device *dev, struct device_attribute *attr,
1021 char *buf)
1022 {
1023 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1024 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1025 int nr = sensor_attr->index;
1026 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1027 }
1028
1029 static ssize_t
1030 store_fan_min(struct device *dev, struct device_attribute *attr,
1031 const char *buf, size_t count)
1032 {
1033 struct w83627ehf_data *data = dev_get_drvdata(dev);
1034 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1035 int nr = sensor_attr->index;
1036 unsigned long val;
1037 int err;
1038 unsigned int reg;
1039 u8 new_div;
1040
1041 err = strict_strtoul(buf, 10, &val);
1042 if (err < 0)
1043 return err;
1044
1045 mutex_lock(&data->update_lock);
1046 if (!data->has_fan_div) {
1047 /*
1048 * Only NCT6776F for now, so we know that this is a 13 bit
1049 * register
1050 */
1051 if (!val) {
1052 val = 0xff1f;
1053 } else {
1054 if (val > 1350000U)
1055 val = 135000U;
1056 val = 1350000U / val;
1057 val = (val & 0x1f) | ((val << 3) & 0xff00);
1058 }
1059 data->fan_min[nr] = val;
1060 goto done; /* Leave fan divider alone */
1061 }
1062 if (!val) {
1063 /* No min limit, alarm disabled */
1064 data->fan_min[nr] = 255;
1065 new_div = data->fan_div[nr]; /* No change */
1066 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1067 } else if ((reg = 1350000U / val) >= 128 * 255) {
1068 /* Speed below this value cannot possibly be represented,
1069 even with the highest divider (128) */
1070 data->fan_min[nr] = 254;
1071 new_div = 7; /* 128 == (1 << 7) */
1072 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1073 "minimum\n", nr + 1, val,
1074 data->fan_from_reg_min(254, 7));
1075 } else if (!reg) {
1076 /* Speed above this value cannot possibly be represented,
1077 even with the lowest divider (1) */
1078 data->fan_min[nr] = 1;
1079 new_div = 0; /* 1 == (1 << 0) */
1080 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1081 "maximum\n", nr + 1, val,
1082 data->fan_from_reg_min(1, 0));
1083 } else {
1084 /* Automatically pick the best divider, i.e. the one such
1085 that the min limit will correspond to a register value
1086 in the 96..192 range */
1087 new_div = 0;
1088 while (reg > 192 && new_div < 7) {
1089 reg >>= 1;
1090 new_div++;
1091 }
1092 data->fan_min[nr] = reg;
1093 }
1094
1095 /* Write both the fan clock divider (if it changed) and the new
1096 fan min (unconditionally) */
1097 if (new_div != data->fan_div[nr]) {
1098 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1099 nr + 1, div_from_reg(data->fan_div[nr]),
1100 div_from_reg(new_div));
1101 data->fan_div[nr] = new_div;
1102 w83627ehf_write_fan_div_common(dev, data, nr);
1103 /* Give the chip time to sample a new speed value */
1104 data->last_updated = jiffies;
1105 }
1106 done:
1107 w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1108 data->fan_min[nr]);
1109 mutex_unlock(&data->update_lock);
1110
1111 return count;
1112 }
1113
1114 static struct sensor_device_attribute sda_fan_input[] = {
1115 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1116 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1117 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1118 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1119 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1120 };
1121
1122 static struct sensor_device_attribute sda_fan_alarm[] = {
1123 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1124 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1125 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1126 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1127 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1128 };
1129
1130 static struct sensor_device_attribute sda_fan_min[] = {
1131 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1132 store_fan_min, 0),
1133 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1134 store_fan_min, 1),
1135 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1136 store_fan_min, 2),
1137 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1138 store_fan_min, 3),
1139 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1140 store_fan_min, 4),
1141 };
1142
1143 static struct sensor_device_attribute sda_fan_div[] = {
1144 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1145 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1146 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1147 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1148 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1149 };
1150
1151 static ssize_t
1152 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1153 {
1154 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1155 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1156 int nr = sensor_attr->index;
1157 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1158 }
1159
1160 #define show_temp_reg(addr, reg) \
1161 static ssize_t \
1162 show_##reg(struct device *dev, struct device_attribute *attr, \
1163 char *buf) \
1164 { \
1165 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1166 struct sensor_device_attribute *sensor_attr = \
1167 to_sensor_dev_attr(attr); \
1168 int nr = sensor_attr->index; \
1169 return sprintf(buf, "%d\n", \
1170 temp_from_reg(data->addr[nr], data->reg[nr])); \
1171 }
1172 show_temp_reg(reg_temp, temp);
1173 show_temp_reg(reg_temp_over, temp_max);
1174 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1175
1176 #define store_temp_reg(addr, reg) \
1177 static ssize_t \
1178 store_##reg(struct device *dev, struct device_attribute *attr, \
1179 const char *buf, size_t count) \
1180 { \
1181 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1182 struct sensor_device_attribute *sensor_attr = \
1183 to_sensor_dev_attr(attr); \
1184 int nr = sensor_attr->index; \
1185 int err; \
1186 long val; \
1187 err = strict_strtol(buf, 10, &val); \
1188 if (err < 0) \
1189 return err; \
1190 mutex_lock(&data->update_lock); \
1191 data->reg[nr] = temp_to_reg(data->addr[nr], val); \
1192 w83627ehf_write_value(data, data->addr[nr], \
1193 data->reg[nr]); \
1194 mutex_unlock(&data->update_lock); \
1195 return count; \
1196 }
1197 store_temp_reg(reg_temp_over, temp_max);
1198 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1199
1200 static ssize_t
1201 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1202 {
1203 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1204 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1205 int nr = sensor_attr->index;
1206 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1207 }
1208
1209 static struct sensor_device_attribute sda_temp_input[] = {
1210 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1211 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1212 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1213 SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1214 SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1215 SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1216 SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1217 SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1218 SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1219 };
1220
1221 static struct sensor_device_attribute sda_temp_label[] = {
1222 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1223 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1224 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1225 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1226 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1227 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1228 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1229 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1230 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1231 };
1232
1233 static struct sensor_device_attribute sda_temp_max[] = {
1234 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1235 store_temp_max, 0),
1236 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1237 store_temp_max, 1),
1238 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1239 store_temp_max, 2),
1240 SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1241 store_temp_max, 3),
1242 SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1243 store_temp_max, 4),
1244 SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1245 store_temp_max, 5),
1246 SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1247 store_temp_max, 6),
1248 SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1249 store_temp_max, 7),
1250 SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1251 store_temp_max, 8),
1252 };
1253
1254 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1255 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1256 store_temp_max_hyst, 0),
1257 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1258 store_temp_max_hyst, 1),
1259 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1260 store_temp_max_hyst, 2),
1261 SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1262 store_temp_max_hyst, 3),
1263 SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1264 store_temp_max_hyst, 4),
1265 SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1266 store_temp_max_hyst, 5),
1267 SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1268 store_temp_max_hyst, 6),
1269 SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1270 store_temp_max_hyst, 7),
1271 SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1272 store_temp_max_hyst, 8),
1273 };
1274
1275 static struct sensor_device_attribute sda_temp_alarm[] = {
1276 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1277 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1278 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1279 };
1280
1281 static struct sensor_device_attribute sda_temp_type[] = {
1282 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1283 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1284 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1285 };
1286
1287 #define show_pwm_reg(reg) \
1288 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1289 char *buf) \
1290 { \
1291 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1292 struct sensor_device_attribute *sensor_attr = \
1293 to_sensor_dev_attr(attr); \
1294 int nr = sensor_attr->index; \
1295 return sprintf(buf, "%d\n", data->reg[nr]); \
1296 }
1297
1298 show_pwm_reg(pwm_mode)
1299 show_pwm_reg(pwm_enable)
1300 show_pwm_reg(pwm)
1301
1302 static ssize_t
1303 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1304 const char *buf, size_t count)
1305 {
1306 struct w83627ehf_data *data = dev_get_drvdata(dev);
1307 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1308 int nr = sensor_attr->index;
1309 unsigned long val;
1310 int err;
1311 u16 reg;
1312
1313 err = strict_strtoul(buf, 10, &val);
1314 if (err < 0)
1315 return err;
1316
1317 if (val > 1)
1318 return -EINVAL;
1319 mutex_lock(&data->update_lock);
1320 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1321 data->pwm_mode[nr] = val;
1322 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1323 if (!val)
1324 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1325 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1326 mutex_unlock(&data->update_lock);
1327 return count;
1328 }
1329
1330 static ssize_t
1331 store_pwm(struct device *dev, struct device_attribute *attr,
1332 const char *buf, size_t count)
1333 {
1334 struct w83627ehf_data *data = dev_get_drvdata(dev);
1335 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1336 int nr = sensor_attr->index;
1337 unsigned long val;
1338 int err;
1339
1340 err = strict_strtoul(buf, 10, &val);
1341 if (err < 0)
1342 return err;
1343
1344 val = SENSORS_LIMIT(val, 0, 255);
1345
1346 mutex_lock(&data->update_lock);
1347 data->pwm[nr] = val;
1348 w83627ehf_write_value(data, data->REG_PWM[nr], val);
1349 mutex_unlock(&data->update_lock);
1350 return count;
1351 }
1352
1353 static ssize_t
1354 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1355 const char *buf, size_t count)
1356 {
1357 struct w83627ehf_data *data = dev_get_drvdata(dev);
1358 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1359 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1360 int nr = sensor_attr->index;
1361 unsigned long val;
1362 int err;
1363 u16 reg;
1364
1365 err = strict_strtoul(buf, 10, &val);
1366 if (err < 0)
1367 return err;
1368
1369 if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1370 return -EINVAL;
1371 /* SmartFan III mode is not supported on NCT6776F */
1372 if (sio_data->kind == nct6776 && val == 4)
1373 return -EINVAL;
1374
1375 mutex_lock(&data->update_lock);
1376 data->pwm_enable[nr] = val;
1377 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1378 reg = w83627ehf_read_value(data,
1379 NCT6775_REG_FAN_MODE[nr]);
1380 reg &= 0x0f;
1381 reg |= (val - 1) << 4;
1382 w83627ehf_write_value(data,
1383 NCT6775_REG_FAN_MODE[nr], reg);
1384 } else {
1385 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1386 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1387 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1388 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1389 }
1390 mutex_unlock(&data->update_lock);
1391 return count;
1392 }
1393
1394
1395 #define show_tol_temp(reg) \
1396 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1397 char *buf) \
1398 { \
1399 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1400 struct sensor_device_attribute *sensor_attr = \
1401 to_sensor_dev_attr(attr); \
1402 int nr = sensor_attr->index; \
1403 return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1404 }
1405
1406 show_tol_temp(tolerance)
1407 show_tol_temp(target_temp)
1408
1409 static ssize_t
1410 store_target_temp(struct device *dev, struct device_attribute *attr,
1411 const char *buf, size_t count)
1412 {
1413 struct w83627ehf_data *data = dev_get_drvdata(dev);
1414 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1415 int nr = sensor_attr->index;
1416 long val;
1417 int err;
1418
1419 err = strict_strtol(buf, 10, &val);
1420 if (err < 0)
1421 return err;
1422
1423 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1424
1425 mutex_lock(&data->update_lock);
1426 data->target_temp[nr] = val;
1427 w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1428 mutex_unlock(&data->update_lock);
1429 return count;
1430 }
1431
1432 static ssize_t
1433 store_tolerance(struct device *dev, struct device_attribute *attr,
1434 const char *buf, size_t count)
1435 {
1436 struct w83627ehf_data *data = dev_get_drvdata(dev);
1437 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1438 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1439 int nr = sensor_attr->index;
1440 u16 reg;
1441 long val;
1442 int err;
1443
1444 err = strict_strtol(buf, 10, &val);
1445 if (err < 0)
1446 return err;
1447
1448 /* Limit the temp to 0C - 15C */
1449 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1450
1451 mutex_lock(&data->update_lock);
1452 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1453 /* Limit tolerance further for NCT6776F */
1454 if (sio_data->kind == nct6776 && val > 7)
1455 val = 7;
1456 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1457 reg = (reg & 0xf0) | val;
1458 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1459 } else {
1460 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1461 if (nr == 1)
1462 reg = (reg & 0x0f) | (val << 4);
1463 else
1464 reg = (reg & 0xf0) | val;
1465 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1466 }
1467 data->tolerance[nr] = val;
1468 mutex_unlock(&data->update_lock);
1469 return count;
1470 }
1471
1472 static struct sensor_device_attribute sda_pwm[] = {
1473 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1474 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1475 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1476 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1477 };
1478
1479 static struct sensor_device_attribute sda_pwm_mode[] = {
1480 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1481 store_pwm_mode, 0),
1482 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1483 store_pwm_mode, 1),
1484 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1485 store_pwm_mode, 2),
1486 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1487 store_pwm_mode, 3),
1488 };
1489
1490 static struct sensor_device_attribute sda_pwm_enable[] = {
1491 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1492 store_pwm_enable, 0),
1493 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1494 store_pwm_enable, 1),
1495 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1496 store_pwm_enable, 2),
1497 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1498 store_pwm_enable, 3),
1499 };
1500
1501 static struct sensor_device_attribute sda_target_temp[] = {
1502 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1503 store_target_temp, 0),
1504 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1505 store_target_temp, 1),
1506 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1507 store_target_temp, 2),
1508 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1509 store_target_temp, 3),
1510 };
1511
1512 static struct sensor_device_attribute sda_tolerance[] = {
1513 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1514 store_tolerance, 0),
1515 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1516 store_tolerance, 1),
1517 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1518 store_tolerance, 2),
1519 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1520 store_tolerance, 3),
1521 };
1522
1523 /* Smart Fan registers */
1524
1525 #define fan_functions(reg, REG) \
1526 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1527 char *buf) \
1528 { \
1529 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1530 struct sensor_device_attribute *sensor_attr = \
1531 to_sensor_dev_attr(attr); \
1532 int nr = sensor_attr->index; \
1533 return sprintf(buf, "%d\n", data->reg[nr]); \
1534 } \
1535 static ssize_t \
1536 store_##reg(struct device *dev, struct device_attribute *attr, \
1537 const char *buf, size_t count) \
1538 { \
1539 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1540 struct sensor_device_attribute *sensor_attr = \
1541 to_sensor_dev_attr(attr); \
1542 int nr = sensor_attr->index; \
1543 unsigned long val; \
1544 int err; \
1545 err = strict_strtoul(buf, 10, &val); \
1546 if (err < 0) \
1547 return err; \
1548 val = SENSORS_LIMIT(val, 1, 255); \
1549 mutex_lock(&data->update_lock); \
1550 data->reg[nr] = val; \
1551 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1552 mutex_unlock(&data->update_lock); \
1553 return count; \
1554 }
1555
1556 fan_functions(fan_start_output, FAN_START_OUTPUT)
1557 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1558 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1559 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1560
1561 #define fan_time_functions(reg, REG) \
1562 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1563 char *buf) \
1564 { \
1565 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1566 struct sensor_device_attribute *sensor_attr = \
1567 to_sensor_dev_attr(attr); \
1568 int nr = sensor_attr->index; \
1569 return sprintf(buf, "%d\n", \
1570 step_time_from_reg(data->reg[nr], \
1571 data->pwm_mode[nr])); \
1572 } \
1573 \
1574 static ssize_t \
1575 store_##reg(struct device *dev, struct device_attribute *attr, \
1576 const char *buf, size_t count) \
1577 { \
1578 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1579 struct sensor_device_attribute *sensor_attr = \
1580 to_sensor_dev_attr(attr); \
1581 int nr = sensor_attr->index; \
1582 unsigned long val; \
1583 int err; \
1584 err = strict_strtoul(buf, 10, &val); \
1585 if (err < 0) \
1586 return err; \
1587 val = step_time_to_reg(val, data->pwm_mode[nr]); \
1588 mutex_lock(&data->update_lock); \
1589 data->reg[nr] = val; \
1590 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1591 mutex_unlock(&data->update_lock); \
1592 return count; \
1593 } \
1594
1595 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1596
1597 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1598 char *buf)
1599 {
1600 struct w83627ehf_data *data = dev_get_drvdata(dev);
1601
1602 return sprintf(buf, "%s\n", data->name);
1603 }
1604 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1605
1606 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1607 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1608 store_fan_stop_time, 3),
1609 SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1610 store_fan_start_output, 3),
1611 SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1612 store_fan_stop_output, 3),
1613 SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1614 store_fan_max_output, 3),
1615 SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1616 store_fan_step_output, 3),
1617 };
1618
1619 static struct sensor_device_attribute sda_sf3_arrays[] = {
1620 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1621 store_fan_stop_time, 0),
1622 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1623 store_fan_stop_time, 1),
1624 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1625 store_fan_stop_time, 2),
1626 SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1627 store_fan_start_output, 0),
1628 SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1629 store_fan_start_output, 1),
1630 SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1631 store_fan_start_output, 2),
1632 SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1633 store_fan_stop_output, 0),
1634 SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1635 store_fan_stop_output, 1),
1636 SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1637 store_fan_stop_output, 2),
1638 };
1639
1640
1641 /*
1642 * pwm1 and pwm3 don't support max and step settings on all chips.
1643 * Need to check support while generating/removing attribute files.
1644 */
1645 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1646 SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1647 store_fan_max_output, 0),
1648 SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1649 store_fan_step_output, 0),
1650 SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1651 store_fan_max_output, 1),
1652 SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1653 store_fan_step_output, 1),
1654 SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1655 store_fan_max_output, 2),
1656 SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1657 store_fan_step_output, 2),
1658 };
1659
1660 static ssize_t
1661 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1662 {
1663 struct w83627ehf_data *data = dev_get_drvdata(dev);
1664 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1665 }
1666 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1667
1668
1669 /* Case open detection */
1670
1671 static ssize_t
1672 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
1673 {
1674 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1675
1676 return sprintf(buf, "%d\n",
1677 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
1678 }
1679
1680 static ssize_t
1681 clear_caseopen(struct device *dev, struct device_attribute *attr,
1682 const char *buf, size_t count)
1683 {
1684 struct w83627ehf_data *data = dev_get_drvdata(dev);
1685 unsigned long val;
1686 u16 reg, mask;
1687
1688 if (strict_strtoul(buf, 10, &val) || val != 0)
1689 return -EINVAL;
1690
1691 mask = to_sensor_dev_attr_2(attr)->nr;
1692
1693 mutex_lock(&data->update_lock);
1694 reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1695 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1696 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1697 data->valid = 0; /* Force cache refresh */
1698 mutex_unlock(&data->update_lock);
1699
1700 return count;
1701 }
1702
1703 static struct sensor_device_attribute_2 sda_caseopen[] = {
1704 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1705 clear_caseopen, 0x80, 0x10),
1706 SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1707 clear_caseopen, 0x40, 0x40),
1708 };
1709
1710 /*
1711 * Driver and device management
1712 */
1713
1714 static void w83627ehf_device_remove_files(struct device *dev)
1715 {
1716 /* some entries in the following arrays may not have been used in
1717 * device_create_file(), but device_remove_file() will ignore them */
1718 int i;
1719 struct w83627ehf_data *data = dev_get_drvdata(dev);
1720
1721 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1722 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1723 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1724 struct sensor_device_attribute *attr =
1725 &sda_sf3_max_step_arrays[i];
1726 if (data->REG_FAN_STEP_OUTPUT &&
1727 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1728 device_remove_file(dev, &attr->dev_attr);
1729 }
1730 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1731 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1732 for (i = 0; i < data->in_num; i++) {
1733 if ((i == 6) && data->in6_skip)
1734 continue;
1735 device_remove_file(dev, &sda_in_input[i].dev_attr);
1736 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1737 device_remove_file(dev, &sda_in_min[i].dev_attr);
1738 device_remove_file(dev, &sda_in_max[i].dev_attr);
1739 }
1740 for (i = 0; i < 5; i++) {
1741 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1742 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1743 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1744 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1745 }
1746 for (i = 0; i < data->pwm_num; i++) {
1747 device_remove_file(dev, &sda_pwm[i].dev_attr);
1748 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1749 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1750 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1751 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1752 }
1753 for (i = 0; i < NUM_REG_TEMP; i++) {
1754 if (!(data->have_temp & (1 << i)))
1755 continue;
1756 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1757 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1758 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1759 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1760 if (i > 2)
1761 continue;
1762 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1763 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1764 }
1765
1766 device_remove_file(dev, &sda_caseopen[0].dev_attr);
1767 device_remove_file(dev, &sda_caseopen[1].dev_attr);
1768
1769 device_remove_file(dev, &dev_attr_name);
1770 device_remove_file(dev, &dev_attr_cpu0_vid);
1771 }
1772
1773 /* Get the monitoring functions started */
1774 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data,
1775 enum kinds kind)
1776 {
1777 int i;
1778 u8 tmp, diode;
1779
1780 /* Start monitoring is needed */
1781 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1782 if (!(tmp & 0x01))
1783 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1784 tmp | 0x01);
1785
1786 /* Enable temperature sensors if needed */
1787 for (i = 0; i < NUM_REG_TEMP; i++) {
1788 if (!(data->have_temp & (1 << i)))
1789 continue;
1790 if (!data->reg_temp_config[i])
1791 continue;
1792 tmp = w83627ehf_read_value(data,
1793 data->reg_temp_config[i]);
1794 if (tmp & 0x01)
1795 w83627ehf_write_value(data,
1796 data->reg_temp_config[i],
1797 tmp & 0xfe);
1798 }
1799
1800 /* Enable VBAT monitoring if needed */
1801 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1802 if (!(tmp & 0x01))
1803 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1804
1805 /* Get thermal sensor types */
1806 switch (kind) {
1807 case w83627ehf:
1808 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1809 break;
1810 default:
1811 diode = 0x70;
1812 }
1813 for (i = 0; i < 3; i++) {
1814 if ((tmp & (0x02 << i)))
1815 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1816 else
1817 data->temp_type[i] = 4; /* thermistor */
1818 }
1819 }
1820
1821 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1822 int r1, int r2)
1823 {
1824 u16 tmp;
1825
1826 tmp = data->temp_src[r1];
1827 data->temp_src[r1] = data->temp_src[r2];
1828 data->temp_src[r2] = tmp;
1829
1830 tmp = data->reg_temp[r1];
1831 data->reg_temp[r1] = data->reg_temp[r2];
1832 data->reg_temp[r2] = tmp;
1833
1834 tmp = data->reg_temp_over[r1];
1835 data->reg_temp_over[r1] = data->reg_temp_over[r2];
1836 data->reg_temp_over[r2] = tmp;
1837
1838 tmp = data->reg_temp_hyst[r1];
1839 data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
1840 data->reg_temp_hyst[r2] = tmp;
1841
1842 tmp = data->reg_temp_config[r1];
1843 data->reg_temp_config[r1] = data->reg_temp_config[r2];
1844 data->reg_temp_config[r2] = tmp;
1845 }
1846
1847 static void __devinit
1848 w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
1849 struct w83627ehf_data *data)
1850 {
1851 int fan3pin, fan4pin, fan4min, fan5pin, regval;
1852
1853 superio_enter(sio_data->sioreg);
1854
1855 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1856 if (sio_data->kind == nct6775) {
1857 /* On NCT6775, fan4 shares pins with the fdc interface */
1858 fan3pin = 1;
1859 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1860 fan4min = 0;
1861 fan5pin = 0;
1862 } else if (sio_data->kind == nct6776) {
1863 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
1864 fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
1865 fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
1866 fan4min = fan4pin;
1867 } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1868 fan3pin = 1;
1869 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1870 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
1871 fan4min = fan4pin;
1872 } else {
1873 fan3pin = 1;
1874 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
1875 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
1876 fan4min = fan4pin;
1877 }
1878
1879 superio_exit(sio_data->sioreg);
1880
1881 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1882 data->has_fan |= (fan3pin << 2);
1883 data->has_fan_min |= (fan3pin << 2);
1884
1885 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1886 /*
1887 * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
1888 * register
1889 */
1890 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
1891 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
1892 } else {
1893 /*
1894 * It looks like fan4 and fan5 pins can be alternatively used
1895 * as fan on/off switches, but fan5 control is write only :/
1896 * We assume that if the serial interface is disabled, designers
1897 * connected fan5 as input unless they are emitting log 1, which
1898 * is not the default.
1899 */
1900 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1901 if ((regval & (1 << 2)) && fan4pin) {
1902 data->has_fan |= (1 << 3);
1903 data->has_fan_min |= (1 << 3);
1904 }
1905 if (!(regval & (1 << 1)) && fan5pin) {
1906 data->has_fan |= (1 << 4);
1907 data->has_fan_min |= (1 << 4);
1908 }
1909 }
1910 }
1911
1912 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1913 {
1914 struct device *dev = &pdev->dev;
1915 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1916 struct w83627ehf_data *data;
1917 struct resource *res;
1918 u8 en_vrm10;
1919 int i, err = 0;
1920
1921 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1922 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1923 err = -EBUSY;
1924 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1925 (unsigned long)res->start,
1926 (unsigned long)res->start + IOREGION_LENGTH - 1);
1927 goto exit;
1928 }
1929
1930 data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL);
1931 if (!data) {
1932 err = -ENOMEM;
1933 goto exit_release;
1934 }
1935
1936 data->addr = res->start;
1937 mutex_init(&data->lock);
1938 mutex_init(&data->update_lock);
1939 data->name = w83627ehf_device_names[sio_data->kind];
1940 platform_set_drvdata(pdev, data);
1941
1942 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1943 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1944 /* 667HG, NCT6775F, and NCT6776F have 3 pwms */
1945 data->pwm_num = (sio_data->kind == w83667hg
1946 || sio_data->kind == w83667hg_b
1947 || sio_data->kind == nct6775
1948 || sio_data->kind == nct6776) ? 3 : 4;
1949
1950 data->have_temp = 0x07;
1951 /* Check temp3 configuration bit for 667HG */
1952 if (sio_data->kind == w83667hg) {
1953 u8 reg;
1954
1955 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1956 if (reg & 0x01)
1957 data->have_temp &= ~(1 << 2);
1958 else
1959 data->in6_skip = 1; /* either temp3 or in6 */
1960 }
1961
1962 /* Deal with temperature register setup first. */
1963 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1964 int mask = 0;
1965
1966 /*
1967 * Display temperature sensor output only if it monitors
1968 * a source other than one already reported. Always display
1969 * first three temperature registers, though.
1970 */
1971 for (i = 0; i < NUM_REG_TEMP; i++) {
1972 u8 src;
1973
1974 data->reg_temp[i] = NCT6775_REG_TEMP[i];
1975 data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
1976 data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
1977 data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
1978
1979 src = w83627ehf_read_value(data,
1980 NCT6775_REG_TEMP_SOURCE[i]);
1981 src &= 0x1f;
1982 if (src && !(mask & (1 << src))) {
1983 data->have_temp |= 1 << i;
1984 mask |= 1 << src;
1985 }
1986
1987 data->temp_src[i] = src;
1988
1989 /*
1990 * Now do some register swapping if index 0..2 don't
1991 * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
1992 * Idea is to have the first three attributes
1993 * report SYSTIN, CPUIN, and AUXIN if possible
1994 * without overriding the basic system configuration.
1995 */
1996 if (i > 0 && data->temp_src[0] != 1
1997 && data->temp_src[i] == 1)
1998 w82627ehf_swap_tempreg(data, 0, i);
1999 if (i > 1 && data->temp_src[1] != 2
2000 && data->temp_src[i] == 2)
2001 w82627ehf_swap_tempreg(data, 1, i);
2002 if (i > 2 && data->temp_src[2] != 3
2003 && data->temp_src[i] == 3)
2004 w82627ehf_swap_tempreg(data, 2, i);
2005 }
2006 if (sio_data->kind == nct6776) {
2007 /*
2008 * On NCT6776, AUXTIN and VIN3 pins are shared.
2009 * Only way to detect it is to check if AUXTIN is used
2010 * as a temperature source, and if that source is
2011 * enabled.
2012 *
2013 * If that is the case, disable in6, which reports VIN3.
2014 * Otherwise disable temp3.
2015 */
2016 if (data->temp_src[2] == 3) {
2017 u8 reg;
2018
2019 if (data->reg_temp_config[2])
2020 reg = w83627ehf_read_value(data,
2021 data->reg_temp_config[2]);
2022 else
2023 reg = 0; /* Assume AUXTIN is used */
2024
2025 if (reg & 0x01)
2026 data->have_temp &= ~(1 << 2);
2027 else
2028 data->in6_skip = 1;
2029 }
2030 data->temp_label = nct6776_temp_label;
2031 } else {
2032 data->temp_label = nct6775_temp_label;
2033 }
2034 } else if (sio_data->kind == w83667hg_b) {
2035 u8 reg;
2036
2037 /*
2038 * Temperature sources are selected with bank 0, registers 0x49
2039 * and 0x4a.
2040 */
2041 for (i = 0; i < ARRAY_SIZE(W83627EHF_REG_TEMP); i++) {
2042 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
2043 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
2044 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
2045 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
2046 }
2047 reg = w83627ehf_read_value(data, 0x4a);
2048 data->temp_src[0] = reg >> 5;
2049 reg = w83627ehf_read_value(data, 0x49);
2050 data->temp_src[1] = reg & 0x07;
2051 data->temp_src[2] = (reg >> 4) & 0x07;
2052
2053 /*
2054 * W83667HG-B has another temperature register at 0x7e.
2055 * The temperature source is selected with register 0x7d.
2056 * Support it if the source differs from already reported
2057 * sources.
2058 */
2059 reg = w83627ehf_read_value(data, 0x7d);
2060 reg &= 0x07;
2061 if (reg != data->temp_src[0] && reg != data->temp_src[1]
2062 && reg != data->temp_src[2]) {
2063 data->temp_src[3] = reg;
2064 data->have_temp |= 1 << 3;
2065 }
2066
2067 /*
2068 * Chip supports either AUXTIN or VIN3. Try to find out which
2069 * one.
2070 */
2071 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
2072 if (data->temp_src[2] == 2 && (reg & 0x01))
2073 data->have_temp &= ~(1 << 2);
2074
2075 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
2076 || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
2077 data->in6_skip = 1;
2078
2079 data->temp_label = w83667hg_b_temp_label;
2080 } else {
2081 /* Temperature sources are fixed */
2082 for (i = 0; i < 3; i++) {
2083 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
2084 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
2085 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
2086 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
2087 }
2088 }
2089
2090 if (sio_data->kind == nct6775) {
2091 data->has_fan_div = true;
2092 data->fan_from_reg = fan_from_reg16;
2093 data->fan_from_reg_min = fan_from_reg8;
2094 data->REG_PWM = NCT6775_REG_PWM;
2095 data->REG_TARGET = NCT6775_REG_TARGET;
2096 data->REG_FAN = NCT6775_REG_FAN;
2097 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2098 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2099 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2100 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2101 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
2102 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2103 } else if (sio_data->kind == nct6776) {
2104 data->has_fan_div = false;
2105 data->fan_from_reg = fan_from_reg13;
2106 data->fan_from_reg_min = fan_from_reg13;
2107 data->REG_PWM = NCT6775_REG_PWM;
2108 data->REG_TARGET = NCT6775_REG_TARGET;
2109 data->REG_FAN = NCT6775_REG_FAN;
2110 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2111 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2112 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2113 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2114 } else if (sio_data->kind == w83667hg_b) {
2115 data->has_fan_div = true;
2116 data->fan_from_reg = fan_from_reg8;
2117 data->fan_from_reg_min = fan_from_reg8;
2118 data->REG_PWM = W83627EHF_REG_PWM;
2119 data->REG_TARGET = W83627EHF_REG_TARGET;
2120 data->REG_FAN = W83627EHF_REG_FAN;
2121 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2122 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2123 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2124 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2125 data->REG_FAN_MAX_OUTPUT =
2126 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2127 data->REG_FAN_STEP_OUTPUT =
2128 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2129 } else {
2130 data->has_fan_div = true;
2131 data->fan_from_reg = fan_from_reg8;
2132 data->fan_from_reg_min = fan_from_reg8;
2133 data->REG_PWM = W83627EHF_REG_PWM;
2134 data->REG_TARGET = W83627EHF_REG_TARGET;
2135 data->REG_FAN = W83627EHF_REG_FAN;
2136 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2137 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2138 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2139 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2140 data->REG_FAN_MAX_OUTPUT =
2141 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2142 data->REG_FAN_STEP_OUTPUT =
2143 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2144 }
2145
2146 /* Initialize the chip */
2147 w83627ehf_init_device(data, sio_data->kind);
2148
2149 data->vrm = vid_which_vrm();
2150 superio_enter(sio_data->sioreg);
2151 /* Read VID value */
2152 if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2153 sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2154 /* W83667HG has different pins for VID input and output, so
2155 we can get the VID input values directly at logical device D
2156 0xe3. */
2157 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2158 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2159 err = device_create_file(dev, &dev_attr_cpu0_vid);
2160 if (err)
2161 goto exit_release;
2162 } else {
2163 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2164 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2165 /* Set VID input sensibility if needed. In theory the
2166 BIOS should have set it, but in practice it's not
2167 always the case. We only do it for the W83627EHF/EHG
2168 because the W83627DHG is more complex in this
2169 respect. */
2170 if (sio_data->kind == w83627ehf) {
2171 en_vrm10 = superio_inb(sio_data->sioreg,
2172 SIO_REG_EN_VRM10);
2173 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2174 dev_warn(dev, "Setting VID input "
2175 "voltage to TTL\n");
2176 superio_outb(sio_data->sioreg,
2177 SIO_REG_EN_VRM10,
2178 en_vrm10 & ~0x08);
2179 } else if (!(en_vrm10 & 0x08)
2180 && data->vrm == 100) {
2181 dev_warn(dev, "Setting VID input "
2182 "voltage to VRM10\n");
2183 superio_outb(sio_data->sioreg,
2184 SIO_REG_EN_VRM10,
2185 en_vrm10 | 0x08);
2186 }
2187 }
2188
2189 data->vid = superio_inb(sio_data->sioreg,
2190 SIO_REG_VID_DATA);
2191 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2192 data->vid &= 0x3f;
2193
2194 err = device_create_file(dev, &dev_attr_cpu0_vid);
2195 if (err)
2196 goto exit_release;
2197 } else {
2198 dev_info(dev, "VID pins in output mode, CPU VID not "
2199 "available\n");
2200 }
2201 }
2202
2203 if (fan_debounce &&
2204 (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2205 u8 tmp;
2206
2207 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2208 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2209 if (sio_data->kind == nct6776)
2210 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2211 0x3e | tmp);
2212 else
2213 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2214 0x1e | tmp);
2215 pr_info("Enabled fan debounce for chip %s\n", data->name);
2216 }
2217
2218 superio_exit(sio_data->sioreg);
2219
2220 w83627ehf_check_fan_inputs(sio_data, data);
2221
2222 /* Read fan clock dividers immediately */
2223 w83627ehf_update_fan_div_common(dev, data);
2224
2225 /* Read pwm data to save original values */
2226 w83627ehf_update_pwm_common(dev, data);
2227 for (i = 0; i < data->pwm_num; i++)
2228 data->pwm_enable_orig[i] = data->pwm_enable[i];
2229
2230 /* Read pwm data to save original values */
2231 w83627ehf_update_pwm_common(dev, data);
2232 for (i = 0; i < data->pwm_num; i++)
2233 data->pwm_enable_orig[i] = data->pwm_enable[i];
2234
2235 /* Register sysfs hooks */
2236 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2237 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2238 if (err)
2239 goto exit_remove;
2240 }
2241
2242 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2243 struct sensor_device_attribute *attr =
2244 &sda_sf3_max_step_arrays[i];
2245 if (data->REG_FAN_STEP_OUTPUT &&
2246 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2247 err = device_create_file(dev, &attr->dev_attr);
2248 if (err)
2249 goto exit_remove;
2250 }
2251 }
2252 /* if fan4 is enabled create the sf3 files for it */
2253 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2254 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2255 err = device_create_file(dev,
2256 &sda_sf3_arrays_fan4[i].dev_attr);
2257 if (err)
2258 goto exit_remove;
2259 }
2260
2261 for (i = 0; i < data->in_num; i++) {
2262 if ((i == 6) && data->in6_skip)
2263 continue;
2264 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2265 || (err = device_create_file(dev,
2266 &sda_in_alarm[i].dev_attr))
2267 || (err = device_create_file(dev,
2268 &sda_in_min[i].dev_attr))
2269 || (err = device_create_file(dev,
2270 &sda_in_max[i].dev_attr)))
2271 goto exit_remove;
2272 }
2273
2274 for (i = 0; i < 5; i++) {
2275 if (data->has_fan & (1 << i)) {
2276 if ((err = device_create_file(dev,
2277 &sda_fan_input[i].dev_attr))
2278 || (err = device_create_file(dev,
2279 &sda_fan_alarm[i].dev_attr)))
2280 goto exit_remove;
2281 if (sio_data->kind != nct6776) {
2282 err = device_create_file(dev,
2283 &sda_fan_div[i].dev_attr);
2284 if (err)
2285 goto exit_remove;
2286 }
2287 if (data->has_fan_min & (1 << i)) {
2288 err = device_create_file(dev,
2289 &sda_fan_min[i].dev_attr);
2290 if (err)
2291 goto exit_remove;
2292 }
2293 if (i < data->pwm_num &&
2294 ((err = device_create_file(dev,
2295 &sda_pwm[i].dev_attr))
2296 || (err = device_create_file(dev,
2297 &sda_pwm_mode[i].dev_attr))
2298 || (err = device_create_file(dev,
2299 &sda_pwm_enable[i].dev_attr))
2300 || (err = device_create_file(dev,
2301 &sda_target_temp[i].dev_attr))
2302 || (err = device_create_file(dev,
2303 &sda_tolerance[i].dev_attr))))
2304 goto exit_remove;
2305 }
2306 }
2307
2308 for (i = 0; i < NUM_REG_TEMP; i++) {
2309 if (!(data->have_temp & (1 << i)))
2310 continue;
2311 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2312 if (err)
2313 goto exit_remove;
2314 if (data->temp_label) {
2315 err = device_create_file(dev,
2316 &sda_temp_label[i].dev_attr);
2317 if (err)
2318 goto exit_remove;
2319 }
2320 if (data->reg_temp_over[i]) {
2321 err = device_create_file(dev,
2322 &sda_temp_max[i].dev_attr);
2323 if (err)
2324 goto exit_remove;
2325 }
2326 if (data->reg_temp_hyst[i]) {
2327 err = device_create_file(dev,
2328 &sda_temp_max_hyst[i].dev_attr);
2329 if (err)
2330 goto exit_remove;
2331 }
2332 if (i > 2)
2333 continue;
2334 if ((err = device_create_file(dev,
2335 &sda_temp_alarm[i].dev_attr))
2336 || (err = device_create_file(dev,
2337 &sda_temp_type[i].dev_attr)))
2338 goto exit_remove;
2339 }
2340
2341 err = device_create_file(dev, &sda_caseopen[0].dev_attr);
2342 if (err)
2343 goto exit_remove;
2344
2345 if (sio_data->kind == nct6776) {
2346 err = device_create_file(dev, &sda_caseopen[1].dev_attr);
2347 if (err)
2348 goto exit_remove;
2349 }
2350
2351 err = device_create_file(dev, &dev_attr_name);
2352 if (err)
2353 goto exit_remove;
2354
2355 data->hwmon_dev = hwmon_device_register(dev);
2356 if (IS_ERR(data->hwmon_dev)) {
2357 err = PTR_ERR(data->hwmon_dev);
2358 goto exit_remove;
2359 }
2360
2361 return 0;
2362
2363 exit_remove:
2364 w83627ehf_device_remove_files(dev);
2365 kfree(data);
2366 platform_set_drvdata(pdev, NULL);
2367 exit_release:
2368 release_region(res->start, IOREGION_LENGTH);
2369 exit:
2370 return err;
2371 }
2372
2373 static int __devexit w83627ehf_remove(struct platform_device *pdev)
2374 {
2375 struct w83627ehf_data *data = platform_get_drvdata(pdev);
2376
2377 hwmon_device_unregister(data->hwmon_dev);
2378 w83627ehf_device_remove_files(&pdev->dev);
2379 release_region(data->addr, IOREGION_LENGTH);
2380 platform_set_drvdata(pdev, NULL);
2381 kfree(data);
2382
2383 return 0;
2384 }
2385
2386 static struct platform_driver w83627ehf_driver = {
2387 .driver = {
2388 .owner = THIS_MODULE,
2389 .name = DRVNAME,
2390 },
2391 .probe = w83627ehf_probe,
2392 .remove = __devexit_p(w83627ehf_remove),
2393 };
2394
2395 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2396 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2397 struct w83627ehf_sio_data *sio_data)
2398 {
2399 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
2400 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
2401 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
2402 static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
2403 static const char __initdata sio_name_W83667HG[] = "W83667HG";
2404 static const char __initdata sio_name_W83667HG_B[] = "W83667HG-B";
2405 static const char __initdata sio_name_NCT6775[] = "NCT6775F";
2406 static const char __initdata sio_name_NCT6776[] = "NCT6776F";
2407
2408 u16 val;
2409 const char *sio_name;
2410
2411 superio_enter(sioaddr);
2412
2413 if (force_id)
2414 val = force_id;
2415 else
2416 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2417 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2418 switch (val & SIO_ID_MASK) {
2419 case SIO_W83627EHF_ID:
2420 sio_data->kind = w83627ehf;
2421 sio_name = sio_name_W83627EHF;
2422 break;
2423 case SIO_W83627EHG_ID:
2424 sio_data->kind = w83627ehf;
2425 sio_name = sio_name_W83627EHG;
2426 break;
2427 case SIO_W83627DHG_ID:
2428 sio_data->kind = w83627dhg;
2429 sio_name = sio_name_W83627DHG;
2430 break;
2431 case SIO_W83627DHG_P_ID:
2432 sio_data->kind = w83627dhg_p;
2433 sio_name = sio_name_W83627DHG_P;
2434 break;
2435 case SIO_W83667HG_ID:
2436 sio_data->kind = w83667hg;
2437 sio_name = sio_name_W83667HG;
2438 break;
2439 case SIO_W83667HG_B_ID:
2440 sio_data->kind = w83667hg_b;
2441 sio_name = sio_name_W83667HG_B;
2442 break;
2443 case SIO_NCT6775_ID:
2444 sio_data->kind = nct6775;
2445 sio_name = sio_name_NCT6775;
2446 break;
2447 case SIO_NCT6776_ID:
2448 sio_data->kind = nct6776;
2449 sio_name = sio_name_NCT6776;
2450 break;
2451 default:
2452 if (val != 0xffff)
2453 pr_debug("unsupported chip ID: 0x%04x\n", val);
2454 superio_exit(sioaddr);
2455 return -ENODEV;
2456 }
2457
2458 /* We have a known chip, find the HWM I/O address */
2459 superio_select(sioaddr, W83627EHF_LD_HWM);
2460 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2461 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2462 *addr = val & IOREGION_ALIGNMENT;
2463 if (*addr == 0) {
2464 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2465 superio_exit(sioaddr);
2466 return -ENODEV;
2467 }
2468
2469 /* Activate logical device if needed */
2470 val = superio_inb(sioaddr, SIO_REG_ENABLE);
2471 if (!(val & 0x01)) {
2472 pr_warn("Forcibly enabling Super-I/O. "
2473 "Sensor is probably unusable.\n");
2474 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2475 }
2476
2477 superio_exit(sioaddr);
2478 pr_info("Found %s chip at %#x\n", sio_name, *addr);
2479 sio_data->sioreg = sioaddr;
2480
2481 return 0;
2482 }
2483
2484 /* when Super-I/O functions move to a separate file, the Super-I/O
2485 * bus will manage the lifetime of the device and this module will only keep
2486 * track of the w83627ehf driver. But since we platform_device_alloc(), we
2487 * must keep track of the device */
2488 static struct platform_device *pdev;
2489
2490 static int __init sensors_w83627ehf_init(void)
2491 {
2492 int err;
2493 unsigned short address;
2494 struct resource res;
2495 struct w83627ehf_sio_data sio_data;
2496
2497 /* initialize sio_data->kind and sio_data->sioreg.
2498 *
2499 * when Super-I/O functions move to a separate file, the Super-I/O
2500 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2501 * w83627ehf hardware monitor, and call probe() */
2502 if (w83627ehf_find(0x2e, &address, &sio_data) &&
2503 w83627ehf_find(0x4e, &address, &sio_data))
2504 return -ENODEV;
2505
2506 err = platform_driver_register(&w83627ehf_driver);
2507 if (err)
2508 goto exit;
2509
2510 pdev = platform_device_alloc(DRVNAME, address);
2511 if (!pdev) {
2512 err = -ENOMEM;
2513 pr_err("Device allocation failed\n");
2514 goto exit_unregister;
2515 }
2516
2517 err = platform_device_add_data(pdev, &sio_data,
2518 sizeof(struct w83627ehf_sio_data));
2519 if (err) {
2520 pr_err("Platform data allocation failed\n");
2521 goto exit_device_put;
2522 }
2523
2524 memset(&res, 0, sizeof(res));
2525 res.name = DRVNAME;
2526 res.start = address + IOREGION_OFFSET;
2527 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2528 res.flags = IORESOURCE_IO;
2529
2530 err = acpi_check_resource_conflict(&res);
2531 if (err)
2532 goto exit_device_put;
2533
2534 err = platform_device_add_resources(pdev, &res, 1);
2535 if (err) {
2536 pr_err("Device resource addition failed (%d)\n", err);
2537 goto exit_device_put;
2538 }
2539
2540 /* platform_device_add calls probe() */
2541 err = platform_device_add(pdev);
2542 if (err) {
2543 pr_err("Device addition failed (%d)\n", err);
2544 goto exit_device_put;
2545 }
2546
2547 return 0;
2548
2549 exit_device_put:
2550 platform_device_put(pdev);
2551 exit_unregister:
2552 platform_driver_unregister(&w83627ehf_driver);
2553 exit:
2554 return err;
2555 }
2556
2557 static void __exit sensors_w83627ehf_exit(void)
2558 {
2559 platform_device_unregister(pdev);
2560 platform_driver_unregister(&w83627ehf_driver);
2561 }
2562
2563 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
2564 MODULE_DESCRIPTION("W83627EHF driver");
2565 MODULE_LICENSE("GPL");
2566
2567 module_init(sensors_w83627ehf_init);
2568 module_exit(sensors_w83627ehf_exit);
Linux 2.6 libata-dev (mirror)