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[media] omap3isp: Prevent pipelines that contain a crashed entity from starting
[linux-2.6/libata-dev.git] / drivers / media / video / omap3isp / isp.c
blob3db8583497ee4b95a4b1a18142e99a8978461421
1 /*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55 #include <asm/cacheflush.h>
56
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
69
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
72
73 #include "isp.h"
74 #include "ispreg.h"
75 #include "ispccdc.h"
76 #include "isppreview.h"
77 #include "ispresizer.h"
78 #include "ispcsi2.h"
79 #include "ispccp2.h"
80 #include "isph3a.h"
81 #include "isphist.h"
82
83 static unsigned int autoidle;
84 module_param(autoidle, int, 0444);
85 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
86
87 static void isp_save_ctx(struct isp_device *isp);
88
89 static void isp_restore_ctx(struct isp_device *isp);
90
91 static const struct isp_res_mapping isp_res_maps[] = {
92 {
93 .isp_rev = ISP_REVISION_2_0,
94 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
95 1 << OMAP3_ISP_IOMEM_CCP2 |
96 1 << OMAP3_ISP_IOMEM_CCDC |
97 1 << OMAP3_ISP_IOMEM_HIST |
98 1 << OMAP3_ISP_IOMEM_H3A |
99 1 << OMAP3_ISP_IOMEM_PREV |
100 1 << OMAP3_ISP_IOMEM_RESZ |
101 1 << OMAP3_ISP_IOMEM_SBL |
102 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
103 1 << OMAP3_ISP_IOMEM_CSIPHY2,
104 },
105 {
106 .isp_rev = ISP_REVISION_15_0,
107 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
108 1 << OMAP3_ISP_IOMEM_CCP2 |
109 1 << OMAP3_ISP_IOMEM_CCDC |
110 1 << OMAP3_ISP_IOMEM_HIST |
111 1 << OMAP3_ISP_IOMEM_H3A |
112 1 << OMAP3_ISP_IOMEM_PREV |
113 1 << OMAP3_ISP_IOMEM_RESZ |
114 1 << OMAP3_ISP_IOMEM_SBL |
115 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
116 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
118 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
121 },
122 };
123
124 /* Structure for saving/restoring ISP module registers */
125 static struct isp_reg isp_reg_list[] = {
126 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
127 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
128 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
129 {0, ISP_TOK_TERM, 0}
130 };
131
132 /*
133 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
134 * @isp: OMAP3 ISP device
135 *
136 * In order to force posting of pending writes, we need to write and
137 * readback the same register, in this case the revision register.
138 *
139 * See this link for reference:
140 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
141 */
142 void omap3isp_flush(struct isp_device *isp)
143 {
144 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
145 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
146 }
147
148 /*
149 * isp_enable_interrupts - Enable ISP interrupts.
150 * @isp: OMAP3 ISP device
151 */
152 static void isp_enable_interrupts(struct isp_device *isp)
153 {
154 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
155 | IRQ0ENABLE_CSIB_IRQ
156 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
157 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
158 | IRQ0ENABLE_CCDC_VD0_IRQ
159 | IRQ0ENABLE_CCDC_VD1_IRQ
160 | IRQ0ENABLE_HS_VS_IRQ
161 | IRQ0ENABLE_HIST_DONE_IRQ
162 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
163 | IRQ0ENABLE_H3A_AF_DONE_IRQ
164 | IRQ0ENABLE_PRV_DONE_IRQ
165 | IRQ0ENABLE_RSZ_DONE_IRQ;
166
167 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
168 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
169 }
170
171 /*
172 * isp_disable_interrupts - Disable ISP interrupts.
173 * @isp: OMAP3 ISP device
174 */
175 static void isp_disable_interrupts(struct isp_device *isp)
176 {
177 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
178 }
179
180 /**
181 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
182 * @isp: OMAP3 ISP device
183 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
184 * @xclksel: XCLK to configure (0 = A, 1 = B).
185 *
186 * Configures the specified MCLK divisor in the ISP timing control register
187 * (TCTRL_CTRL) to generate the desired xclk clock value.
188 *
189 * Divisor = cam_mclk_hz / xclk
190 *
191 * Returns the final frequency that is actually being generated
192 **/
193 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
194 {
195 u32 divisor;
196 u32 currentxclk;
197 unsigned long mclk_hz;
198
199 if (!omap3isp_get(isp))
200 return 0;
201
202 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
203
204 if (xclk >= mclk_hz) {
205 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
206 currentxclk = mclk_hz;
207 } else if (xclk >= 2) {
208 divisor = mclk_hz / xclk;
209 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
210 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
211 currentxclk = mclk_hz / divisor;
212 } else {
213 divisor = xclk;
214 currentxclk = 0;
215 }
216
217 switch (xclksel) {
218 case ISP_XCLK_A:
219 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
220 ISPTCTRL_CTRL_DIVA_MASK,
221 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
222 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
223 currentxclk);
224 break;
225 case ISP_XCLK_B:
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVB_MASK,
228 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
230 currentxclk);
231 break;
232 case ISP_XCLK_NONE:
233 default:
234 omap3isp_put(isp);
235 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
236 "xclk. Must be 0 (A) or 1 (B).\n");
237 return -EINVAL;
238 }
239
240 /* Do we go from stable whatever to clock? */
241 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
242 omap3isp_get(isp);
243 /* Stopping the clock. */
244 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
245 omap3isp_put(isp);
246
247 isp->xclk_divisor[xclksel - 1] = divisor;
248
249 omap3isp_put(isp);
250
251 return currentxclk;
252 }
253
254 /*
255 * isp_power_settings - Sysconfig settings, for Power Management.
256 * @isp: OMAP3 ISP device
257 * @idle: Consider idle state.
258 *
259 * Sets the power settings for the ISP, and SBL bus.
260 */
261 static void isp_power_settings(struct isp_device *isp, int idle)
262 {
263 isp_reg_writel(isp,
264 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
265 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
266 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
267 ((isp->revision == ISP_REVISION_15_0) ?
268 ISP_SYSCONFIG_AUTOIDLE : 0),
269 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
270
271 if (isp->autoidle)
272 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
273 ISP_CTRL);
274 }
275
276 /*
277 * Configure the bridge and lane shifter. Valid inputs are
278 *
279 * CCDC_INPUT_PARALLEL: Parallel interface
280 * CCDC_INPUT_CSI2A: CSI2a receiver
281 * CCDC_INPUT_CCP2B: CCP2b receiver
282 * CCDC_INPUT_CSI2C: CSI2c receiver
283 *
284 * The bridge and lane shifter are configured according to the selected input
285 * and the ISP platform data.
286 */
287 void omap3isp_configure_bridge(struct isp_device *isp,
288 enum ccdc_input_entity input,
289 const struct isp_parallel_platform_data *pdata,
290 unsigned int shift)
291 {
292 u32 ispctrl_val;
293
294 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
295 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
296 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
297 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
298 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
299
300 switch (input) {
301 case CCDC_INPUT_PARALLEL:
302 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
303 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
304 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
305 shift += pdata->data_lane_shift * 2;
306 break;
307
308 case CCDC_INPUT_CSI2A:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
310 break;
311
312 case CCDC_INPUT_CCP2B:
313 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
314 break;
315
316 case CCDC_INPUT_CSI2C:
317 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
318 break;
319
320 default:
321 return;
322 }
323
324 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
325
326 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
327 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
328
329 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
330 }
331
332 /**
333 * isp_set_pixel_clock - Configures the ISP pixel clock
334 * @isp: OMAP3 ISP device
335 * @pixelclk: Average pixel clock in Hz
336 *
337 * Set the average pixel clock required by the sensor. The ISP will use the
338 * lowest possible memory bandwidth settings compatible with the clock.
339 **/
340 static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
341 {
342 isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
343 }
344
345 void omap3isp_hist_dma_done(struct isp_device *isp)
346 {
347 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
348 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
349 /* Histogram cannot be enabled in this frame anymore */
350 atomic_set(&isp->isp_hist.buf_err, 1);
351 dev_dbg(isp->dev, "hist: Out of synchronization with "
352 "CCDC. Ignoring next buffer.\n");
353 }
354 }
355
356 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
357 {
358 static const char *name[] = {
359 "CSIA_IRQ",
360 "res1",
361 "res2",
362 "CSIB_LCM_IRQ",
363 "CSIB_IRQ",
364 "res5",
365 "res6",
366 "res7",
367 "CCDC_VD0_IRQ",
368 "CCDC_VD1_IRQ",
369 "CCDC_VD2_IRQ",
370 "CCDC_ERR_IRQ",
371 "H3A_AF_DONE_IRQ",
372 "H3A_AWB_DONE_IRQ",
373 "res14",
374 "res15",
375 "HIST_DONE_IRQ",
376 "CCDC_LSC_DONE",
377 "CCDC_LSC_PREFETCH_COMPLETED",
378 "CCDC_LSC_PREFETCH_ERROR",
379 "PRV_DONE_IRQ",
380 "CBUFF_IRQ",
381 "res22",
382 "res23",
383 "RSZ_DONE_IRQ",
384 "OVF_IRQ",
385 "res26",
386 "res27",
387 "MMU_ERR_IRQ",
388 "OCP_ERR_IRQ",
389 "SEC_ERR_IRQ",
390 "HS_VS_IRQ",
391 };
392 int i;
393
394 dev_dbg(isp->dev, "ISP IRQ: ");
395
396 for (i = 0; i < ARRAY_SIZE(name); i++) {
397 if ((1 << i) & irqstatus)
398 printk(KERN_CONT "%s ", name[i]);
399 }
400 printk(KERN_CONT "\n");
401 }
402
403 static void isp_isr_sbl(struct isp_device *isp)
404 {
405 struct device *dev = isp->dev;
406 struct isp_pipeline *pipe;
407 u32 sbl_pcr;
408
409 /*
410 * Handle shared buffer logic overflows for video buffers.
411 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
412 */
413 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
414 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
415 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
416
417 if (sbl_pcr)
418 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
419
420 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
421 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
422 if (pipe != NULL)
423 pipe->error = true;
424 }
425
426 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
427 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
428 if (pipe != NULL)
429 pipe->error = true;
430 }
431
432 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
433 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
434 if (pipe != NULL)
435 pipe->error = true;
436 }
437
438 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
439 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
440 if (pipe != NULL)
441 pipe->error = true;
442 }
443
444 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
445 | ISPSBL_PCR_RSZ2_WBL_OVF
446 | ISPSBL_PCR_RSZ3_WBL_OVF
447 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
448 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
449 if (pipe != NULL)
450 pipe->error = true;
451 }
452
453 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
454 omap3isp_stat_sbl_overflow(&isp->isp_af);
455
456 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
457 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
458 }
459
460 /*
461 * isp_isr - Interrupt Service Routine for Camera ISP module.
462 * @irq: Not used currently.
463 * @_isp: Pointer to the OMAP3 ISP device
464 *
465 * Handles the corresponding callback if plugged in.
466 *
467 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
468 * IRQ wasn't handled.
469 */
470 static irqreturn_t isp_isr(int irq, void *_isp)
471 {
472 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
473 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
474 IRQ0STATUS_CCDC_VD0_IRQ |
475 IRQ0STATUS_CCDC_VD1_IRQ |
476 IRQ0STATUS_HS_VS_IRQ;
477 struct isp_device *isp = _isp;
478 u32 irqstatus;
479
480 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
481 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
482
483 isp_isr_sbl(isp);
484
485 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
486 omap3isp_csi2_isr(&isp->isp_csi2a);
487
488 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
489 omap3isp_ccp2_isr(&isp->isp_ccp2);
490
491 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
492 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
493 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
494 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
495 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
496 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
497 omap3isp_stat_isr_frame_sync(&isp->isp_af);
498 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
499 }
500
501 if (irqstatus & ccdc_events)
502 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
503
504 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
505 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
506 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
507 omap3isp_preview_isr(&isp->isp_prev);
508 }
509
510 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
511 omap3isp_resizer_isr(&isp->isp_res);
512
513 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
514 omap3isp_stat_isr(&isp->isp_aewb);
515
516 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
517 omap3isp_stat_isr(&isp->isp_af);
518
519 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
520 omap3isp_stat_isr(&isp->isp_hist);
521
522 omap3isp_flush(isp);
523
524 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
525 isp_isr_dbg(isp, irqstatus);
526 #endif
527
528 return IRQ_HANDLED;
529 }
530
531 /* -----------------------------------------------------------------------------
532 * Pipeline power management
533 *
534 * Entities must be powered up when part of a pipeline that contains at least
535 * one open video device node.
536 *
537 * To achieve this use the entity use_count field to track the number of users.
538 * For entities corresponding to video device nodes the use_count field stores
539 * the users count of the node. For entities corresponding to subdevs the
540 * use_count field stores the total number of users of all video device nodes
541 * in the pipeline.
542 *
543 * The omap3isp_pipeline_pm_use() function must be called in the open() and
544 * close() handlers of video device nodes. It increments or decrements the use
545 * count of all subdev entities in the pipeline.
546 *
547 * To react to link management on powered pipelines, the link setup notification
548 * callback updates the use count of all entities in the source and sink sides
549 * of the link.
550 */
551
552 /*
553 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
554 * @entity: The entity
555 *
556 * Return the total number of users of all video device nodes in the pipeline.
557 */
558 static int isp_pipeline_pm_use_count(struct media_entity *entity)
559 {
560 struct media_entity_graph graph;
561 int use = 0;
562
563 media_entity_graph_walk_start(&graph, entity);
564
565 while ((entity = media_entity_graph_walk_next(&graph))) {
566 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
567 use += entity->use_count;
568 }
569
570 return use;
571 }
572
573 /*
574 * isp_pipeline_pm_power_one - Apply power change to an entity
575 * @entity: The entity
576 * @change: Use count change
577 *
578 * Change the entity use count by @change. If the entity is a subdev update its
579 * power state by calling the core::s_power operation when the use count goes
580 * from 0 to != 0 or from != 0 to 0.
581 *
582 * Return 0 on success or a negative error code on failure.
583 */
584 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
585 {
586 struct v4l2_subdev *subdev;
587 int ret;
588
589 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
590 ? media_entity_to_v4l2_subdev(entity) : NULL;
591
592 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
593 ret = v4l2_subdev_call(subdev, core, s_power, 1);
594 if (ret < 0 && ret != -ENOIOCTLCMD)
595 return ret;
596 }
597
598 entity->use_count += change;
599 WARN_ON(entity->use_count < 0);
600
601 if (entity->use_count == 0 && change < 0 && subdev != NULL)
602 v4l2_subdev_call(subdev, core, s_power, 0);
603
604 return 0;
605 }
606
607 /*
608 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
609 * @entity: The entity
610 * @change: Use count change
611 *
612 * Walk the pipeline to update the use count and the power state of all non-node
613 * entities.
614 *
615 * Return 0 on success or a negative error code on failure.
616 */
617 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
618 {
619 struct media_entity_graph graph;
620 struct media_entity *first = entity;
621 int ret = 0;
622
623 if (!change)
624 return 0;
625
626 media_entity_graph_walk_start(&graph, entity);
627
628 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
629 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
630 ret = isp_pipeline_pm_power_one(entity, change);
631
632 if (!ret)
633 return 0;
634
635 media_entity_graph_walk_start(&graph, first);
636
637 while ((first = media_entity_graph_walk_next(&graph))
638 && first != entity)
639 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
640 isp_pipeline_pm_power_one(first, -change);
641
642 return ret;
643 }
644
645 /*
646 * omap3isp_pipeline_pm_use - Update the use count of an entity
647 * @entity: The entity
648 * @use: Use (1) or stop using (0) the entity
649 *
650 * Update the use count of all entities in the pipeline and power entities on or
651 * off accordingly.
652 *
653 * Return 0 on success or a negative error code on failure. Powering entities
654 * off is assumed to never fail. No failure can occur when the use parameter is
655 * set to 0.
656 */
657 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
658 {
659 int change = use ? 1 : -1;
660 int ret;
661
662 mutex_lock(&entity->parent->graph_mutex);
663
664 /* Apply use count to node. */
665 entity->use_count += change;
666 WARN_ON(entity->use_count < 0);
667
668 /* Apply power change to connected non-nodes. */
669 ret = isp_pipeline_pm_power(entity, change);
670 if (ret < 0)
671 entity->use_count -= change;
672
673 mutex_unlock(&entity->parent->graph_mutex);
674
675 return ret;
676 }
677
678 /*
679 * isp_pipeline_link_notify - Link management notification callback
680 * @source: Pad at the start of the link
681 * @sink: Pad at the end of the link
682 * @flags: New link flags that will be applied
683 *
684 * React to link management on powered pipelines by updating the use count of
685 * all entities in the source and sink sides of the link. Entities are powered
686 * on or off accordingly.
687 *
688 * Return 0 on success or a negative error code on failure. Powering entities
689 * off is assumed to never fail. This function will not fail for disconnection
690 * events.
691 */
692 static int isp_pipeline_link_notify(struct media_pad *source,
693 struct media_pad *sink, u32 flags)
694 {
695 int source_use = isp_pipeline_pm_use_count(source->entity);
696 int sink_use = isp_pipeline_pm_use_count(sink->entity);
697 int ret;
698
699 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
700 /* Powering off entities is assumed to never fail. */
701 isp_pipeline_pm_power(source->entity, -sink_use);
702 isp_pipeline_pm_power(sink->entity, -source_use);
703 return 0;
704 }
705
706 ret = isp_pipeline_pm_power(source->entity, sink_use);
707 if (ret < 0)
708 return ret;
709
710 ret = isp_pipeline_pm_power(sink->entity, source_use);
711 if (ret < 0)
712 isp_pipeline_pm_power(source->entity, -sink_use);
713
714 return ret;
715 }
716
717 /* -----------------------------------------------------------------------------
718 * Pipeline stream management
719 */
720
721 /*
722 * isp_pipeline_enable - Enable streaming on a pipeline
723 * @pipe: ISP pipeline
724 * @mode: Stream mode (single shot or continuous)
725 *
726 * Walk the entities chain starting at the pipeline output video node and start
727 * all modules in the chain in the given mode.
728 *
729 * Return 0 if successful, or the return value of the failed video::s_stream
730 * operation otherwise.
731 */
732 static int isp_pipeline_enable(struct isp_pipeline *pipe,
733 enum isp_pipeline_stream_state mode)
734 {
735 struct isp_device *isp = pipe->output->isp;
736 struct media_entity *entity;
737 struct media_pad *pad;
738 struct v4l2_subdev *subdev;
739 unsigned long flags;
740 int ret;
741
742 /* If the preview engine crashed it might not respond to read/write
743 * operations on the L4 bus. This would result in a bus fault and a
744 * kernel oops. Refuse to start streaming in that case. This check must
745 * be performed before the loop below to avoid starting entities if the
746 * pipeline won't start anyway (those entities would then likely fail to
747 * stop, making the problem worse).
748 */
749 if ((pipe->entities & isp->crashed) &
750 (1U << isp->isp_prev.subdev.entity.id))
751 return -EIO;
752
753 spin_lock_irqsave(&pipe->lock, flags);
754 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
755 spin_unlock_irqrestore(&pipe->lock, flags);
756
757 pipe->do_propagation = false;
758
759 entity = &pipe->output->video.entity;
760 while (1) {
761 pad = &entity->pads[0];
762 if (!(pad->flags & MEDIA_PAD_FL_SINK))
763 break;
764
765 pad = media_entity_remote_source(pad);
766 if (pad == NULL ||
767 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
768 break;
769
770 entity = pad->entity;
771 subdev = media_entity_to_v4l2_subdev(entity);
772
773 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
774 if (ret < 0 && ret != -ENOIOCTLCMD)
775 return ret;
776
777 if (subdev == &isp->isp_ccdc.subdev) {
778 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
779 s_stream, mode);
780 v4l2_subdev_call(&isp->isp_af.subdev, video,
781 s_stream, mode);
782 v4l2_subdev_call(&isp->isp_hist.subdev, video,
783 s_stream, mode);
784 pipe->do_propagation = true;
785 }
786 }
787
788 /* Frame number propagation. In continuous streaming mode the number
789 * is incremented in the frame start ISR. In mem-to-mem mode
790 * singleshot is used and frame start IRQs are not available.
791 * Thus we have to increment the number here.
792 */
793 if (pipe->do_propagation && mode == ISP_PIPELINE_STREAM_SINGLESHOT)
794 atomic_inc(&pipe->frame_number);
795
796 return 0;
797 }
798
799 static int isp_pipeline_wait_resizer(struct isp_device *isp)
800 {
801 return omap3isp_resizer_busy(&isp->isp_res);
802 }
803
804 static int isp_pipeline_wait_preview(struct isp_device *isp)
805 {
806 return omap3isp_preview_busy(&isp->isp_prev);
807 }
808
809 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
810 {
811 return omap3isp_stat_busy(&isp->isp_af)
812 || omap3isp_stat_busy(&isp->isp_aewb)
813 || omap3isp_stat_busy(&isp->isp_hist)
814 || omap3isp_ccdc_busy(&isp->isp_ccdc);
815 }
816
817 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
818
819 static int isp_pipeline_wait(struct isp_device *isp,
820 int(*busy)(struct isp_device *isp))
821 {
822 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
823
824 while (!time_after(jiffies, timeout)) {
825 if (!busy(isp))
826 return 0;
827 }
828
829 return 1;
830 }
831
832 /*
833 * isp_pipeline_disable - Disable streaming on a pipeline
834 * @pipe: ISP pipeline
835 *
836 * Walk the entities chain starting at the pipeline output video node and stop
837 * all modules in the chain. Wait synchronously for the modules to be stopped if
838 * necessary.
839 *
840 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
841 * can't be stopped (in which case a software reset of the ISP is probably
842 * necessary).
843 */
844 static int isp_pipeline_disable(struct isp_pipeline *pipe)
845 {
846 struct isp_device *isp = pipe->output->isp;
847 struct media_entity *entity;
848 struct media_pad *pad;
849 struct v4l2_subdev *subdev;
850 int failure = 0;
851 int ret;
852
853 /*
854 * We need to stop all the modules after CCDC first or they'll
855 * never stop since they may not get a full frame from CCDC.
856 */
857 entity = &pipe->output->video.entity;
858 while (1) {
859 pad = &entity->pads[0];
860 if (!(pad->flags & MEDIA_PAD_FL_SINK))
861 break;
862
863 pad = media_entity_remote_source(pad);
864 if (pad == NULL ||
865 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
866 break;
867
868 entity = pad->entity;
869 subdev = media_entity_to_v4l2_subdev(entity);
870
871 if (subdev == &isp->isp_ccdc.subdev) {
872 v4l2_subdev_call(&isp->isp_aewb.subdev,
873 video, s_stream, 0);
874 v4l2_subdev_call(&isp->isp_af.subdev,
875 video, s_stream, 0);
876 v4l2_subdev_call(&isp->isp_hist.subdev,
877 video, s_stream, 0);
878 }
879
880 v4l2_subdev_call(subdev, video, s_stream, 0);
881
882 if (subdev == &isp->isp_res.subdev)
883 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
884 else if (subdev == &isp->isp_prev.subdev)
885 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
886 else if (subdev == &isp->isp_ccdc.subdev)
887 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
888 else
889 ret = 0;
890
891 if (ret) {
892 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
893 /* If the entity failed to stopped, assume it has
894 * crashed. Mark it as such, the ISP will be reset when
895 * applications will release it.
896 */
897 isp->crashed |= 1U << subdev->entity.id;
898 failure = -ETIMEDOUT;
899 }
900 }
901
902 return failure;
903 }
904
905 /*
906 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
907 * @pipe: ISP pipeline
908 * @state: Stream state (stopped, single shot or continuous)
909 *
910 * Set the pipeline to the given stream state. Pipelines can be started in
911 * single-shot or continuous mode.
912 *
913 * Return 0 if successful, or the return value of the failed video::s_stream
914 * operation otherwise. The pipeline state is not updated when the operation
915 * fails, except when stopping the pipeline.
916 */
917 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
918 enum isp_pipeline_stream_state state)
919 {
920 int ret;
921
922 if (state == ISP_PIPELINE_STREAM_STOPPED)
923 ret = isp_pipeline_disable(pipe);
924 else
925 ret = isp_pipeline_enable(pipe, state);
926
927 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
928 pipe->stream_state = state;
929
930 return ret;
931 }
932
933 /*
934 * isp_pipeline_resume - Resume streaming on a pipeline
935 * @pipe: ISP pipeline
936 *
937 * Resume video output and input and re-enable pipeline.
938 */
939 static void isp_pipeline_resume(struct isp_pipeline *pipe)
940 {
941 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
942
943 omap3isp_video_resume(pipe->output, !singleshot);
944 if (singleshot)
945 omap3isp_video_resume(pipe->input, 0);
946 isp_pipeline_enable(pipe, pipe->stream_state);
947 }
948
949 /*
950 * isp_pipeline_suspend - Suspend streaming on a pipeline
951 * @pipe: ISP pipeline
952 *
953 * Suspend pipeline.
954 */
955 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
956 {
957 isp_pipeline_disable(pipe);
958 }
959
960 /*
961 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
962 * video node
963 * @me: ISP module's media entity
964 *
965 * Returns 1 if the entity has an enabled link to the output video node or 0
966 * otherwise. It's true only while pipeline can have no more than one output
967 * node.
968 */
969 static int isp_pipeline_is_last(struct media_entity *me)
970 {
971 struct isp_pipeline *pipe;
972 struct media_pad *pad;
973
974 if (!me->pipe)
975 return 0;
976 pipe = to_isp_pipeline(me);
977 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
978 return 0;
979 pad = media_entity_remote_source(&pipe->output->pad);
980 return pad->entity == me;
981 }
982
983 /*
984 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
985 * @me: ISP module's media entity
986 *
987 * Suspend the whole pipeline if module's entity has an enabled link to the
988 * output video node. It works only while pipeline can have no more than one
989 * output node.
990 */
991 static void isp_suspend_module_pipeline(struct media_entity *me)
992 {
993 if (isp_pipeline_is_last(me))
994 isp_pipeline_suspend(to_isp_pipeline(me));
995 }
996
997 /*
998 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
999 * @me: ISP module's media entity
1000 *
1001 * Resume the whole pipeline if module's entity has an enabled link to the
1002 * output video node. It works only while pipeline can have no more than one
1003 * output node.
1004 */
1005 static void isp_resume_module_pipeline(struct media_entity *me)
1006 {
1007 if (isp_pipeline_is_last(me))
1008 isp_pipeline_resume(to_isp_pipeline(me));
1009 }
1010
1011 /*
1012 * isp_suspend_modules - Suspend ISP submodules.
1013 * @isp: OMAP3 ISP device
1014 *
1015 * Returns 0 if suspend left in idle state all the submodules properly,
1016 * or returns 1 if a general Reset is required to suspend the submodules.
1017 */
1018 static int isp_suspend_modules(struct isp_device *isp)
1019 {
1020 unsigned long timeout;
1021
1022 omap3isp_stat_suspend(&isp->isp_aewb);
1023 omap3isp_stat_suspend(&isp->isp_af);
1024 omap3isp_stat_suspend(&isp->isp_hist);
1025 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1026 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1027 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1028 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1029 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1030
1031 timeout = jiffies + ISP_STOP_TIMEOUT;
1032 while (omap3isp_stat_busy(&isp->isp_af)
1033 || omap3isp_stat_busy(&isp->isp_aewb)
1034 || omap3isp_stat_busy(&isp->isp_hist)
1035 || omap3isp_preview_busy(&isp->isp_prev)
1036 || omap3isp_resizer_busy(&isp->isp_res)
1037 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1038 if (time_after(jiffies, timeout)) {
1039 dev_info(isp->dev, "can't stop modules.\n");
1040 return 1;
1041 }
1042 msleep(1);
1043 }
1044
1045 return 0;
1046 }
1047
1048 /*
1049 * isp_resume_modules - Resume ISP submodules.
1050 * @isp: OMAP3 ISP device
1051 */
1052 static void isp_resume_modules(struct isp_device *isp)
1053 {
1054 omap3isp_stat_resume(&isp->isp_aewb);
1055 omap3isp_stat_resume(&isp->isp_af);
1056 omap3isp_stat_resume(&isp->isp_hist);
1057 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1058 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1059 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1060 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1061 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1062 }
1063
1064 /*
1065 * isp_reset - Reset ISP with a timeout wait for idle.
1066 * @isp: OMAP3 ISP device
1067 */
1068 static int isp_reset(struct isp_device *isp)
1069 {
1070 unsigned long timeout = 0;
1071
1072 isp_reg_writel(isp,
1073 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1074 | ISP_SYSCONFIG_SOFTRESET,
1075 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1076 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1077 ISP_SYSSTATUS) & 0x1)) {
1078 if (timeout++ > 10000) {
1079 dev_alert(isp->dev, "cannot reset ISP\n");
1080 return -ETIMEDOUT;
1081 }
1082 udelay(1);
1083 }
1084
1085 isp->crashed = 0;
1086 return 0;
1087 }
1088
1089 /*
1090 * isp_save_context - Saves the values of the ISP module registers.
1091 * @isp: OMAP3 ISP device
1092 * @reg_list: Structure containing pairs of register address and value to
1093 * modify on OMAP.
1094 */
1095 static void
1096 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1097 {
1098 struct isp_reg *next = reg_list;
1099
1100 for (; next->reg != ISP_TOK_TERM; next++)
1101 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1102 }
1103
1104 /*
1105 * isp_restore_context - Restores the values of the ISP module registers.
1106 * @isp: OMAP3 ISP device
1107 * @reg_list: Structure containing pairs of register address and value to
1108 * modify on OMAP.
1109 */
1110 static void
1111 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1112 {
1113 struct isp_reg *next = reg_list;
1114
1115 for (; next->reg != ISP_TOK_TERM; next++)
1116 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1117 }
1118
1119 /*
1120 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1121 * @isp: OMAP3 ISP device
1122 *
1123 * Routine for saving the context of each module in the ISP.
1124 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1125 */
1126 static void isp_save_ctx(struct isp_device *isp)
1127 {
1128 isp_save_context(isp, isp_reg_list);
1129 omap_iommu_save_ctx(isp->dev);
1130 }
1131
1132 /*
1133 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1134 * @isp: OMAP3 ISP device
1135 *
1136 * Routine for restoring the context of each module in the ISP.
1137 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1138 */
1139 static void isp_restore_ctx(struct isp_device *isp)
1140 {
1141 isp_restore_context(isp, isp_reg_list);
1142 omap_iommu_restore_ctx(isp->dev);
1143 omap3isp_ccdc_restore_context(isp);
1144 omap3isp_preview_restore_context(isp);
1145 }
1146
1147 /* -----------------------------------------------------------------------------
1148 * SBL resources management
1149 */
1150 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1151 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1152 OMAP3_ISP_SBL_PREVIEW_READ | \
1153 OMAP3_ISP_SBL_RESIZER_READ)
1154 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1155 OMAP3_ISP_SBL_CSI2A_WRITE | \
1156 OMAP3_ISP_SBL_CSI2C_WRITE | \
1157 OMAP3_ISP_SBL_CCDC_WRITE | \
1158 OMAP3_ISP_SBL_PREVIEW_WRITE)
1159
1160 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1161 {
1162 u32 sbl = 0;
1163
1164 isp->sbl_resources |= res;
1165
1166 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1167 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1168
1169 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1170 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1171
1172 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1173 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1174
1175 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1176 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1177
1178 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1179 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1180
1181 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1182 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1183
1184 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1185 }
1186
1187 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1188 {
1189 u32 sbl = 0;
1190
1191 isp->sbl_resources &= ~res;
1192
1193 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1194 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1195
1196 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1197 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1198
1199 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1200 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1201
1202 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1203 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1204
1205 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1206 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1207
1208 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1209 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1210
1211 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1212 }
1213
1214 /*
1215 * isp_module_sync_idle - Helper to sync module with its idle state
1216 * @me: ISP submodule's media entity
1217 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1218 * @stopping: flag which tells module wants to stop
1219 *
1220 * This function checks if ISP submodule needs to wait for next interrupt. If
1221 * yes, makes the caller to sleep while waiting for such event.
1222 */
1223 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1224 atomic_t *stopping)
1225 {
1226 struct isp_pipeline *pipe = to_isp_pipeline(me);
1227
1228 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1229 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1230 !isp_pipeline_ready(pipe)))
1231 return 0;
1232
1233 /*
1234 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1235 * scenario. We'll call it here to avoid race conditions.
1236 */
1237 atomic_set(stopping, 1);
1238 smp_mb();
1239
1240 /*
1241 * If module is the last one, it's writing to memory. In this case,
1242 * it's necessary to check if the module is already paused due to
1243 * DMA queue underrun or if it has to wait for next interrupt to be
1244 * idle.
1245 * If it isn't the last one, the function won't sleep but *stopping
1246 * will still be set to warn next submodule caller's interrupt the
1247 * module wants to be idle.
1248 */
1249 if (isp_pipeline_is_last(me)) {
1250 struct isp_video *video = pipe->output;
1251 unsigned long flags;
1252 spin_lock_irqsave(&video->queue->irqlock, flags);
1253 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1254 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1255 atomic_set(stopping, 0);
1256 smp_mb();
1257 return 0;
1258 }
1259 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1260 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1261 msecs_to_jiffies(1000))) {
1262 atomic_set(stopping, 0);
1263 smp_mb();
1264 return -ETIMEDOUT;
1265 }
1266 }
1267
1268 return 0;
1269 }
1270
1271 /*
1272 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1273 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1274 * @stopping: flag which tells module wants to stop
1275 *
1276 * This function checks if ISP submodule was stopping. In case of yes, it
1277 * notices the caller by setting stopping to 0 and waking up the wait queue.
1278 * Returns 1 if it was stopping or 0 otherwise.
1279 */
1280 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1281 atomic_t *stopping)
1282 {
1283 if (atomic_cmpxchg(stopping, 1, 0)) {
1284 wake_up(wait);
1285 return 1;
1286 }
1287
1288 return 0;
1289 }
1290
1291 /* --------------------------------------------------------------------------
1292 * Clock management
1293 */
1294
1295 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1296 ISPCTRL_HIST_CLK_EN | \
1297 ISPCTRL_RSZ_CLK_EN | \
1298 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1299 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1300
1301 static void __isp_subclk_update(struct isp_device *isp)
1302 {
1303 u32 clk = 0;
1304
1305 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1306 clk |= ISPCTRL_H3A_CLK_EN;
1307
1308 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1309 clk |= ISPCTRL_HIST_CLK_EN;
1310
1311 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1312 clk |= ISPCTRL_RSZ_CLK_EN;
1313
1314 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1315 * RAM as well.
1316 */
1317 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1318 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1319
1320 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1321 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1322
1323 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1324 ISPCTRL_CLKS_MASK, clk);
1325 }
1326
1327 void omap3isp_subclk_enable(struct isp_device *isp,
1328 enum isp_subclk_resource res)
1329 {
1330 isp->subclk_resources |= res;
1331
1332 __isp_subclk_update(isp);
1333 }
1334
1335 void omap3isp_subclk_disable(struct isp_device *isp,
1336 enum isp_subclk_resource res)
1337 {
1338 isp->subclk_resources &= ~res;
1339
1340 __isp_subclk_update(isp);
1341 }
1342
1343 /*
1344 * isp_enable_clocks - Enable ISP clocks
1345 * @isp: OMAP3 ISP device
1346 *
1347 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1348 */
1349 static int isp_enable_clocks(struct isp_device *isp)
1350 {
1351 int r;
1352 unsigned long rate;
1353 int divisor;
1354
1355 /*
1356 * cam_mclk clock chain:
1357 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1358 *
1359 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1360 * set to the same value. Hence the rate set for dpll4_m5
1361 * has to be twice of what is set on OMAP3430 to get
1362 * the required value for cam_mclk
1363 */
1364 if (cpu_is_omap3630())
1365 divisor = 1;
1366 else
1367 divisor = 2;
1368
1369 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1370 if (r) {
1371 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1372 goto out_clk_enable_ick;
1373 }
1374 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1375 CM_CAM_MCLK_HZ/divisor);
1376 if (r) {
1377 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1378 goto out_clk_enable_mclk;
1379 }
1380 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1381 if (r) {
1382 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1383 goto out_clk_enable_mclk;
1384 }
1385 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1386 if (rate != CM_CAM_MCLK_HZ)
1387 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1388 " expected : %d\n"
1389 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1390 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1391 if (r) {
1392 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1393 goto out_clk_enable_csi2_fclk;
1394 }
1395 return 0;
1396
1397 out_clk_enable_csi2_fclk:
1398 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1399 out_clk_enable_mclk:
1400 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1401 out_clk_enable_ick:
1402 return r;
1403 }
1404
1405 /*
1406 * isp_disable_clocks - Disable ISP clocks
1407 * @isp: OMAP3 ISP device
1408 */
1409 static void isp_disable_clocks(struct isp_device *isp)
1410 {
1411 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1412 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1413 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1414 }
1415
1416 static const char *isp_clocks[] = {
1417 "cam_ick",
1418 "cam_mclk",
1419 "dpll4_m5_ck",
1420 "csi2_96m_fck",
1421 "l3_ick",
1422 };
1423
1424 static void isp_put_clocks(struct isp_device *isp)
1425 {
1426 unsigned int i;
1427
1428 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1429 if (isp->clock[i]) {
1430 clk_put(isp->clock[i]);
1431 isp->clock[i] = NULL;
1432 }
1433 }
1434 }
1435
1436 static int isp_get_clocks(struct isp_device *isp)
1437 {
1438 struct clk *clk;
1439 unsigned int i;
1440
1441 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1442 clk = clk_get(isp->dev, isp_clocks[i]);
1443 if (IS_ERR(clk)) {
1444 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1445 isp_put_clocks(isp);
1446 return PTR_ERR(clk);
1447 }
1448
1449 isp->clock[i] = clk;
1450 }
1451
1452 return 0;
1453 }
1454
1455 /*
1456 * omap3isp_get - Acquire the ISP resource.
1457 *
1458 * Initializes the clocks for the first acquire.
1459 *
1460 * Increment the reference count on the ISP. If the first reference is taken,
1461 * enable clocks and power-up all submodules.
1462 *
1463 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1464 */
1465 struct isp_device *omap3isp_get(struct isp_device *isp)
1466 {
1467 struct isp_device *__isp = isp;
1468
1469 if (isp == NULL)
1470 return NULL;
1471
1472 mutex_lock(&isp->isp_mutex);
1473 if (isp->ref_count > 0)
1474 goto out;
1475
1476 if (isp_enable_clocks(isp) < 0) {
1477 __isp = NULL;
1478 goto out;
1479 }
1480
1481 /* We don't want to restore context before saving it! */
1482 if (isp->has_context)
1483 isp_restore_ctx(isp);
1484 else
1485 isp->has_context = 1;
1486
1487 isp_enable_interrupts(isp);
1488
1489 out:
1490 if (__isp != NULL)
1491 isp->ref_count++;
1492 mutex_unlock(&isp->isp_mutex);
1493
1494 return __isp;
1495 }
1496
1497 /*
1498 * omap3isp_put - Release the ISP
1499 *
1500 * Decrement the reference count on the ISP. If the last reference is released,
1501 * power-down all submodules, disable clocks and free temporary buffers.
1502 */
1503 void omap3isp_put(struct isp_device *isp)
1504 {
1505 if (isp == NULL)
1506 return;
1507
1508 mutex_lock(&isp->isp_mutex);
1509 BUG_ON(isp->ref_count == 0);
1510 if (--isp->ref_count == 0) {
1511 isp_disable_interrupts(isp);
1512 isp_save_ctx(isp);
1513 /* Reset the ISP if an entity has failed to stop. This is the
1514 * only way to recover from such conditions.
1515 */
1516 if (isp->crashed)
1517 isp_reset(isp);
1518 isp_disable_clocks(isp);
1519 }
1520 mutex_unlock(&isp->isp_mutex);
1521 }
1522
1523 /* --------------------------------------------------------------------------
1524 * Platform device driver
1525 */
1526
1527 /*
1528 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1529 * @isp: OMAP3 ISP device
1530 */
1531 #define ISP_PRINT_REGISTER(isp, name)\
1532 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1533 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1534 #define SBL_PRINT_REGISTER(isp, name)\
1535 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1536 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1537
1538 void omap3isp_print_status(struct isp_device *isp)
1539 {
1540 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1541
1542 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1543 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1544 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1545 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1546 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1547 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1548 ISP_PRINT_REGISTER(isp, CTRL);
1549 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1550 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1551 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1552 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1553 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1554 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1555 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1556 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1557
1558 SBL_PRINT_REGISTER(isp, PCR);
1559 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1560
1561 dev_dbg(isp->dev, "--------------------------------------------\n");
1562 }
1563
1564 #ifdef CONFIG_PM
1565
1566 /*
1567 * Power management support.
1568 *
1569 * As the ISP can't properly handle an input video stream interruption on a non
1570 * frame boundary, the ISP pipelines need to be stopped before sensors get
1571 * suspended. However, as suspending the sensors can require a running clock,
1572 * which can be provided by the ISP, the ISP can't be completely suspended
1573 * before the sensor.
1574 *
1575 * To solve this problem power management support is split into prepare/complete
1576 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1577 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1578 * resume(), and the the pipelines are restarted in complete().
1579 *
1580 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1581 * yet.
1582 */
1583 static int isp_pm_prepare(struct device *dev)
1584 {
1585 struct isp_device *isp = dev_get_drvdata(dev);
1586 int reset;
1587
1588 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1589
1590 if (isp->ref_count == 0)
1591 return 0;
1592
1593 reset = isp_suspend_modules(isp);
1594 isp_disable_interrupts(isp);
1595 isp_save_ctx(isp);
1596 if (reset)
1597 isp_reset(isp);
1598
1599 return 0;
1600 }
1601
1602 static int isp_pm_suspend(struct device *dev)
1603 {
1604 struct isp_device *isp = dev_get_drvdata(dev);
1605
1606 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1607
1608 if (isp->ref_count)
1609 isp_disable_clocks(isp);
1610
1611 return 0;
1612 }
1613
1614 static int isp_pm_resume(struct device *dev)
1615 {
1616 struct isp_device *isp = dev_get_drvdata(dev);
1617
1618 if (isp->ref_count == 0)
1619 return 0;
1620
1621 return isp_enable_clocks(isp);
1622 }
1623
1624 static void isp_pm_complete(struct device *dev)
1625 {
1626 struct isp_device *isp = dev_get_drvdata(dev);
1627
1628 if (isp->ref_count == 0)
1629 return;
1630
1631 isp_restore_ctx(isp);
1632 isp_enable_interrupts(isp);
1633 isp_resume_modules(isp);
1634 }
1635
1636 #else
1637
1638 #define isp_pm_prepare NULL
1639 #define isp_pm_suspend NULL
1640 #define isp_pm_resume NULL
1641 #define isp_pm_complete NULL
1642
1643 #endif /* CONFIG_PM */
1644
1645 static void isp_unregister_entities(struct isp_device *isp)
1646 {
1647 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1648 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1649 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1650 omap3isp_preview_unregister_entities(&isp->isp_prev);
1651 omap3isp_resizer_unregister_entities(&isp->isp_res);
1652 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1653 omap3isp_stat_unregister_entities(&isp->isp_af);
1654 omap3isp_stat_unregister_entities(&isp->isp_hist);
1655
1656 v4l2_device_unregister(&isp->v4l2_dev);
1657 media_device_unregister(&isp->media_dev);
1658 }
1659
1660 /*
1661 * isp_register_subdev_group - Register a group of subdevices
1662 * @isp: OMAP3 ISP device
1663 * @board_info: I2C subdevs board information array
1664 *
1665 * Register all I2C subdevices in the board_info array. The array must be
1666 * terminated by a NULL entry, and the first entry must be the sensor.
1667 *
1668 * Return a pointer to the sensor media entity if it has been successfully
1669 * registered, or NULL otherwise.
1670 */
1671 static struct v4l2_subdev *
1672 isp_register_subdev_group(struct isp_device *isp,
1673 struct isp_subdev_i2c_board_info *board_info)
1674 {
1675 struct v4l2_subdev *sensor = NULL;
1676 unsigned int first;
1677
1678 if (board_info->board_info == NULL)
1679 return NULL;
1680
1681 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1682 struct v4l2_subdev *subdev;
1683 struct i2c_adapter *adapter;
1684
1685 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1686 if (adapter == NULL) {
1687 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1688 "device %s\n", __func__,
1689 board_info->i2c_adapter_id,
1690 board_info->board_info->type);
1691 continue;
1692 }
1693
1694 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1695 board_info->board_info, NULL);
1696 if (subdev == NULL) {
1697 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1698 __func__, board_info->board_info->type);
1699 continue;
1700 }
1701
1702 if (first)
1703 sensor = subdev;
1704 }
1705
1706 return sensor;
1707 }
1708
1709 static int isp_register_entities(struct isp_device *isp)
1710 {
1711 struct isp_platform_data *pdata = isp->pdata;
1712 struct isp_v4l2_subdevs_group *subdevs;
1713 int ret;
1714
1715 isp->media_dev.dev = isp->dev;
1716 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1717 sizeof(isp->media_dev.model));
1718 isp->media_dev.hw_revision = isp->revision;
1719 isp->media_dev.link_notify = isp_pipeline_link_notify;
1720 ret = media_device_register(&isp->media_dev);
1721 if (ret < 0) {
1722 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1723 __func__, ret);
1724 return ret;
1725 }
1726
1727 isp->v4l2_dev.mdev = &isp->media_dev;
1728 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1729 if (ret < 0) {
1730 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1731 __func__, ret);
1732 goto done;
1733 }
1734
1735 /* Register internal entities */
1736 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1737 if (ret < 0)
1738 goto done;
1739
1740 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1741 if (ret < 0)
1742 goto done;
1743
1744 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1745 if (ret < 0)
1746 goto done;
1747
1748 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1749 &isp->v4l2_dev);
1750 if (ret < 0)
1751 goto done;
1752
1753 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1754 if (ret < 0)
1755 goto done;
1756
1757 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1758 if (ret < 0)
1759 goto done;
1760
1761 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1762 if (ret < 0)
1763 goto done;
1764
1765 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1766 if (ret < 0)
1767 goto done;
1768
1769 /* Register external entities */
1770 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1771 struct v4l2_subdev *sensor;
1772 struct media_entity *input;
1773 unsigned int flags;
1774 unsigned int pad;
1775
1776 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1777 if (sensor == NULL)
1778 continue;
1779
1780 sensor->host_priv = subdevs;
1781
1782 /* Connect the sensor to the correct interface module. Parallel
1783 * sensors are connected directly to the CCDC, while serial
1784 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1785 * through CSIPHY1 or CSIPHY2.
1786 */
1787 switch (subdevs->interface) {
1788 case ISP_INTERFACE_PARALLEL:
1789 input = &isp->isp_ccdc.subdev.entity;
1790 pad = CCDC_PAD_SINK;
1791 flags = 0;
1792 break;
1793
1794 case ISP_INTERFACE_CSI2A_PHY2:
1795 input = &isp->isp_csi2a.subdev.entity;
1796 pad = CSI2_PAD_SINK;
1797 flags = MEDIA_LNK_FL_IMMUTABLE
1798 | MEDIA_LNK_FL_ENABLED;
1799 break;
1800
1801 case ISP_INTERFACE_CCP2B_PHY1:
1802 case ISP_INTERFACE_CCP2B_PHY2:
1803 input = &isp->isp_ccp2.subdev.entity;
1804 pad = CCP2_PAD_SINK;
1805 flags = 0;
1806 break;
1807
1808 case ISP_INTERFACE_CSI2C_PHY1:
1809 input = &isp->isp_csi2c.subdev.entity;
1810 pad = CSI2_PAD_SINK;
1811 flags = MEDIA_LNK_FL_IMMUTABLE
1812 | MEDIA_LNK_FL_ENABLED;
1813 break;
1814
1815 default:
1816 printk(KERN_ERR "%s: invalid interface type %u\n",
1817 __func__, subdevs->interface);
1818 ret = -EINVAL;
1819 goto done;
1820 }
1821
1822 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1823 flags);
1824 if (ret < 0)
1825 goto done;
1826 }
1827
1828 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1829
1830 done:
1831 if (ret < 0)
1832 isp_unregister_entities(isp);
1833
1834 return ret;
1835 }
1836
1837 static void isp_cleanup_modules(struct isp_device *isp)
1838 {
1839 omap3isp_h3a_aewb_cleanup(isp);
1840 omap3isp_h3a_af_cleanup(isp);
1841 omap3isp_hist_cleanup(isp);
1842 omap3isp_resizer_cleanup(isp);
1843 omap3isp_preview_cleanup(isp);
1844 omap3isp_ccdc_cleanup(isp);
1845 omap3isp_ccp2_cleanup(isp);
1846 omap3isp_csi2_cleanup(isp);
1847 }
1848
1849 static int isp_initialize_modules(struct isp_device *isp)
1850 {
1851 int ret;
1852
1853 ret = omap3isp_csiphy_init(isp);
1854 if (ret < 0) {
1855 dev_err(isp->dev, "CSI PHY initialization failed\n");
1856 goto error_csiphy;
1857 }
1858
1859 ret = omap3isp_csi2_init(isp);
1860 if (ret < 0) {
1861 dev_err(isp->dev, "CSI2 initialization failed\n");
1862 goto error_csi2;
1863 }
1864
1865 ret = omap3isp_ccp2_init(isp);
1866 if (ret < 0) {
1867 dev_err(isp->dev, "CCP2 initialization failed\n");
1868 goto error_ccp2;
1869 }
1870
1871 ret = omap3isp_ccdc_init(isp);
1872 if (ret < 0) {
1873 dev_err(isp->dev, "CCDC initialization failed\n");
1874 goto error_ccdc;
1875 }
1876
1877 ret = omap3isp_preview_init(isp);
1878 if (ret < 0) {
1879 dev_err(isp->dev, "Preview initialization failed\n");
1880 goto error_preview;
1881 }
1882
1883 ret = omap3isp_resizer_init(isp);
1884 if (ret < 0) {
1885 dev_err(isp->dev, "Resizer initialization failed\n");
1886 goto error_resizer;
1887 }
1888
1889 ret = omap3isp_hist_init(isp);
1890 if (ret < 0) {
1891 dev_err(isp->dev, "Histogram initialization failed\n");
1892 goto error_hist;
1893 }
1894
1895 ret = omap3isp_h3a_aewb_init(isp);
1896 if (ret < 0) {
1897 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1898 goto error_h3a_aewb;
1899 }
1900
1901 ret = omap3isp_h3a_af_init(isp);
1902 if (ret < 0) {
1903 dev_err(isp->dev, "H3A AF initialization failed\n");
1904 goto error_h3a_af;
1905 }
1906
1907 /* Connect the submodules. */
1908 ret = media_entity_create_link(
1909 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1910 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1911 if (ret < 0)
1912 goto error_link;
1913
1914 ret = media_entity_create_link(
1915 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1916 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1917 if (ret < 0)
1918 goto error_link;
1919
1920 ret = media_entity_create_link(
1921 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1922 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1923 if (ret < 0)
1924 goto error_link;
1925
1926 ret = media_entity_create_link(
1927 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1928 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1929 if (ret < 0)
1930 goto error_link;
1931
1932 ret = media_entity_create_link(
1933 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1934 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1935 if (ret < 0)
1936 goto error_link;
1937
1938 ret = media_entity_create_link(
1939 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1940 &isp->isp_aewb.subdev.entity, 0,
1941 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1942 if (ret < 0)
1943 goto error_link;
1944
1945 ret = media_entity_create_link(
1946 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1947 &isp->isp_af.subdev.entity, 0,
1948 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1949 if (ret < 0)
1950 goto error_link;
1951
1952 ret = media_entity_create_link(
1953 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1954 &isp->isp_hist.subdev.entity, 0,
1955 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1956 if (ret < 0)
1957 goto error_link;
1958
1959 return 0;
1960
1961 error_link:
1962 omap3isp_h3a_af_cleanup(isp);
1963 error_h3a_af:
1964 omap3isp_h3a_aewb_cleanup(isp);
1965 error_h3a_aewb:
1966 omap3isp_hist_cleanup(isp);
1967 error_hist:
1968 omap3isp_resizer_cleanup(isp);
1969 error_resizer:
1970 omap3isp_preview_cleanup(isp);
1971 error_preview:
1972 omap3isp_ccdc_cleanup(isp);
1973 error_ccdc:
1974 omap3isp_ccp2_cleanup(isp);
1975 error_ccp2:
1976 omap3isp_csi2_cleanup(isp);
1977 error_csi2:
1978 error_csiphy:
1979 return ret;
1980 }
1981
1982 /*
1983 * isp_remove - Remove ISP platform device
1984 * @pdev: Pointer to ISP platform device
1985 *
1986 * Always returns 0.
1987 */
1988 static int isp_remove(struct platform_device *pdev)
1989 {
1990 struct isp_device *isp = platform_get_drvdata(pdev);
1991 int i;
1992
1993 isp_unregister_entities(isp);
1994 isp_cleanup_modules(isp);
1995
1996 omap3isp_get(isp);
1997 iommu_detach_device(isp->domain, &pdev->dev);
1998 iommu_domain_free(isp->domain);
1999 omap3isp_put(isp);
2000
2001 free_irq(isp->irq_num, isp);
2002 isp_put_clocks(isp);
2003
2004 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2005 if (isp->mmio_base[i]) {
2006 iounmap(isp->mmio_base[i]);
2007 isp->mmio_base[i] = NULL;
2008 }
2009
2010 if (isp->mmio_base_phys[i]) {
2011 release_mem_region(isp->mmio_base_phys[i],
2012 isp->mmio_size[i]);
2013 isp->mmio_base_phys[i] = 0;
2014 }
2015 }
2016
2017 regulator_put(isp->isp_csiphy1.vdd);
2018 regulator_put(isp->isp_csiphy2.vdd);
2019 kfree(isp);
2020
2021 return 0;
2022 }
2023
2024 static int isp_map_mem_resource(struct platform_device *pdev,
2025 struct isp_device *isp,
2026 enum isp_mem_resources res)
2027 {
2028 struct resource *mem;
2029
2030 /* request the mem region for the camera registers */
2031
2032 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2033 if (!mem) {
2034 dev_err(isp->dev, "no mem resource?\n");
2035 return -ENODEV;
2036 }
2037
2038 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2039 dev_err(isp->dev,
2040 "cannot reserve camera register I/O region\n");
2041 return -ENODEV;
2042 }
2043 isp->mmio_base_phys[res] = mem->start;
2044 isp->mmio_size[res] = resource_size(mem);
2045
2046 /* map the region */
2047 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2048 isp->mmio_size[res]);
2049 if (!isp->mmio_base[res]) {
2050 dev_err(isp->dev, "cannot map camera register I/O region\n");
2051 return -ENODEV;
2052 }
2053
2054 return 0;
2055 }
2056
2057 /*
2058 * isp_probe - Probe ISP platform device
2059 * @pdev: Pointer to ISP platform device
2060 *
2061 * Returns 0 if successful,
2062 * -ENOMEM if no memory available,
2063 * -ENODEV if no platform device resources found
2064 * or no space for remapping registers,
2065 * -EINVAL if couldn't install ISR,
2066 * or clk_get return error value.
2067 */
2068 static int isp_probe(struct platform_device *pdev)
2069 {
2070 struct isp_platform_data *pdata = pdev->dev.platform_data;
2071 struct isp_device *isp;
2072 int ret;
2073 int i, m;
2074
2075 if (pdata == NULL)
2076 return -EINVAL;
2077
2078 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2079 if (!isp) {
2080 dev_err(&pdev->dev, "could not allocate memory\n");
2081 return -ENOMEM;
2082 }
2083
2084 isp->autoidle = autoidle;
2085 isp->platform_cb.set_xclk = isp_set_xclk;
2086 isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
2087
2088 mutex_init(&isp->isp_mutex);
2089 spin_lock_init(&isp->stat_lock);
2090
2091 isp->dev = &pdev->dev;
2092 isp->pdata = pdata;
2093 isp->ref_count = 0;
2094
2095 isp->raw_dmamask = DMA_BIT_MASK(32);
2096 isp->dev->dma_mask = &isp->raw_dmamask;
2097 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2098
2099 platform_set_drvdata(pdev, isp);
2100
2101 /* Regulators */
2102 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2103 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2104
2105 /* Clocks */
2106 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2107 if (ret < 0)
2108 goto error;
2109
2110 ret = isp_get_clocks(isp);
2111 if (ret < 0)
2112 goto error;
2113
2114 if (omap3isp_get(isp) == NULL)
2115 goto error;
2116
2117 ret = isp_reset(isp);
2118 if (ret < 0)
2119 goto error_isp;
2120
2121 /* Memory resources */
2122 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2123 dev_info(isp->dev, "Revision %d.%d found\n",
2124 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2125
2126 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2127 if (isp->revision == isp_res_maps[m].isp_rev)
2128 break;
2129
2130 if (m == ARRAY_SIZE(isp_res_maps)) {
2131 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2132 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2133 ret = -ENODEV;
2134 goto error_isp;
2135 }
2136
2137 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2138 if (isp_res_maps[m].map & 1 << i) {
2139 ret = isp_map_mem_resource(pdev, isp, i);
2140 if (ret)
2141 goto error_isp;
2142 }
2143 }
2144
2145 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2146 if (!isp->domain) {
2147 dev_err(isp->dev, "can't alloc iommu domain\n");
2148 ret = -ENOMEM;
2149 goto error_isp;
2150 }
2151
2152 ret = iommu_attach_device(isp->domain, &pdev->dev);
2153 if (ret) {
2154 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2155 goto free_domain;
2156 }
2157
2158 /* Interrupt */
2159 isp->irq_num = platform_get_irq(pdev, 0);
2160 if (isp->irq_num <= 0) {
2161 dev_err(isp->dev, "No IRQ resource\n");
2162 ret = -ENODEV;
2163 goto detach_dev;
2164 }
2165
2166 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2167 dev_err(isp->dev, "Unable to request IRQ\n");
2168 ret = -EINVAL;
2169 goto detach_dev;
2170 }
2171
2172 /* Entities */
2173 ret = isp_initialize_modules(isp);
2174 if (ret < 0)
2175 goto error_irq;
2176
2177 ret = isp_register_entities(isp);
2178 if (ret < 0)
2179 goto error_modules;
2180
2181 isp_power_settings(isp, 1);
2182 omap3isp_put(isp);
2183
2184 return 0;
2185
2186 error_modules:
2187 isp_cleanup_modules(isp);
2188 error_irq:
2189 free_irq(isp->irq_num, isp);
2190 detach_dev:
2191 iommu_detach_device(isp->domain, &pdev->dev);
2192 free_domain:
2193 iommu_domain_free(isp->domain);
2194 error_isp:
2195 omap3isp_put(isp);
2196 error:
2197 isp_put_clocks(isp);
2198
2199 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2200 if (isp->mmio_base[i]) {
2201 iounmap(isp->mmio_base[i]);
2202 isp->mmio_base[i] = NULL;
2203 }
2204
2205 if (isp->mmio_base_phys[i]) {
2206 release_mem_region(isp->mmio_base_phys[i],
2207 isp->mmio_size[i]);
2208 isp->mmio_base_phys[i] = 0;
2209 }
2210 }
2211 regulator_put(isp->isp_csiphy2.vdd);
2212 regulator_put(isp->isp_csiphy1.vdd);
2213 platform_set_drvdata(pdev, NULL);
2214
2215 mutex_destroy(&isp->isp_mutex);
2216 kfree(isp);
2217
2218 return ret;
2219 }
2220
2221 static const struct dev_pm_ops omap3isp_pm_ops = {
2222 .prepare = isp_pm_prepare,
2223 .suspend = isp_pm_suspend,
2224 .resume = isp_pm_resume,
2225 .complete = isp_pm_complete,
2226 };
2227
2228 static struct platform_device_id omap3isp_id_table[] = {
2229 { "omap3isp", 0 },
2230 { },
2231 };
2232 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2233
2234 static struct platform_driver omap3isp_driver = {
2235 .probe = isp_probe,
2236 .remove = isp_remove,
2237 .id_table = omap3isp_id_table,
2238 .driver = {
2239 .owner = THIS_MODULE,
2240 .name = "omap3isp",
2241 .pm = &omap3isp_pm_ops,
2242 },
2243 };
2244
2245 module_platform_driver(omap3isp_driver);
2246
2247 MODULE_AUTHOR("Nokia Corporation");
2248 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2249 MODULE_LICENSE("GPL");
2250 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux 2.6 libata-dev (mirror)