?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
PCI PM: Introduce __pci_[start|complete]_power_transition() (rev. 2)
[linux-2.6/libata-dev.git] / include / linux / pci.h
blobdf3644132617c1ecdeaec9184a457701ac5d464b
1 /*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H
19
20 #include <linux/pci_regs.h> /* The pci register defines */
21
22 /*
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
26 *
27 * 7:3 = slot
28 * 2:0 = function
29 */
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
33
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
40
41 #ifdef __KERNEL__
42
43 #include <linux/mod_devicetable.h>
44
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
54 #include <linux/io.h>
55
56 /* Include the ID list */
57 #include <linux/pci_ids.h>
58
59 /* pci_slot represents a physical slot */
60 struct pci_slot {
61 struct pci_bus *bus; /* The bus this slot is on */
62 struct list_head list; /* node in list of slots on this bus */
63 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
64 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
65 struct kobject kobj;
66 };
67
68 static inline const char *pci_slot_name(const struct pci_slot *slot)
69 {
70 return kobject_name(&slot->kobj);
71 }
72
73 /* File state for mmap()s on /proc/bus/pci/X/Y */
74 enum pci_mmap_state {
75 pci_mmap_io,
76 pci_mmap_mem
77 };
78
79 /* This defines the direction arg to the DMA mapping routines. */
80 #define PCI_DMA_BIDIRECTIONAL 0
81 #define PCI_DMA_TODEVICE 1
82 #define PCI_DMA_FROMDEVICE 2
83 #define PCI_DMA_NONE 3
84
85 /*
86 * For PCI devices, the region numbers are assigned this way:
87 */
88 enum {
89 /* #0-5: standard PCI resources */
90 PCI_STD_RESOURCES,
91 PCI_STD_RESOURCE_END = 5,
92
93 /* #6: expansion ROM resource */
94 PCI_ROM_RESOURCE,
95
96 /* resources assigned to buses behind the bridge */
97 #define PCI_BRIDGE_RESOURCE_NUM 4
98
99 PCI_BRIDGE_RESOURCES,
100 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
101 PCI_BRIDGE_RESOURCE_NUM - 1,
102
103 /* total resources associated with a PCI device */
104 PCI_NUM_RESOURCES,
105
106 /* preserve this for compatibility */
107 DEVICE_COUNT_RESOURCE
108 };
109
110 typedef int __bitwise pci_power_t;
111
112 #define PCI_D0 ((pci_power_t __force) 0)
113 #define PCI_D1 ((pci_power_t __force) 1)
114 #define PCI_D2 ((pci_power_t __force) 2)
115 #define PCI_D3hot ((pci_power_t __force) 3)
116 #define PCI_D3cold ((pci_power_t __force) 4)
117 #define PCI_UNKNOWN ((pci_power_t __force) 5)
118 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
119
120 #define PCI_PM_D2_DELAY 200
121 #define PCI_PM_D3_WAIT 10
122 #define PCI_PM_BUS_WAIT 50
123
124 /** The pci_channel state describes connectivity between the CPU and
125 * the pci device. If some PCI bus between here and the pci device
126 * has crashed or locked up, this info is reflected here.
127 */
128 typedef unsigned int __bitwise pci_channel_state_t;
129
130 enum pci_channel_state {
131 /* I/O channel is in normal state */
132 pci_channel_io_normal = (__force pci_channel_state_t) 1,
133
134 /* I/O to channel is blocked */
135 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
136
137 /* PCI card is dead */
138 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
139 };
140
141 typedef unsigned int __bitwise pcie_reset_state_t;
142
143 enum pcie_reset_state {
144 /* Reset is NOT asserted (Use to deassert reset) */
145 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
146
147 /* Use #PERST to reset PCI-E device */
148 pcie_warm_reset = (__force pcie_reset_state_t) 2,
149
150 /* Use PCI-E Hot Reset to reset device */
151 pcie_hot_reset = (__force pcie_reset_state_t) 3
152 };
153
154 typedef unsigned short __bitwise pci_dev_flags_t;
155 enum pci_dev_flags {
156 /* INTX_DISABLE in PCI_COMMAND register disables MSI
157 * generation too.
158 */
159 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
160 /* Device configuration is irrevocably lost if disabled into D3 */
161 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
162 };
163
164 enum pci_irq_reroute_variant {
165 INTEL_IRQ_REROUTE_VARIANT = 1,
166 MAX_IRQ_REROUTE_VARIANTS = 3
167 };
168
169 typedef unsigned short __bitwise pci_bus_flags_t;
170 enum pci_bus_flags {
171 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
172 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
173 };
174
175 struct pci_cap_saved_state {
176 struct hlist_node next;
177 char cap_nr;
178 u32 data[0];
179 };
180
181 struct pcie_link_state;
182 struct pci_vpd;
183
184 /*
185 * The pci_dev structure is used to describe PCI devices.
186 */
187 struct pci_dev {
188 struct list_head bus_list; /* node in per-bus list */
189 struct pci_bus *bus; /* bus this device is on */
190 struct pci_bus *subordinate; /* bus this device bridges to */
191
192 void *sysdata; /* hook for sys-specific extension */
193 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
194 struct pci_slot *slot; /* Physical slot this device is in */
195
196 unsigned int devfn; /* encoded device & function index */
197 unsigned short vendor;
198 unsigned short device;
199 unsigned short subsystem_vendor;
200 unsigned short subsystem_device;
201 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
202 u8 revision; /* PCI revision, low byte of class word */
203 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
204 u8 pcie_type; /* PCI-E device/port type */
205 u8 rom_base_reg; /* which config register controls the ROM */
206 u8 pin; /* which interrupt pin this device uses */
207
208 struct pci_driver *driver; /* which driver has allocated this device */
209 u64 dma_mask; /* Mask of the bits of bus address this
210 device implements. Normally this is
211 0xffffffff. You only need to change
212 this if your device has broken DMA
213 or supports 64-bit transfers. */
214
215 struct device_dma_parameters dma_parms;
216
217 pci_power_t current_state; /* Current operating state. In ACPI-speak,
218 this is D0-D3, D0 being fully functional,
219 and D3 being off. */
220 int pm_cap; /* PM capability offset in the
221 configuration space */
222 unsigned int pme_support:5; /* Bitmask of states from which PME#
223 can be generated */
224 unsigned int d1_support:1; /* Low power state D1 is supported */
225 unsigned int d2_support:1; /* Low power state D2 is supported */
226 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
227
228 #ifdef CONFIG_PCIEASPM
229 struct pcie_link_state *link_state; /* ASPM link state. */
230 #endif
231
232 pci_channel_state_t error_state; /* current connectivity state */
233 struct device dev; /* Generic device interface */
234
235 int cfg_size; /* Size of configuration space */
236
237 /*
238 * Instead of touching interrupt line and base address registers
239 * directly, use the values stored here. They might be different!
240 */
241 unsigned int irq;
242 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
243
244 /* These fields are used by common fixups */
245 unsigned int transparent:1; /* Transparent PCI bridge */
246 unsigned int multifunction:1;/* Part of multi-function device */
247 /* keep track of device state */
248 unsigned int is_added:1;
249 unsigned int is_busmaster:1; /* device is busmaster */
250 unsigned int no_msi:1; /* device may not use msi */
251 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
252 unsigned int broken_parity_status:1; /* Device generates false positive parity */
253 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
254 unsigned int msi_enabled:1;
255 unsigned int msix_enabled:1;
256 unsigned int ari_enabled:1; /* ARI forwarding */
257 unsigned int is_managed:1;
258 unsigned int is_pcie:1;
259 unsigned int state_saved:1;
260 pci_dev_flags_t dev_flags;
261 atomic_t enable_cnt; /* pci_enable_device has been called */
262
263 u32 saved_config_space[16]; /* config space saved at suspend time */
264 struct hlist_head saved_cap_space;
265 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
266 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
267 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
268 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
269 #ifdef CONFIG_PCI_MSI
270 struct list_head msi_list;
271 #endif
272 struct pci_vpd *vpd;
273 };
274
275 extern struct pci_dev *alloc_pci_dev(void);
276
277 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
278 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
279 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
280
281 static inline int pci_channel_offline(struct pci_dev *pdev)
282 {
283 return (pdev->error_state != pci_channel_io_normal);
284 }
285
286 static inline struct pci_cap_saved_state *pci_find_saved_cap(
287 struct pci_dev *pci_dev, char cap)
288 {
289 struct pci_cap_saved_state *tmp;
290 struct hlist_node *pos;
291
292 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
293 if (tmp->cap_nr == cap)
294 return tmp;
295 }
296 return NULL;
297 }
298
299 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
300 struct pci_cap_saved_state *new_cap)
301 {
302 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
303 }
304
305 #ifndef PCI_BUS_NUM_RESOURCES
306 #define PCI_BUS_NUM_RESOURCES 16
307 #endif
308
309 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
310
311 struct pci_bus {
312 struct list_head node; /* node in list of buses */
313 struct pci_bus *parent; /* parent bus this bridge is on */
314 struct list_head children; /* list of child buses */
315 struct list_head devices; /* list of devices on this bus */
316 struct pci_dev *self; /* bridge device as seen by parent */
317 struct list_head slots; /* list of slots on this bus */
318 struct resource *resource[PCI_BUS_NUM_RESOURCES];
319 /* address space routed to this bus */
320
321 struct pci_ops *ops; /* configuration access functions */
322 void *sysdata; /* hook for sys-specific extension */
323 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
324
325 unsigned char number; /* bus number */
326 unsigned char primary; /* number of primary bridge */
327 unsigned char secondary; /* number of secondary bridge */
328 unsigned char subordinate; /* max number of subordinate buses */
329
330 char name[48];
331
332 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
333 pci_bus_flags_t bus_flags; /* Inherited by child busses */
334 struct device *bridge;
335 struct device dev;
336 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
337 struct bin_attribute *legacy_mem; /* legacy mem */
338 unsigned int is_added:1;
339 };
340
341 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
342 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
343
344 #ifdef CONFIG_PCI_MSI
345 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
346 {
347 return pci_dev->msi_enabled || pci_dev->msix_enabled;
348 }
349 #else
350 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
351 #endif
352
353 /*
354 * Error values that may be returned by PCI functions.
355 */
356 #define PCIBIOS_SUCCESSFUL 0x00
357 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
358 #define PCIBIOS_BAD_VENDOR_ID 0x83
359 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
360 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
361 #define PCIBIOS_SET_FAILED 0x88
362 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
363
364 /* Low-level architecture-dependent routines */
365
366 struct pci_ops {
367 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
368 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
369 };
370
371 /*
372 * ACPI needs to be able to access PCI config space before we've done a
373 * PCI bus scan and created pci_bus structures.
374 */
375 extern int raw_pci_read(unsigned int domain, unsigned int bus,
376 unsigned int devfn, int reg, int len, u32 *val);
377 extern int raw_pci_write(unsigned int domain, unsigned int bus,
378 unsigned int devfn, int reg, int len, u32 val);
379
380 struct pci_bus_region {
381 resource_size_t start;
382 resource_size_t end;
383 };
384
385 struct pci_dynids {
386 spinlock_t lock; /* protects list, index */
387 struct list_head list; /* for IDs added at runtime */
388 };
389
390 /* ---------------------------------------------------------------- */
391 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
392 * a set of callbacks in struct pci_error_handlers, then that device driver
393 * will be notified of PCI bus errors, and will be driven to recovery
394 * when an error occurs.
395 */
396
397 typedef unsigned int __bitwise pci_ers_result_t;
398
399 enum pci_ers_result {
400 /* no result/none/not supported in device driver */
401 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
402
403 /* Device driver can recover without slot reset */
404 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
405
406 /* Device driver wants slot to be reset. */
407 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
408
409 /* Device has completely failed, is unrecoverable */
410 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
411
412 /* Device driver is fully recovered and operational */
413 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
414 };
415
416 /* PCI bus error event callbacks */
417 struct pci_error_handlers {
418 /* PCI bus error detected on this device */
419 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
420 enum pci_channel_state error);
421
422 /* MMIO has been re-enabled, but not DMA */
423 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
424
425 /* PCI Express link has been reset */
426 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
427
428 /* PCI slot has been reset */
429 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
430
431 /* Device driver may resume normal operations */
432 void (*resume)(struct pci_dev *dev);
433 };
434
435 /* ---------------------------------------------------------------- */
436
437 struct module;
438 struct pci_driver {
439 struct list_head node;
440 char *name;
441 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
442 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
443 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
444 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
445 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
446 int (*resume_early) (struct pci_dev *dev);
447 int (*resume) (struct pci_dev *dev); /* Device woken up */
448 void (*shutdown) (struct pci_dev *dev);
449 struct pci_error_handlers *err_handler;
450 struct device_driver driver;
451 struct pci_dynids dynids;
452 };
453
454 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
455
456 /**
457 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
458 * @_table: device table name
459 *
460 * This macro is used to create a struct pci_device_id array (a device table)
461 * in a generic manner.
462 */
463 #define DEFINE_PCI_DEVICE_TABLE(_table) \
464 const struct pci_device_id _table[] __devinitconst
465
466 /**
467 * PCI_DEVICE - macro used to describe a specific pci device
468 * @vend: the 16 bit PCI Vendor ID
469 * @dev: the 16 bit PCI Device ID
470 *
471 * This macro is used to create a struct pci_device_id that matches a
472 * specific device. The subvendor and subdevice fields will be set to
473 * PCI_ANY_ID.
474 */
475 #define PCI_DEVICE(vend,dev) \
476 .vendor = (vend), .device = (dev), \
477 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
478
479 /**
480 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
481 * @dev_class: the class, subclass, prog-if triple for this device
482 * @dev_class_mask: the class mask for this device
483 *
484 * This macro is used to create a struct pci_device_id that matches a
485 * specific PCI class. The vendor, device, subvendor, and subdevice
486 * fields will be set to PCI_ANY_ID.
487 */
488 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
489 .class = (dev_class), .class_mask = (dev_class_mask), \
490 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
491 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
492
493 /**
494 * PCI_VDEVICE - macro used to describe a specific pci device in short form
495 * @vendor: the vendor name
496 * @device: the 16 bit PCI Device ID
497 *
498 * This macro is used to create a struct pci_device_id that matches a
499 * specific PCI device. The subvendor, and subdevice fields will be set
500 * to PCI_ANY_ID. The macro allows the next field to follow as the device
501 * private data.
502 */
503
504 #define PCI_VDEVICE(vendor, device) \
505 PCI_VENDOR_ID_##vendor, (device), \
506 PCI_ANY_ID, PCI_ANY_ID, 0, 0
507
508 /* these external functions are only available when PCI support is enabled */
509 #ifdef CONFIG_PCI
510
511 extern struct bus_type pci_bus_type;
512
513 /* Do NOT directly access these two variables, unless you are arch specific pci
514 * code, or pci core code. */
515 extern struct list_head pci_root_buses; /* list of all known PCI buses */
516 /* Some device drivers need know if pci is initiated */
517 extern int no_pci_devices(void);
518
519 void pcibios_fixup_bus(struct pci_bus *);
520 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
521 char *pcibios_setup(char *str);
522
523 /* Used only when drivers/pci/setup.c is used */
524 void pcibios_align_resource(void *, struct resource *, resource_size_t,
525 resource_size_t);
526 void pcibios_update_irq(struct pci_dev *, int irq);
527
528 /* Generic PCI functions used internally */
529
530 extern struct pci_bus *pci_find_bus(int domain, int busnr);
531 void pci_bus_add_devices(struct pci_bus *bus);
532 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
533 struct pci_ops *ops, void *sysdata);
534 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
535 void *sysdata)
536 {
537 struct pci_bus *root_bus;
538 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
539 if (root_bus)
540 pci_bus_add_devices(root_bus);
541 return root_bus;
542 }
543 struct pci_bus *pci_create_bus(struct device *parent, int bus,
544 struct pci_ops *ops, void *sysdata);
545 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
546 int busnr);
547 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
548 const char *name,
549 struct hotplug_slot *hotplug);
550 void pci_destroy_slot(struct pci_slot *slot);
551 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
552 int pci_scan_slot(struct pci_bus *bus, int devfn);
553 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
554 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
555 unsigned int pci_scan_child_bus(struct pci_bus *bus);
556 int __must_check pci_bus_add_device(struct pci_dev *dev);
557 void pci_read_bridge_bases(struct pci_bus *child);
558 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
559 struct resource *res);
560 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
561 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
562 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
563 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
564 extern void pci_dev_put(struct pci_dev *dev);
565 extern void pci_remove_bus(struct pci_bus *b);
566 extern void pci_remove_bus_device(struct pci_dev *dev);
567 extern void pci_stop_bus_device(struct pci_dev *dev);
568 void pci_setup_cardbus(struct pci_bus *bus);
569 extern void pci_sort_breadthfirst(void);
570
571 /* Generic PCI functions exported to card drivers */
572
573 #ifdef CONFIG_PCI_LEGACY
574 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
575 unsigned int device,
576 struct pci_dev *from);
577 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
578 unsigned int devfn);
579 #endif /* CONFIG_PCI_LEGACY */
580
581 enum pci_lost_interrupt_reason {
582 PCI_LOST_IRQ_NO_INFORMATION = 0,
583 PCI_LOST_IRQ_DISABLE_MSI,
584 PCI_LOST_IRQ_DISABLE_MSIX,
585 PCI_LOST_IRQ_DISABLE_ACPI,
586 };
587 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
588 int pci_find_capability(struct pci_dev *dev, int cap);
589 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
590 int pci_find_ext_capability(struct pci_dev *dev, int cap);
591 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
592 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
593 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
594
595 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
596 struct pci_dev *from);
597 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
598 unsigned int ss_vendor, unsigned int ss_device,
599 struct pci_dev *from);
600 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
601 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
602 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
603 int pci_dev_present(const struct pci_device_id *ids);
604
605 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
606 int where, u8 *val);
607 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
608 int where, u16 *val);
609 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
610 int where, u32 *val);
611 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
612 int where, u8 val);
613 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
614 int where, u16 val);
615 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
616 int where, u32 val);
617
618 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
619 {
620 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
621 }
622 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
623 {
624 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
625 }
626 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
627 u32 *val)
628 {
629 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
630 }
631 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
632 {
633 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
634 }
635 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
636 {
637 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
638 }
639 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
640 u32 val)
641 {
642 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
643 }
644
645 int __must_check pci_enable_device(struct pci_dev *dev);
646 int __must_check pci_enable_device_io(struct pci_dev *dev);
647 int __must_check pci_enable_device_mem(struct pci_dev *dev);
648 int __must_check pci_reenable_device(struct pci_dev *);
649 int __must_check pcim_enable_device(struct pci_dev *pdev);
650 void pcim_pin_device(struct pci_dev *pdev);
651
652 static inline int pci_is_managed(struct pci_dev *pdev)
653 {
654 return pdev->is_managed;
655 }
656
657 void pci_disable_device(struct pci_dev *dev);
658 void pci_set_master(struct pci_dev *dev);
659 void pci_clear_master(struct pci_dev *dev);
660 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
661 #define HAVE_PCI_SET_MWI
662 int __must_check pci_set_mwi(struct pci_dev *dev);
663 int pci_try_set_mwi(struct pci_dev *dev);
664 void pci_clear_mwi(struct pci_dev *dev);
665 void pci_intx(struct pci_dev *dev, int enable);
666 void pci_msi_off(struct pci_dev *dev);
667 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
668 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
669 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
670 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
671 int pcix_get_max_mmrbc(struct pci_dev *dev);
672 int pcix_get_mmrbc(struct pci_dev *dev);
673 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
674 int pcie_get_readrq(struct pci_dev *dev);
675 int pcie_set_readrq(struct pci_dev *dev, int rq);
676 int pci_reset_function(struct pci_dev *dev);
677 int pci_execute_reset_function(struct pci_dev *dev);
678 void pci_update_resource(struct pci_dev *dev, int resno);
679 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
680 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
681
682 /* ROM control related routines */
683 int pci_enable_rom(struct pci_dev *pdev);
684 void pci_disable_rom(struct pci_dev *pdev);
685 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
686 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
687 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
688
689 /* Power management related routines */
690 int pci_save_state(struct pci_dev *dev);
691 int pci_restore_state(struct pci_dev *dev);
692 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
693 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
694 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
695 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
696 void pci_pme_active(struct pci_dev *dev, bool enable);
697 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
698 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
699 pci_power_t pci_target_state(struct pci_dev *dev);
700 int pci_prepare_to_sleep(struct pci_dev *dev);
701 int pci_back_from_sleep(struct pci_dev *dev);
702
703 /* Functions for PCI Hotplug drivers to use */
704 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
705
706 /* Vital product data routines */
707 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
708 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
709 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
710
711 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
712 void pci_bus_assign_resources(struct pci_bus *bus);
713 void pci_bus_size_bridges(struct pci_bus *bus);
714 int pci_claim_resource(struct pci_dev *, int);
715 void pci_assign_unassigned_resources(void);
716 void pdev_enable_device(struct pci_dev *);
717 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
718 int pci_enable_resources(struct pci_dev *, int mask);
719 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
720 int (*)(struct pci_dev *, u8, u8));
721 #define HAVE_PCI_REQ_REGIONS 2
722 int __must_check pci_request_regions(struct pci_dev *, const char *);
723 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
724 void pci_release_regions(struct pci_dev *);
725 int __must_check pci_request_region(struct pci_dev *, int, const char *);
726 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
727 void pci_release_region(struct pci_dev *, int);
728 int pci_request_selected_regions(struct pci_dev *, int, const char *);
729 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
730 void pci_release_selected_regions(struct pci_dev *, int);
731
732 /* drivers/pci/bus.c */
733 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
734 struct resource *res, resource_size_t size,
735 resource_size_t align, resource_size_t min,
736 unsigned int type_mask,
737 void (*alignf)(void *, struct resource *,
738 resource_size_t, resource_size_t),
739 void *alignf_data);
740 void pci_enable_bridges(struct pci_bus *bus);
741
742 /* Proper probing supporting hot-pluggable devices */
743 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
744 const char *mod_name);
745
746 /*
747 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
748 */
749 #define pci_register_driver(driver) \
750 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
751
752 void pci_unregister_driver(struct pci_driver *dev);
753 void pci_remove_behind_bridge(struct pci_dev *dev);
754 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
755 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
756 struct pci_dev *dev);
757 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
758 int pass);
759
760 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
761 void *userdata);
762 int pci_cfg_space_size_ext(struct pci_dev *dev);
763 int pci_cfg_space_size(struct pci_dev *dev);
764 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
765
766 /* kmem_cache style wrapper around pci_alloc_consistent() */
767
768 #include <linux/dmapool.h>
769
770 #define pci_pool dma_pool
771 #define pci_pool_create(name, pdev, size, align, allocation) \
772 dma_pool_create(name, &pdev->dev, size, align, allocation)
773 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
774 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
775 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
776
777 enum pci_dma_burst_strategy {
778 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
779 strategy_parameter is N/A */
780 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
781 byte boundaries */
782 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
783 strategy_parameter byte boundaries */
784 };
785
786 struct msix_entry {
787 u32 vector; /* kernel uses to write allocated vector */
788 u16 entry; /* driver uses to specify entry, OS writes */
789 };
790
791
792 #ifndef CONFIG_PCI_MSI
793 static inline int pci_enable_msi(struct pci_dev *dev)
794 {
795 return -1;
796 }
797
798 static inline void pci_msi_shutdown(struct pci_dev *dev)
799 { }
800 static inline void pci_disable_msi(struct pci_dev *dev)
801 { }
802
803 static inline int pci_enable_msix(struct pci_dev *dev,
804 struct msix_entry *entries, int nvec)
805 {
806 return -1;
807 }
808
809 static inline void pci_msix_shutdown(struct pci_dev *dev)
810 { }
811 static inline void pci_disable_msix(struct pci_dev *dev)
812 { }
813
814 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
815 { }
816
817 static inline void pci_restore_msi_state(struct pci_dev *dev)
818 { }
819 static inline int pci_msi_enabled(void)
820 {
821 return 0;
822 }
823 #else
824 extern int pci_enable_msi(struct pci_dev *dev);
825 extern void pci_msi_shutdown(struct pci_dev *dev);
826 extern void pci_disable_msi(struct pci_dev *dev);
827 extern int pci_enable_msix(struct pci_dev *dev,
828 struct msix_entry *entries, int nvec);
829 extern void pci_msix_shutdown(struct pci_dev *dev);
830 extern void pci_disable_msix(struct pci_dev *dev);
831 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
832 extern void pci_restore_msi_state(struct pci_dev *dev);
833 extern int pci_msi_enabled(void);
834 #endif
835
836 #ifndef CONFIG_PCIEASPM
837 static inline int pcie_aspm_enabled(void)
838 {
839 return 0;
840 }
841 #else
842 extern int pcie_aspm_enabled(void);
843 #endif
844
845 #ifdef CONFIG_HT_IRQ
846 /* The functions a driver should call */
847 int ht_create_irq(struct pci_dev *dev, int idx);
848 void ht_destroy_irq(unsigned int irq);
849 #endif /* CONFIG_HT_IRQ */
850
851 extern void pci_block_user_cfg_access(struct pci_dev *dev);
852 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
853
854 /*
855 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
856 * a PCI domain is defined to be a set of PCI busses which share
857 * configuration space.
858 */
859 #ifdef CONFIG_PCI_DOMAINS
860 extern int pci_domains_supported;
861 #else
862 enum { pci_domains_supported = 0 };
863 static inline int pci_domain_nr(struct pci_bus *bus)
864 {
865 return 0;
866 }
867
868 static inline int pci_proc_domain(struct pci_bus *bus)
869 {
870 return 0;
871 }
872 #endif /* CONFIG_PCI_DOMAINS */
873
874 #else /* CONFIG_PCI is not enabled */
875
876 /*
877 * If the system does not have PCI, clearly these return errors. Define
878 * these as simple inline functions to avoid hair in drivers.
879 */
880
881 #define _PCI_NOP(o, s, t) \
882 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
883 int where, t val) \
884 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
885
886 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
887 _PCI_NOP(o, word, u16 x) \
888 _PCI_NOP(o, dword, u32 x)
889 _PCI_NOP_ALL(read, *)
890 _PCI_NOP_ALL(write,)
891
892 static inline struct pci_dev *pci_find_device(unsigned int vendor,
893 unsigned int device,
894 struct pci_dev *from)
895 {
896 return NULL;
897 }
898
899 static inline struct pci_dev *pci_find_slot(unsigned int bus,
900 unsigned int devfn)
901 {
902 return NULL;
903 }
904
905 static inline struct pci_dev *pci_get_device(unsigned int vendor,
906 unsigned int device,
907 struct pci_dev *from)
908 {
909 return NULL;
910 }
911
912 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
913 unsigned int device,
914 unsigned int ss_vendor,
915 unsigned int ss_device,
916 struct pci_dev *from)
917 {
918 return NULL;
919 }
920
921 static inline struct pci_dev *pci_get_class(unsigned int class,
922 struct pci_dev *from)
923 {
924 return NULL;
925 }
926
927 #define pci_dev_present(ids) (0)
928 #define no_pci_devices() (1)
929 #define pci_dev_put(dev) do { } while (0)
930
931 static inline void pci_set_master(struct pci_dev *dev)
932 { }
933
934 static inline int pci_enable_device(struct pci_dev *dev)
935 {
936 return -EIO;
937 }
938
939 static inline void pci_disable_device(struct pci_dev *dev)
940 { }
941
942 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
943 {
944 return -EIO;
945 }
946
947 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
948 {
949 return -EIO;
950 }
951
952 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
953 unsigned int size)
954 {
955 return -EIO;
956 }
957
958 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
959 unsigned long mask)
960 {
961 return -EIO;
962 }
963
964 static inline int pci_assign_resource(struct pci_dev *dev, int i)
965 {
966 return -EBUSY;
967 }
968
969 static inline int __pci_register_driver(struct pci_driver *drv,
970 struct module *owner)
971 {
972 return 0;
973 }
974
975 static inline int pci_register_driver(struct pci_driver *drv)
976 {
977 return 0;
978 }
979
980 static inline void pci_unregister_driver(struct pci_driver *drv)
981 { }
982
983 static inline int pci_find_capability(struct pci_dev *dev, int cap)
984 {
985 return 0;
986 }
987
988 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
989 int cap)
990 {
991 return 0;
992 }
993
994 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
995 {
996 return 0;
997 }
998
999 /* Power management related routines */
1000 static inline int pci_save_state(struct pci_dev *dev)
1001 {
1002 return 0;
1003 }
1004
1005 static inline int pci_restore_state(struct pci_dev *dev)
1006 {
1007 return 0;
1008 }
1009
1010 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1011 {
1012 return 0;
1013 }
1014
1015 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1016 pm_message_t state)
1017 {
1018 return PCI_D0;
1019 }
1020
1021 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1022 int enable)
1023 {
1024 return 0;
1025 }
1026
1027 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1028 {
1029 return -EIO;
1030 }
1031
1032 static inline void pci_release_regions(struct pci_dev *dev)
1033 { }
1034
1035 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1036
1037 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1038 { }
1039
1040 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1041 { }
1042
1043 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1044 { return NULL; }
1045
1046 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1047 unsigned int devfn)
1048 { return NULL; }
1049
1050 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1051 unsigned int devfn)
1052 { return NULL; }
1053
1054 #endif /* CONFIG_PCI */
1055
1056 /* Include architecture-dependent settings and functions */
1057
1058 #include <asm/pci.h>
1059
1060 /* these helpers provide future and backwards compatibility
1061 * for accessing popular PCI BAR info */
1062 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1063 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1064 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1065 #define pci_resource_len(dev,bar) \
1066 ((pci_resource_start((dev), (bar)) == 0 && \
1067 pci_resource_end((dev), (bar)) == \
1068 pci_resource_start((dev), (bar))) ? 0 : \
1069 \
1070 (pci_resource_end((dev), (bar)) - \
1071 pci_resource_start((dev), (bar)) + 1))
1072
1073 /* Similar to the helpers above, these manipulate per-pci_dev
1074 * driver-specific data. They are really just a wrapper around
1075 * the generic device structure functions of these calls.
1076 */
1077 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1078 {
1079 return dev_get_drvdata(&pdev->dev);
1080 }
1081
1082 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1083 {
1084 dev_set_drvdata(&pdev->dev, data);
1085 }
1086
1087 /* If you want to know what to call your pci_dev, ask this function.
1088 * Again, it's a wrapper around the generic device.
1089 */
1090 static inline const char *pci_name(struct pci_dev *pdev)
1091 {
1092 return dev_name(&pdev->dev);
1093 }
1094
1095
1096 /* Some archs don't want to expose struct resource to userland as-is
1097 * in sysfs and /proc
1098 */
1099 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1100 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1101 const struct resource *rsrc, resource_size_t *start,
1102 resource_size_t *end)
1103 {
1104 *start = rsrc->start;
1105 *end = rsrc->end;
1106 }
1107 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1108
1109
1110 /*
1111 * The world is not perfect and supplies us with broken PCI devices.
1112 * For at least a part of these bugs we need a work-around, so both
1113 * generic (drivers/pci/quirks.c) and per-architecture code can define
1114 * fixup hooks to be called for particular buggy devices.
1115 */
1116
1117 struct pci_fixup {
1118 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1119 void (*hook)(struct pci_dev *dev);
1120 };
1121
1122 enum pci_fixup_pass {
1123 pci_fixup_early, /* Before probing BARs */
1124 pci_fixup_header, /* After reading configuration header */
1125 pci_fixup_final, /* Final phase of device fixups */
1126 pci_fixup_enable, /* pci_enable_device() time */
1127 pci_fixup_resume, /* pci_device_resume() */
1128 pci_fixup_suspend, /* pci_device_suspend */
1129 pci_fixup_resume_early, /* pci_device_resume_early() */
1130 };
1131
1132 /* Anonymous variables would be nice... */
1133 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1134 static const struct pci_fixup __pci_fixup_##name __used \
1135 __attribute__((__section__(#section))) = { vendor, device, hook };
1136 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1137 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1138 vendor##device##hook, vendor, device, hook)
1139 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1140 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1141 vendor##device##hook, vendor, device, hook)
1142 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1143 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1144 vendor##device##hook, vendor, device, hook)
1145 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1146 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1147 vendor##device##hook, vendor, device, hook)
1148 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1149 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1150 resume##vendor##device##hook, vendor, device, hook)
1151 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1152 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1153 resume_early##vendor##device##hook, vendor, device, hook)
1154 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1155 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1156 suspend##vendor##device##hook, vendor, device, hook)
1157
1158
1159 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1160
1161 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1162 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1163 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1164 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1165 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1166 const char *name);
1167 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1168
1169 extern int pci_pci_problems;
1170 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1171 #define PCIPCI_TRITON 2
1172 #define PCIPCI_NATOMA 4
1173 #define PCIPCI_VIAETBF 8
1174 #define PCIPCI_VSFX 16
1175 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1176 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1177
1178 extern unsigned long pci_cardbus_io_size;
1179 extern unsigned long pci_cardbus_mem_size;
1180
1181 int pcibios_add_platform_entries(struct pci_dev *dev);
1182 void pcibios_disable_device(struct pci_dev *dev);
1183 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1184 enum pcie_reset_state state);
1185
1186 #ifdef CONFIG_PCI_MMCONFIG
1187 extern void __init pci_mmcfg_early_init(void);
1188 extern void __init pci_mmcfg_late_init(void);
1189 #else
1190 static inline void pci_mmcfg_early_init(void) { }
1191 static inline void pci_mmcfg_late_init(void) { }
1192 #endif
1193
1194 int pci_ext_cfg_avail(struct pci_dev *dev);
1195
1196 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1197
1198 #endif /* __KERNEL__ */
1199 #endif /* LINUX_PCI_H */
Linux 2.6 libata-dev (mirror)