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[linux-2.6/libata-dev.git] / drivers / video / atmel_lcdfb.c
blob8dce25126330f48639607e97398267a131c7d959
1 /*
2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
22 #include <mach/board.h>
23 #include <mach/cpu.h>
24 #include <mach/gpio.h>
26 #include <video/atmel_lcdc.h>
28 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
29 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
31 /* configurable parameters */
32 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
33 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
34 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
36 #if defined(CONFIG_ARCH_AT91)
37 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
38 | FBINFO_PARTIAL_PAN_OK \
39 | FBINFO_HWACCEL_YPAN)
41 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
42 struct fb_var_screeninfo *var)
46 #elif defined(CONFIG_AVR32)
47 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
48 | FBINFO_PARTIAL_PAN_OK \
49 | FBINFO_HWACCEL_XPAN \
50 | FBINFO_HWACCEL_YPAN)
52 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
53 struct fb_var_screeninfo *var)
55 u32 dma2dcfg;
56 u32 pixeloff;
58 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
60 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
61 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
62 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
64 /* Update configuration */
65 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
66 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
67 | ATMEL_LCDC_DMAUPDT);
69 #endif
71 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
72 | ATMEL_LCDC_POL_POSITIVE
73 | ATMEL_LCDC_ENA_PWMENABLE;
75 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
77 /* some bl->props field just changed */
78 static int atmel_bl_update_status(struct backlight_device *bl)
80 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
81 int power = sinfo->bl_power;
82 int brightness = bl->props.brightness;
84 /* REVISIT there may be a meaningful difference between
85 * fb_blank and power ... there seem to be some cases
86 * this doesn't handle correctly.
88 if (bl->props.fb_blank != sinfo->bl_power)
89 power = bl->props.fb_blank;
90 else if (bl->props.power != sinfo->bl_power)
91 power = bl->props.power;
93 if (brightness < 0 && power == FB_BLANK_UNBLANK)
94 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
95 else if (power != FB_BLANK_UNBLANK)
96 brightness = 0;
98 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
99 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
100 brightness ? contrast_ctr : 0);
102 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
104 return 0;
107 static int atmel_bl_get_brightness(struct backlight_device *bl)
109 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
111 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
114 static struct backlight_ops atmel_lcdc_bl_ops = {
115 .update_status = atmel_bl_update_status,
116 .get_brightness = atmel_bl_get_brightness,
119 static void init_backlight(struct atmel_lcdfb_info *sinfo)
121 struct backlight_properties props;
122 struct backlight_device *bl;
124 sinfo->bl_power = FB_BLANK_UNBLANK;
126 if (sinfo->backlight)
127 return;
129 memset(&props, 0, sizeof(struct backlight_properties));
130 props.max_brightness = 0xff;
131 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
132 &atmel_lcdc_bl_ops, &props);
133 if (IS_ERR(bl)) {
134 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
135 PTR_ERR(bl));
136 return;
138 sinfo->backlight = bl;
140 bl->props.power = FB_BLANK_UNBLANK;
141 bl->props.fb_blank = FB_BLANK_UNBLANK;
142 bl->props.brightness = atmel_bl_get_brightness(bl);
145 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
147 if (sinfo->backlight)
148 backlight_device_unregister(sinfo->backlight);
151 #else
153 static void init_backlight(struct atmel_lcdfb_info *sinfo)
155 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
158 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
162 #endif
164 static void init_contrast(struct atmel_lcdfb_info *sinfo)
166 /* have some default contrast/backlight settings */
167 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
168 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
170 if (sinfo->lcdcon_is_backlight)
171 init_backlight(sinfo);
175 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
176 .type = FB_TYPE_PACKED_PIXELS,
177 .visual = FB_VISUAL_TRUECOLOR,
178 .xpanstep = 0,
179 .ypanstep = 1,
180 .ywrapstep = 0,
181 .accel = FB_ACCEL_NONE,
184 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
186 unsigned long value;
188 if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
189 || cpu_is_at32ap7000()))
190 return xres;
192 value = xres;
193 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
194 /* STN display */
195 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
196 value *= 3;
198 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
199 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
200 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
201 value = DIV_ROUND_UP(value, 4);
202 else
203 value = DIV_ROUND_UP(value, 8);
206 return value;
209 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
211 /* Turn off the LCD controller and the DMA controller */
212 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
213 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
215 /* Wait for the LCDC core to become idle */
216 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
217 msleep(10);
219 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
222 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
224 atmel_lcdfb_stop_nowait(sinfo);
226 /* Wait for DMA engine to become idle... */
227 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
228 msleep(10);
231 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
233 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
234 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
235 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
236 | ATMEL_LCDC_PWR);
239 static void atmel_lcdfb_update_dma(struct fb_info *info,
240 struct fb_var_screeninfo *var)
242 struct atmel_lcdfb_info *sinfo = info->par;
243 struct fb_fix_screeninfo *fix = &info->fix;
244 unsigned long dma_addr;
246 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
247 + var->xoffset * var->bits_per_pixel / 8);
249 dma_addr &= ~3UL;
251 /* Set framebuffer DMA base address and pixel offset */
252 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
254 atmel_lcdfb_update_dma2d(sinfo, var);
257 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
259 struct fb_info *info = sinfo->info;
261 dma_free_writecombine(info->device, info->fix.smem_len,
262 info->screen_base, info->fix.smem_start);
266 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
267 * @sinfo: the frame buffer to allocate memory for
269 * This function is called only from the atmel_lcdfb_probe()
270 * so no locking by fb_info->mm_lock around smem_len setting is needed.
272 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
274 struct fb_info *info = sinfo->info;
275 struct fb_var_screeninfo *var = &info->var;
276 unsigned int smem_len;
278 smem_len = (var->xres_virtual * var->yres_virtual
279 * ((var->bits_per_pixel + 7) / 8));
280 info->fix.smem_len = max(smem_len, sinfo->smem_len);
282 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
283 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
285 if (!info->screen_base) {
286 return -ENOMEM;
289 memset(info->screen_base, 0, info->fix.smem_len);
291 return 0;
294 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
295 struct fb_info *info)
297 struct fb_videomode varfbmode;
298 const struct fb_videomode *fbmode = NULL;
300 fb_var_to_videomode(&varfbmode, var);
301 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
302 if (fbmode)
303 fb_videomode_to_var(var, fbmode);
304 return fbmode;
309 * atmel_lcdfb_check_var - Validates a var passed in.
310 * @var: frame buffer variable screen structure
311 * @info: frame buffer structure that represents a single frame buffer
313 * Checks to see if the hardware supports the state requested by
314 * var passed in. This function does not alter the hardware
315 * state!!! This means the data stored in struct fb_info and
316 * struct atmel_lcdfb_info do not change. This includes the var
317 * inside of struct fb_info. Do NOT change these. This function
318 * can be called on its own if we intent to only test a mode and
319 * not actually set it. The stuff in modedb.c is a example of
320 * this. If the var passed in is slightly off by what the
321 * hardware can support then we alter the var PASSED in to what
322 * we can do. If the hardware doesn't support mode change a
323 * -EINVAL will be returned by the upper layers. You don't need
324 * to implement this function then. If you hardware doesn't
325 * support changing the resolution then this function is not
326 * needed. In this case the driver would just provide a var that
327 * represents the static state the screen is in.
329 * Returns negative errno on error, or zero on success.
331 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
332 struct fb_info *info)
334 struct device *dev = info->device;
335 struct atmel_lcdfb_info *sinfo = info->par;
336 unsigned long clk_value_khz;
338 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
340 dev_dbg(dev, "%s:\n", __func__);
342 if (!(var->pixclock && var->bits_per_pixel)) {
343 /* choose a suitable mode if possible */
344 if (!atmel_lcdfb_choose_mode(var, info)) {
345 dev_err(dev, "needed value not specified\n");
346 return -EINVAL;
350 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
351 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
352 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
353 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
355 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
356 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
357 return -EINVAL;
360 /* Do not allow to have real resoulution larger than virtual */
361 if (var->xres > var->xres_virtual)
362 var->xres_virtual = var->xres;
364 if (var->yres > var->yres_virtual)
365 var->yres_virtual = var->yres;
367 /* Force same alignment for each line */
368 var->xres = (var->xres + 3) & ~3UL;
369 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
371 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
372 var->transp.msb_right = 0;
373 var->transp.offset = var->transp.length = 0;
374 var->xoffset = var->yoffset = 0;
376 if (info->fix.smem_len) {
377 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
378 * ((var->bits_per_pixel + 7) / 8));
379 if (smem_len > info->fix.smem_len)
380 return -EINVAL;
383 /* Saturate vertical and horizontal timings at maximum values */
384 var->vsync_len = min_t(u32, var->vsync_len,
385 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
386 var->upper_margin = min_t(u32, var->upper_margin,
387 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
388 var->lower_margin = min_t(u32, var->lower_margin,
389 ATMEL_LCDC_VFP);
390 var->right_margin = min_t(u32, var->right_margin,
391 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
392 var->hsync_len = min_t(u32, var->hsync_len,
393 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
394 var->left_margin = min_t(u32, var->left_margin,
395 ATMEL_LCDC_HBP + 1);
397 /* Some parameters can't be zero */
398 var->vsync_len = max_t(u32, var->vsync_len, 1);
399 var->right_margin = max_t(u32, var->right_margin, 1);
400 var->hsync_len = max_t(u32, var->hsync_len, 1);
401 var->left_margin = max_t(u32, var->left_margin, 1);
403 switch (var->bits_per_pixel) {
404 case 1:
405 case 2:
406 case 4:
407 case 8:
408 var->red.offset = var->green.offset = var->blue.offset = 0;
409 var->red.length = var->green.length = var->blue.length
410 = var->bits_per_pixel;
411 break;
412 case 15:
413 case 16:
414 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
415 /* RGB:565 mode */
416 var->red.offset = 11;
417 var->blue.offset = 0;
418 var->green.length = 6;
419 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
420 var->red.offset = 10;
421 var->blue.offset = 0;
422 var->green.length = 5;
423 } else {
424 /* BGR:555 mode */
425 var->red.offset = 0;
426 var->blue.offset = 10;
427 var->green.length = 5;
429 var->green.offset = 5;
430 var->red.length = var->blue.length = 5;
431 break;
432 case 32:
433 var->transp.offset = 24;
434 var->transp.length = 8;
435 /* fall through */
436 case 24:
437 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
438 /* RGB:888 mode */
439 var->red.offset = 16;
440 var->blue.offset = 0;
441 } else {
442 /* BGR:888 mode */
443 var->red.offset = 0;
444 var->blue.offset = 16;
446 var->green.offset = 8;
447 var->red.length = var->green.length = var->blue.length = 8;
448 break;
449 default:
450 dev_err(dev, "color depth %d not supported\n",
451 var->bits_per_pixel);
452 return -EINVAL;
455 return 0;
459 * LCD reset sequence
461 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
463 might_sleep();
465 atmel_lcdfb_stop(sinfo);
466 atmel_lcdfb_start(sinfo);
470 * atmel_lcdfb_set_par - Alters the hardware state.
471 * @info: frame buffer structure that represents a single frame buffer
473 * Using the fb_var_screeninfo in fb_info we set the resolution
474 * of the this particular framebuffer. This function alters the
475 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
476 * not alter var in fb_info since we are using that data. This
477 * means we depend on the data in var inside fb_info to be
478 * supported by the hardware. atmel_lcdfb_check_var is always called
479 * before atmel_lcdfb_set_par to ensure this. Again if you can't
480 * change the resolution you don't need this function.
483 static int atmel_lcdfb_set_par(struct fb_info *info)
485 struct atmel_lcdfb_info *sinfo = info->par;
486 unsigned long hozval_linesz;
487 unsigned long value;
488 unsigned long clk_value_khz;
489 unsigned long bits_per_line;
490 unsigned long pix_factor = 2;
492 might_sleep();
494 dev_dbg(info->device, "%s:\n", __func__);
495 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
496 info->var.xres, info->var.yres,
497 info->var.xres_virtual, info->var.yres_virtual);
499 atmel_lcdfb_stop_nowait(sinfo);
501 if (info->var.bits_per_pixel == 1)
502 info->fix.visual = FB_VISUAL_MONO01;
503 else if (info->var.bits_per_pixel <= 8)
504 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
505 else
506 info->fix.visual = FB_VISUAL_TRUECOLOR;
508 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
509 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
511 /* Re-initialize the DMA engine... */
512 dev_dbg(info->device, " * update DMA engine\n");
513 atmel_lcdfb_update_dma(info, &info->var);
515 /* ...set frame size and burst length = 8 words (?) */
516 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
517 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
518 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
520 /* Now, the LCDC core... */
522 /* Set pixel clock */
523 if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
524 pix_factor = 1;
526 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
528 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
530 if (value < pix_factor) {
531 dev_notice(info->device, "Bypassing pixel clock divider\n");
532 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
533 } else {
534 value = (value / pix_factor) - 1;
535 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
536 value);
537 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
538 value << ATMEL_LCDC_CLKVAL_OFFSET);
539 info->var.pixclock =
540 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
541 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
542 PICOS2KHZ(info->var.pixclock));
546 /* Initialize control register 2 */
547 value = sinfo->default_lcdcon2;
549 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
550 value |= ATMEL_LCDC_INVLINE_INVERTED;
551 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
552 value |= ATMEL_LCDC_INVFRAME_INVERTED;
554 switch (info->var.bits_per_pixel) {
555 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
556 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
557 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
558 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
559 case 15: /* fall through */
560 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
561 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
562 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
563 default: BUG(); break;
565 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
566 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
568 /* Vertical timing */
569 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
570 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
571 value |= info->var.lower_margin;
572 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
573 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
575 /* Horizontal timing */
576 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
577 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
578 value |= (info->var.left_margin - 1);
579 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
580 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
582 /* Horizontal value (aka line size) */
583 hozval_linesz = compute_hozval(info->var.xres,
584 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
586 /* Display size */
587 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
588 value |= info->var.yres - 1;
589 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
590 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
592 /* FIFO Threshold: Use formula from data sheet */
593 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
594 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
596 /* Toggle LCD_MODE every frame */
597 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
599 /* Disable all interrupts */
600 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
601 /* Enable FIFO & DMA errors */
602 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
604 /* ...wait for DMA engine to become idle... */
605 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
606 msleep(10);
608 atmel_lcdfb_start(sinfo);
610 dev_dbg(info->device, " * DONE\n");
612 return 0;
615 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
617 chan &= 0xffff;
618 chan >>= 16 - bf->length;
619 return chan << bf->offset;
623 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
624 * @regno: Which register in the CLUT we are programming
625 * @red: The red value which can be up to 16 bits wide
626 * @green: The green value which can be up to 16 bits wide
627 * @blue: The blue value which can be up to 16 bits wide.
628 * @transp: If supported the alpha value which can be up to 16 bits wide.
629 * @info: frame buffer info structure
631 * Set a single color register. The values supplied have a 16 bit
632 * magnitude which needs to be scaled in this function for the hardware.
633 * Things to take into consideration are how many color registers, if
634 * any, are supported with the current color visual. With truecolor mode
635 * no color palettes are supported. Here a psuedo palette is created
636 * which we store the value in pseudo_palette in struct fb_info. For
637 * pseudocolor mode we have a limited color palette. To deal with this
638 * we can program what color is displayed for a particular pixel value.
639 * DirectColor is similar in that we can program each color field. If
640 * we have a static colormap we don't need to implement this function.
642 * Returns negative errno on error, or zero on success. In an
643 * ideal world, this would have been the case, but as it turns
644 * out, the other drivers return 1 on failure, so that's what
645 * we're going to do.
647 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
648 unsigned int green, unsigned int blue,
649 unsigned int transp, struct fb_info *info)
651 struct atmel_lcdfb_info *sinfo = info->par;
652 unsigned int val;
653 u32 *pal;
654 int ret = 1;
656 if (info->var.grayscale)
657 red = green = blue = (19595 * red + 38470 * green
658 + 7471 * blue) >> 16;
660 switch (info->fix.visual) {
661 case FB_VISUAL_TRUECOLOR:
662 if (regno < 16) {
663 pal = info->pseudo_palette;
665 val = chan_to_field(red, &info->var.red);
666 val |= chan_to_field(green, &info->var.green);
667 val |= chan_to_field(blue, &info->var.blue);
669 pal[regno] = val;
670 ret = 0;
672 break;
674 case FB_VISUAL_PSEUDOCOLOR:
675 if (regno < 256) {
676 val = ((red >> 11) & 0x001f);
677 val |= ((green >> 6) & 0x03e0);
678 val |= ((blue >> 1) & 0x7c00);
681 * TODO: intensity bit. Maybe something like
682 * ~(red[10] ^ green[10] ^ blue[10]) & 1
685 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
686 ret = 0;
688 break;
690 case FB_VISUAL_MONO01:
691 if (regno < 2) {
692 val = (regno == 0) ? 0x00 : 0x1F;
693 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
694 ret = 0;
696 break;
700 return ret;
703 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
704 struct fb_info *info)
706 dev_dbg(info->device, "%s\n", __func__);
708 atmel_lcdfb_update_dma(info, var);
710 return 0;
713 static struct fb_ops atmel_lcdfb_ops = {
714 .owner = THIS_MODULE,
715 .fb_check_var = atmel_lcdfb_check_var,
716 .fb_set_par = atmel_lcdfb_set_par,
717 .fb_setcolreg = atmel_lcdfb_setcolreg,
718 .fb_pan_display = atmel_lcdfb_pan_display,
719 .fb_fillrect = cfb_fillrect,
720 .fb_copyarea = cfb_copyarea,
721 .fb_imageblit = cfb_imageblit,
724 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
726 struct fb_info *info = dev_id;
727 struct atmel_lcdfb_info *sinfo = info->par;
728 u32 status;
730 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
731 if (status & ATMEL_LCDC_UFLWI) {
732 dev_warn(info->device, "FIFO underflow %#x\n", status);
733 /* reset DMA and FIFO to avoid screen shifting */
734 schedule_work(&sinfo->task);
736 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
737 return IRQ_HANDLED;
741 * LCD controller task (to reset the LCD)
743 static void atmel_lcdfb_task(struct work_struct *work)
745 struct atmel_lcdfb_info *sinfo =
746 container_of(work, struct atmel_lcdfb_info, task);
748 atmel_lcdfb_reset(sinfo);
751 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
753 struct fb_info *info = sinfo->info;
754 int ret = 0;
756 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
758 dev_info(info->device,
759 "%luKiB frame buffer at %08lx (mapped at %p)\n",
760 (unsigned long)info->fix.smem_len / 1024,
761 (unsigned long)info->fix.smem_start,
762 info->screen_base);
764 /* Allocate colormap */
765 ret = fb_alloc_cmap(&info->cmap, 256, 0);
766 if (ret < 0)
767 dev_err(info->device, "Alloc color map failed\n");
769 return ret;
772 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
774 if (sinfo->bus_clk)
775 clk_enable(sinfo->bus_clk);
776 clk_enable(sinfo->lcdc_clk);
779 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
781 if (sinfo->bus_clk)
782 clk_disable(sinfo->bus_clk);
783 clk_disable(sinfo->lcdc_clk);
787 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
789 struct device *dev = &pdev->dev;
790 struct fb_info *info;
791 struct atmel_lcdfb_info *sinfo;
792 struct atmel_lcdfb_info *pdata_sinfo;
793 struct fb_videomode fbmode;
794 struct resource *regs = NULL;
795 struct resource *map = NULL;
796 int ret;
798 dev_dbg(dev, "%s BEGIN\n", __func__);
800 ret = -ENOMEM;
801 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
802 if (!info) {
803 dev_err(dev, "cannot allocate memory\n");
804 goto out;
807 sinfo = info->par;
809 if (dev->platform_data) {
810 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
811 sinfo->default_bpp = pdata_sinfo->default_bpp;
812 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
813 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
814 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
815 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
816 sinfo->guard_time = pdata_sinfo->guard_time;
817 sinfo->smem_len = pdata_sinfo->smem_len;
818 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
819 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
820 } else {
821 dev_err(dev, "cannot get default configuration\n");
822 goto free_info;
824 sinfo->info = info;
825 sinfo->pdev = pdev;
827 strcpy(info->fix.id, sinfo->pdev->name);
828 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
829 info->pseudo_palette = sinfo->pseudo_palette;
830 info->fbops = &atmel_lcdfb_ops;
832 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
833 info->fix = atmel_lcdfb_fix;
835 /* Enable LCDC Clocks */
836 if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
837 || cpu_is_at32ap7000()) {
838 sinfo->bus_clk = clk_get(dev, "hck1");
839 if (IS_ERR(sinfo->bus_clk)) {
840 ret = PTR_ERR(sinfo->bus_clk);
841 goto free_info;
844 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
845 if (IS_ERR(sinfo->lcdc_clk)) {
846 ret = PTR_ERR(sinfo->lcdc_clk);
847 goto put_bus_clk;
849 atmel_lcdfb_start_clock(sinfo);
851 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
852 info->monspecs.modedb_len, info->monspecs.modedb,
853 sinfo->default_bpp);
854 if (!ret) {
855 dev_err(dev, "no suitable video mode found\n");
856 goto stop_clk;
860 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
861 if (!regs) {
862 dev_err(dev, "resources unusable\n");
863 ret = -ENXIO;
864 goto stop_clk;
867 sinfo->irq_base = platform_get_irq(pdev, 0);
868 if (sinfo->irq_base < 0) {
869 dev_err(dev, "unable to get irq\n");
870 ret = sinfo->irq_base;
871 goto stop_clk;
874 /* Initialize video memory */
875 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
876 if (map) {
877 /* use a pre-allocated memory buffer */
878 info->fix.smem_start = map->start;
879 info->fix.smem_len = map->end - map->start + 1;
880 if (!request_mem_region(info->fix.smem_start,
881 info->fix.smem_len, pdev->name)) {
882 ret = -EBUSY;
883 goto stop_clk;
886 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
887 if (!info->screen_base)
888 goto release_intmem;
891 * Don't clear the framebuffer -- someone may have set
892 * up a splash image.
894 } else {
895 /* alocate memory buffer */
896 ret = atmel_lcdfb_alloc_video_memory(sinfo);
897 if (ret < 0) {
898 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
899 goto stop_clk;
903 /* LCDC registers */
904 info->fix.mmio_start = regs->start;
905 info->fix.mmio_len = regs->end - regs->start + 1;
907 if (!request_mem_region(info->fix.mmio_start,
908 info->fix.mmio_len, pdev->name)) {
909 ret = -EBUSY;
910 goto free_fb;
913 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
914 if (!sinfo->mmio) {
915 dev_err(dev, "cannot map LCDC registers\n");
916 goto release_mem;
919 /* Initialize PWM for contrast or backlight ("off") */
920 init_contrast(sinfo);
922 /* interrupt */
923 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
924 if (ret) {
925 dev_err(dev, "request_irq failed: %d\n", ret);
926 goto unmap_mmio;
929 /* Some operations on the LCDC might sleep and
930 * require a preemptible task context */
931 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
933 ret = atmel_lcdfb_init_fbinfo(sinfo);
934 if (ret < 0) {
935 dev_err(dev, "init fbinfo failed: %d\n", ret);
936 goto unregister_irqs;
940 * This makes sure that our colour bitfield
941 * descriptors are correctly initialised.
943 atmel_lcdfb_check_var(&info->var, info);
945 ret = fb_set_var(info, &info->var);
946 if (ret) {
947 dev_warn(dev, "unable to set display parameters\n");
948 goto free_cmap;
951 dev_set_drvdata(dev, info);
954 * Tell the world that we're ready to go
956 ret = register_framebuffer(info);
957 if (ret < 0) {
958 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
959 goto reset_drvdata;
962 /* add selected videomode to modelist */
963 fb_var_to_videomode(&fbmode, &info->var);
964 fb_add_videomode(&fbmode, &info->modelist);
966 /* Power up the LCDC screen */
967 if (sinfo->atmel_lcdfb_power_control)
968 sinfo->atmel_lcdfb_power_control(1);
970 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
971 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
973 return 0;
975 reset_drvdata:
976 dev_set_drvdata(dev, NULL);
977 free_cmap:
978 fb_dealloc_cmap(&info->cmap);
979 unregister_irqs:
980 cancel_work_sync(&sinfo->task);
981 free_irq(sinfo->irq_base, info);
982 unmap_mmio:
983 exit_backlight(sinfo);
984 iounmap(sinfo->mmio);
985 release_mem:
986 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
987 free_fb:
988 if (map)
989 iounmap(info->screen_base);
990 else
991 atmel_lcdfb_free_video_memory(sinfo);
993 release_intmem:
994 if (map)
995 release_mem_region(info->fix.smem_start, info->fix.smem_len);
996 stop_clk:
997 atmel_lcdfb_stop_clock(sinfo);
998 clk_put(sinfo->lcdc_clk);
999 put_bus_clk:
1000 if (sinfo->bus_clk)
1001 clk_put(sinfo->bus_clk);
1002 free_info:
1003 framebuffer_release(info);
1004 out:
1005 dev_dbg(dev, "%s FAILED\n", __func__);
1006 return ret;
1009 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1011 struct device *dev = &pdev->dev;
1012 struct fb_info *info = dev_get_drvdata(dev);
1013 struct atmel_lcdfb_info *sinfo;
1015 if (!info || !info->par)
1016 return 0;
1017 sinfo = info->par;
1019 cancel_work_sync(&sinfo->task);
1020 exit_backlight(sinfo);
1021 if (sinfo->atmel_lcdfb_power_control)
1022 sinfo->atmel_lcdfb_power_control(0);
1023 unregister_framebuffer(info);
1024 atmel_lcdfb_stop_clock(sinfo);
1025 clk_put(sinfo->lcdc_clk);
1026 if (sinfo->bus_clk)
1027 clk_put(sinfo->bus_clk);
1028 fb_dealloc_cmap(&info->cmap);
1029 free_irq(sinfo->irq_base, info);
1030 iounmap(sinfo->mmio);
1031 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1032 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1033 iounmap(info->screen_base);
1034 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1035 } else {
1036 atmel_lcdfb_free_video_memory(sinfo);
1039 dev_set_drvdata(dev, NULL);
1040 framebuffer_release(info);
1042 return 0;
1045 #ifdef CONFIG_PM
1047 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1049 struct fb_info *info = platform_get_drvdata(pdev);
1050 struct atmel_lcdfb_info *sinfo = info->par;
1053 * We don't want to handle interrupts while the clock is
1054 * stopped. It may take forever.
1056 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1058 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1059 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1060 if (sinfo->atmel_lcdfb_power_control)
1061 sinfo->atmel_lcdfb_power_control(0);
1063 atmel_lcdfb_stop(sinfo);
1064 atmel_lcdfb_stop_clock(sinfo);
1066 return 0;
1069 static int atmel_lcdfb_resume(struct platform_device *pdev)
1071 struct fb_info *info = platform_get_drvdata(pdev);
1072 struct atmel_lcdfb_info *sinfo = info->par;
1074 atmel_lcdfb_start_clock(sinfo);
1075 atmel_lcdfb_start(sinfo);
1076 if (sinfo->atmel_lcdfb_power_control)
1077 sinfo->atmel_lcdfb_power_control(1);
1078 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1080 /* Enable FIFO & DMA errors */
1081 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1082 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1084 return 0;
1087 #else
1088 #define atmel_lcdfb_suspend NULL
1089 #define atmel_lcdfb_resume NULL
1090 #endif
1092 static struct platform_driver atmel_lcdfb_driver = {
1093 .remove = __exit_p(atmel_lcdfb_remove),
1094 .suspend = atmel_lcdfb_suspend,
1095 .resume = atmel_lcdfb_resume,
1097 .driver = {
1098 .name = "atmel_lcdfb",
1099 .owner = THIS_MODULE,
1103 static int __init atmel_lcdfb_init(void)
1105 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1108 static void __exit atmel_lcdfb_exit(void)
1110 platform_driver_unregister(&atmel_lcdfb_driver);
1113 module_init(atmel_lcdfb_init);
1114 module_exit(atmel_lcdfb_exit);
1116 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1117 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1118 MODULE_LICENSE("GPL");