Blackfin arch: use "char bfin_board_name[]" rather than "char *bfin_board_name" per...
[linux-2.6/libata-dev.git] / arch / blackfin / mach-bf537 / boards / cm_bf537.c
blob52e2320307de028e19e75fdafe4e643b3324e03b
1 /*
2 * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
6 * Created: 2005
7 * Description: Board description file
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 #include <linux/device.h>
32 #include <linux/platform_device.h>
33 #include <linux/mtd/mtd.h>
34 #include <linux/mtd/partitions.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/flash.h>
37 #include <linux/usb_isp1362.h>
38 #include <linux/pata_platform.h>
39 #include <linux/irq.h>
40 #include <asm/dma.h>
41 #include <asm/bfin5xx_spi.h>
44 * Name the Board for the /proc/cpuinfo
46 const char bfin_board_name[] = "Bluetechnix CM BF537";
48 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
49 /* all SPI peripherals info goes here */
51 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
52 static struct mtd_partition bfin_spi_flash_partitions[] = {
54 .name = "bootloader",
55 .size = 0x00020000,
56 .offset = 0,
57 .mask_flags = MTD_CAP_ROM
58 }, {
59 .name = "kernel",
60 .size = 0xe0000,
61 .offset = 0x20000
62 }, {
63 .name = "file system",
64 .size = 0x700000,
65 .offset = 0x00100000,
69 static struct flash_platform_data bfin_spi_flash_data = {
70 .name = "m25p80",
71 .parts = bfin_spi_flash_partitions,
72 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
73 .type = "m25p64",
76 /* SPI flash chip (m25p64) */
77 static struct bfin5xx_spi_chip spi_flash_chip_info = {
78 .enable_dma = 0, /* use dma transfer with this chip*/
79 .bits_per_word = 8,
81 #endif
83 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
84 /* SPI ADC chip */
85 static struct bfin5xx_spi_chip spi_adc_chip_info = {
86 .enable_dma = 1, /* use dma transfer with this chip*/
87 .bits_per_word = 16,
89 #endif
91 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
92 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
93 .enable_dma = 0,
94 .bits_per_word = 16,
96 #endif
98 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
99 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
100 .enable_dma = 0,
101 .bits_per_word = 16,
103 #endif
105 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
106 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
107 .enable_dma = 1,
108 .bits_per_word = 8,
110 #endif
112 static struct spi_board_info bfin_spi_board_info[] __initdata = {
113 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
115 /* the modalias must be the same as spi device driver name */
116 .modalias = "m25p80", /* Name of spi_driver for this device */
117 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
118 .bus_num = 0, /* Framework bus number */
119 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
120 .platform_data = &bfin_spi_flash_data,
121 .controller_data = &spi_flash_chip_info,
122 .mode = SPI_MODE_3,
124 #endif
126 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
128 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
129 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
130 .bus_num = 0, /* Framework bus number */
131 .chip_select = 1, /* Framework chip select. */
132 .platform_data = NULL, /* No spi_driver specific config */
133 .controller_data = &spi_adc_chip_info,
135 #endif
137 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
139 .modalias = "ad1836-spi",
140 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
141 .bus_num = 0,
142 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
143 .controller_data = &ad1836_spi_chip_info,
145 #endif
147 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
149 .modalias = "ad9960-spi",
150 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
151 .bus_num = 0,
152 .chip_select = 1,
153 .controller_data = &ad9960_spi_chip_info,
155 #endif
157 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
159 .modalias = "spi_mmc_dummy",
160 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
161 .bus_num = 0,
162 .chip_select = 7,
163 .platform_data = NULL,
164 .controller_data = &spi_mmc_chip_info,
165 .mode = SPI_MODE_3,
168 .modalias = "spi_mmc",
169 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
170 .bus_num = 0,
171 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
172 .platform_data = NULL,
173 .controller_data = &spi_mmc_chip_info,
174 .mode = SPI_MODE_3,
176 #endif
179 /* SPI (0) */
180 static struct resource bfin_spi0_resource[] = {
181 [0] = {
182 .start = SPI0_REGBASE,
183 .end = SPI0_REGBASE + 0xFF,
184 .flags = IORESOURCE_MEM,
186 [1] = {
187 .start = CH_SPI,
188 .end = CH_SPI,
189 .flags = IORESOURCE_IRQ,
193 /* SPI controller data */
194 static struct bfin5xx_spi_master bfin_spi0_info = {
195 .num_chipselect = 8,
196 .enable_dma = 1, /* master has the ability to do dma transfer */
199 static struct platform_device bfin_spi0_device = {
200 .name = "bfin-spi",
201 .id = 0, /* Bus number */
202 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
203 .resource = bfin_spi0_resource,
204 .dev = {
205 .platform_data = &bfin_spi0_info, /* Passed to driver */
208 #endif /* spi master and devices */
210 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
211 static struct platform_device rtc_device = {
212 .name = "rtc-bfin",
213 .id = -1,
215 #endif
217 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
218 static struct resource smc91x_resources[] = {
220 .start = 0x20200300,
221 .end = 0x20200300 + 16,
222 .flags = IORESOURCE_MEM,
223 }, {
224 .start = IRQ_PF14,
225 .end = IRQ_PF14,
226 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
230 static struct platform_device smc91x_device = {
231 .name = "smc91x",
232 .id = 0,
233 .num_resources = ARRAY_SIZE(smc91x_resources),
234 .resource = smc91x_resources,
236 #endif
238 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
239 static struct resource isp1362_hcd_resources[] = {
241 .start = 0x20308000,
242 .end = 0x20308000,
243 .flags = IORESOURCE_MEM,
244 }, {
245 .start = 0x20308004,
246 .end = 0x20308004,
247 .flags = IORESOURCE_MEM,
248 }, {
249 .start = IRQ_PG15,
250 .end = IRQ_PG15,
251 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
255 static struct isp1362_platform_data isp1362_priv = {
256 .sel15Kres = 1,
257 .clknotstop = 0,
258 .oc_enable = 0,
259 .int_act_high = 0,
260 .int_edge_triggered = 0,
261 .remote_wakeup_connected = 0,
262 .no_power_switching = 1,
263 .power_switching_mode = 0,
266 static struct platform_device isp1362_hcd_device = {
267 .name = "isp1362-hcd",
268 .id = 0,
269 .dev = {
270 .platform_data = &isp1362_priv,
272 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
273 .resource = isp1362_hcd_resources,
275 #endif
277 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
278 static struct resource net2272_bfin_resources[] = {
280 .start = 0x20200000,
281 .end = 0x20200000 + 0x100,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = IRQ_PF7,
285 .end = IRQ_PF7,
286 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
290 static struct platform_device net2272_bfin_device = {
291 .name = "net2272",
292 .id = -1,
293 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
294 .resource = net2272_bfin_resources,
296 #endif
298 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
299 static struct resource bfin_uart_resources[] = {
301 .start = 0xFFC00400,
302 .end = 0xFFC004FF,
303 .flags = IORESOURCE_MEM,
304 }, {
305 .start = 0xFFC02000,
306 .end = 0xFFC020FF,
307 .flags = IORESOURCE_MEM,
311 static struct platform_device bfin_uart_device = {
312 .name = "bfin-uart",
313 .id = 1,
314 .num_resources = ARRAY_SIZE(bfin_uart_resources),
315 .resource = bfin_uart_resources,
317 #endif
319 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
320 static struct platform_device bfin_sport0_uart_device = {
321 .name = "bfin-sport-uart",
322 .id = 0,
325 static struct platform_device bfin_sport1_uart_device = {
326 .name = "bfin-sport-uart",
327 .id = 1,
329 #endif
331 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
332 static struct platform_device bfin_mac_device = {
333 .name = "bfin_mac",
335 #endif
337 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
338 #define PATA_INT 64
340 static struct pata_platform_info bfin_pata_platform_data = {
341 .ioport_shift = 2,
342 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
345 static struct resource bfin_pata_resources[] = {
347 .start = 0x2030C000,
348 .end = 0x2030C01F,
349 .flags = IORESOURCE_MEM,
352 .start = 0x2030D018,
353 .end = 0x2030D01B,
354 .flags = IORESOURCE_MEM,
357 .start = PATA_INT,
358 .end = PATA_INT,
359 .flags = IORESOURCE_IRQ,
363 static struct platform_device bfin_pata_device = {
364 .name = "pata_platform",
365 .id = -1,
366 .num_resources = ARRAY_SIZE(bfin_pata_resources),
367 .resource = bfin_pata_resources,
368 .dev = {
369 .platform_data = &bfin_pata_platform_data,
372 #endif
374 static struct platform_device *cm_bf537_devices[] __initdata = {
375 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
376 &rtc_device,
377 #endif
379 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
380 &bfin_uart_device,
381 #endif
383 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
384 &bfin_sport0_uart_device,
385 &bfin_sport1_uart_device,
386 #endif
388 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
389 &isp1362_hcd_device,
390 #endif
392 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
393 &smc91x_device,
394 #endif
396 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
397 &bfin_mac_device,
398 #endif
400 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
401 &net2272_bfin_device,
402 #endif
404 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
405 &bfin_spi0_device,
406 #endif
408 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
409 &bfin_pata_device,
410 #endif
413 static int __init cm_bf537_init(void)
415 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
416 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
417 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
418 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
419 #endif
421 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
422 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
423 #endif
424 return 0;
427 arch_initcall(cm_bf537_init);