2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/types.h>
56 #include <linux/errno.h>
57 #include <linux/ioport.h>
58 #include <linux/pci.h>
59 #include <linux/dma-mapping.h>
60 #include <linux/kernel.h>
61 #include <linux/netdevice.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/init.h>
65 #include <linux/delay.h>
67 #include <linux/highmem.h>
68 #include <linux/sockios.h>
70 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
71 #include <linux/if_vlan.h>
75 #include <linux/ethtool.h>
81 #include <asm/system.h>
84 #include <asm/byteorder.h>
85 #include <asm/uaccess.h>
88 #define DRV_NAME "acenic"
92 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
93 #define ACE_IS_TIGON_I(ap) 0
94 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
96 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
97 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
100 #ifndef PCI_VENDOR_ID_ALTEON
101 #define PCI_VENDOR_ID_ALTEON 0x12ae
103 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
104 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
105 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
107 #ifndef PCI_DEVICE_ID_3COM_3C985
108 #define PCI_DEVICE_ID_3COM_3C985 0x0001
110 #ifndef PCI_VENDOR_ID_NETGEAR
111 #define PCI_VENDOR_ID_NETGEAR 0x1385
112 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
114 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
115 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
120 * Farallon used the DEC vendor ID by mistake and they seem not
123 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
124 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
126 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
127 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
129 #ifndef PCI_VENDOR_ID_SGI
130 #define PCI_VENDOR_ID_SGI 0x10a9
132 #ifndef PCI_DEVICE_ID_SGI_ACENIC
133 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
136 static struct pci_device_id acenic_pci_tbl
[] = {
137 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
,
138 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
139 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER
,
140 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
141 { PCI_VENDOR_ID_3COM
, PCI_DEVICE_ID_3COM_3C985
,
142 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
143 { PCI_VENDOR_ID_NETGEAR
, PCI_DEVICE_ID_NETGEAR_GA620
,
144 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
145 { PCI_VENDOR_ID_NETGEAR
, PCI_DEVICE_ID_NETGEAR_GA620T
,
146 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
148 * Farallon used the DEC vendor ID on their cards incorrectly,
149 * then later Alteon's ID.
151 { PCI_VENDOR_ID_DEC
, PCI_DEVICE_ID_FARALLON_PN9000SX
,
152 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
153 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_FARALLON_PN9100T
,
154 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
155 { PCI_VENDOR_ID_SGI
, PCI_DEVICE_ID_SGI_ACENIC
,
156 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
159 MODULE_DEVICE_TABLE(pci
, acenic_pci_tbl
);
161 #define ace_sync_irq(irq) synchronize_irq(irq)
163 #ifndef offset_in_page
164 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
167 #define ACE_MAX_MOD_PARMS 8
168 #define BOARD_IDX_STATIC 0
169 #define BOARD_IDX_OVERFLOW -1
171 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
172 defined(NETIF_F_HW_VLAN_RX)
173 #define ACENIC_DO_VLAN 1
174 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
176 #define ACENIC_DO_VLAN 0
177 #define ACE_RCB_VLAN_FLAG 0
183 * These must be defined before the firmware is included.
185 #define MAX_TEXT_LEN 96*1024
186 #define MAX_RODATA_LEN 8*1024
187 #define MAX_DATA_LEN 2*1024
189 #include "acenic_firmware.h"
191 #ifndef tigon2FwReleaseLocal
192 #define tigon2FwReleaseLocal 0
196 * This driver currently supports Tigon I and Tigon II based cards
197 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
198 * GA620. The driver should also work on the SGI, DEC and Farallon
199 * versions of the card, however I have not been able to test that
202 * This card is really neat, it supports receive hardware checksumming
203 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
204 * firmware. Also the programming interface is quite neat, except for
205 * the parts dealing with the i2c eeprom on the card ;-)
207 * Using jumbo frames:
209 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
210 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
211 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
212 * interface number and <MTU> being the MTU value.
216 * When compiled as a loadable module, the driver allows for a number
217 * of module parameters to be specified. The driver supports the
218 * following module parameters:
220 * trace=<val> - Firmware trace level. This requires special traced
221 * firmware to replace the firmware supplied with
222 * the driver - for debugging purposes only.
224 * link=<val> - Link state. Normally you want to use the default link
225 * parameters set by the driver. This can be used to
226 * override these in case your switch doesn't negotiate
227 * the link properly. Valid values are:
228 * 0x0001 - Force half duplex link.
229 * 0x0002 - Do not negotiate line speed with the other end.
230 * 0x0010 - 10Mbit/sec link.
231 * 0x0020 - 100Mbit/sec link.
232 * 0x0040 - 1000Mbit/sec link.
233 * 0x0100 - Do not negotiate flow control.
234 * 0x0200 - Enable RX flow control Y
235 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
236 * Default value is 0x0270, ie. enable link+flow
237 * control negotiation. Negotiating the highest
238 * possible link speed with RX flow control enabled.
240 * When disabling link speed negotiation, only one link
241 * speed is allowed to be specified!
243 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
244 * to wait for more packets to arive before
245 * interrupting the host, from the time the first
248 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
249 * to wait for more packets to arive in the transmit ring,
250 * before interrupting the host, after transmitting the
251 * first packet in the ring.
253 * max_tx_desc=<val> - maximum number of transmit descriptors
254 * (packets) transmitted before interrupting the host.
256 * max_rx_desc=<val> - maximum number of receive descriptors
257 * (packets) received before interrupting the host.
259 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
260 * increments of the NIC's on board memory to be used for
261 * transmit and receive buffers. For the 1MB NIC app. 800KB
262 * is available, on the 1/2MB NIC app. 300KB is available.
263 * 68KB will always be available as a minimum for both
264 * directions. The default value is a 50/50 split.
265 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
266 * operations, default (1) is to always disable this as
267 * that is what Alteon does on NT. I have not been able
268 * to measure any real performance differences with
269 * this on my systems. Set <val>=0 if you want to
270 * enable these operations.
272 * If you use more than one NIC, specify the parameters for the
273 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
274 * run tracing on NIC #2 but not on NIC #1 and #3.
278 * - Proper multicast support.
279 * - NIC dump support.
280 * - More tuning parameters.
282 * The mini ring is not used under Linux and I am not sure it makes sense
283 * to actually use it.
285 * New interrupt handler strategy:
287 * The old interrupt handler worked using the traditional method of
288 * replacing an skbuff with a new one when a packet arrives. However
289 * the rx rings do not need to contain a static number of buffer
290 * descriptors, thus it makes sense to move the memory allocation out
291 * of the main interrupt handler and do it in a bottom half handler
292 * and only allocate new buffers when the number of buffers in the
293 * ring is below a certain threshold. In order to avoid starving the
294 * NIC under heavy load it is however necessary to force allocation
295 * when hitting a minimum threshold. The strategy for alloction is as
298 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
299 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
300 * the buffers in the interrupt handler
301 * RX_RING_THRES - maximum number of buffers in the rx ring
302 * RX_MINI_THRES - maximum number of buffers in the mini ring
303 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
305 * One advantagous side effect of this allocation approach is that the
306 * entire rx processing can be done without holding any spin lock
307 * since the rx rings and registers are totally independent of the tx
308 * ring and its registers. This of course includes the kmalloc's of
309 * new skb's. Thus start_xmit can run in parallel with rx processing
310 * and the memory allocation on SMP systems.
312 * Note that running the skb reallocation in a bottom half opens up
313 * another can of races which needs to be handled properly. In
314 * particular it can happen that the interrupt handler tries to run
315 * the reallocation while the bottom half is either running on another
316 * CPU or was interrupted on the same CPU. To get around this the
317 * driver uses bitops to prevent the reallocation routines from being
320 * TX handling can also be done without holding any spin lock, wheee
321 * this is fun! since tx_ret_csm is only written to by the interrupt
322 * handler. The case to be aware of is when shutting down the device
323 * and cleaning up where it is necessary to make sure that
324 * start_xmit() is not running while this is happening. Well DaveM
325 * informs me that this case is already protected against ... bye bye
326 * Mr. Spin Lock, it was nice to know you.
328 * TX interrupts are now partly disabled so the NIC will only generate
329 * TX interrupts for the number of coal ticks, not for the number of
330 * TX packets in the queue. This should reduce the number of TX only,
331 * ie. when no RX processing is done, interrupts seen.
335 * Threshold values for RX buffer allocation - the low water marks for
336 * when to start refilling the rings are set to 75% of the ring
337 * sizes. It seems to make sense to refill the rings entirely from the
338 * intrrupt handler once it gets below the panic threshold, that way
339 * we don't risk that the refilling is moved to another CPU when the
340 * one running the interrupt handler just got the slab code hot in its
343 #define RX_RING_SIZE 72
344 #define RX_MINI_SIZE 64
345 #define RX_JUMBO_SIZE 48
347 #define RX_PANIC_STD_THRES 16
348 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
349 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
350 #define RX_PANIC_MINI_THRES 12
351 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
352 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
353 #define RX_PANIC_JUMBO_THRES 6
354 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
355 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
359 * Size of the mini ring entries, basically these just should be big
360 * enough to take TCP ACKs
362 #define ACE_MINI_SIZE 100
364 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE
365 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
366 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
369 * There seems to be a magic difference in the effect between 995 and 996
370 * but little difference between 900 and 995 ... no idea why.
372 * There is now a default set of tuning parameters which is set, depending
373 * on whether or not the user enables Jumbo frames. It's assumed that if
374 * Jumbo frames are enabled, the user wants optimal tuning for that case.
376 #define DEF_TX_COAL 400 /* 996 */
377 #define DEF_TX_MAX_DESC 60 /* was 40 */
378 #define DEF_RX_COAL 120 /* 1000 */
379 #define DEF_RX_MAX_DESC 25
380 #define DEF_TX_RATIO 21 /* 24 */
382 #define DEF_JUMBO_TX_COAL 20
383 #define DEF_JUMBO_TX_MAX_DESC 60
384 #define DEF_JUMBO_RX_COAL 30
385 #define DEF_JUMBO_RX_MAX_DESC 6
386 #define DEF_JUMBO_TX_RATIO 21
388 #if tigon2FwReleaseLocal < 20001118
390 * Standard firmware and early modifications duplicate
391 * IRQ load without this flag (coal timer is never reset).
392 * Note that with this flag tx_coal should be less than
393 * time to xmit full tx ring.
394 * 400usec is not so bad for tx ring size of 128.
396 #define TX_COAL_INTS_ONLY 1 /* worth it */
399 * With modified firmware, this is not necessary, but still useful.
401 #define TX_COAL_INTS_ONLY 1
405 #define DEF_STAT (2 * TICKS_PER_SEC)
408 static int link_state
[ACE_MAX_MOD_PARMS
];
409 static int trace
[ACE_MAX_MOD_PARMS
];
410 static int tx_coal_tick
[ACE_MAX_MOD_PARMS
];
411 static int rx_coal_tick
[ACE_MAX_MOD_PARMS
];
412 static int max_tx_desc
[ACE_MAX_MOD_PARMS
];
413 static int max_rx_desc
[ACE_MAX_MOD_PARMS
];
414 static int tx_ratio
[ACE_MAX_MOD_PARMS
];
415 static int dis_pci_mem_inval
[ACE_MAX_MOD_PARMS
] = {1, 1, 1, 1, 1, 1, 1, 1};
417 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
418 MODULE_LICENSE("GPL");
419 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
421 module_param_array_named(link
, link_state
, int, NULL
, 0);
422 module_param_array(trace
, int, NULL
, 0);
423 module_param_array(tx_coal_tick
, int, NULL
, 0);
424 module_param_array(max_tx_desc
, int, NULL
, 0);
425 module_param_array(rx_coal_tick
, int, NULL
, 0);
426 module_param_array(max_rx_desc
, int, NULL
, 0);
427 module_param_array(tx_ratio
, int, NULL
, 0);
428 MODULE_PARM_DESC(link
, "AceNIC/3C985/NetGear link state");
429 MODULE_PARM_DESC(trace
, "AceNIC/3C985/NetGear firmware trace level");
430 MODULE_PARM_DESC(tx_coal_tick
, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
431 MODULE_PARM_DESC(max_tx_desc
, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
432 MODULE_PARM_DESC(rx_coal_tick
, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
433 MODULE_PARM_DESC(max_rx_desc
, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
434 MODULE_PARM_DESC(tx_ratio
, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
437 static char version
[] __devinitdata
=
438 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
439 " http://home.cern.ch/~jes/gige/acenic.html\n";
441 static int ace_get_settings(struct net_device
*, struct ethtool_cmd
*);
442 static int ace_set_settings(struct net_device
*, struct ethtool_cmd
*);
443 static void ace_get_drvinfo(struct net_device
*, struct ethtool_drvinfo
*);
445 static const struct ethtool_ops ace_ethtool_ops
= {
446 .get_settings
= ace_get_settings
,
447 .set_settings
= ace_set_settings
,
448 .get_drvinfo
= ace_get_drvinfo
,
451 static void ace_watchdog(struct net_device
*dev
);
453 static const struct net_device_ops ace_netdev_ops
= {
454 .ndo_open
= ace_open
,
455 .ndo_stop
= ace_close
,
456 .ndo_tx_timeout
= ace_watchdog
,
457 .ndo_get_stats
= ace_get_stats
,
458 .ndo_start_xmit
= ace_start_xmit
,
459 .ndo_set_multicast_list
= ace_set_multicast_list
,
460 .ndo_set_mac_address
= ace_set_mac_addr
,
461 .ndo_change_mtu
= ace_change_mtu
,
463 .ndo_vlan_rx_register
= ace_vlan_rx_register
,
467 static int __devinit
acenic_probe_one(struct pci_dev
*pdev
,
468 const struct pci_device_id
*id
)
470 struct net_device
*dev
;
471 struct ace_private
*ap
;
472 static int boards_found
;
474 dev
= alloc_etherdev(sizeof(struct ace_private
));
476 printk(KERN_ERR
"acenic: Unable to allocate "
477 "net_device structure!\n");
481 SET_NETDEV_DEV(dev
, &pdev
->dev
);
483 ap
= netdev_priv(dev
);
485 ap
->name
= pci_name(pdev
);
487 dev
->features
|= NETIF_F_SG
| NETIF_F_IP_CSUM
;
489 dev
->features
|= NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
;
492 dev
->watchdog_timeo
= 5*HZ
;
494 dev
->netdev_ops
= &ace_netdev_ops
;
495 SET_ETHTOOL_OPS(dev
, &ace_ethtool_ops
);
497 /* we only display this string ONCE */
501 if (pci_enable_device(pdev
))
502 goto fail_free_netdev
;
505 * Enable master mode before we start playing with the
506 * pci_command word since pci_set_master() will modify
509 pci_set_master(pdev
);
511 pci_read_config_word(pdev
, PCI_COMMAND
, &ap
->pci_command
);
513 /* OpenFirmware on Mac's does not set this - DOH.. */
514 if (!(ap
->pci_command
& PCI_COMMAND_MEMORY
)) {
515 printk(KERN_INFO
"%s: Enabling PCI Memory Mapped "
516 "access - was not enabled by BIOS/Firmware\n",
518 ap
->pci_command
= ap
->pci_command
| PCI_COMMAND_MEMORY
;
519 pci_write_config_word(ap
->pdev
, PCI_COMMAND
,
524 pci_read_config_byte(pdev
, PCI_LATENCY_TIMER
, &ap
->pci_latency
);
525 if (ap
->pci_latency
<= 0x40) {
526 ap
->pci_latency
= 0x40;
527 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, ap
->pci_latency
);
531 * Remap the regs into kernel space - this is abuse of
532 * dev->base_addr since it was means for I/O port
533 * addresses but who gives a damn.
535 dev
->base_addr
= pci_resource_start(pdev
, 0);
536 ap
->regs
= ioremap(dev
->base_addr
, 0x4000);
538 printk(KERN_ERR
"%s: Unable to map I/O register, "
539 "AceNIC %i will be disabled.\n",
540 ap
->name
, boards_found
);
541 goto fail_free_netdev
;
544 switch(pdev
->vendor
) {
545 case PCI_VENDOR_ID_ALTEON
:
546 if (pdev
->device
== PCI_DEVICE_ID_FARALLON_PN9100T
) {
547 printk(KERN_INFO
"%s: Farallon PN9100-T ",
550 printk(KERN_INFO
"%s: Alteon AceNIC ",
554 case PCI_VENDOR_ID_3COM
:
555 printk(KERN_INFO
"%s: 3Com 3C985 ", ap
->name
);
557 case PCI_VENDOR_ID_NETGEAR
:
558 printk(KERN_INFO
"%s: NetGear GA620 ", ap
->name
);
560 case PCI_VENDOR_ID_DEC
:
561 if (pdev
->device
== PCI_DEVICE_ID_FARALLON_PN9000SX
) {
562 printk(KERN_INFO
"%s: Farallon PN9000-SX ",
566 case PCI_VENDOR_ID_SGI
:
567 printk(KERN_INFO
"%s: SGI AceNIC ", ap
->name
);
570 printk(KERN_INFO
"%s: Unknown AceNIC ", ap
->name
);
574 printk("Gigabit Ethernet at 0x%08lx, ", dev
->base_addr
);
575 printk("irq %d\n", pdev
->irq
);
577 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
578 if ((readl(&ap
->regs
->HostCtrl
) >> 28) == 4) {
579 printk(KERN_ERR
"%s: Driver compiled without Tigon I"
580 " support - NIC disabled\n", dev
->name
);
585 if (ace_allocate_descriptors(dev
))
586 goto fail_free_netdev
;
589 if (boards_found
>= ACE_MAX_MOD_PARMS
)
590 ap
->board_idx
= BOARD_IDX_OVERFLOW
;
592 ap
->board_idx
= boards_found
;
594 ap
->board_idx
= BOARD_IDX_STATIC
;
598 goto fail_free_netdev
;
600 if (register_netdev(dev
)) {
601 printk(KERN_ERR
"acenic: device registration failed\n");
604 ap
->name
= dev
->name
;
606 if (ap
->pci_using_dac
)
607 dev
->features
|= NETIF_F_HIGHDMA
;
609 pci_set_drvdata(pdev
, dev
);
615 ace_init_cleanup(dev
);
621 static void __devexit
acenic_remove_one(struct pci_dev
*pdev
)
623 struct net_device
*dev
= pci_get_drvdata(pdev
);
624 struct ace_private
*ap
= netdev_priv(dev
);
625 struct ace_regs __iomem
*regs
= ap
->regs
;
628 unregister_netdev(dev
);
630 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
631 if (ap
->version
>= 2)
632 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
, ®s
->CpuBCtrl
);
635 * This clears any pending interrupts
637 writel(1, ®s
->Mb0Lo
);
638 readl(®s
->CpuCtrl
); /* flush */
641 * Make sure no other CPUs are processing interrupts
642 * on the card before the buffers are being released.
643 * Otherwise one might experience some `interesting'
646 * Then release the RX buffers - jumbo buffers were
647 * already released in ace_close().
649 ace_sync_irq(dev
->irq
);
651 for (i
= 0; i
< RX_STD_RING_ENTRIES
; i
++) {
652 struct sk_buff
*skb
= ap
->skb
->rx_std_skbuff
[i
].skb
;
655 struct ring_info
*ringp
;
658 ringp
= &ap
->skb
->rx_std_skbuff
[i
];
659 mapping
= pci_unmap_addr(ringp
, mapping
);
660 pci_unmap_page(ap
->pdev
, mapping
,
664 ap
->rx_std_ring
[i
].size
= 0;
665 ap
->skb
->rx_std_skbuff
[i
].skb
= NULL
;
670 if (ap
->version
>= 2) {
671 for (i
= 0; i
< RX_MINI_RING_ENTRIES
; i
++) {
672 struct sk_buff
*skb
= ap
->skb
->rx_mini_skbuff
[i
].skb
;
675 struct ring_info
*ringp
;
678 ringp
= &ap
->skb
->rx_mini_skbuff
[i
];
679 mapping
= pci_unmap_addr(ringp
,mapping
);
680 pci_unmap_page(ap
->pdev
, mapping
,
684 ap
->rx_mini_ring
[i
].size
= 0;
685 ap
->skb
->rx_mini_skbuff
[i
].skb
= NULL
;
691 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++) {
692 struct sk_buff
*skb
= ap
->skb
->rx_jumbo_skbuff
[i
].skb
;
694 struct ring_info
*ringp
;
697 ringp
= &ap
->skb
->rx_jumbo_skbuff
[i
];
698 mapping
= pci_unmap_addr(ringp
, mapping
);
699 pci_unmap_page(ap
->pdev
, mapping
,
703 ap
->rx_jumbo_ring
[i
].size
= 0;
704 ap
->skb
->rx_jumbo_skbuff
[i
].skb
= NULL
;
709 ace_init_cleanup(dev
);
713 static struct pci_driver acenic_pci_driver
= {
715 .id_table
= acenic_pci_tbl
,
716 .probe
= acenic_probe_one
,
717 .remove
= __devexit_p(acenic_remove_one
),
720 static int __init
acenic_init(void)
722 return pci_register_driver(&acenic_pci_driver
);
725 static void __exit
acenic_exit(void)
727 pci_unregister_driver(&acenic_pci_driver
);
730 module_init(acenic_init
);
731 module_exit(acenic_exit
);
733 static void ace_free_descriptors(struct net_device
*dev
)
735 struct ace_private
*ap
= netdev_priv(dev
);
738 if (ap
->rx_std_ring
!= NULL
) {
739 size
= (sizeof(struct rx_desc
) *
740 (RX_STD_RING_ENTRIES
+
741 RX_JUMBO_RING_ENTRIES
+
742 RX_MINI_RING_ENTRIES
+
743 RX_RETURN_RING_ENTRIES
));
744 pci_free_consistent(ap
->pdev
, size
, ap
->rx_std_ring
,
745 ap
->rx_ring_base_dma
);
746 ap
->rx_std_ring
= NULL
;
747 ap
->rx_jumbo_ring
= NULL
;
748 ap
->rx_mini_ring
= NULL
;
749 ap
->rx_return_ring
= NULL
;
751 if (ap
->evt_ring
!= NULL
) {
752 size
= (sizeof(struct event
) * EVT_RING_ENTRIES
);
753 pci_free_consistent(ap
->pdev
, size
, ap
->evt_ring
,
757 if (ap
->tx_ring
!= NULL
&& !ACE_IS_TIGON_I(ap
)) {
758 size
= (sizeof(struct tx_desc
) * MAX_TX_RING_ENTRIES
);
759 pci_free_consistent(ap
->pdev
, size
, ap
->tx_ring
,
764 if (ap
->evt_prd
!= NULL
) {
765 pci_free_consistent(ap
->pdev
, sizeof(u32
),
766 (void *)ap
->evt_prd
, ap
->evt_prd_dma
);
769 if (ap
->rx_ret_prd
!= NULL
) {
770 pci_free_consistent(ap
->pdev
, sizeof(u32
),
771 (void *)ap
->rx_ret_prd
,
773 ap
->rx_ret_prd
= NULL
;
775 if (ap
->tx_csm
!= NULL
) {
776 pci_free_consistent(ap
->pdev
, sizeof(u32
),
777 (void *)ap
->tx_csm
, ap
->tx_csm_dma
);
783 static int ace_allocate_descriptors(struct net_device
*dev
)
785 struct ace_private
*ap
= netdev_priv(dev
);
788 size
= (sizeof(struct rx_desc
) *
789 (RX_STD_RING_ENTRIES
+
790 RX_JUMBO_RING_ENTRIES
+
791 RX_MINI_RING_ENTRIES
+
792 RX_RETURN_RING_ENTRIES
));
794 ap
->rx_std_ring
= pci_alloc_consistent(ap
->pdev
, size
,
795 &ap
->rx_ring_base_dma
);
796 if (ap
->rx_std_ring
== NULL
)
799 ap
->rx_jumbo_ring
= ap
->rx_std_ring
+ RX_STD_RING_ENTRIES
;
800 ap
->rx_mini_ring
= ap
->rx_jumbo_ring
+ RX_JUMBO_RING_ENTRIES
;
801 ap
->rx_return_ring
= ap
->rx_mini_ring
+ RX_MINI_RING_ENTRIES
;
803 size
= (sizeof(struct event
) * EVT_RING_ENTRIES
);
805 ap
->evt_ring
= pci_alloc_consistent(ap
->pdev
, size
, &ap
->evt_ring_dma
);
807 if (ap
->evt_ring
== NULL
)
811 * Only allocate a host TX ring for the Tigon II, the Tigon I
812 * has to use PCI registers for this ;-(
814 if (!ACE_IS_TIGON_I(ap
)) {
815 size
= (sizeof(struct tx_desc
) * MAX_TX_RING_ENTRIES
);
817 ap
->tx_ring
= pci_alloc_consistent(ap
->pdev
, size
,
820 if (ap
->tx_ring
== NULL
)
824 ap
->evt_prd
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
826 if (ap
->evt_prd
== NULL
)
829 ap
->rx_ret_prd
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
830 &ap
->rx_ret_prd_dma
);
831 if (ap
->rx_ret_prd
== NULL
)
834 ap
->tx_csm
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
836 if (ap
->tx_csm
== NULL
)
843 ace_init_cleanup(dev
);
849 * Generic cleanup handling data allocated during init. Used when the
850 * module is unloaded or if an error occurs during initialization
852 static void ace_init_cleanup(struct net_device
*dev
)
854 struct ace_private
*ap
;
856 ap
= netdev_priv(dev
);
858 ace_free_descriptors(dev
);
861 pci_free_consistent(ap
->pdev
, sizeof(struct ace_info
),
862 ap
->info
, ap
->info_dma
);
864 kfree(ap
->trace_buf
);
867 free_irq(dev
->irq
, dev
);
874 * Commands are considered to be slow.
876 static inline void ace_issue_cmd(struct ace_regs __iomem
*regs
, struct cmd
*cmd
)
880 idx
= readl(®s
->CmdPrd
);
882 writel(*(u32
*)(cmd
), ®s
->CmdRng
[idx
]);
883 idx
= (idx
+ 1) % CMD_RING_ENTRIES
;
885 writel(idx
, ®s
->CmdPrd
);
889 static int __devinit
ace_init(struct net_device
*dev
)
891 struct ace_private
*ap
;
892 struct ace_regs __iomem
*regs
;
893 struct ace_info
*info
= NULL
;
894 struct pci_dev
*pdev
;
897 u32 tig_ver
, mac1
, mac2
, tmp
, pci_state
;
898 int board_idx
, ecode
= 0;
900 unsigned char cache_size
;
902 ap
= netdev_priv(dev
);
905 board_idx
= ap
->board_idx
;
908 * aman@sgi.com - its useful to do a NIC reset here to
909 * address the `Firmware not running' problem subsequent
910 * to any crashes involving the NIC
912 writel(HW_RESET
| (HW_RESET
<< 24), ®s
->HostCtrl
);
913 readl(®s
->HostCtrl
); /* PCI write posting */
917 * Don't access any other registers before this point!
921 * This will most likely need BYTE_SWAP once we switch
922 * to using __raw_writel()
924 writel((WORD_SWAP
| CLR_INT
| ((WORD_SWAP
| CLR_INT
) << 24)),
927 writel((CLR_INT
| WORD_SWAP
| ((CLR_INT
| WORD_SWAP
) << 24)),
930 readl(®s
->HostCtrl
); /* PCI write posting */
933 * Stop the NIC CPU and clear pending interrupts
935 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
936 readl(®s
->CpuCtrl
); /* PCI write posting */
937 writel(0, ®s
->Mb0Lo
);
939 tig_ver
= readl(®s
->HostCtrl
) >> 28;
942 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
945 printk(KERN_INFO
" Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
946 tig_ver
, tigonFwReleaseMajor
, tigonFwReleaseMinor
,
948 writel(0, ®s
->LocalCtrl
);
950 ap
->tx_ring_entries
= TIGON_I_TX_RING_ENTRIES
;
954 printk(KERN_INFO
" Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
955 tig_ver
, tigon2FwReleaseMajor
, tigon2FwReleaseMinor
,
957 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
, ®s
->CpuBCtrl
);
958 readl(®s
->CpuBCtrl
); /* PCI write posting */
960 * The SRAM bank size does _not_ indicate the amount
961 * of memory on the card, it controls the _bank_ size!
962 * Ie. a 1MB AceNIC will have two banks of 512KB.
964 writel(SRAM_BANK_512K
, ®s
->LocalCtrl
);
965 writel(SYNC_SRAM_TIMING
, ®s
->MiscCfg
);
967 ap
->tx_ring_entries
= MAX_TX_RING_ENTRIES
;
970 printk(KERN_WARNING
" Unsupported Tigon version detected "
977 * ModeStat _must_ be set after the SRAM settings as this change
978 * seems to corrupt the ModeStat and possible other registers.
979 * The SRAM settings survive resets and setting it to the same
980 * value a second time works as well. This is what caused the
981 * `Firmware not running' problem on the Tigon II.
984 writel(ACE_BYTE_SWAP_DMA
| ACE_WARN
| ACE_FATAL
| ACE_BYTE_SWAP_BD
|
985 ACE_WORD_SWAP_BD
| ACE_NO_JUMBO_FRAG
, ®s
->ModeStat
);
987 writel(ACE_BYTE_SWAP_DMA
| ACE_WARN
| ACE_FATAL
|
988 ACE_WORD_SWAP_BD
| ACE_NO_JUMBO_FRAG
, ®s
->ModeStat
);
990 readl(®s
->ModeStat
); /* PCI write posting */
993 for(i
= 0; i
< 4; i
++) {
997 t
= read_eeprom_byte(dev
, 0x8c+i
);
1005 for(i
= 4; i
< 8; i
++) {
1009 t
= read_eeprom_byte(dev
, 0x8c+i
);
1017 writel(mac1
, ®s
->MacAddrHi
);
1018 writel(mac2
, ®s
->MacAddrLo
);
1020 dev
->dev_addr
[0] = (mac1
>> 8) & 0xff;
1021 dev
->dev_addr
[1] = mac1
& 0xff;
1022 dev
->dev_addr
[2] = (mac2
>> 24) & 0xff;
1023 dev
->dev_addr
[3] = (mac2
>> 16) & 0xff;
1024 dev
->dev_addr
[4] = (mac2
>> 8) & 0xff;
1025 dev
->dev_addr
[5] = mac2
& 0xff;
1027 printk("MAC: %pM\n", dev
->dev_addr
);
1030 * Looks like this is necessary to deal with on all architectures,
1031 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1032 * Ie. having two NICs in the machine, one will have the cache
1033 * line set at boot time, the other will not.
1036 pci_read_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, &cache_size
);
1038 if (cache_size
!= SMP_CACHE_BYTES
) {
1039 printk(KERN_INFO
" PCI cache line size set incorrectly "
1040 "(%i bytes) by BIOS/FW, ", cache_size
);
1041 if (cache_size
> SMP_CACHE_BYTES
)
1042 printk("expecting %i\n", SMP_CACHE_BYTES
);
1044 printk("correcting to %i\n", SMP_CACHE_BYTES
);
1045 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
,
1046 SMP_CACHE_BYTES
>> 2);
1050 pci_state
= readl(®s
->PciState
);
1051 printk(KERN_INFO
" PCI bus width: %i bits, speed: %iMHz, "
1052 "latency: %i clks\n",
1053 (pci_state
& PCI_32BIT
) ? 32 : 64,
1054 (pci_state
& PCI_66MHZ
) ? 66 : 33,
1058 * Set the max DMA transfer size. Seems that for most systems
1059 * the performance is better when no MAX parameter is
1060 * set. However for systems enabling PCI write and invalidate,
1061 * DMA writes must be set to the L1 cache line size to get
1062 * optimal performance.
1064 * The default is now to turn the PCI write and invalidate off
1065 * - that is what Alteon does for NT.
1067 tmp
= READ_CMD_MEM
| WRITE_CMD_MEM
;
1068 if (ap
->version
>= 2) {
1069 tmp
|= (MEM_READ_MULTIPLE
| (pci_state
& PCI_66MHZ
));
1071 * Tuning parameters only supported for 8 cards
1073 if (board_idx
== BOARD_IDX_OVERFLOW
||
1074 dis_pci_mem_inval
[board_idx
]) {
1075 if (ap
->pci_command
& PCI_COMMAND_INVALIDATE
) {
1076 ap
->pci_command
&= ~PCI_COMMAND_INVALIDATE
;
1077 pci_write_config_word(pdev
, PCI_COMMAND
,
1079 printk(KERN_INFO
" Disabling PCI memory "
1080 "write and invalidate\n");
1082 } else if (ap
->pci_command
& PCI_COMMAND_INVALIDATE
) {
1083 printk(KERN_INFO
" PCI memory write & invalidate "
1084 "enabled by BIOS, enabling counter measures\n");
1086 switch(SMP_CACHE_BYTES
) {
1088 tmp
|= DMA_WRITE_MAX_16
;
1091 tmp
|= DMA_WRITE_MAX_32
;
1094 tmp
|= DMA_WRITE_MAX_64
;
1097 tmp
|= DMA_WRITE_MAX_128
;
1100 printk(KERN_INFO
" Cache line size %i not "
1101 "supported, PCI write and invalidate "
1102 "disabled\n", SMP_CACHE_BYTES
);
1103 ap
->pci_command
&= ~PCI_COMMAND_INVALIDATE
;
1104 pci_write_config_word(pdev
, PCI_COMMAND
,
1112 * On this platform, we know what the best dma settings
1113 * are. We use 64-byte maximum bursts, because if we
1114 * burst larger than the cache line size (or even cross
1115 * a 64byte boundary in a single burst) the UltraSparc
1116 * PCI controller will disconnect at 64-byte multiples.
1118 * Read-multiple will be properly enabled above, and when
1119 * set will give the PCI controller proper hints about
1122 tmp
&= ~DMA_READ_WRITE_MASK
;
1123 tmp
|= DMA_READ_MAX_64
;
1124 tmp
|= DMA_WRITE_MAX_64
;
1127 tmp
&= ~DMA_READ_WRITE_MASK
;
1128 tmp
|= DMA_READ_MAX_128
;
1130 * All the docs say MUST NOT. Well, I did.
1131 * Nothing terrible happens, if we load wrong size.
1132 * Bit w&i still works better!
1134 tmp
|= DMA_WRITE_MAX_128
;
1136 writel(tmp
, ®s
->PciState
);
1140 * The Host PCI bus controller driver has to set FBB.
1141 * If all devices on that PCI bus support FBB, then the controller
1142 * can enable FBB support in the Host PCI Bus controller (or on
1143 * the PCI-PCI bridge if that applies).
1147 * I have received reports from people having problems when this
1150 if (!(ap
->pci_command
& PCI_COMMAND_FAST_BACK
)) {
1151 printk(KERN_INFO
" Enabling PCI Fast Back to Back\n");
1152 ap
->pci_command
|= PCI_COMMAND_FAST_BACK
;
1153 pci_write_config_word(pdev
, PCI_COMMAND
, ap
->pci_command
);
1158 * Configure DMA attributes.
1160 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
)) {
1161 ap
->pci_using_dac
= 1;
1162 } else if (!pci_set_dma_mask(pdev
, DMA_32BIT_MASK
)) {
1163 ap
->pci_using_dac
= 0;
1170 * Initialize the generic info block and the command+event rings
1171 * and the control blocks for the transmit and receive rings
1172 * as they need to be setup once and for all.
1174 if (!(info
= pci_alloc_consistent(ap
->pdev
, sizeof(struct ace_info
),
1182 * Get the memory for the skb rings.
1184 if (!(ap
->skb
= kmalloc(sizeof(struct ace_skb
), GFP_KERNEL
))) {
1189 ecode
= request_irq(pdev
->irq
, ace_interrupt
, IRQF_SHARED
,
1192 printk(KERN_WARNING
"%s: Requested IRQ %d is busy\n",
1193 DRV_NAME
, pdev
->irq
);
1196 dev
->irq
= pdev
->irq
;
1199 spin_lock_init(&ap
->debug_lock
);
1200 ap
->last_tx
= ACE_TX_RING_ENTRIES(ap
) - 1;
1201 ap
->last_std_rx
= 0;
1202 ap
->last_mini_rx
= 0;
1205 memset(ap
->info
, 0, sizeof(struct ace_info
));
1206 memset(ap
->skb
, 0, sizeof(struct ace_skb
));
1208 ace_load_firmware(dev
);
1211 tmp_ptr
= ap
->info_dma
;
1212 writel(tmp_ptr
>> 32, ®s
->InfoPtrHi
);
1213 writel(tmp_ptr
& 0xffffffff, ®s
->InfoPtrLo
);
1215 memset(ap
->evt_ring
, 0, EVT_RING_ENTRIES
* sizeof(struct event
));
1217 set_aceaddr(&info
->evt_ctrl
.rngptr
, ap
->evt_ring_dma
);
1218 info
->evt_ctrl
.flags
= 0;
1222 set_aceaddr(&info
->evt_prd_ptr
, ap
->evt_prd_dma
);
1223 writel(0, ®s
->EvtCsm
);
1225 set_aceaddr(&info
->cmd_ctrl
.rngptr
, 0x100);
1226 info
->cmd_ctrl
.flags
= 0;
1227 info
->cmd_ctrl
.max_len
= 0;
1229 for (i
= 0; i
< CMD_RING_ENTRIES
; i
++)
1230 writel(0, ®s
->CmdRng
[i
]);
1232 writel(0, ®s
->CmdPrd
);
1233 writel(0, ®s
->CmdCsm
);
1235 tmp_ptr
= ap
->info_dma
;
1236 tmp_ptr
+= (unsigned long) &(((struct ace_info
*)0)->s
.stats
);
1237 set_aceaddr(&info
->stats2_ptr
, (dma_addr_t
) tmp_ptr
);
1239 set_aceaddr(&info
->rx_std_ctrl
.rngptr
, ap
->rx_ring_base_dma
);
1240 info
->rx_std_ctrl
.max_len
= ACE_STD_BUFSIZE
;
1241 info
->rx_std_ctrl
.flags
=
1242 RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1244 memset(ap
->rx_std_ring
, 0,
1245 RX_STD_RING_ENTRIES
* sizeof(struct rx_desc
));
1247 for (i
= 0; i
< RX_STD_RING_ENTRIES
; i
++)
1248 ap
->rx_std_ring
[i
].flags
= BD_FLG_TCP_UDP_SUM
;
1250 ap
->rx_std_skbprd
= 0;
1251 atomic_set(&ap
->cur_rx_bufs
, 0);
1253 set_aceaddr(&info
->rx_jumbo_ctrl
.rngptr
,
1254 (ap
->rx_ring_base_dma
+
1255 (sizeof(struct rx_desc
) * RX_STD_RING_ENTRIES
)));
1256 info
->rx_jumbo_ctrl
.max_len
= 0;
1257 info
->rx_jumbo_ctrl
.flags
=
1258 RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1260 memset(ap
->rx_jumbo_ring
, 0,
1261 RX_JUMBO_RING_ENTRIES
* sizeof(struct rx_desc
));
1263 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++)
1264 ap
->rx_jumbo_ring
[i
].flags
= BD_FLG_TCP_UDP_SUM
| BD_FLG_JUMBO
;
1266 ap
->rx_jumbo_skbprd
= 0;
1267 atomic_set(&ap
->cur_jumbo_bufs
, 0);
1269 memset(ap
->rx_mini_ring
, 0,
1270 RX_MINI_RING_ENTRIES
* sizeof(struct rx_desc
));
1272 if (ap
->version
>= 2) {
1273 set_aceaddr(&info
->rx_mini_ctrl
.rngptr
,
1274 (ap
->rx_ring_base_dma
+
1275 (sizeof(struct rx_desc
) *
1276 (RX_STD_RING_ENTRIES
+
1277 RX_JUMBO_RING_ENTRIES
))));
1278 info
->rx_mini_ctrl
.max_len
= ACE_MINI_SIZE
;
1279 info
->rx_mini_ctrl
.flags
=
1280 RCB_FLG_TCP_UDP_SUM
|RCB_FLG_NO_PSEUDO_HDR
|ACE_RCB_VLAN_FLAG
;
1282 for (i
= 0; i
< RX_MINI_RING_ENTRIES
; i
++)
1283 ap
->rx_mini_ring
[i
].flags
=
1284 BD_FLG_TCP_UDP_SUM
| BD_FLG_MINI
;
1286 set_aceaddr(&info
->rx_mini_ctrl
.rngptr
, 0);
1287 info
->rx_mini_ctrl
.flags
= RCB_FLG_RNG_DISABLE
;
1288 info
->rx_mini_ctrl
.max_len
= 0;
1291 ap
->rx_mini_skbprd
= 0;
1292 atomic_set(&ap
->cur_mini_bufs
, 0);
1294 set_aceaddr(&info
->rx_return_ctrl
.rngptr
,
1295 (ap
->rx_ring_base_dma
+
1296 (sizeof(struct rx_desc
) *
1297 (RX_STD_RING_ENTRIES
+
1298 RX_JUMBO_RING_ENTRIES
+
1299 RX_MINI_RING_ENTRIES
))));
1300 info
->rx_return_ctrl
.flags
= 0;
1301 info
->rx_return_ctrl
.max_len
= RX_RETURN_RING_ENTRIES
;
1303 memset(ap
->rx_return_ring
, 0,
1304 RX_RETURN_RING_ENTRIES
* sizeof(struct rx_desc
));
1306 set_aceaddr(&info
->rx_ret_prd_ptr
, ap
->rx_ret_prd_dma
);
1307 *(ap
->rx_ret_prd
) = 0;
1309 writel(TX_RING_BASE
, ®s
->WinBase
);
1311 if (ACE_IS_TIGON_I(ap
)) {
1312 ap
->tx_ring
= (__force
struct tx_desc
*) regs
->Window
;
1313 for (i
= 0; i
< (TIGON_I_TX_RING_ENTRIES
1314 * sizeof(struct tx_desc
)) / sizeof(u32
); i
++)
1315 writel(0, (__force
void __iomem
*)ap
->tx_ring
+ i
* 4);
1317 set_aceaddr(&info
->tx_ctrl
.rngptr
, TX_RING_BASE
);
1319 memset(ap
->tx_ring
, 0,
1320 MAX_TX_RING_ENTRIES
* sizeof(struct tx_desc
));
1322 set_aceaddr(&info
->tx_ctrl
.rngptr
, ap
->tx_ring_dma
);
1325 info
->tx_ctrl
.max_len
= ACE_TX_RING_ENTRIES(ap
);
1326 tmp
= RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1329 * The Tigon I does not like having the TX ring in host memory ;-(
1331 if (!ACE_IS_TIGON_I(ap
))
1332 tmp
|= RCB_FLG_TX_HOST_RING
;
1333 #if TX_COAL_INTS_ONLY
1334 tmp
|= RCB_FLG_COAL_INT_ONLY
;
1336 info
->tx_ctrl
.flags
= tmp
;
1338 set_aceaddr(&info
->tx_csm_ptr
, ap
->tx_csm_dma
);
1341 * Potential item for tuning parameter
1344 writel(DMA_THRESH_16W
, ®s
->DmaReadCfg
);
1345 writel(DMA_THRESH_16W
, ®s
->DmaWriteCfg
);
1347 writel(DMA_THRESH_8W
, ®s
->DmaReadCfg
);
1348 writel(DMA_THRESH_8W
, ®s
->DmaWriteCfg
);
1351 writel(0, ®s
->MaskInt
);
1352 writel(1, ®s
->IfIdx
);
1355 * McKinley boxes do not like us fiddling with AssistState
1358 writel(1, ®s
->AssistState
);
1361 writel(DEF_STAT
, ®s
->TuneStatTicks
);
1362 writel(DEF_TRACE
, ®s
->TuneTrace
);
1364 ace_set_rxtx_parms(dev
, 0);
1366 if (board_idx
== BOARD_IDX_OVERFLOW
) {
1367 printk(KERN_WARNING
"%s: more than %i NICs detected, "
1368 "ignoring module parameters!\n",
1369 ap
->name
, ACE_MAX_MOD_PARMS
);
1370 } else if (board_idx
>= 0) {
1371 if (tx_coal_tick
[board_idx
])
1372 writel(tx_coal_tick
[board_idx
],
1373 ®s
->TuneTxCoalTicks
);
1374 if (max_tx_desc
[board_idx
])
1375 writel(max_tx_desc
[board_idx
], ®s
->TuneMaxTxDesc
);
1377 if (rx_coal_tick
[board_idx
])
1378 writel(rx_coal_tick
[board_idx
],
1379 ®s
->TuneRxCoalTicks
);
1380 if (max_rx_desc
[board_idx
])
1381 writel(max_rx_desc
[board_idx
], ®s
->TuneMaxRxDesc
);
1383 if (trace
[board_idx
])
1384 writel(trace
[board_idx
], ®s
->TuneTrace
);
1386 if ((tx_ratio
[board_idx
] > 0) && (tx_ratio
[board_idx
] < 64))
1387 writel(tx_ratio
[board_idx
], ®s
->TxBufRat
);
1391 * Default link parameters
1393 tmp
= LNK_ENABLE
| LNK_FULL_DUPLEX
| LNK_1000MB
| LNK_100MB
|
1394 LNK_10MB
| LNK_RX_FLOW_CTL_Y
| LNK_NEG_FCTL
| LNK_NEGOTIATE
;
1395 if(ap
->version
>= 2)
1396 tmp
|= LNK_TX_FLOW_CTL_Y
;
1399 * Override link default parameters
1401 if ((board_idx
>= 0) && link_state
[board_idx
]) {
1402 int option
= link_state
[board_idx
];
1406 if (option
& 0x01) {
1407 printk(KERN_INFO
"%s: Setting half duplex link\n",
1409 tmp
&= ~LNK_FULL_DUPLEX
;
1412 tmp
&= ~LNK_NEGOTIATE
;
1419 if ((option
& 0x70) == 0) {
1420 printk(KERN_WARNING
"%s: No media speed specified, "
1421 "forcing auto negotiation\n", ap
->name
);
1422 tmp
|= LNK_NEGOTIATE
| LNK_1000MB
|
1423 LNK_100MB
| LNK_10MB
;
1425 if ((option
& 0x100) == 0)
1426 tmp
|= LNK_NEG_FCTL
;
1428 printk(KERN_INFO
"%s: Disabling flow control "
1429 "negotiation\n", ap
->name
);
1431 tmp
|= LNK_RX_FLOW_CTL_Y
;
1432 if ((option
& 0x400) && (ap
->version
>= 2)) {
1433 printk(KERN_INFO
"%s: Enabling TX flow control\n",
1435 tmp
|= LNK_TX_FLOW_CTL_Y
;
1440 writel(tmp
, ®s
->TuneLink
);
1441 if (ap
->version
>= 2)
1442 writel(tmp
, ®s
->TuneFastLink
);
1444 if (ACE_IS_TIGON_I(ap
))
1445 writel(tigonFwStartAddr
, ®s
->Pc
);
1446 if (ap
->version
== 2)
1447 writel(tigon2FwStartAddr
, ®s
->Pc
);
1449 writel(0, ®s
->Mb0Lo
);
1452 * Set tx_csm before we start receiving interrupts, otherwise
1453 * the interrupt handler might think it is supposed to process
1454 * tx ints before we are up and running, which may cause a null
1455 * pointer access in the int handler.
1458 ap
->tx_prd
= *(ap
->tx_csm
) = ap
->tx_ret_csm
= 0;
1461 ace_set_txprd(regs
, ap
, 0);
1462 writel(0, ®s
->RxRetCsm
);
1465 * Enable DMA engine now.
1466 * If we do this sooner, Mckinley box pukes.
1467 * I assume it's because Tigon II DMA engine wants to check
1468 * *something* even before the CPU is started.
1470 writel(1, ®s
->AssistState
); /* enable DMA */
1475 writel(readl(®s
->CpuCtrl
) & ~(CPU_HALT
|CPU_TRACE
), ®s
->CpuCtrl
);
1476 readl(®s
->CpuCtrl
);
1479 * Wait for the firmware to spin up - max 3 seconds.
1481 myjif
= jiffies
+ 3 * HZ
;
1482 while (time_before(jiffies
, myjif
) && !ap
->fw_running
)
1485 if (!ap
->fw_running
) {
1486 printk(KERN_ERR
"%s: Firmware NOT running!\n", ap
->name
);
1489 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
1490 readl(®s
->CpuCtrl
);
1492 /* aman@sgi.com - account for badly behaving firmware/NIC:
1493 * - have observed that the NIC may continue to generate
1494 * interrupts for some reason; attempt to stop it - halt
1495 * second CPU for Tigon II cards, and also clear Mb0
1496 * - if we're a module, we'll fail to load if this was
1497 * the only GbE card in the system => if the kernel does
1498 * see an interrupt from the NIC, code to handle it is
1499 * gone and OOps! - so free_irq also
1501 if (ap
->version
>= 2)
1502 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
,
1504 writel(0, ®s
->Mb0Lo
);
1505 readl(®s
->Mb0Lo
);
1512 * We load the ring here as there seem to be no way to tell the
1513 * firmware to wipe the ring without re-initializing it.
1515 if (!test_and_set_bit(0, &ap
->std_refill_busy
))
1516 ace_load_std_rx_ring(ap
, RX_RING_SIZE
);
1518 printk(KERN_ERR
"%s: Someone is busy refilling the RX ring\n",
1520 if (ap
->version
>= 2) {
1521 if (!test_and_set_bit(0, &ap
->mini_refill_busy
))
1522 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
);
1524 printk(KERN_ERR
"%s: Someone is busy refilling "
1525 "the RX mini ring\n", ap
->name
);
1530 ace_init_cleanup(dev
);
1535 static void ace_set_rxtx_parms(struct net_device
*dev
, int jumbo
)
1537 struct ace_private
*ap
= netdev_priv(dev
);
1538 struct ace_regs __iomem
*regs
= ap
->regs
;
1539 int board_idx
= ap
->board_idx
;
1541 if (board_idx
>= 0) {
1543 if (!tx_coal_tick
[board_idx
])
1544 writel(DEF_TX_COAL
, ®s
->TuneTxCoalTicks
);
1545 if (!max_tx_desc
[board_idx
])
1546 writel(DEF_TX_MAX_DESC
, ®s
->TuneMaxTxDesc
);
1547 if (!rx_coal_tick
[board_idx
])
1548 writel(DEF_RX_COAL
, ®s
->TuneRxCoalTicks
);
1549 if (!max_rx_desc
[board_idx
])
1550 writel(DEF_RX_MAX_DESC
, ®s
->TuneMaxRxDesc
);
1551 if (!tx_ratio
[board_idx
])
1552 writel(DEF_TX_RATIO
, ®s
->TxBufRat
);
1554 if (!tx_coal_tick
[board_idx
])
1555 writel(DEF_JUMBO_TX_COAL
,
1556 ®s
->TuneTxCoalTicks
);
1557 if (!max_tx_desc
[board_idx
])
1558 writel(DEF_JUMBO_TX_MAX_DESC
,
1559 ®s
->TuneMaxTxDesc
);
1560 if (!rx_coal_tick
[board_idx
])
1561 writel(DEF_JUMBO_RX_COAL
,
1562 ®s
->TuneRxCoalTicks
);
1563 if (!max_rx_desc
[board_idx
])
1564 writel(DEF_JUMBO_RX_MAX_DESC
,
1565 ®s
->TuneMaxRxDesc
);
1566 if (!tx_ratio
[board_idx
])
1567 writel(DEF_JUMBO_TX_RATIO
, ®s
->TxBufRat
);
1573 static void ace_watchdog(struct net_device
*data
)
1575 struct net_device
*dev
= data
;
1576 struct ace_private
*ap
= netdev_priv(dev
);
1577 struct ace_regs __iomem
*regs
= ap
->regs
;
1580 * We haven't received a stats update event for more than 2.5
1581 * seconds and there is data in the transmit queue, thus we
1582 * asume the card is stuck.
1584 if (*ap
->tx_csm
!= ap
->tx_ret_csm
) {
1585 printk(KERN_WARNING
"%s: Transmitter is stuck, %08x\n",
1586 dev
->name
, (unsigned int)readl(®s
->HostCtrl
));
1587 /* This can happen due to ieee flow control. */
1589 printk(KERN_DEBUG
"%s: BUG... transmitter died. Kicking it.\n",
1592 netif_wake_queue(dev
);
1598 static void ace_tasklet(unsigned long dev
)
1600 struct ace_private
*ap
= netdev_priv((struct net_device
*)dev
);
1603 cur_size
= atomic_read(&ap
->cur_rx_bufs
);
1604 if ((cur_size
< RX_LOW_STD_THRES
) &&
1605 !test_and_set_bit(0, &ap
->std_refill_busy
)) {
1607 printk("refilling buffers (current %i)\n", cur_size
);
1609 ace_load_std_rx_ring(ap
, RX_RING_SIZE
- cur_size
);
1612 if (ap
->version
>= 2) {
1613 cur_size
= atomic_read(&ap
->cur_mini_bufs
);
1614 if ((cur_size
< RX_LOW_MINI_THRES
) &&
1615 !test_and_set_bit(0, &ap
->mini_refill_busy
)) {
1617 printk("refilling mini buffers (current %i)\n",
1620 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
- cur_size
);
1624 cur_size
= atomic_read(&ap
->cur_jumbo_bufs
);
1625 if (ap
->jumbo
&& (cur_size
< RX_LOW_JUMBO_THRES
) &&
1626 !test_and_set_bit(0, &ap
->jumbo_refill_busy
)) {
1628 printk("refilling jumbo buffers (current %i)\n", cur_size
);
1630 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
- cur_size
);
1632 ap
->tasklet_pending
= 0;
1637 * Copy the contents of the NIC's trace buffer to kernel memory.
1639 static void ace_dump_trace(struct ace_private
*ap
)
1643 if (!(ap
->trace_buf
= kmalloc(ACE_TRACE_SIZE
, GFP_KERNEL
)))
1650 * Load the standard rx ring.
1652 * Loading rings is safe without holding the spin lock since this is
1653 * done only before the device is enabled, thus no interrupts are
1654 * generated and by the interrupt handler/tasklet handler.
1656 static void ace_load_std_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1658 struct ace_regs __iomem
*regs
= ap
->regs
;
1662 prefetchw(&ap
->cur_rx_bufs
);
1664 idx
= ap
->rx_std_skbprd
;
1666 for (i
= 0; i
< nr_bufs
; i
++) {
1667 struct sk_buff
*skb
;
1671 skb
= alloc_skb(ACE_STD_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1675 skb_reserve(skb
, NET_IP_ALIGN
);
1676 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1677 offset_in_page(skb
->data
),
1679 PCI_DMA_FROMDEVICE
);
1680 ap
->skb
->rx_std_skbuff
[idx
].skb
= skb
;
1681 pci_unmap_addr_set(&ap
->skb
->rx_std_skbuff
[idx
],
1684 rd
= &ap
->rx_std_ring
[idx
];
1685 set_aceaddr(&rd
->addr
, mapping
);
1686 rd
->size
= ACE_STD_BUFSIZE
;
1688 idx
= (idx
+ 1) % RX_STD_RING_ENTRIES
;
1694 atomic_add(i
, &ap
->cur_rx_bufs
);
1695 ap
->rx_std_skbprd
= idx
;
1697 if (ACE_IS_TIGON_I(ap
)) {
1699 cmd
.evt
= C_SET_RX_PRD_IDX
;
1701 cmd
.idx
= ap
->rx_std_skbprd
;
1702 ace_issue_cmd(regs
, &cmd
);
1704 writel(idx
, ®s
->RxStdPrd
);
1709 clear_bit(0, &ap
->std_refill_busy
);
1713 printk(KERN_INFO
"Out of memory when allocating "
1714 "standard receive buffers\n");
1719 static void ace_load_mini_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1721 struct ace_regs __iomem
*regs
= ap
->regs
;
1724 prefetchw(&ap
->cur_mini_bufs
);
1726 idx
= ap
->rx_mini_skbprd
;
1727 for (i
= 0; i
< nr_bufs
; i
++) {
1728 struct sk_buff
*skb
;
1732 skb
= alloc_skb(ACE_MINI_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1736 skb_reserve(skb
, NET_IP_ALIGN
);
1737 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1738 offset_in_page(skb
->data
),
1740 PCI_DMA_FROMDEVICE
);
1741 ap
->skb
->rx_mini_skbuff
[idx
].skb
= skb
;
1742 pci_unmap_addr_set(&ap
->skb
->rx_mini_skbuff
[idx
],
1745 rd
= &ap
->rx_mini_ring
[idx
];
1746 set_aceaddr(&rd
->addr
, mapping
);
1747 rd
->size
= ACE_MINI_BUFSIZE
;
1749 idx
= (idx
+ 1) % RX_MINI_RING_ENTRIES
;
1755 atomic_add(i
, &ap
->cur_mini_bufs
);
1757 ap
->rx_mini_skbprd
= idx
;
1759 writel(idx
, ®s
->RxMiniPrd
);
1763 clear_bit(0, &ap
->mini_refill_busy
);
1766 printk(KERN_INFO
"Out of memory when allocating "
1767 "mini receive buffers\n");
1773 * Load the jumbo rx ring, this may happen at any time if the MTU
1774 * is changed to a value > 1500.
1776 static void ace_load_jumbo_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1778 struct ace_regs __iomem
*regs
= ap
->regs
;
1781 idx
= ap
->rx_jumbo_skbprd
;
1783 for (i
= 0; i
< nr_bufs
; i
++) {
1784 struct sk_buff
*skb
;
1788 skb
= alloc_skb(ACE_JUMBO_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1792 skb_reserve(skb
, NET_IP_ALIGN
);
1793 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1794 offset_in_page(skb
->data
),
1796 PCI_DMA_FROMDEVICE
);
1797 ap
->skb
->rx_jumbo_skbuff
[idx
].skb
= skb
;
1798 pci_unmap_addr_set(&ap
->skb
->rx_jumbo_skbuff
[idx
],
1801 rd
= &ap
->rx_jumbo_ring
[idx
];
1802 set_aceaddr(&rd
->addr
, mapping
);
1803 rd
->size
= ACE_JUMBO_BUFSIZE
;
1805 idx
= (idx
+ 1) % RX_JUMBO_RING_ENTRIES
;
1811 atomic_add(i
, &ap
->cur_jumbo_bufs
);
1812 ap
->rx_jumbo_skbprd
= idx
;
1814 if (ACE_IS_TIGON_I(ap
)) {
1816 cmd
.evt
= C_SET_RX_JUMBO_PRD_IDX
;
1818 cmd
.idx
= ap
->rx_jumbo_skbprd
;
1819 ace_issue_cmd(regs
, &cmd
);
1821 writel(idx
, ®s
->RxJumboPrd
);
1826 clear_bit(0, &ap
->jumbo_refill_busy
);
1829 if (net_ratelimit())
1830 printk(KERN_INFO
"Out of memory when allocating "
1831 "jumbo receive buffers\n");
1837 * All events are considered to be slow (RX/TX ints do not generate
1838 * events) and are handled here, outside the main interrupt handler,
1839 * to reduce the size of the handler.
1841 static u32
ace_handle_event(struct net_device
*dev
, u32 evtcsm
, u32 evtprd
)
1843 struct ace_private
*ap
;
1845 ap
= netdev_priv(dev
);
1847 while (evtcsm
!= evtprd
) {
1848 switch (ap
->evt_ring
[evtcsm
].evt
) {
1850 printk(KERN_INFO
"%s: Firmware up and running\n",
1855 case E_STATS_UPDATED
:
1859 u16 code
= ap
->evt_ring
[evtcsm
].code
;
1863 u32 state
= readl(&ap
->regs
->GigLnkState
);
1864 printk(KERN_WARNING
"%s: Optical link UP "
1865 "(%s Duplex, Flow Control: %s%s)\n",
1867 state
& LNK_FULL_DUPLEX
? "Full":"Half",
1868 state
& LNK_TX_FLOW_CTL_Y
? "TX " : "",
1869 state
& LNK_RX_FLOW_CTL_Y
? "RX" : "");
1873 printk(KERN_WARNING
"%s: Optical link DOWN\n",
1876 case E_C_LINK_10_100
:
1877 printk(KERN_WARNING
"%s: 10/100BaseT link "
1881 printk(KERN_ERR
"%s: Unknown optical link "
1882 "state %02x\n", ap
->name
, code
);
1887 switch(ap
->evt_ring
[evtcsm
].code
) {
1888 case E_C_ERR_INVAL_CMD
:
1889 printk(KERN_ERR
"%s: invalid command error\n",
1892 case E_C_ERR_UNIMP_CMD
:
1893 printk(KERN_ERR
"%s: unimplemented command "
1894 "error\n", ap
->name
);
1896 case E_C_ERR_BAD_CFG
:
1897 printk(KERN_ERR
"%s: bad config error\n",
1901 printk(KERN_ERR
"%s: unknown error %02x\n",
1902 ap
->name
, ap
->evt_ring
[evtcsm
].code
);
1905 case E_RESET_JUMBO_RNG
:
1908 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++) {
1909 if (ap
->skb
->rx_jumbo_skbuff
[i
].skb
) {
1910 ap
->rx_jumbo_ring
[i
].size
= 0;
1911 set_aceaddr(&ap
->rx_jumbo_ring
[i
].addr
, 0);
1912 dev_kfree_skb(ap
->skb
->rx_jumbo_skbuff
[i
].skb
);
1913 ap
->skb
->rx_jumbo_skbuff
[i
].skb
= NULL
;
1917 if (ACE_IS_TIGON_I(ap
)) {
1919 cmd
.evt
= C_SET_RX_JUMBO_PRD_IDX
;
1922 ace_issue_cmd(ap
->regs
, &cmd
);
1924 writel(0, &((ap
->regs
)->RxJumboPrd
));
1929 ap
->rx_jumbo_skbprd
= 0;
1930 printk(KERN_INFO
"%s: Jumbo ring flushed\n",
1932 clear_bit(0, &ap
->jumbo_refill_busy
);
1936 printk(KERN_ERR
"%s: Unhandled event 0x%02x\n",
1937 ap
->name
, ap
->evt_ring
[evtcsm
].evt
);
1939 evtcsm
= (evtcsm
+ 1) % EVT_RING_ENTRIES
;
1946 static void ace_rx_int(struct net_device
*dev
, u32 rxretprd
, u32 rxretcsm
)
1948 struct ace_private
*ap
= netdev_priv(dev
);
1950 int mini_count
= 0, std_count
= 0;
1954 prefetchw(&ap
->cur_rx_bufs
);
1955 prefetchw(&ap
->cur_mini_bufs
);
1957 while (idx
!= rxretprd
) {
1958 struct ring_info
*rip
;
1959 struct sk_buff
*skb
;
1960 struct rx_desc
*rxdesc
, *retdesc
;
1962 int bd_flags
, desc_type
, mapsize
;
1966 /* make sure the rx descriptor isn't read before rxretprd */
1967 if (idx
== rxretcsm
)
1970 retdesc
= &ap
->rx_return_ring
[idx
];
1971 skbidx
= retdesc
->idx
;
1972 bd_flags
= retdesc
->flags
;
1973 desc_type
= bd_flags
& (BD_FLG_JUMBO
| BD_FLG_MINI
);
1977 * Normal frames do not have any flags set
1979 * Mini and normal frames arrive frequently,
1980 * so use a local counter to avoid doing
1981 * atomic operations for each packet arriving.
1984 rip
= &ap
->skb
->rx_std_skbuff
[skbidx
];
1985 mapsize
= ACE_STD_BUFSIZE
;
1986 rxdesc
= &ap
->rx_std_ring
[skbidx
];
1990 rip
= &ap
->skb
->rx_jumbo_skbuff
[skbidx
];
1991 mapsize
= ACE_JUMBO_BUFSIZE
;
1992 rxdesc
= &ap
->rx_jumbo_ring
[skbidx
];
1993 atomic_dec(&ap
->cur_jumbo_bufs
);
1996 rip
= &ap
->skb
->rx_mini_skbuff
[skbidx
];
1997 mapsize
= ACE_MINI_BUFSIZE
;
1998 rxdesc
= &ap
->rx_mini_ring
[skbidx
];
2002 printk(KERN_INFO
"%s: unknown frame type (0x%02x) "
2003 "returned by NIC\n", dev
->name
,
2010 pci_unmap_page(ap
->pdev
,
2011 pci_unmap_addr(rip
, mapping
),
2013 PCI_DMA_FROMDEVICE
);
2014 skb_put(skb
, retdesc
->size
);
2019 csum
= retdesc
->tcp_udp_csum
;
2021 skb
->protocol
= eth_type_trans(skb
, dev
);
2024 * Instead of forcing the poor tigon mips cpu to calculate
2025 * pseudo hdr checksum, we do this ourselves.
2027 if (bd_flags
& BD_FLG_TCP_UDP_SUM
) {
2028 skb
->csum
= htons(csum
);
2029 skb
->ip_summed
= CHECKSUM_COMPLETE
;
2031 skb
->ip_summed
= CHECKSUM_NONE
;
2036 if (ap
->vlgrp
&& (bd_flags
& BD_FLG_VLAN_TAG
)) {
2037 vlan_hwaccel_rx(skb
, ap
->vlgrp
, retdesc
->vlan
);
2042 dev
->stats
.rx_packets
++;
2043 dev
->stats
.rx_bytes
+= retdesc
->size
;
2045 idx
= (idx
+ 1) % RX_RETURN_RING_ENTRIES
;
2048 atomic_sub(std_count
, &ap
->cur_rx_bufs
);
2049 if (!ACE_IS_TIGON_I(ap
))
2050 atomic_sub(mini_count
, &ap
->cur_mini_bufs
);
2054 * According to the documentation RxRetCsm is obsolete with
2055 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2057 if (ACE_IS_TIGON_I(ap
)) {
2058 writel(idx
, &ap
->regs
->RxRetCsm
);
2069 static inline void ace_tx_int(struct net_device
*dev
,
2072 struct ace_private
*ap
= netdev_priv(dev
);
2075 struct sk_buff
*skb
;
2077 struct tx_ring_info
*info
;
2079 info
= ap
->skb
->tx_skbuff
+ idx
;
2081 mapping
= pci_unmap_addr(info
, mapping
);
2084 pci_unmap_page(ap
->pdev
, mapping
,
2085 pci_unmap_len(info
, maplen
),
2087 pci_unmap_addr_set(info
, mapping
, 0);
2091 dev
->stats
.tx_packets
++;
2092 dev
->stats
.tx_bytes
+= skb
->len
;
2093 dev_kfree_skb_irq(skb
);
2097 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2098 } while (idx
!= txcsm
);
2100 if (netif_queue_stopped(dev
))
2101 netif_wake_queue(dev
);
2104 ap
->tx_ret_csm
= txcsm
;
2106 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2108 * We could try to make it before. In this case we would get
2109 * the following race condition: hard_start_xmit on other cpu
2110 * enters after we advanced tx_ret_csm and fills space,
2111 * which we have just freed, so that we make illegal device wakeup.
2112 * There is no good way to workaround this (at entry
2113 * to ace_start_xmit detects this condition and prevents
2114 * ring corruption, but it is not a good workaround.)
2116 * When tx_ret_csm is advanced after, we wake up device _only_
2117 * if we really have some space in ring (though the core doing
2118 * hard_start_xmit can see full ring for some period and has to
2119 * synchronize.) Superb.
2120 * BUT! We get another subtle race condition. hard_start_xmit
2121 * may think that ring is full between wakeup and advancing
2122 * tx_ret_csm and will stop device instantly! It is not so bad.
2123 * We are guaranteed that there is something in ring, so that
2124 * the next irq will resume transmission. To speedup this we could
2125 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2126 * (see ace_start_xmit).
2128 * Well, this dilemma exists in all lock-free devices.
2129 * We, following scheme used in drivers by Donald Becker,
2130 * select the least dangerous.
2136 static irqreturn_t
ace_interrupt(int irq
, void *dev_id
)
2138 struct net_device
*dev
= (struct net_device
*)dev_id
;
2139 struct ace_private
*ap
= netdev_priv(dev
);
2140 struct ace_regs __iomem
*regs
= ap
->regs
;
2142 u32 txcsm
, rxretcsm
, rxretprd
;
2146 * In case of PCI shared interrupts or spurious interrupts,
2147 * we want to make sure it is actually our interrupt before
2148 * spending any time in here.
2150 if (!(readl(®s
->HostCtrl
) & IN_INT
))
2154 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2155 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2156 * writel(0, ®s->Mb0Lo).
2158 * "IRQ avoidance" recommended in docs applies to IRQs served
2159 * threads and it is wrong even for that case.
2161 writel(0, ®s
->Mb0Lo
);
2162 readl(®s
->Mb0Lo
);
2165 * There is no conflict between transmit handling in
2166 * start_xmit and receive processing, thus there is no reason
2167 * to take a spin lock for RX handling. Wait until we start
2168 * working on the other stuff - hey we don't need a spin lock
2171 rxretprd
= *ap
->rx_ret_prd
;
2172 rxretcsm
= ap
->cur_rx
;
2174 if (rxretprd
!= rxretcsm
)
2175 ace_rx_int(dev
, rxretprd
, rxretcsm
);
2177 txcsm
= *ap
->tx_csm
;
2178 idx
= ap
->tx_ret_csm
;
2182 * If each skb takes only one descriptor this check degenerates
2183 * to identity, because new space has just been opened.
2184 * But if skbs are fragmented we must check that this index
2185 * update releases enough of space, otherwise we just
2186 * wait for device to make more work.
2188 if (!tx_ring_full(ap
, txcsm
, ap
->tx_prd
))
2189 ace_tx_int(dev
, txcsm
, idx
);
2192 evtcsm
= readl(®s
->EvtCsm
);
2193 evtprd
= *ap
->evt_prd
;
2195 if (evtcsm
!= evtprd
) {
2196 evtcsm
= ace_handle_event(dev
, evtcsm
, evtprd
);
2197 writel(evtcsm
, ®s
->EvtCsm
);
2201 * This has to go last in the interrupt handler and run with
2202 * the spin lock released ... what lock?
2204 if (netif_running(dev
)) {
2206 int run_tasklet
= 0;
2208 cur_size
= atomic_read(&ap
->cur_rx_bufs
);
2209 if (cur_size
< RX_LOW_STD_THRES
) {
2210 if ((cur_size
< RX_PANIC_STD_THRES
) &&
2211 !test_and_set_bit(0, &ap
->std_refill_busy
)) {
2213 printk("low on std buffers %i\n", cur_size
);
2215 ace_load_std_rx_ring(ap
,
2216 RX_RING_SIZE
- cur_size
);
2221 if (!ACE_IS_TIGON_I(ap
)) {
2222 cur_size
= atomic_read(&ap
->cur_mini_bufs
);
2223 if (cur_size
< RX_LOW_MINI_THRES
) {
2224 if ((cur_size
< RX_PANIC_MINI_THRES
) &&
2225 !test_and_set_bit(0,
2226 &ap
->mini_refill_busy
)) {
2228 printk("low on mini buffers %i\n",
2231 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
- cur_size
);
2238 cur_size
= atomic_read(&ap
->cur_jumbo_bufs
);
2239 if (cur_size
< RX_LOW_JUMBO_THRES
) {
2240 if ((cur_size
< RX_PANIC_JUMBO_THRES
) &&
2241 !test_and_set_bit(0,
2242 &ap
->jumbo_refill_busy
)){
2244 printk("low on jumbo buffers %i\n",
2247 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
- cur_size
);
2252 if (run_tasklet
&& !ap
->tasklet_pending
) {
2253 ap
->tasklet_pending
= 1;
2254 tasklet_schedule(&ap
->ace_tasklet
);
2263 static void ace_vlan_rx_register(struct net_device
*dev
, struct vlan_group
*grp
)
2265 struct ace_private
*ap
= netdev_priv(dev
);
2266 unsigned long flags
;
2268 local_irq_save(flags
);
2273 ace_unmask_irq(dev
);
2274 local_irq_restore(flags
);
2276 #endif /* ACENIC_DO_VLAN */
2279 static int ace_open(struct net_device
*dev
)
2281 struct ace_private
*ap
= netdev_priv(dev
);
2282 struct ace_regs __iomem
*regs
= ap
->regs
;
2285 if (!(ap
->fw_running
)) {
2286 printk(KERN_WARNING
"%s: Firmware not running!\n", dev
->name
);
2290 writel(dev
->mtu
+ ETH_HLEN
+ 4, ®s
->IfMtu
);
2292 cmd
.evt
= C_CLEAR_STATS
;
2295 ace_issue_cmd(regs
, &cmd
);
2297 cmd
.evt
= C_HOST_STATE
;
2298 cmd
.code
= C_C_STACK_UP
;
2300 ace_issue_cmd(regs
, &cmd
);
2303 !test_and_set_bit(0, &ap
->jumbo_refill_busy
))
2304 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
);
2306 if (dev
->flags
& IFF_PROMISC
) {
2307 cmd
.evt
= C_SET_PROMISC_MODE
;
2308 cmd
.code
= C_C_PROMISC_ENABLE
;
2310 ace_issue_cmd(regs
, &cmd
);
2318 cmd
.evt
= C_LNK_NEGOTIATION
;
2321 ace_issue_cmd(regs
, &cmd
);
2324 netif_start_queue(dev
);
2327 * Setup the bottom half rx ring refill handler
2329 tasklet_init(&ap
->ace_tasklet
, ace_tasklet
, (unsigned long)dev
);
2334 static int ace_close(struct net_device
*dev
)
2336 struct ace_private
*ap
= netdev_priv(dev
);
2337 struct ace_regs __iomem
*regs
= ap
->regs
;
2339 unsigned long flags
;
2343 * Without (or before) releasing irq and stopping hardware, this
2344 * is an absolute non-sense, by the way. It will be reset instantly
2347 netif_stop_queue(dev
);
2351 cmd
.evt
= C_SET_PROMISC_MODE
;
2352 cmd
.code
= C_C_PROMISC_DISABLE
;
2354 ace_issue_cmd(regs
, &cmd
);
2358 cmd
.evt
= C_HOST_STATE
;
2359 cmd
.code
= C_C_STACK_DOWN
;
2361 ace_issue_cmd(regs
, &cmd
);
2363 tasklet_kill(&ap
->ace_tasklet
);
2366 * Make sure one CPU is not processing packets while
2367 * buffers are being released by another.
2370 local_irq_save(flags
);
2373 for (i
= 0; i
< ACE_TX_RING_ENTRIES(ap
); i
++) {
2374 struct sk_buff
*skb
;
2376 struct tx_ring_info
*info
;
2378 info
= ap
->skb
->tx_skbuff
+ i
;
2380 mapping
= pci_unmap_addr(info
, mapping
);
2383 if (ACE_IS_TIGON_I(ap
)) {
2384 /* NB: TIGON_1 is special, tx_ring is in io space */
2385 struct tx_desc __iomem
*tx
;
2386 tx
= (__force
struct tx_desc __iomem
*) &ap
->tx_ring
[i
];
2387 writel(0, &tx
->addr
.addrhi
);
2388 writel(0, &tx
->addr
.addrlo
);
2389 writel(0, &tx
->flagsize
);
2391 memset(ap
->tx_ring
+ i
, 0,
2392 sizeof(struct tx_desc
));
2393 pci_unmap_page(ap
->pdev
, mapping
,
2394 pci_unmap_len(info
, maplen
),
2396 pci_unmap_addr_set(info
, mapping
, 0);
2405 cmd
.evt
= C_RESET_JUMBO_RNG
;
2408 ace_issue_cmd(regs
, &cmd
);
2411 ace_unmask_irq(dev
);
2412 local_irq_restore(flags
);
2418 static inline dma_addr_t
2419 ace_map_tx_skb(struct ace_private
*ap
, struct sk_buff
*skb
,
2420 struct sk_buff
*tail
, u32 idx
)
2423 struct tx_ring_info
*info
;
2425 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
2426 offset_in_page(skb
->data
),
2427 skb
->len
, PCI_DMA_TODEVICE
);
2429 info
= ap
->skb
->tx_skbuff
+ idx
;
2431 pci_unmap_addr_set(info
, mapping
, mapping
);
2432 pci_unmap_len_set(info
, maplen
, skb
->len
);
2438 ace_load_tx_bd(struct ace_private
*ap
, struct tx_desc
*desc
, u64 addr
,
2439 u32 flagsize
, u32 vlan_tag
)
2441 #if !USE_TX_COAL_NOW
2442 flagsize
&= ~BD_FLG_COAL_NOW
;
2445 if (ACE_IS_TIGON_I(ap
)) {
2446 struct tx_desc __iomem
*io
= (__force
struct tx_desc __iomem
*) desc
;
2447 writel(addr
>> 32, &io
->addr
.addrhi
);
2448 writel(addr
& 0xffffffff, &io
->addr
.addrlo
);
2449 writel(flagsize
, &io
->flagsize
);
2451 writel(vlan_tag
, &io
->vlanres
);
2454 desc
->addr
.addrhi
= addr
>> 32;
2455 desc
->addr
.addrlo
= addr
;
2456 desc
->flagsize
= flagsize
;
2458 desc
->vlanres
= vlan_tag
;
2464 static int ace_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2466 struct ace_private
*ap
= netdev_priv(dev
);
2467 struct ace_regs __iomem
*regs
= ap
->regs
;
2468 struct tx_desc
*desc
;
2470 unsigned long maxjiff
= jiffies
+ 3*HZ
;
2475 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2478 if (!skb_shinfo(skb
)->nr_frags
) {
2482 mapping
= ace_map_tx_skb(ap
, skb
, skb
, idx
);
2483 flagsize
= (skb
->len
<< 16) | (BD_FLG_END
);
2484 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2485 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2487 if (vlan_tx_tag_present(skb
)) {
2488 flagsize
|= BD_FLG_VLAN_TAG
;
2489 vlan_tag
= vlan_tx_tag_get(skb
);
2492 desc
= ap
->tx_ring
+ idx
;
2493 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2495 /* Look at ace_tx_int for explanations. */
2496 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2497 flagsize
|= BD_FLG_COAL_NOW
;
2499 ace_load_tx_bd(ap
, desc
, mapping
, flagsize
, vlan_tag
);
2505 mapping
= ace_map_tx_skb(ap
, skb
, NULL
, idx
);
2506 flagsize
= (skb_headlen(skb
) << 16);
2507 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2508 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2510 if (vlan_tx_tag_present(skb
)) {
2511 flagsize
|= BD_FLG_VLAN_TAG
;
2512 vlan_tag
= vlan_tx_tag_get(skb
);
2516 ace_load_tx_bd(ap
, ap
->tx_ring
+ idx
, mapping
, flagsize
, vlan_tag
);
2518 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2520 for (i
= 0; i
< skb_shinfo(skb
)->nr_frags
; i
++) {
2521 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
2522 struct tx_ring_info
*info
;
2525 info
= ap
->skb
->tx_skbuff
+ idx
;
2526 desc
= ap
->tx_ring
+ idx
;
2528 mapping
= pci_map_page(ap
->pdev
, frag
->page
,
2529 frag
->page_offset
, frag
->size
,
2532 flagsize
= (frag
->size
<< 16);
2533 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2534 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2535 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2537 if (i
== skb_shinfo(skb
)->nr_frags
- 1) {
2538 flagsize
|= BD_FLG_END
;
2539 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2540 flagsize
|= BD_FLG_COAL_NOW
;
2543 * Only the last fragment frees
2550 pci_unmap_addr_set(info
, mapping
, mapping
);
2551 pci_unmap_len_set(info
, maplen
, frag
->size
);
2552 ace_load_tx_bd(ap
, desc
, mapping
, flagsize
, vlan_tag
);
2558 ace_set_txprd(regs
, ap
, idx
);
2560 if (flagsize
& BD_FLG_COAL_NOW
) {
2561 netif_stop_queue(dev
);
2564 * A TX-descriptor producer (an IRQ) might have gotten
2565 * inbetween, making the ring free again. Since xmit is
2566 * serialized, this is the only situation we have to
2569 if (!tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2570 netif_wake_queue(dev
);
2573 dev
->trans_start
= jiffies
;
2574 return NETDEV_TX_OK
;
2578 * This race condition is unavoidable with lock-free drivers.
2579 * We wake up the queue _before_ tx_prd is advanced, so that we can
2580 * enter hard_start_xmit too early, while tx ring still looks closed.
2581 * This happens ~1-4 times per 100000 packets, so that we can allow
2582 * to loop syncing to other CPU. Probably, we need an additional
2583 * wmb() in ace_tx_intr as well.
2585 * Note that this race is relieved by reserving one more entry
2586 * in tx ring than it is necessary (see original non-SG driver).
2587 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2588 * is already overkill.
2590 * Alternative is to return with 1 not throttling queue. In this
2591 * case loop becomes longer, no more useful effects.
2593 if (time_before(jiffies
, maxjiff
)) {
2599 /* The ring is stuck full. */
2600 printk(KERN_WARNING
"%s: Transmit ring stuck full\n", dev
->name
);
2601 return NETDEV_TX_BUSY
;
2605 static int ace_change_mtu(struct net_device
*dev
, int new_mtu
)
2607 struct ace_private
*ap
= netdev_priv(dev
);
2608 struct ace_regs __iomem
*regs
= ap
->regs
;
2610 if (new_mtu
> ACE_JUMBO_MTU
)
2613 writel(new_mtu
+ ETH_HLEN
+ 4, ®s
->IfMtu
);
2616 if (new_mtu
> ACE_STD_MTU
) {
2618 printk(KERN_INFO
"%s: Enabling Jumbo frame "
2619 "support\n", dev
->name
);
2621 if (!test_and_set_bit(0, &ap
->jumbo_refill_busy
))
2622 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
);
2623 ace_set_rxtx_parms(dev
, 1);
2626 while (test_and_set_bit(0, &ap
->jumbo_refill_busy
));
2627 ace_sync_irq(dev
->irq
);
2628 ace_set_rxtx_parms(dev
, 0);
2632 cmd
.evt
= C_RESET_JUMBO_RNG
;
2635 ace_issue_cmd(regs
, &cmd
);
2642 static int ace_get_settings(struct net_device
*dev
, struct ethtool_cmd
*ecmd
)
2644 struct ace_private
*ap
= netdev_priv(dev
);
2645 struct ace_regs __iomem
*regs
= ap
->regs
;
2648 memset(ecmd
, 0, sizeof(struct ethtool_cmd
));
2650 (SUPPORTED_10baseT_Half
| SUPPORTED_10baseT_Full
|
2651 SUPPORTED_100baseT_Half
| SUPPORTED_100baseT_Full
|
2652 SUPPORTED_1000baseT_Half
| SUPPORTED_1000baseT_Full
|
2653 SUPPORTED_Autoneg
| SUPPORTED_FIBRE
);
2655 ecmd
->port
= PORT_FIBRE
;
2656 ecmd
->transceiver
= XCVR_INTERNAL
;
2658 link
= readl(®s
->GigLnkState
);
2659 if (link
& LNK_1000MB
)
2660 ecmd
->speed
= SPEED_1000
;
2662 link
= readl(®s
->FastLnkState
);
2663 if (link
& LNK_100MB
)
2664 ecmd
->speed
= SPEED_100
;
2665 else if (link
& LNK_10MB
)
2666 ecmd
->speed
= SPEED_10
;
2670 if (link
& LNK_FULL_DUPLEX
)
2671 ecmd
->duplex
= DUPLEX_FULL
;
2673 ecmd
->duplex
= DUPLEX_HALF
;
2675 if (link
& LNK_NEGOTIATE
)
2676 ecmd
->autoneg
= AUTONEG_ENABLE
;
2678 ecmd
->autoneg
= AUTONEG_DISABLE
;
2682 * Current struct ethtool_cmd is insufficient
2684 ecmd
->trace
= readl(®s
->TuneTrace
);
2686 ecmd
->txcoal
= readl(®s
->TuneTxCoalTicks
);
2687 ecmd
->rxcoal
= readl(®s
->TuneRxCoalTicks
);
2689 ecmd
->maxtxpkt
= readl(®s
->TuneMaxTxDesc
);
2690 ecmd
->maxrxpkt
= readl(®s
->TuneMaxRxDesc
);
2695 static int ace_set_settings(struct net_device
*dev
, struct ethtool_cmd
*ecmd
)
2697 struct ace_private
*ap
= netdev_priv(dev
);
2698 struct ace_regs __iomem
*regs
= ap
->regs
;
2701 link
= readl(®s
->GigLnkState
);
2702 if (link
& LNK_1000MB
)
2705 link
= readl(®s
->FastLnkState
);
2706 if (link
& LNK_100MB
)
2708 else if (link
& LNK_10MB
)
2714 link
= LNK_ENABLE
| LNK_1000MB
| LNK_100MB
| LNK_10MB
|
2715 LNK_RX_FLOW_CTL_Y
| LNK_NEG_FCTL
;
2716 if (!ACE_IS_TIGON_I(ap
))
2717 link
|= LNK_TX_FLOW_CTL_Y
;
2718 if (ecmd
->autoneg
== AUTONEG_ENABLE
)
2719 link
|= LNK_NEGOTIATE
;
2720 if (ecmd
->speed
!= speed
) {
2721 link
&= ~(LNK_1000MB
| LNK_100MB
| LNK_10MB
);
2735 if (ecmd
->duplex
== DUPLEX_FULL
)
2736 link
|= LNK_FULL_DUPLEX
;
2738 if (link
!= ap
->link
) {
2740 printk(KERN_INFO
"%s: Renegotiating link state\n",
2744 writel(link
, ®s
->TuneLink
);
2745 if (!ACE_IS_TIGON_I(ap
))
2746 writel(link
, ®s
->TuneFastLink
);
2749 cmd
.evt
= C_LNK_NEGOTIATION
;
2752 ace_issue_cmd(regs
, &cmd
);
2757 static void ace_get_drvinfo(struct net_device
*dev
,
2758 struct ethtool_drvinfo
*info
)
2760 struct ace_private
*ap
= netdev_priv(dev
);
2762 strlcpy(info
->driver
, "acenic", sizeof(info
->driver
));
2763 snprintf(info
->version
, sizeof(info
->version
), "%i.%i.%i",
2764 tigonFwReleaseMajor
, tigonFwReleaseMinor
,
2768 strlcpy(info
->bus_info
, pci_name(ap
->pdev
),
2769 sizeof(info
->bus_info
));
2774 * Set the hardware MAC address.
2776 static int ace_set_mac_addr(struct net_device
*dev
, void *p
)
2778 struct ace_private
*ap
= netdev_priv(dev
);
2779 struct ace_regs __iomem
*regs
= ap
->regs
;
2780 struct sockaddr
*addr
=p
;
2784 if(netif_running(dev
))
2787 memcpy(dev
->dev_addr
, addr
->sa_data
,dev
->addr_len
);
2789 da
= (u8
*)dev
->dev_addr
;
2791 writel(da
[0] << 8 | da
[1], ®s
->MacAddrHi
);
2792 writel((da
[2] << 24) | (da
[3] << 16) | (da
[4] << 8) | da
[5],
2795 cmd
.evt
= C_SET_MAC_ADDR
;
2798 ace_issue_cmd(regs
, &cmd
);
2804 static void ace_set_multicast_list(struct net_device
*dev
)
2806 struct ace_private
*ap
= netdev_priv(dev
);
2807 struct ace_regs __iomem
*regs
= ap
->regs
;
2810 if ((dev
->flags
& IFF_ALLMULTI
) && !(ap
->mcast_all
)) {
2811 cmd
.evt
= C_SET_MULTICAST_MODE
;
2812 cmd
.code
= C_C_MCAST_ENABLE
;
2814 ace_issue_cmd(regs
, &cmd
);
2816 } else if (ap
->mcast_all
) {
2817 cmd
.evt
= C_SET_MULTICAST_MODE
;
2818 cmd
.code
= C_C_MCAST_DISABLE
;
2820 ace_issue_cmd(regs
, &cmd
);
2824 if ((dev
->flags
& IFF_PROMISC
) && !(ap
->promisc
)) {
2825 cmd
.evt
= C_SET_PROMISC_MODE
;
2826 cmd
.code
= C_C_PROMISC_ENABLE
;
2828 ace_issue_cmd(regs
, &cmd
);
2830 }else if (!(dev
->flags
& IFF_PROMISC
) && (ap
->promisc
)) {
2831 cmd
.evt
= C_SET_PROMISC_MODE
;
2832 cmd
.code
= C_C_PROMISC_DISABLE
;
2834 ace_issue_cmd(regs
, &cmd
);
2839 * For the time being multicast relies on the upper layers
2840 * filtering it properly. The Firmware does not allow one to
2841 * set the entire multicast list at a time and keeping track of
2842 * it here is going to be messy.
2844 if ((dev
->mc_count
) && !(ap
->mcast_all
)) {
2845 cmd
.evt
= C_SET_MULTICAST_MODE
;
2846 cmd
.code
= C_C_MCAST_ENABLE
;
2848 ace_issue_cmd(regs
, &cmd
);
2849 }else if (!ap
->mcast_all
) {
2850 cmd
.evt
= C_SET_MULTICAST_MODE
;
2851 cmd
.code
= C_C_MCAST_DISABLE
;
2853 ace_issue_cmd(regs
, &cmd
);
2858 static struct net_device_stats
*ace_get_stats(struct net_device
*dev
)
2860 struct ace_private
*ap
= netdev_priv(dev
);
2861 struct ace_mac_stats __iomem
*mac_stats
=
2862 (struct ace_mac_stats __iomem
*)ap
->regs
->Stats
;
2864 dev
->stats
.rx_missed_errors
= readl(&mac_stats
->drop_space
);
2865 dev
->stats
.multicast
= readl(&mac_stats
->kept_mc
);
2866 dev
->stats
.collisions
= readl(&mac_stats
->coll
);
2872 static void __devinit
ace_copy(struct ace_regs __iomem
*regs
, void *src
,
2875 void __iomem
*tdest
;
2883 tsize
= min_t(u32
, ((~dest
& (ACE_WINDOW_SIZE
- 1)) + 1),
2884 min_t(u32
, size
, ACE_WINDOW_SIZE
));
2885 tdest
= (void __iomem
*) ®s
->Window
+
2886 (dest
& (ACE_WINDOW_SIZE
- 1));
2887 writel(dest
& ~(ACE_WINDOW_SIZE
- 1), ®s
->WinBase
);
2889 * This requires byte swapping on big endian, however
2890 * writel does that for us
2893 for (i
= 0; i
< (tsize
/ 4); i
++) {
2894 writel(wsrc
[i
], tdest
+ i
*4);
2905 static void __devinit
ace_clear(struct ace_regs __iomem
*regs
, u32 dest
, int size
)
2907 void __iomem
*tdest
;
2914 tsize
= min_t(u32
, ((~dest
& (ACE_WINDOW_SIZE
- 1)) + 1),
2915 min_t(u32
, size
, ACE_WINDOW_SIZE
));
2916 tdest
= (void __iomem
*) ®s
->Window
+
2917 (dest
& (ACE_WINDOW_SIZE
- 1));
2918 writel(dest
& ~(ACE_WINDOW_SIZE
- 1), ®s
->WinBase
);
2920 for (i
= 0; i
< (tsize
/ 4); i
++) {
2921 writel(0, tdest
+ i
*4);
2933 * Download the firmware into the SRAM on the NIC
2935 * This operation requires the NIC to be halted and is performed with
2936 * interrupts disabled and with the spinlock hold.
2938 static int __devinit
ace_load_firmware(struct net_device
*dev
)
2940 struct ace_private
*ap
= netdev_priv(dev
);
2941 struct ace_regs __iomem
*regs
= ap
->regs
;
2943 if (!(readl(®s
->CpuCtrl
) & CPU_HALTED
)) {
2944 printk(KERN_ERR
"%s: trying to download firmware while the "
2945 "CPU is running!\n", ap
->name
);
2950 * Do not try to clear more than 512KB or we end up seeing
2951 * funny things on NICs with only 512KB SRAM
2953 ace_clear(regs
, 0x2000, 0x80000-0x2000);
2954 if (ACE_IS_TIGON_I(ap
)) {
2955 ace_copy(regs
, tigonFwText
, tigonFwTextAddr
, tigonFwTextLen
);
2956 ace_copy(regs
, tigonFwData
, tigonFwDataAddr
, tigonFwDataLen
);
2957 ace_copy(regs
, tigonFwRodata
, tigonFwRodataAddr
,
2959 ace_clear(regs
, tigonFwBssAddr
, tigonFwBssLen
);
2960 ace_clear(regs
, tigonFwSbssAddr
, tigonFwSbssLen
);
2961 }else if (ap
->version
== 2) {
2962 ace_clear(regs
, tigon2FwBssAddr
, tigon2FwBssLen
);
2963 ace_clear(regs
, tigon2FwSbssAddr
, tigon2FwSbssLen
);
2964 ace_copy(regs
, tigon2FwText
, tigon2FwTextAddr
,tigon2FwTextLen
);
2965 ace_copy(regs
, tigon2FwRodata
, tigon2FwRodataAddr
,
2967 ace_copy(regs
, tigon2FwData
, tigon2FwDataAddr
,tigon2FwDataLen
);
2975 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
2977 * Accessing the EEPROM is `interesting' to say the least - don't read
2978 * this code right after dinner.
2980 * This is all about black magic and bit-banging the device .... I
2981 * wonder in what hospital they have put the guy who designed the i2c
2984 * Oh yes, this is only the beginning!
2986 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
2987 * code i2c readout code by beta testing all my hacks.
2989 static void __devinit
eeprom_start(struct ace_regs __iomem
*regs
)
2993 readl(®s
->LocalCtrl
);
2994 udelay(ACE_SHORT_DELAY
);
2995 local
= readl(®s
->LocalCtrl
);
2996 local
|= EEPROM_DATA_OUT
| EEPROM_WRITE_ENABLE
;
2997 writel(local
, ®s
->LocalCtrl
);
2998 readl(®s
->LocalCtrl
);
3000 udelay(ACE_SHORT_DELAY
);
3001 local
|= EEPROM_CLK_OUT
;
3002 writel(local
, ®s
->LocalCtrl
);
3003 readl(®s
->LocalCtrl
);
3005 udelay(ACE_SHORT_DELAY
);
3006 local
&= ~EEPROM_DATA_OUT
;
3007 writel(local
, ®s
->LocalCtrl
);
3008 readl(®s
->LocalCtrl
);
3010 udelay(ACE_SHORT_DELAY
);
3011 local
&= ~EEPROM_CLK_OUT
;
3012 writel(local
, ®s
->LocalCtrl
);
3013 readl(®s
->LocalCtrl
);
3018 static void __devinit
eeprom_prep(struct ace_regs __iomem
*regs
, u8 magic
)
3023 udelay(ACE_SHORT_DELAY
);
3024 local
= readl(®s
->LocalCtrl
);
3025 local
&= ~EEPROM_DATA_OUT
;
3026 local
|= EEPROM_WRITE_ENABLE
;
3027 writel(local
, ®s
->LocalCtrl
);
3028 readl(®s
->LocalCtrl
);
3031 for (i
= 0; i
< 8; i
++, magic
<<= 1) {
3032 udelay(ACE_SHORT_DELAY
);
3034 local
|= EEPROM_DATA_OUT
;
3036 local
&= ~EEPROM_DATA_OUT
;
3037 writel(local
, ®s
->LocalCtrl
);
3038 readl(®s
->LocalCtrl
);
3041 udelay(ACE_SHORT_DELAY
);
3042 local
|= EEPROM_CLK_OUT
;
3043 writel(local
, ®s
->LocalCtrl
);
3044 readl(®s
->LocalCtrl
);
3046 udelay(ACE_SHORT_DELAY
);
3047 local
&= ~(EEPROM_CLK_OUT
| EEPROM_DATA_OUT
);
3048 writel(local
, ®s
->LocalCtrl
);
3049 readl(®s
->LocalCtrl
);
3055 static int __devinit
eeprom_check_ack(struct ace_regs __iomem
*regs
)
3060 local
= readl(®s
->LocalCtrl
);
3061 local
&= ~EEPROM_WRITE_ENABLE
;
3062 writel(local
, ®s
->LocalCtrl
);
3063 readl(®s
->LocalCtrl
);
3065 udelay(ACE_LONG_DELAY
);
3066 local
|= EEPROM_CLK_OUT
;
3067 writel(local
, ®s
->LocalCtrl
);
3068 readl(®s
->LocalCtrl
);
3070 udelay(ACE_SHORT_DELAY
);
3071 /* sample data in middle of high clk */
3072 state
= (readl(®s
->LocalCtrl
) & EEPROM_DATA_IN
) != 0;
3073 udelay(ACE_SHORT_DELAY
);
3075 writel(readl(®s
->LocalCtrl
) & ~EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3076 readl(®s
->LocalCtrl
);
3083 static void __devinit
eeprom_stop(struct ace_regs __iomem
*regs
)
3087 udelay(ACE_SHORT_DELAY
);
3088 local
= readl(®s
->LocalCtrl
);
3089 local
|= EEPROM_WRITE_ENABLE
;
3090 writel(local
, ®s
->LocalCtrl
);
3091 readl(®s
->LocalCtrl
);
3093 udelay(ACE_SHORT_DELAY
);
3094 local
&= ~EEPROM_DATA_OUT
;
3095 writel(local
, ®s
->LocalCtrl
);
3096 readl(®s
->LocalCtrl
);
3098 udelay(ACE_SHORT_DELAY
);
3099 local
|= EEPROM_CLK_OUT
;
3100 writel(local
, ®s
->LocalCtrl
);
3101 readl(®s
->LocalCtrl
);
3103 udelay(ACE_SHORT_DELAY
);
3104 local
|= EEPROM_DATA_OUT
;
3105 writel(local
, ®s
->LocalCtrl
);
3106 readl(®s
->LocalCtrl
);
3108 udelay(ACE_LONG_DELAY
);
3109 local
&= ~EEPROM_CLK_OUT
;
3110 writel(local
, ®s
->LocalCtrl
);
3116 * Read a whole byte from the EEPROM.
3118 static int __devinit
read_eeprom_byte(struct net_device
*dev
,
3119 unsigned long offset
)
3121 struct ace_private
*ap
= netdev_priv(dev
);
3122 struct ace_regs __iomem
*regs
= ap
->regs
;
3123 unsigned long flags
;
3129 * Don't take interrupts on this CPU will bit banging
3130 * the %#%#@$ I2C device
3132 local_irq_save(flags
);
3136 eeprom_prep(regs
, EEPROM_WRITE_SELECT
);
3137 if (eeprom_check_ack(regs
)) {
3138 local_irq_restore(flags
);
3139 printk(KERN_ERR
"%s: Unable to sync eeprom\n", ap
->name
);
3141 goto eeprom_read_error
;
3144 eeprom_prep(regs
, (offset
>> 8) & 0xff);
3145 if (eeprom_check_ack(regs
)) {
3146 local_irq_restore(flags
);
3147 printk(KERN_ERR
"%s: Unable to set address byte 0\n",
3150 goto eeprom_read_error
;
3153 eeprom_prep(regs
, offset
& 0xff);
3154 if (eeprom_check_ack(regs
)) {
3155 local_irq_restore(flags
);
3156 printk(KERN_ERR
"%s: Unable to set address byte 1\n",
3159 goto eeprom_read_error
;
3163 eeprom_prep(regs
, EEPROM_READ_SELECT
);
3164 if (eeprom_check_ack(regs
)) {
3165 local_irq_restore(flags
);
3166 printk(KERN_ERR
"%s: Unable to set READ_SELECT\n",
3169 goto eeprom_read_error
;
3172 for (i
= 0; i
< 8; i
++) {
3173 local
= readl(®s
->LocalCtrl
);
3174 local
&= ~EEPROM_WRITE_ENABLE
;
3175 writel(local
, ®s
->LocalCtrl
);
3176 readl(®s
->LocalCtrl
);
3177 udelay(ACE_LONG_DELAY
);
3179 local
|= EEPROM_CLK_OUT
;
3180 writel(local
, ®s
->LocalCtrl
);
3181 readl(®s
->LocalCtrl
);
3183 udelay(ACE_SHORT_DELAY
);
3184 /* sample data mid high clk */
3185 result
= (result
<< 1) |
3186 ((readl(®s
->LocalCtrl
) & EEPROM_DATA_IN
) != 0);
3187 udelay(ACE_SHORT_DELAY
);
3189 local
= readl(®s
->LocalCtrl
);
3190 local
&= ~EEPROM_CLK_OUT
;
3191 writel(local
, ®s
->LocalCtrl
);
3192 readl(®s
->LocalCtrl
);
3193 udelay(ACE_SHORT_DELAY
);
3196 local
|= EEPROM_WRITE_ENABLE
;
3197 writel(local
, ®s
->LocalCtrl
);
3198 readl(®s
->LocalCtrl
);
3200 udelay(ACE_SHORT_DELAY
);
3204 local
|= EEPROM_DATA_OUT
;
3205 writel(local
, ®s
->LocalCtrl
);
3206 readl(®s
->LocalCtrl
);
3208 udelay(ACE_SHORT_DELAY
);
3209 writel(readl(®s
->LocalCtrl
) | EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3210 readl(®s
->LocalCtrl
);
3211 udelay(ACE_LONG_DELAY
);
3212 writel(readl(®s
->LocalCtrl
) & ~EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3213 readl(®s
->LocalCtrl
);
3215 udelay(ACE_SHORT_DELAY
);
3218 local_irq_restore(flags
);
3223 printk(KERN_ERR
"%s: Unable to read eeprom byte 0x%02lx\n",