arch/parisc/lib/milli/milli.h

   1 /* 32 and 64-bit millicode, original author Hewlett-Packard
   2    adapted for gcc by Paul Bame <bame@debian.org>
   3    and Alan Modra <alan@linuxcare.com.au>.
   4
   5    Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
   6
   7    This file is part of GCC and is released under the terms of
   8    of the GNU General Public License as published by the Free Software
   9    Foundation; either version 2, or (at your option) any later version.
  10    See the file COPYING in the top-level GCC source directory for a copy
  11    of the license.  */
  12
  13 #ifndef _PA_MILLI_H_
  14 #define _PA_MILLI_H_
  15
  16 #define L_dyncall
  17 #define L_divI
  18 #define L_divU
  19 #define L_remI
  20 #define L_remU
  21 #define L_div_const
  22 #define L_mulI
  23
  24 #ifdef CONFIG_64BIT
  25         .level  2.0w
  26 #endif
  27
  28 /* Hardware General Registers.  */
  29 r0:     .reg    %r0
  30 r1:     .reg    %r1
  31 r2:     .reg    %r2
  32 r3:     .reg    %r3
  33 r4:     .reg    %r4
  34 r5:     .reg    %r5
  35 r6:     .reg    %r6
  36 r7:     .reg    %r7
  37 r8:     .reg    %r8
  38 r9:     .reg    %r9
  39 r10:    .reg    %r10
  40 r11:    .reg    %r11
  41 r12:    .reg    %r12
  42 r13:    .reg    %r13
  43 r14:    .reg    %r14
  44 r15:    .reg    %r15
  45 r16:    .reg    %r16
  46 r17:    .reg    %r17
  47 r18:    .reg    %r18
  48 r19:    .reg    %r19
  49 r20:    .reg    %r20
  50 r21:    .reg    %r21
  51 r22:    .reg    %r22
  52 r23:    .reg    %r23
  53 r24:    .reg    %r24
  54 r25:    .reg    %r25
  55 r26:    .reg    %r26
  56 r27:    .reg    %r27
  57 r28:    .reg    %r28
  58 r29:    .reg    %r29
  59 r30:    .reg    %r30
  60 r31:    .reg    %r31
  61
  62 /* Hardware Space Registers.  */
  63 sr0:    .reg    %sr0
  64 sr1:    .reg    %sr1
  65 sr2:    .reg    %sr2
  66 sr3:    .reg    %sr3
  67 sr4:    .reg    %sr4
  68 sr5:    .reg    %sr5
  69 sr6:    .reg    %sr6
  70 sr7:    .reg    %sr7
  71
  72 /* Hardware Floating Point Registers.  */
  73 fr0:    .reg    %fr0
  74 fr1:    .reg    %fr1
  75 fr2:    .reg    %fr2
  76 fr3:    .reg    %fr3
  77 fr4:    .reg    %fr4
  78 fr5:    .reg    %fr5
  79 fr6:    .reg    %fr6
  80 fr7:    .reg    %fr7
  81 fr8:    .reg    %fr8
  82 fr9:    .reg    %fr9
  83 fr10:   .reg    %fr10
  84 fr11:   .reg    %fr11
  85 fr12:   .reg    %fr12
  86 fr13:   .reg    %fr13
  87 fr14:   .reg    %fr14
  88 fr15:   .reg    %fr15
  89
  90 /* Hardware Control Registers.  */
  91 cr11:   .reg    %cr11
  92 sar:    .reg    %cr11   /* Shift Amount Register */
  93
  94 /* Software Architecture General Registers.  */
  95 rp:     .reg    r2      /* return pointer */
  96 #ifdef CONFIG_64BIT
  97 mrp:    .reg    r2      /* millicode return pointer */
  98 #else
  99 mrp:    .reg    r31     /* millicode return pointer */
 100 #endif
 101 ret0:   .reg    r28     /* return value */
 102 ret1:   .reg    r29     /* return value (high part of double) */
 103 sp:     .reg    r30     /* stack pointer */
 104 dp:     .reg    r27     /* data pointer */
 105 arg0:   .reg    r26     /* argument */
 106 arg1:   .reg    r25     /* argument or high part of double argument */
 107 arg2:   .reg    r24     /* argument */
 108 arg3:   .reg    r23     /* argument or high part of double argument */
 109
 110 /* Software Architecture Space Registers.  */
 111 /*              sr0     ; return link from BLE */
 112 sret:   .reg    sr1     /* return value */
 113 sarg:   .reg    sr1     /* argument */
 114 /*              sr4     ; PC SPACE tracker */
 115 /*              sr5     ; process private data */
 116
 117 /* Frame Offsets (millicode convention!)  Used when calling other
 118    millicode routines.  Stack unwinding is dependent upon these
 119    definitions.  */
 120 r31_slot:       .equ    -20     /* "current RP" slot */
 121 sr0_slot:       .equ    -16     /* "static link" slot */
 122 #if defined(CONFIG_64BIT)
 123 mrp_slot:       .equ    -16     /* "current RP" slot */
 124 psp_slot:       .equ    -8      /* "previous SP" slot */
 125 #else
 126 mrp_slot:       .equ    -20     /* "current RP" slot (replacing "r31_slot") */
 127 #endif
 128
 129
 130 #define DEFINE(name,value)name: .EQU    value
 131 #define RDEFINE(name,value)name:        .REG    value
 132 #ifdef milliext
 133 #define MILLI_BE(lbl)   BE    lbl(sr7,r0)
 134 #define MILLI_BEN(lbl)  BE,n  lbl(sr7,r0)
 135 #define MILLI_BLE(lbl)  BLE   lbl(sr7,r0)
 136 #define MILLI_BLEN(lbl) BLE,n lbl(sr7,r0)
 137 #define MILLIRETN       BE,n  0(sr0,mrp)
 138 #define MILLIRET        BE    0(sr0,mrp)
 139 #define MILLI_RETN      BE,n  0(sr0,mrp)
 140 #define MILLI_RET       BE    0(sr0,mrp)
 141 #else
 142 #define MILLI_BE(lbl)   B     lbl
 143 #define MILLI_BEN(lbl)  B,n   lbl
 144 #define MILLI_BLE(lbl)  BL    lbl,mrp
 145 #define MILLI_BLEN(lbl) BL,n  lbl,mrp
 146 #define MILLIRETN       BV,n  0(mrp)
 147 #define MILLIRET        BV    0(mrp)
 148 #define MILLI_RETN      BV,n  0(mrp)
 149 #define MILLI_RET       BV    0(mrp)
 150 #endif
 151
 152 #define CAT(a,b)        a##b
 153
 154 #define SUBSPA_MILLI     .section .text
 155 #define SUBSPA_MILLI_DIV .section .text.div,"ax",@progbits! .align 16
 156 #define SUBSPA_MILLI_MUL .section .text.mul,"ax",@progbits! .align 16
 157 #define ATTR_MILLI
 158 #define SUBSPA_DATA      .section .data
 159 #define ATTR_DATA
 160 #define GLOBAL           $global$
 161 #define GSYM(sym)        !sym:
 162 #define LSYM(sym)        !CAT(.L,sym:)
 163 #define LREF(sym)        CAT(.L,sym)
 164
 165 #endif /*_PA_MILLI_H_*/