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UDF: check for allocated memory for inode data
[linux-2.6/lfs.git] / sound / oss / trident.c
blob3bc1f6e9e4a3b35b8a1f9ac170d743f916ec54d6
1 /*
2 * OSS driver for Linux 2.[46].x for
3 *
4 * Trident 4D-Wave
5 * SiS 7018
6 * ALi 5451
7 * Tvia/IGST CyberPro 5050
8 *
9 * Driver: Alan Cox <alan@redhat.com>
10 *
11 * Built from:
12 * Low level code: <audio@tridentmicro.com> from ALSA
13 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
14 * Extended by: Zach Brown <zab@redhat.com>
15 *
16 * Hacked up by:
17 * Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
18 * Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support
19 * Ching-Ling Lee <cling-li@ali.com.tw> ALi 5451 Audio Core Support
20 * Matt Wu <mattwu@acersoftech.com.cn> ALi 5451 Audio Core Support
21 * Peter Wächtler <pwaechtler@loewe-komp.de> CyberPro5050 support
22 * Muli Ben-Yehuda <mulix@mulix.org>
23 *
24 *
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
29 *
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
34 *
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
38 *
39 * History
40 * v0.14.10j
41 * January 3 2004 Eugene Teo <eugeneteo@eugeneteo.net>
42 * minor cleanup to use pr_debug instead of TRDBG since it is already
43 * defined in linux/kernel.h.
44 * v0.14.10i
45 * December 29 2003 Muli Ben-Yehuda <mulix@mulix.org>
46 * major cleanup for 2.6, fix a few error patch buglets
47 * with returning without properly cleaning up first,
48 * get rid of lock_kernel().
49 * v0.14.10h
50 * Sept 10 2002 Pascal Schmidt <der.eremit@email.de>
51 * added support for ALi 5451 joystick port
52 * v0.14.10g
53 * Sept 05 2002 Alan Cox <alan@redhat.com>
54 * adapt to new pci joystick attachment interface
55 * v0.14.10f
56 * July 24 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
57 * patch from Eric Lemar (via Ian Soboroff): in suspend and resume,
58 * fix wrong cast from pci_dev* to struct trident_card*.
59 * v0.14.10e
60 * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
61 * rewrite the DMA buffer allocation/deallcoation functions, to make it
62 * modular and fix a bug where we would call free_pages on memory
63 * obtained with pci_alloc_consistent. Also remove unnecessary #ifdef
64 * CONFIG_PROC_FS and various other cleanups.
65 * v0.14.10d
66 * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
67 * made several printk(KERN_NOTICE...) into TRDBG(...), to avoid spamming
68 * my syslog with hundreds of messages.
69 * v0.14.10c
70 * July 16 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
71 * Cleaned up Lei Hu's 0.4.10 driver to conform to Documentation/CodingStyle
72 * and the coding style used in the rest of the file.
73 * v0.14.10b
74 * June 23 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
75 * add a missing unlock_set_fmt, remove a superflous lock/unlock pair
76 * with nothing in between.
77 * v0.14.10a
78 * June 21 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
79 * use a debug macro instead of #ifdef CONFIG_DEBUG, trim to 80 columns
80 * per line, use 'do {} while (0)' in statement macros.
81 * v0.14.10
82 * June 6 2002 Lei Hu <Lei_hu@ali.com.tw>
83 * rewrite the part to read/write registers of audio codec for Ali5451
84 * v0.14.9e
85 * January 2 2002 Vojtech Pavlik <vojtech@ucw.cz> added gameport
86 * support to avoid resource conflict with pcigame.c
87 * v0.14.9d
88 * October 8 2001 Arnaldo Carvalho de Melo <acme@conectiva.com.br>
89 * use set_current_state, properly release resources on failure in
90 * trident_probe, get rid of check_region
91 * v0.14.9c
92 * August 10 2001 Peter Wächtler <pwaechtler@loewe-komp.de>
93 * added support for Tvia (formerly Integraphics/IGST) CyberPro5050
94 * this chip is often found in settop boxes (combined video+audio)
95 * v0.14.9b
96 * Switch to static inline not extern inline (gcc 3)
97 * v0.14.9a
98 * Aug 6 2001 Alan Cox
99 * 0.14.9 crashed on rmmod due to a timer/bh left running. Simplified
100 * the existing logic (the BH doesn't help as ac97 is lock_irqsave)
101 * and used del_timer_sync to clean up
102 * Fixed a problem where the ALi change broke my generic card
103 * v0.14.9
104 * Jul 10 2001 Matt Wu
105 * Add H/W Volume Control
106 * v0.14.8a
107 * July 7 2001 Alan Cox
108 * Moved Matt Wu's ac97 register cache into the card structure
109 * v0.14.8
110 * Apr 30 2001 Matt Wu
111 * Set EBUF1 and EBUF2 to still mode
112 * Add dc97/ac97 reset function
113 * Fix power management: ali_restore_regs
114 * unreleased
115 * Mar 09 2001 Matt Wu
116 * Add cache for ac97 access
117 * v0.14.7
118 * Feb 06 2001 Matt Wu
119 * Fix ac97 initialization
120 * Fix bug: an extra tail will be played when playing
121 * Jan 05 2001 Matt Wu
122 * Implement multi-channels and S/PDIF in support for ALi 1535+
123 * v0.14.6
124 * Nov 1 2000 Ching-Ling Lee
125 * Fix the bug of memory leak when switching 5.1-channels to 2 channels.
126 * Add lock protection into dynamic changing format of data.
127 * Oct 18 2000 Ching-Ling Lee
128 * 5.1-channels support for ALi
129 * June 28 2000 Ching-Ling Lee
130 * S/PDIF out/in(playback/record) support for ALi 1535+, using /proc to be selected by user
131 * Simple Power Management support for ALi
132 * v0.14.5 May 23 2000 Ollie Lho
133 * Misc bug fix from the Net
134 * v0.14.4 May 20 2000 Aaron Holtzman
135 * Fix kfree'd memory access in release
136 * Fix race in open while looking for a free virtual channel slot
137 * remove open_wait wq (which appears to be unused)
138 * v0.14.3 May 10 2000 Ollie Lho
139 * fixed a small bug in trident_update_ptr, xmms 1.0.1 no longer uses 100% CPU
140 * v0.14.2 Mar 29 2000 Ching-Ling Lee
141 * Add clear to silence advance in trident_update_ptr
142 * fix invalid data of the end of the sound
143 * v0.14.1 Mar 24 2000 Ching-Ling Lee
144 * ALi 5451 support added, playback and recording O.K.
145 * ALi 5451 originally developed and structured based on sonicvibes, and
146 * suggested to merge into this file by Alan Cox.
147 * v0.14 Mar 15 2000 Ollie Lho
148 * 5.1 channel output support with channel binding. What's the Matrix ?
149 * v0.13.1 Mar 10 2000 Ollie Lho
150 * few minor bugs on dual codec support, needs more testing
151 * v0.13 Mar 03 2000 Ollie Lho
152 * new pci_* for 2.4 kernel, back ported to 2.2
153 * v0.12 Feb 23 2000 Ollie Lho
154 * Preliminary Recording support
155 * v0.11.2 Feb 19 2000 Ollie Lho
156 * removed incomplete full-dulplex support
157 * v0.11.1 Jan 28 2000 Ollie Lho
158 * small bug in setting sample rate for 4d-nx (reported by Aaron)
159 * v0.11 Jan 27 2000 Ollie Lho
160 * DMA bug, scheduler latency, second try
161 * v0.10 Jan 24 2000 Ollie Lho
162 * DMA bug fixed, found kernel scheduling problem
163 * v0.09 Jan 20 2000 Ollie Lho
164 * Clean up of channel register access routine (prepare for channel binding)
165 * v0.08 Jan 14 2000 Ollie Lho
166 * Isolation of AC97 codec code
167 * v0.07 Jan 13 2000 Ollie Lho
168 * Get rid of ugly old low level access routines (e.g. CHRegs.lp****)
169 * v0.06 Jan 11 2000 Ollie Lho
170 * Preliminary support for dual (more ?) AC97 codecs
171 * v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com>
172 * adapt to 2.3.x new __setup/__init call
173 * v0.04 Dec 31 1999 Ollie Lho
174 * Multiple Open, using Middle Loop Interrupt to smooth playback
175 * v0.03 Dec 24 1999 Ollie Lho
176 * mem leak in prog_dmabuf and dealloc_dmabuf removed
177 * v0.02 Dec 15 1999 Ollie Lho
178 * SiS 7018 support added, playback O.K.
179 * v0.01 Alan Cox et. al.
180 * Initial Release in kernel 2.3.30, does not work
181 *
182 * ToDo
183 * Clean up of low level channel register access code. (done)
184 * Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done)
185 * Dual AC97 codecs support (done)
186 * Recording support (done)
187 * Mmap support
188 * "Channel Binding" ioctl extension (done)
189 * new pci device driver interface for 2.4 kernel (done)
190 *
191 * Lock order (high->low)
192 * lock - hardware lock
193 * open_mutex - guard opens
194 * sem - guard dmabuf, write re-entry etc
195 */
196
197 #include <linux/module.h>
198 #include <linux/string.h>
199 #include <linux/ctype.h>
200 #include <linux/ioport.h>
201 #include <linux/sched.h>
202 #include <linux/delay.h>
203 #include <linux/sound.h>
204 #include <linux/slab.h>
205 #include <linux/soundcard.h>
206 #include <linux/pci.h>
207 #include <linux/init.h>
208 #include <linux/poll.h>
209 #include <linux/spinlock.h>
210 #include <linux/ac97_codec.h>
211 #include <linux/bitops.h>
212 #include <linux/proc_fs.h>
213 #include <linux/interrupt.h>
214 #include <linux/pm.h>
215 #include <linux/gameport.h>
216 #include <linux/kernel.h>
217 #include <linux/mutex.h>
218 #include <linux/mm.h>
219
220 #include <asm/uaccess.h>
221 #include <asm/io.h>
222 #include <asm/dma.h>
223
224 #if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC)
225 #include <asm/hwrpb.h>
226 #endif
227
228 #include "trident.h"
229
230 #define DRIVER_VERSION "0.14.10j-2.6"
231
232 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
233 #define SUPPORT_JOYSTICK 1
234 #endif
235
236 /* magic numbers to protect our data structures */
237 #define TRIDENT_CARD_MAGIC 0x5072696E /* "Prin" */
238 #define TRIDENT_STATE_MAGIC 0x63657373 /* "cess" */
239
240 #define TRIDENT_DMA_MASK 0x3fffffff /* DMA buffer mask for pci_alloc_consist */
241 #define ALI_DMA_MASK 0x7fffffff /* ALI Tridents have 31-bit DMA. Wow. */
242
243 #define NR_HW_CH 32
244
245 /* maximum number of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only
246 have 2 SDATA_IN lines (currently) */
247 #define NR_AC97 2
248
249 /* minor number of /dev/swmodem (temporary, experimental) */
250 #define SND_DEV_SWMODEM 7
251
252 static const unsigned ali_multi_channels_5_1[] = {
253 /*ALI_SURR_LEFT_CHANNEL, ALI_SURR_RIGHT_CHANNEL, */
254 ALI_CENTER_CHANNEL,
255 ALI_LEF_CHANNEL,
256 ALI_SURR_LEFT_CHANNEL,
257 ALI_SURR_RIGHT_CHANNEL
258 };
259
260 static const unsigned sample_size[] = { 1, 2, 2, 4 };
261 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
262
263 static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n";
264
265 enum {
266 TRIDENT_4D_DX = 0,
267 TRIDENT_4D_NX,
268 SIS_7018,
269 ALI_5451,
270 CYBER5050
271 };
272
273 static char *card_names[] = {
274 "Trident 4DWave DX",
275 "Trident 4DWave NX",
276 "SiS 7018 PCI Audio",
277 "ALi Audio Accelerator",
278 "Tvia/IGST CyberPro 5050"
279 };
280
281 static struct pci_device_id trident_pci_tbl[] = {
282 {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX),
283 PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TRIDENT_4D_DX},
284 {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX),
285 0, 0, TRIDENT_4D_NX},
286 {PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018), 0, 0, SIS_7018},
287 {PCI_DEVICE(PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451), 0, 0, ALI_5451},
288 {PCI_DEVICE(PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050),
289 0, 0, CYBER5050},
290 {0,}
291 };
292
293 MODULE_DEVICE_TABLE(pci, trident_pci_tbl);
294
295 /* "software" or virtual channel, an instance of opened /dev/dsp */
296 struct trident_state {
297 unsigned int magic;
298 struct trident_card *card; /* Card info */
299
300 /* file mode */
301 mode_t open_mode;
302
303 /* virtual channel number */
304 int virt;
305
306 struct dmabuf {
307 /* wave sample stuff */
308 unsigned int rate;
309 unsigned char fmt, enable;
310
311 /* hardware channel */
312 struct trident_channel *channel;
313
314 /* OSS buffer management stuff */
315 void *rawbuf;
316 dma_addr_t dma_handle;
317 unsigned buforder;
318 unsigned numfrag;
319 unsigned fragshift;
320
321 /* our buffer acts like a circular ring */
322 unsigned hwptr; /* where dma last started, updated by update_ptr */
323 unsigned swptr; /* where driver last clear/filled, updated by read/write */
324 int count; /* bytes to be comsumed or been generated by dma machine */
325 unsigned total_bytes; /* total bytes dmaed by hardware */
326
327 unsigned error; /* number of over/underruns */
328 /* put process on wait queue when no more space in buffer */
329 wait_queue_head_t wait;
330
331 /* redundant, but makes calculations easier */
332 unsigned fragsize;
333 unsigned dmasize;
334 unsigned fragsamples;
335
336 /* OSS stuff */
337 unsigned mapped:1;
338 unsigned ready:1;
339 unsigned endcleared:1;
340 unsigned update_flag;
341 unsigned ossfragshift;
342 int ossmaxfrags;
343 unsigned subdivision;
344
345 } dmabuf;
346
347 /* 5.1 channels */
348 struct trident_state *other_states[4];
349 int multi_channels_adjust_count;
350 unsigned chans_num;
351 unsigned long fmt_flag;
352 /* Guard against mmap/write/read races */
353 struct mutex sem;
354
355 };
356
357 /* hardware channels */
358 struct trident_channel {
359 int num; /* channel number */
360 u32 lba; /* Loop Begine Address, where dma buffer starts */
361 u32 eso; /* End Sample Offset, wehre dma buffer ends */
362 /* (in the unit of samples) */
363 u32 delta; /* delta value, sample rate / 48k for playback, */
364 /* 48k/sample rate for recording */
365 u16 attribute; /* control where PCM data go and come */
366 u16 fm_vol;
367 u32 control; /* signed/unsigned, 8/16 bits, mono/stereo */
368 };
369
370 struct trident_pcm_bank_address {
371 u32 start;
372 u32 stop;
373 u32 aint;
374 u32 aint_en;
375 };
376
377 static struct trident_pcm_bank_address bank_a_addrs = {
378 T4D_START_A,
379 T4D_STOP_A,
380 T4D_AINT_A,
381 T4D_AINTEN_A
382 };
383
384 static struct trident_pcm_bank_address bank_b_addrs = {
385 T4D_START_B,
386 T4D_STOP_B,
387 T4D_AINT_B,
388 T4D_AINTEN_B
389 };
390
391 struct trident_pcm_bank {
392 /* register addresses to control bank operations */
393 struct trident_pcm_bank_address *addresses;
394 /* each bank has 32 channels */
395 u32 bitmap; /* channel allocation bitmap */
396 struct trident_channel channels[32];
397 };
398
399 struct trident_card {
400 unsigned int magic;
401
402 /* We keep trident cards in a linked list */
403 struct trident_card *next;
404
405 /* single open lock mechanism, only used for recording */
406 struct mutex open_mutex;
407
408 /* The trident has a certain amount of cross channel interaction
409 so we use a single per card lock */
410 spinlock_t lock;
411
412 /* PCI device stuff */
413 struct pci_dev *pci_dev;
414 u16 pci_id;
415 u8 revision;
416
417 /* soundcore stuff */
418 int dev_audio;
419
420 /* structures for abstraction of hardware facilities, codecs, */
421 /* banks and channels */
422 struct ac97_codec *ac97_codec[NR_AC97];
423 struct trident_pcm_bank banks[NR_BANKS];
424 struct trident_state *states[NR_HW_CH];
425
426 /* hardware resources */
427 unsigned long iobase;
428 u32 irq;
429
430 /* Function support */
431 struct trident_channel *(*alloc_pcm_channel) (struct trident_card *);
432 struct trident_channel *(*alloc_rec_pcm_channel) (struct trident_card *);
433 void (*free_pcm_channel) (struct trident_card *, unsigned int chan);
434 void (*address_interrupt) (struct trident_card *);
435
436 /* Added by Matt Wu 01-05-2001 for spdif in */
437 int multi_channel_use_count;
438 int rec_channel_use_count;
439 u16 mixer_regs[64][NR_AC97]; /* Made card local by Alan */
440 int mixer_regs_ready;
441
442 /* Added for hardware volume control */
443 int hwvolctl;
444 struct timer_list timer;
445
446 /* Game port support */
447 struct gameport *gameport;
448 };
449
450 enum dmabuf_mode {
451 DM_PLAYBACK = 0,
452 DM_RECORD
453 };
454
455 /* table to map from CHANNELMASK to channel attribute for SiS 7018 */
456 static u16 mask2attr[] = {
457 PCM_LR, PCM_LR, SURR_LR, CENTER_LFE,
458 HSET, MIC, MODEM_LINE1, MODEM_LINE2,
459 I2S_LR, SPDIF_LR
460 };
461
462 /* table to map from channel attribute to CHANNELMASK for SiS 7018 */
463 static int attr2mask[] = {
464 DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET,
465 DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF
466 };
467
468 /* Added by Matt Wu 01-05-2001 for spdif in */
469 static int ali_close_multi_channels(void);
470 static void ali_delay(struct trident_card *card, int interval);
471 static void ali_detect_spdif_rate(struct trident_card *card);
472
473 static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val);
474 static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg);
475
476 static struct trident_card *devs;
477
478 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
479 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg);
480
481 static int trident_open_mixdev(struct inode *inode, struct file *file);
482 static int trident_ioctl_mixdev(struct inode *inode, struct file *file,
483 unsigned int cmd, unsigned long arg);
484
485 static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val);
486 static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg);
487 static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate);
488 static void ali_enable_special_channel(struct trident_state *stat);
489 static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card);
490 static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card);
491 static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel);
492 static int ali_setup_multi_channels(struct trident_card *card, int chan_nums);
493 static unsigned int ali_get_spdif_in_rate(struct trident_card *card);
494 static void ali_setup_spdif_in(struct trident_card *card);
495 static void ali_disable_spdif_in(struct trident_card *card);
496 static void ali_disable_special_channel(struct trident_card *card, int ch);
497 static void ali_setup_spdif_out(struct trident_card *card, int flag);
498 static int ali_write_5_1(struct trident_state *state,
499 const char __user *buffer,
500 int cnt_for_multi_channel, unsigned int *copy_count,
501 unsigned int *state_cnt);
502 static int ali_allocate_other_states_resources(struct trident_state *state,
503 int chan_nums);
504 static void ali_free_other_states_resources(struct trident_state *state);
505
506 #define seek_offset(dma_ptr, buffer, cnt, offset, copy_count) do { \
507 (dma_ptr) += (offset); \
508 (buffer) += (offset); \
509 (cnt) -= (offset); \
510 (copy_count) += (offset); \
511 } while (0)
512
513 static inline int lock_set_fmt(struct trident_state* state)
514 {
515 if (test_and_set_bit(0, &state->fmt_flag))
516 return -EFAULT;
517
518 return 0;
519 }
520
521 static inline void unlock_set_fmt(struct trident_state* state)
522 {
523 clear_bit(0, &state->fmt_flag);
524 }
525
526 static int
527 trident_enable_loop_interrupts(struct trident_card *card)
528 {
529 u32 global_control;
530
531 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
532
533 switch (card->pci_id) {
534 case PCI_DEVICE_ID_SI_7018:
535 global_control |= (ENDLP_IE | MIDLP_IE | BANK_B_EN);
536 break;
537 case PCI_DEVICE_ID_ALI_5451:
538 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
539 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
540 case PCI_DEVICE_ID_INTERG_5050:
541 global_control |= (ENDLP_IE | MIDLP_IE);
542 break;
543 default:
544 return 0;
545 }
546
547 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
548
549 pr_debug("trident: Enable Loop Interrupts, globctl = 0x%08X\n",
550 inl(TRID_REG(card, T4D_LFO_GC_CIR)));
551
552 return 1;
553 }
554
555 static int
556 trident_disable_loop_interrupts(struct trident_card *card)
557 {
558 u32 global_control;
559
560 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
561 global_control &= ~(ENDLP_IE | MIDLP_IE);
562 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
563
564 pr_debug("trident: Disabled Loop Interrupts, globctl = 0x%08X\n",
565 global_control);
566
567 return 1;
568 }
569
570 static void
571 trident_enable_voice_irq(struct trident_card *card, unsigned int channel)
572 {
573 unsigned int mask = 1 << (channel & 0x1f);
574 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
575 u32 reg, addr = bank->addresses->aint_en;
576
577 reg = inl(TRID_REG(card, addr));
578 reg |= mask;
579 outl(reg, TRID_REG(card, addr));
580
581 #ifdef DEBUG
582 reg = inl(TRID_REG(card, addr));
583 pr_debug("trident: enabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
584 channel, addr == T4D_AINTEN_B ? "AINTEN_B" : "AINTEN_A",
585 reg, addr);
586 #endif /* DEBUG */
587 }
588
589 static void
590 trident_disable_voice_irq(struct trident_card *card, unsigned int channel)
591 {
592 unsigned int mask = 1 << (channel & 0x1f);
593 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
594 u32 reg, addr = bank->addresses->aint_en;
595
596 reg = inl(TRID_REG(card, addr));
597 reg &= ~mask;
598 outl(reg, TRID_REG(card, addr));
599
600 /* Ack the channel in case the interrupt was set before we disable it. */
601 outl(mask, TRID_REG(card, bank->addresses->aint));
602
603 #ifdef DEBUG
604 reg = inl(TRID_REG(card, addr));
605 pr_debug("trident: disabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
606 channel, addr == T4D_AINTEN_B ? "AINTEN_B" : "AINTEN_A",
607 reg, addr);
608 #endif /* DEBUG */
609 }
610
611 static void
612 trident_start_voice(struct trident_card *card, unsigned int channel)
613 {
614 unsigned int mask = 1 << (channel & 0x1f);
615 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
616 u32 addr = bank->addresses->start;
617
618 #ifdef DEBUG
619 u32 reg;
620 #endif /* DEBUG */
621
622 outl(mask, TRID_REG(card, addr));
623
624 #ifdef DEBUG
625 reg = inl(TRID_REG(card, addr));
626 pr_debug("trident: start voice on channel %d, %s = 0x%08x(addr:%X)\n",
627 channel, addr == T4D_START_B ? "START_B" : "START_A",
628 reg, addr);
629 #endif /* DEBUG */
630 }
631
632 static void
633 trident_stop_voice(struct trident_card *card, unsigned int channel)
634 {
635 unsigned int mask = 1 << (channel & 0x1f);
636 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
637 u32 addr = bank->addresses->stop;
638
639 #ifdef DEBUG
640 u32 reg;
641 #endif /* DEBUG */
642
643 outl(mask, TRID_REG(card, addr));
644
645 #ifdef DEBUG
646 reg = inl(TRID_REG(card, addr));
647 pr_debug("trident: stop voice on channel %d, %s = 0x%08x(addr:%X)\n",
648 channel, addr == T4D_STOP_B ? "STOP_B" : "STOP_A",
649 reg, addr);
650 #endif /* DEBUG */
651 }
652
653 static u32
654 trident_get_interrupt_mask(struct trident_card *card, unsigned int channel)
655 {
656 struct trident_pcm_bank *bank = &card->banks[channel];
657 u32 addr = bank->addresses->aint;
658 return inl(TRID_REG(card, addr));
659 }
660
661 static int
662 trident_check_channel_interrupt(struct trident_card *card, unsigned int channel)
663 {
664 unsigned int mask = 1 << (channel & 0x1f);
665 u32 reg = trident_get_interrupt_mask(card, channel >> 5);
666
667 #ifdef DEBUG
668 if (reg & mask)
669 pr_debug("trident: channel %d has interrupt, %s = 0x%08x\n",
670 channel, reg == T4D_AINT_B ? "AINT_B" : "AINT_A",
671 reg);
672 #endif /* DEBUG */
673 return (reg & mask) ? 1 : 0;
674 }
675
676 static void
677 trident_ack_channel_interrupt(struct trident_card *card, unsigned int channel)
678 {
679 unsigned int mask = 1 << (channel & 0x1f);
680 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
681 u32 reg, addr = bank->addresses->aint;
682
683 reg = inl(TRID_REG(card, addr));
684 reg &= mask;
685 outl(reg, TRID_REG(card, addr));
686
687 #ifdef DEBUG
688 reg = inl(TRID_REG(card, T4D_AINT_B));
689 pr_debug("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n",
690 channel, reg);
691 #endif /* DEBUG */
692 }
693
694 static struct trident_channel *
695 trident_alloc_pcm_channel(struct trident_card *card)
696 {
697 struct trident_pcm_bank *bank;
698 int idx;
699
700 bank = &card->banks[BANK_B];
701
702 for (idx = 31; idx >= 0; idx--) {
703 if (!(bank->bitmap & (1 << idx))) {
704 struct trident_channel *channel = &bank->channels[idx];
705 bank->bitmap |= 1 << idx;
706 channel->num = idx + 32;
707 return channel;
708 }
709 }
710
711 /* no more free channels available */
712 printk(KERN_ERR "trident: no more channels available on Bank B.\n");
713 return NULL;
714 }
715
716 static void
717 trident_free_pcm_channel(struct trident_card *card, unsigned int channel)
718 {
719 int bank;
720 unsigned char b;
721
722 if (channel < 31 || channel > 63)
723 return;
724
725 if (card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_DX ||
726 card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_NX) {
727 b = inb(TRID_REG(card, T4D_REC_CH));
728 if ((b & ~0x80) == channel)
729 outb(0x0, TRID_REG(card, T4D_REC_CH));
730 }
731
732 bank = channel >> 5;
733 channel = channel & 0x1f;
734
735 card->banks[bank].bitmap &= ~(1 << (channel));
736 }
737
738 static struct trident_channel *
739 cyber_alloc_pcm_channel(struct trident_card *card)
740 {
741 struct trident_pcm_bank *bank;
742 int idx;
743
744 /* The cyberpro 5050 has only 32 voices and one bank */
745 /* .. at least they are not documented (if you want to call that
746 * crap documentation), perhaps broken ? */
747
748 bank = &card->banks[BANK_A];
749
750 for (idx = 31; idx >= 0; idx--) {
751 if (!(bank->bitmap & (1 << idx))) {
752 struct trident_channel *channel = &bank->channels[idx];
753 bank->bitmap |= 1 << idx;
754 channel->num = idx;
755 return channel;
756 }
757 }
758
759 /* no more free channels available */
760 printk(KERN_ERR "cyberpro5050: no more channels available on Bank A.\n");
761 return NULL;
762 }
763
764 static void
765 cyber_free_pcm_channel(struct trident_card *card, unsigned int channel)
766 {
767 if (channel > 31)
768 return;
769 card->banks[BANK_A].bitmap &= ~(1 << (channel));
770 }
771
772 static inline void
773 cyber_outidx(int port, int idx, int data)
774 {
775 outb(idx, port);
776 outb(data, port + 1);
777 }
778
779 static inline int
780 cyber_inidx(int port, int idx)
781 {
782 outb(idx, port);
783 return inb(port + 1);
784 }
785
786 static int
787 cyber_init_ritual(struct trident_card *card)
788 {
789 /* some black magic, taken from SDK samples */
790 /* remove this and nothing will work */
791 int portDat;
792 int ret = 0;
793 unsigned long flags;
794
795 /*
796 * Keep interrupts off for the configure - we don't want to
797 * clash with another cyberpro config event
798 */
799
800 spin_lock_irqsave(&card->lock, flags);
801 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
802 /* enable, if it was disabled */
803 if ((portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE) {
804 printk(KERN_INFO "cyberpro5050: enabling audio controller\n");
805 cyber_outidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE,
806 portDat | CYBER_BMSK_AUENZ_ENABLE);
807 /* check again if hardware is enabled now */
808 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
809 }
810 if ((portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE) {
811 printk(KERN_ERR "cyberpro5050: initAudioAccess: no success\n");
812 ret = -1;
813 } else {
814 cyber_outidx(CYBER_PORT_AUDIO, CYBER_IDX_IRQ_ENABLE,
815 CYBER_BMSK_AUDIO_INT_ENABLE);
816 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x01);
817 cyber_outidx(CYBER_PORT_AUDIO, 0xba, 0x20);
818 cyber_outidx(CYBER_PORT_AUDIO, 0xbb, 0x08);
819 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x02);
820 cyber_outidx(CYBER_PORT_AUDIO, 0xb3, 0x06);
821 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x00);
822 }
823 spin_unlock_irqrestore(&card->lock, flags);
824 return ret;
825 }
826
827 /* called with spin lock held */
828
829 static int
830 trident_load_channel_registers(struct trident_card *card, u32 * data,
831 unsigned int channel)
832 {
833 int i;
834
835 if (channel > 63)
836 return 0;
837
838 /* select hardware channel to write */
839 outb(channel, TRID_REG(card, T4D_LFO_GC_CIR));
840
841 /* Output the channel registers, but don't write register
842 three to an ALI chip. */
843 for (i = 0; i < CHANNEL_REGS; i++) {
844 if (i == 3 && card->pci_id == PCI_DEVICE_ID_ALI_5451)
845 continue;
846 outl(data[i], TRID_REG(card, CHANNEL_START + 4 * i));
847 }
848 if (card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
849 card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
850 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF1));
851 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF2));
852 }
853 return 1;
854 }
855
856 /* called with spin lock held */
857 static int
858 trident_write_voice_regs(struct trident_state *state)
859 {
860 unsigned int data[CHANNEL_REGS + 1];
861 struct trident_channel *channel;
862
863 channel = state->dmabuf.channel;
864
865 data[1] = channel->lba;
866 data[4] = channel->control;
867
868 switch (state->card->pci_id) {
869 case PCI_DEVICE_ID_ALI_5451:
870 data[0] = 0; /* Current Sample Offset */
871 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
872 data[3] = 0;
873 break;
874 case PCI_DEVICE_ID_SI_7018:
875 case PCI_DEVICE_ID_INTERG_5050:
876 data[0] = 0; /* Current Sample Offset */
877 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
878 data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff);
879 break;
880 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
881 data[0] = 0; /* Current Sample Offset */
882 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
883 data[3] = channel->fm_vol & 0xffff;
884 break;
885 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
886 data[0] = (channel->delta << 24);
887 data[2] = ((channel->delta << 16) & 0xff000000) |
888 (channel->eso & 0x00ffffff);
889 data[3] = channel->fm_vol & 0xffff;
890 break;
891 default:
892 return 0;
893 }
894
895 return trident_load_channel_registers(state->card, data, channel->num);
896 }
897
898 static int
899 compute_rate_play(u32 rate)
900 {
901 int delta;
902 /* We special case 44100 and 8000 since rounding with the equation
903 does not give us an accurate enough value. For 11025 and 22050
904 the equation gives us the best answer. All other frequencies will
905 also use the equation. JDW */
906 if (rate == 44100)
907 delta = 0xeb3;
908 else if (rate == 8000)
909 delta = 0x2ab;
910 else if (rate == 48000)
911 delta = 0x1000;
912 else
913 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
914 return delta;
915 }
916
917 static int
918 compute_rate_rec(u32 rate)
919 {
920 int delta;
921
922 if (rate == 44100)
923 delta = 0x116a;
924 else if (rate == 8000)
925 delta = 0x6000;
926 else if (rate == 48000)
927 delta = 0x1000;
928 else
929 delta = ((48000 << 12) / rate) & 0x0000ffff;
930
931 return delta;
932 }
933
934 /* set playback sample rate */
935 static unsigned int
936 trident_set_dac_rate(struct trident_state *state, unsigned int rate)
937 {
938 struct dmabuf *dmabuf = &state->dmabuf;
939
940 if (rate > 48000)
941 rate = 48000;
942 if (rate < 4000)
943 rate = 4000;
944
945 dmabuf->rate = rate;
946 dmabuf->channel->delta = compute_rate_play(rate);
947
948 trident_write_voice_regs(state);
949
950 pr_debug("trident: called trident_set_dac_rate : rate = %d\n", rate);
951
952 return rate;
953 }
954
955 /* set recording sample rate */
956 static unsigned int
957 trident_set_adc_rate(struct trident_state *state, unsigned int rate)
958 {
959 struct dmabuf *dmabuf = &state->dmabuf;
960
961 if (rate > 48000)
962 rate = 48000;
963 if (rate < 4000)
964 rate = 4000;
965
966 dmabuf->rate = rate;
967 dmabuf->channel->delta = compute_rate_rec(rate);
968
969 trident_write_voice_regs(state);
970
971 pr_debug("trident: called trident_set_adc_rate : rate = %d\n", rate);
972
973 return rate;
974 }
975
976 /* prepare channel attributes for playback */
977 static void
978 trident_play_setup(struct trident_state *state)
979 {
980 struct dmabuf *dmabuf = &state->dmabuf;
981 struct trident_channel *channel = dmabuf->channel;
982
983 channel->lba = dmabuf->dma_handle;
984 channel->delta = compute_rate_play(dmabuf->rate);
985
986 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
987 channel->eso -= 1;
988
989 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
990 channel->attribute = 0;
991 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451) {
992 if ((channel->num == ALI_SPDIF_IN_CHANNEL) ||
993 (channel->num == ALI_PCM_IN_CHANNEL))
994 ali_disable_special_channel(state->card, channel->num);
995 else if ((inl(TRID_REG(state->card, ALI_GLOBAL_CONTROL))
996 & ALI_SPDIF_OUT_CH_ENABLE)
997 && (channel->num == ALI_SPDIF_OUT_CHANNEL)) {
998 ali_set_spdif_out_rate(state->card,
999 state->dmabuf.rate);
1000 state->dmabuf.channel->delta = 0x1000;
1001 }
1002 }
1003 }
1004
1005 channel->fm_vol = 0x0;
1006
1007 channel->control = CHANNEL_LOOP;
1008 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
1009 /* 16-bits */
1010 channel->control |= CHANNEL_16BITS;
1011 /* signed */
1012 channel->control |= CHANNEL_SIGNED;
1013 }
1014 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
1015 /* stereo */
1016 channel->control |= CHANNEL_STEREO;
1017
1018 pr_debug("trident: trident_play_setup, LBA = 0x%08x, Delta = 0x%08x, "
1019 "ESO = 0x%08x, Control = 0x%08x\n", channel->lba,
1020 channel->delta, channel->eso, channel->control);
1021
1022 trident_write_voice_regs(state);
1023 }
1024
1025 /* prepare channel attributes for recording */
1026 static void
1027 trident_rec_setup(struct trident_state *state)
1028 {
1029 u16 w;
1030 u8 bval;
1031
1032 struct trident_card *card = state->card;
1033 struct dmabuf *dmabuf = &state->dmabuf;
1034 struct trident_channel *channel = dmabuf->channel;
1035 unsigned int rate;
1036
1037 /* Enable AC-97 ADC (capture) */
1038 switch (card->pci_id) {
1039 case PCI_DEVICE_ID_ALI_5451:
1040 ali_enable_special_channel(state);
1041 break;
1042 case PCI_DEVICE_ID_SI_7018:
1043 /* for 7018, the ac97 is always in playback/record (duplex) mode */
1044 break;
1045 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
1046 w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT));
1047 outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
1048 /* enable and set record channel */
1049 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
1050 break;
1051 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
1052 w = inw(TRID_REG(card, T4D_MISCINT));
1053 outw(w | 0x1000, TRID_REG(card, T4D_MISCINT));
1054 /* enable and set record channel */
1055 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
1056 break;
1057 case PCI_DEVICE_ID_INTERG_5050:
1058 /* don't know yet, using special channel 22 in GC1(0xd4)? */
1059 break;
1060 default:
1061 return;
1062 }
1063
1064 channel->lba = dmabuf->dma_handle;
1065 channel->delta = compute_rate_rec(dmabuf->rate);
1066 if ((card->pci_id == PCI_DEVICE_ID_ALI_5451) &&
1067 (channel->num == ALI_SPDIF_IN_CHANNEL)) {
1068 rate = ali_get_spdif_in_rate(card);
1069 if (rate == 0) {
1070 printk(KERN_WARNING "trident: ALi 5451 "
1071 "S/PDIF input setup error!\n");
1072 rate = 48000;
1073 }
1074 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
1075 if (bval & 0x10) {
1076 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
1077 printk(KERN_WARNING "trident: cleared ALi "
1078 "5451 S/PDIF parity error flag.\n");
1079 }
1080
1081 if (rate != 48000)
1082 channel->delta = ((rate << 12) / dmabuf->rate) & 0x0000ffff;
1083 }
1084
1085 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
1086 channel->eso -= 1;
1087
1088 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
1089 channel->attribute = 0;
1090 }
1091
1092 channel->fm_vol = 0x0;
1093
1094 channel->control = CHANNEL_LOOP;
1095 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
1096 /* 16-bits */
1097 channel->control |= CHANNEL_16BITS;
1098 /* signed */
1099 channel->control |= CHANNEL_SIGNED;
1100 }
1101 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
1102 /* stereo */
1103 channel->control |= CHANNEL_STEREO;
1104
1105 pr_debug("trident: trident_rec_setup, LBA = 0x%08x, Delat = 0x%08x, "
1106 "ESO = 0x%08x, Control = 0x%08x\n", channel->lba,
1107 channel->delta, channel->eso, channel->control);
1108
1109 trident_write_voice_regs(state);
1110 }
1111
1112 /* get current playback/recording dma buffer pointer (byte offset from LBA),
1113 called with spinlock held! */
1114 static inline unsigned
1115 trident_get_dma_addr(struct trident_state *state)
1116 {
1117 struct dmabuf *dmabuf = &state->dmabuf;
1118 u32 cso;
1119
1120 if (!dmabuf->enable)
1121 return 0;
1122
1123 outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR));
1124
1125 switch (state->card->pci_id) {
1126 case PCI_DEVICE_ID_ALI_5451:
1127 case PCI_DEVICE_ID_SI_7018:
1128 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
1129 case PCI_DEVICE_ID_INTERG_5050:
1130 /* 16 bits ESO, CSO for 7018 and DX */
1131 cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2));
1132 break;
1133 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
1134 /* 24 bits ESO, CSO for NX */
1135 cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
1136 break;
1137 default:
1138 return 0;
1139 }
1140
1141 pr_debug("trident: trident_get_dma_addr: chip reported channel: %d, "
1142 "cso = 0x%04x\n", dmabuf->channel->num, cso);
1143
1144 /* ESO and CSO are in units of Samples, convert to byte offset */
1145 cso <<= sample_shift[dmabuf->fmt];
1146
1147 return (cso % dmabuf->dmasize);
1148 }
1149
1150 /* Stop recording (lock held) */
1151 static inline void
1152 __stop_adc(struct trident_state *state)
1153 {
1154 struct dmabuf *dmabuf = &state->dmabuf;
1155 unsigned int chan_num = dmabuf->channel->num;
1156 struct trident_card *card = state->card;
1157
1158 dmabuf->enable &= ~ADC_RUNNING;
1159 trident_stop_voice(card, chan_num);
1160 trident_disable_voice_irq(card, chan_num);
1161 }
1162
1163 static void
1164 stop_adc(struct trident_state *state)
1165 {
1166 struct trident_card *card = state->card;
1167 unsigned long flags;
1168
1169 spin_lock_irqsave(&card->lock, flags);
1170 __stop_adc(state);
1171 spin_unlock_irqrestore(&card->lock, flags);
1172 }
1173
1174 static void
1175 start_adc(struct trident_state *state)
1176 {
1177 struct dmabuf *dmabuf = &state->dmabuf;
1178 unsigned int chan_num = dmabuf->channel->num;
1179 struct trident_card *card = state->card;
1180 unsigned long flags;
1181
1182 spin_lock_irqsave(&card->lock, flags);
1183 if ((dmabuf->mapped ||
1184 dmabuf->count < (signed) dmabuf->dmasize) &&
1185 dmabuf->ready) {
1186 dmabuf->enable |= ADC_RUNNING;
1187 trident_enable_voice_irq(card, chan_num);
1188 trident_start_voice(card, chan_num);
1189 }
1190 spin_unlock_irqrestore(&card->lock, flags);
1191 }
1192
1193 /* stop playback (lock held) */
1194 static inline void
1195 __stop_dac(struct trident_state *state)
1196 {
1197 struct dmabuf *dmabuf = &state->dmabuf;
1198 unsigned int chan_num = dmabuf->channel->num;
1199 struct trident_card *card = state->card;
1200
1201 dmabuf->enable &= ~DAC_RUNNING;
1202 trident_stop_voice(card, chan_num);
1203 if (state->chans_num == 6) {
1204 trident_stop_voice(card, state->other_states[0]->
1205 dmabuf.channel->num);
1206 trident_stop_voice(card, state->other_states[1]->
1207 dmabuf.channel->num);
1208 trident_stop_voice(card, state->other_states[2]->
1209 dmabuf.channel->num);
1210 trident_stop_voice(card, state->other_states[3]->
1211 dmabuf.channel->num);
1212 }
1213 trident_disable_voice_irq(card, chan_num);
1214 }
1215
1216 static void
1217 stop_dac(struct trident_state *state)
1218 {
1219 struct trident_card *card = state->card;
1220 unsigned long flags;
1221
1222 spin_lock_irqsave(&card->lock, flags);
1223 __stop_dac(state);
1224 spin_unlock_irqrestore(&card->lock, flags);
1225 }
1226
1227 static void
1228 start_dac(struct trident_state *state)
1229 {
1230 struct dmabuf *dmabuf = &state->dmabuf;
1231 unsigned int chan_num = dmabuf->channel->num;
1232 struct trident_card *card = state->card;
1233 unsigned long flags;
1234
1235 spin_lock_irqsave(&card->lock, flags);
1236 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
1237 dmabuf->enable |= DAC_RUNNING;
1238 trident_enable_voice_irq(card, chan_num);
1239 trident_start_voice(card, chan_num);
1240 if (state->chans_num == 6) {
1241 trident_start_voice(card, state->other_states[0]->
1242 dmabuf.channel->num);
1243 trident_start_voice(card, state->other_states[1]->
1244 dmabuf.channel->num);
1245 trident_start_voice(card, state->other_states[2]->
1246 dmabuf.channel->num);
1247 trident_start_voice(card, state->other_states[3]->
1248 dmabuf.channel->num);
1249 }
1250 }
1251 spin_unlock_irqrestore(&card->lock, flags);
1252 }
1253
1254 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
1255 #define DMABUF_MINORDER 1
1256
1257 /* alloc a DMA buffer of with a buffer of this order */
1258 static int
1259 alloc_dmabuf(struct dmabuf *dmabuf, struct pci_dev *pci_dev, int order)
1260 {
1261 void *rawbuf = NULL;
1262 struct page *page, *pend;
1263
1264 if (!(rawbuf = pci_alloc_consistent(pci_dev, PAGE_SIZE << order,
1265 &dmabuf->dma_handle)))
1266 return -ENOMEM;
1267
1268 pr_debug("trident: allocated %ld (order = %d) bytes at %p\n",
1269 PAGE_SIZE << order, order, rawbuf);
1270
1271 dmabuf->ready = dmabuf->mapped = 0;
1272 dmabuf->rawbuf = rawbuf;
1273 dmabuf->buforder = order;
1274
1275 /* now mark the pages as reserved; otherwise */
1276 /* remap_pfn_range doesn't do what we want */
1277 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
1278 for (page = virt_to_page(rawbuf); page <= pend; page++)
1279 SetPageReserved(page);
1280
1281 return 0;
1282 }
1283
1284 /* allocate the main DMA buffer, playback and recording buffer should be */
1285 /* allocated separately */
1286 static int
1287 alloc_main_dmabuf(struct trident_state *state)
1288 {
1289 struct dmabuf *dmabuf = &state->dmabuf;
1290 int order;
1291 int ret = -ENOMEM;
1292
1293 /* alloc as big a chunk as we can, FIXME: is this necessary ?? */
1294 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) {
1295 if (!(ret = alloc_dmabuf(dmabuf, state->card->pci_dev, order)))
1296 return 0;
1297 /* else try again */
1298 }
1299 return ret;
1300 }
1301
1302 /* deallocate a DMA buffer */
1303 static void
1304 dealloc_dmabuf(struct dmabuf *dmabuf, struct pci_dev *pci_dev)
1305 {
1306 struct page *page, *pend;
1307
1308 if (dmabuf->rawbuf) {
1309 /* undo marking the pages as reserved */
1310 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
1311 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
1312 ClearPageReserved(page);
1313 pci_free_consistent(pci_dev, PAGE_SIZE << dmabuf->buforder,
1314 dmabuf->rawbuf, dmabuf->dma_handle);
1315 dmabuf->rawbuf = NULL;
1316 }
1317 dmabuf->mapped = dmabuf->ready = 0;
1318 }
1319
1320 static int
1321 prog_dmabuf(struct trident_state *state, enum dmabuf_mode rec)
1322 {
1323 struct dmabuf *dmabuf = &state->dmabuf;
1324 unsigned bytepersec;
1325 struct trident_state *s = state;
1326 unsigned bufsize, dma_nums;
1327 unsigned long flags;
1328 int ret, i, order;
1329
1330 if ((ret = lock_set_fmt(state)) < 0)
1331 return ret;
1332
1333 if (state->chans_num == 6)
1334 dma_nums = 5;
1335 else
1336 dma_nums = 1;
1337
1338 for (i = 0; i < dma_nums; i++) {
1339 if (i > 0) {
1340 s = state->other_states[i - 1];
1341 dmabuf = &s->dmabuf;
1342 dmabuf->fmt = state->dmabuf.fmt;
1343 dmabuf->rate = state->dmabuf.rate;
1344 }
1345
1346 spin_lock_irqsave(&s->card->lock, flags);
1347 dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0;
1348 dmabuf->count = dmabuf->error = 0;
1349 spin_unlock_irqrestore(&s->card->lock, flags);
1350
1351 /* allocate DMA buffer if not allocated yet */
1352 if (!dmabuf->rawbuf) {
1353 if (i == 0) {
1354 if ((ret = alloc_main_dmabuf(state))) {
1355 unlock_set_fmt(state);
1356 return ret;
1357 }
1358 } else {
1359 ret = -ENOMEM;
1360 order = state->dmabuf.buforder - 1;
1361 if (order >= DMABUF_MINORDER) {
1362 ret = alloc_dmabuf(dmabuf,
1363 state->card->pci_dev,
1364 order);
1365 }
1366 if (ret) {
1367 /* release the main DMA buffer */
1368 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
1369 /* release the auxiliary DMA buffers */
1370 for (i -= 2; i >= 0; i--)
1371 dealloc_dmabuf(&state->other_states[i]->dmabuf,
1372 state->card->pci_dev);
1373 unlock_set_fmt(state);
1374 return ret;
1375 }
1376 }
1377 }
1378 /* FIXME: figure out all this OSS fragment stuff */
1379 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
1380 bufsize = PAGE_SIZE << dmabuf->buforder;
1381 if (dmabuf->ossfragshift) {
1382 if ((1000 << dmabuf->ossfragshift) < bytepersec)
1383 dmabuf->fragshift = ld2(bytepersec / 1000);
1384 else
1385 dmabuf->fragshift = dmabuf->ossfragshift;
1386 } else {
1387 /* lets hand out reasonable big ass buffers by default */
1388 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT - 2);
1389 }
1390 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1391 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
1392 dmabuf->fragshift--;
1393 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1394 }
1395 dmabuf->fragsize = 1 << dmabuf->fragshift;
1396 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
1397 dmabuf->numfrag = dmabuf->ossmaxfrags;
1398 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
1399 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
1400
1401 memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80,
1402 dmabuf->dmasize);
1403
1404 spin_lock_irqsave(&s->card->lock, flags);
1405 if (rec == DM_RECORD)
1406 trident_rec_setup(s);
1407 else /* DM_PLAYBACK */
1408 trident_play_setup(s);
1409
1410 spin_unlock_irqrestore(&s->card->lock, flags);
1411
1412 /* set the ready flag for the dma buffer */
1413 dmabuf->ready = 1;
1414
1415 pr_debug("trident: prog_dmabuf(%d), sample rate = %d, "
1416 "format = %d, numfrag = %d, fragsize = %d "
1417 "dmasize = %d\n", dmabuf->channel->num,
1418 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1419 dmabuf->fragsize, dmabuf->dmasize);
1420 }
1421 unlock_set_fmt(state);
1422 return 0;
1423 }
1424
1425
1426 static inline int prog_dmabuf_record(struct trident_state* state)
1427 {
1428 return prog_dmabuf(state, DM_RECORD);
1429 }
1430
1431 static inline int prog_dmabuf_playback(struct trident_state* state)
1432 {
1433 return prog_dmabuf(state, DM_PLAYBACK);
1434 }
1435
1436 /* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e.
1437 |------------|------------| or |xxxxxxxxxxxx|------------| or |xxxxxxxxxxxx|xxxxxxxxxxxx|
1438 but we almost always get this
1439 |xxxxxx------|------------| or |xxxxxxxxxxxx|xxxxx-------|
1440 so we have to clear the tail space to "silence"
1441 |xxxxxx000000|------------| or |xxxxxxxxxxxx|xxxxxx000000|
1442 */
1443 static void
1444 trident_clear_tail(struct trident_state *state)
1445 {
1446 struct dmabuf *dmabuf = &state->dmabuf;
1447 unsigned swptr;
1448 unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80;
1449 unsigned int len;
1450 unsigned long flags;
1451
1452 spin_lock_irqsave(&state->card->lock, flags);
1453 swptr = dmabuf->swptr;
1454 spin_unlock_irqrestore(&state->card->lock, flags);
1455
1456 if (swptr == 0 || swptr == dmabuf->dmasize / 2 ||
1457 swptr == dmabuf->dmasize)
1458 return;
1459
1460 if (swptr < dmabuf->dmasize / 2)
1461 len = dmabuf->dmasize / 2 - swptr;
1462 else
1463 len = dmabuf->dmasize - swptr;
1464
1465 memset(dmabuf->rawbuf + swptr, silence, len);
1466 if (state->card->pci_id != PCI_DEVICE_ID_ALI_5451) {
1467 spin_lock_irqsave(&state->card->lock, flags);
1468 dmabuf->swptr += len;
1469 dmabuf->count += len;
1470 spin_unlock_irqrestore(&state->card->lock, flags);
1471 }
1472
1473 /* restart the dma machine in case it is halted */
1474 start_dac(state);
1475 }
1476
1477 static int
1478 drain_dac(struct trident_state *state, int nonblock)
1479 {
1480 DECLARE_WAITQUEUE(wait, current);
1481 struct dmabuf *dmabuf = &state->dmabuf;
1482 unsigned long flags;
1483 unsigned long tmo;
1484 int count;
1485 unsigned long diff = 0;
1486
1487 if (dmabuf->mapped || !dmabuf->ready)
1488 return 0;
1489
1490 add_wait_queue(&dmabuf->wait, &wait);
1491 for (;;) {
1492 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
1493 every time to make the process really go to sleep */
1494 set_current_state(TASK_INTERRUPTIBLE);
1495
1496 spin_lock_irqsave(&state->card->lock, flags);
1497 count = dmabuf->count;
1498 spin_unlock_irqrestore(&state->card->lock, flags);
1499
1500 if (count <= 0)
1501 break;
1502
1503 if (signal_pending(current))
1504 break;
1505
1506 if (nonblock) {
1507 remove_wait_queue(&dmabuf->wait, &wait);
1508 set_current_state(TASK_RUNNING);
1509 return -EBUSY;
1510 }
1511
1512 /* No matter how much data is left in the buffer, we have to wait until
1513 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1514 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
1515 state->card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
1516 diff = dmabuf->swptr - trident_get_dma_addr(state) + dmabuf->dmasize;
1517 diff = diff % (dmabuf->dmasize);
1518 tmo = (diff * HZ) / dmabuf->rate;
1519 } else {
1520 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
1521 }
1522 tmo >>= sample_shift[dmabuf->fmt];
1523 if (!schedule_timeout(tmo ? tmo : 1) && tmo) {
1524 break;
1525 }
1526 }
1527 remove_wait_queue(&dmabuf->wait, &wait);
1528 set_current_state(TASK_RUNNING);
1529 if (signal_pending(current))
1530 return -ERESTARTSYS;
1531
1532 return 0;
1533 }
1534
1535 /* update buffer manangement pointers, especially, */
1536 /* dmabuf->count and dmabuf->hwptr */
1537 static void
1538 trident_update_ptr(struct trident_state *state)
1539 {
1540 struct dmabuf *dmabuf = &state->dmabuf;
1541 unsigned hwptr, swptr;
1542 int clear_cnt = 0;
1543 int diff;
1544 unsigned char silence;
1545 unsigned half_dmasize;
1546
1547 /* update hardware pointer */
1548 hwptr = trident_get_dma_addr(state);
1549 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1550 dmabuf->hwptr = hwptr;
1551 dmabuf->total_bytes += diff;
1552
1553 /* error handling and process wake up for ADC */
1554 if (dmabuf->enable == ADC_RUNNING) {
1555 if (dmabuf->mapped) {
1556 dmabuf->count -= diff;
1557 if (dmabuf->count >= (signed) dmabuf->fragsize)
1558 wake_up(&dmabuf->wait);
1559 } else {
1560 dmabuf->count += diff;
1561
1562 if (dmabuf->count < 0 ||
1563 dmabuf->count > dmabuf->dmasize) {
1564 /* buffer underrun or buffer overrun, */
1565 /* we have no way to recover it here, just */
1566 /* stop the machine and let the process */
1567 /* force hwptr and swptr to sync */
1568 __stop_adc(state);
1569 dmabuf->error++;
1570 }
1571 if (dmabuf->count < (signed) dmabuf->dmasize / 2)
1572 wake_up(&dmabuf->wait);
1573 }
1574 }
1575
1576 /* error handling and process wake up for DAC */
1577 if (dmabuf->enable == DAC_RUNNING) {
1578 if (dmabuf->mapped) {
1579 dmabuf->count += diff;
1580 if (dmabuf->count >= (signed) dmabuf->fragsize)
1581 wake_up(&dmabuf->wait);
1582 } else {
1583 dmabuf->count -= diff;
1584
1585 if (dmabuf->count < 0 ||
1586 dmabuf->count > dmabuf->dmasize) {
1587 /* buffer underrun or buffer overrun, we have no way to recover
1588 it here, just stop the machine and let the process force hwptr
1589 and swptr to sync */
1590 __stop_dac(state);
1591 dmabuf->error++;
1592 } else if (!dmabuf->endcleared) {
1593 swptr = dmabuf->swptr;
1594 silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80);
1595 if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) {
1596 /* We must clear end data of 1/2 dmabuf if needed.
1597 According to 1/2 algorithm of Address Engine Interrupt,
1598 check the validation of the data of half dmasize. */
1599 half_dmasize = dmabuf->dmasize / 2;
1600 if ((diff = hwptr - half_dmasize) < 0)
1601 diff = hwptr;
1602 if ((dmabuf->count + diff) < half_dmasize) {
1603 //there is invalid data in the end of half buffer
1604 if ((clear_cnt = half_dmasize - swptr) < 0)
1605 clear_cnt += half_dmasize;
1606 //clear the invalid data
1607 memset(dmabuf->rawbuf + swptr, silence, clear_cnt);
1608 if (state->chans_num == 6) {
1609 clear_cnt = clear_cnt / 2;
1610 swptr = swptr / 2;
1611 memset(state->other_states[0]->dmabuf.rawbuf + swptr,
1612 silence, clear_cnt);
1613 memset(state->other_states[1]->dmabuf.rawbuf + swptr,
1614 silence, clear_cnt);
1615 memset(state->other_states[2]->dmabuf.rawbuf + swptr,
1616 silence, clear_cnt);
1617 memset(state->other_states[3]->dmabuf.rawbuf + swptr,
1618 silence, clear_cnt);
1619 }
1620 dmabuf->endcleared = 1;
1621 }
1622 } else if (dmabuf->count < (signed) dmabuf->fragsize) {
1623 clear_cnt = dmabuf->fragsize;
1624 if ((swptr + clear_cnt) > dmabuf->dmasize)
1625 clear_cnt = dmabuf->dmasize - swptr;
1626 memset(dmabuf->rawbuf + swptr, silence, clear_cnt);
1627 if (state->chans_num == 6) {
1628 clear_cnt = clear_cnt / 2;
1629 swptr = swptr / 2;
1630 memset(state->other_states[0]->dmabuf.rawbuf + swptr,
1631 silence, clear_cnt);
1632 memset(state->other_states[1]->dmabuf.rawbuf + swptr,
1633 silence, clear_cnt);
1634 memset(state->other_states[2]->dmabuf.rawbuf + swptr,
1635 silence, clear_cnt);
1636 memset(state->other_states[3]->dmabuf.rawbuf + swptr,
1637 silence, clear_cnt);
1638 }
1639 dmabuf->endcleared = 1;
1640 }
1641 }
1642 /* trident_update_ptr is called by interrupt handler or by process via
1643 ioctl/poll, we only wake up the waiting process when we have more
1644 than 1/2 buffer free (always true for interrupt handler) */
1645 if (dmabuf->count < (signed) dmabuf->dmasize / 2)
1646 wake_up(&dmabuf->wait);
1647 }
1648 }
1649 dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE;
1650 }
1651
1652 static void
1653 trident_address_interrupt(struct trident_card *card)
1654 {
1655 int i;
1656 struct trident_state *state;
1657 unsigned int channel;
1658
1659 /* Update the pointers for all channels we are running. */
1660 /* FIXME: should read interrupt status only once */
1661 for (i = 0; i < NR_HW_CH; i++) {
1662 channel = 63 - i;
1663 if (trident_check_channel_interrupt(card, channel)) {
1664 trident_ack_channel_interrupt(card, channel);
1665 if ((state = card->states[i]) != NULL) {
1666 trident_update_ptr(state);
1667 } else {
1668 printk(KERN_WARNING "trident: spurious channel "
1669 "irq %d.\n", channel);
1670 trident_stop_voice(card, channel);
1671 trident_disable_voice_irq(card, channel);
1672 }
1673 }
1674 }
1675 }
1676
1677 static void
1678 ali_hwvol_control(struct trident_card *card, int opt)
1679 {
1680 u16 dwTemp, volume[2], mute, diff, *pVol[2];
1681
1682 dwTemp = ali_ac97_read(card->ac97_codec[0], 0x02);
1683 mute = dwTemp & 0x8000;
1684 volume[0] = dwTemp & 0x001f;
1685 volume[1] = (dwTemp & 0x1f00) >> 8;
1686 if (volume[0] < volume[1]) {
1687 pVol[0] = &volume[0];
1688 pVol[1] = &volume[1];
1689 } else {
1690 pVol[1] = &volume[0];
1691 pVol[0] = &volume[1];
1692 }
1693 diff = *(pVol[1]) - *(pVol[0]);
1694
1695 if (opt == 1) { // MUTE
1696 dwTemp ^= 0x8000;
1697 ali_ac97_write(card->ac97_codec[0],
1698 0x02, dwTemp);
1699 } else if (opt == 2) { // Down
1700 if (mute)
1701 return;
1702 if (*(pVol[1]) < 0x001f) {
1703 (*pVol[1])++;
1704 *(pVol[0]) = *(pVol[1]) - diff;
1705 }
1706 dwTemp &= 0xe0e0;
1707 dwTemp |= (volume[0]) | (volume[1] << 8);
1708 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1709 card->ac97_codec[0]->mixer_state[0] = ((32 - volume[0]) * 25 / 8) |
1710 (((32 - volume[1]) * 25 / 8) << 8);
1711 } else if (opt == 4) { // Up
1712 if (mute)
1713 return;
1714 if (*(pVol[0]) > 0) {
1715 (*pVol[0])--;
1716 *(pVol[1]) = *(pVol[0]) + diff;
1717 }
1718 dwTemp &= 0xe0e0;
1719 dwTemp |= (volume[0]) | (volume[1] << 8);
1720 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1721 card->ac97_codec[0]->mixer_state[0] = ((32 - volume[0]) * 25 / 8) |
1722 (((32 - volume[1]) * 25 / 8) << 8);
1723 } else {
1724 /* Nothing needs doing */
1725 }
1726 }
1727
1728 /*
1729 * Re-enable reporting of vol change after 0.1 seconds
1730 */
1731
1732 static void
1733 ali_timeout(unsigned long ptr)
1734 {
1735 struct trident_card *card = (struct trident_card *) ptr;
1736 u16 temp = 0;
1737
1738 /* Enable GPIO IRQ (MISCINT bit 18h) */
1739 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
1740 temp |= 0x0004;
1741 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
1742 }
1743
1744 /*
1745 * Set up the timer to clear the vol change notification
1746 */
1747
1748 static void
1749 ali_set_timer(struct trident_card *card)
1750 {
1751 /* Add Timer Routine to Enable GPIO IRQ */
1752 del_timer(&card->timer); /* Never queue twice */
1753 card->timer.function = ali_timeout;
1754 card->timer.data = (unsigned long) card;
1755 card->timer.expires = jiffies + HZ / 10;
1756 add_timer(&card->timer);
1757 }
1758
1759 /*
1760 * Process a GPIO event
1761 */
1762
1763 static void
1764 ali_queue_task(struct trident_card *card, int opt)
1765 {
1766 u16 temp;
1767
1768 /* Disable GPIO IRQ (MISCINT bit 18h) */
1769 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
1770 temp &= (u16) (~0x0004);
1771 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
1772
1773 /* Adjust the volume */
1774 ali_hwvol_control(card, opt);
1775
1776 /* Set the timer for 1/10th sec */
1777 ali_set_timer(card);
1778 }
1779
1780 static void
1781 cyber_address_interrupt(struct trident_card *card)
1782 {
1783 int i, irq_status;
1784 struct trident_state *state;
1785 unsigned int channel;
1786
1787 /* Update the pointers for all channels we are running. */
1788 /* FIXED: read interrupt status only once */
1789 irq_status = inl(TRID_REG(card, T4D_AINT_A));
1790
1791 pr_debug("cyber_address_interrupt: irq_status 0x%X\n", irq_status);
1792
1793 for (i = 0; i < NR_HW_CH; i++) {
1794 channel = 31 - i;
1795 if (irq_status & (1 << channel)) {
1796 /* clear bit by writing a 1, zeroes are ignored */
1797 outl((1 << channel), TRID_REG(card, T4D_AINT_A));
1798
1799 pr_debug("cyber_interrupt: channel %d\n", channel);
1800
1801 if ((state = card->states[i]) != NULL) {
1802 trident_update_ptr(state);
1803 } else {
1804 printk(KERN_WARNING "cyber5050: spurious "
1805 "channel irq %d.\n", channel);
1806 trident_stop_voice(card, channel);
1807 trident_disable_voice_irq(card, channel);
1808 }
1809 }
1810 }
1811 }
1812
1813 static irqreturn_t
1814 trident_interrupt(int irq, void *dev_id)
1815 {
1816 struct trident_card *card = (struct trident_card *) dev_id;
1817 u32 event;
1818 u32 gpio;
1819
1820 spin_lock(&card->lock);
1821 event = inl(TRID_REG(card, T4D_MISCINT));
1822
1823 pr_debug("trident: trident_interrupt called, MISCINT = 0x%08x\n",
1824 event);
1825
1826 if (event & ADDRESS_IRQ) {
1827 card->address_interrupt(card);
1828 }
1829
1830 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
1831 /* GPIO IRQ (H/W Volume Control) */
1832 event = inl(TRID_REG(card, T4D_MISCINT));
1833 if (event & (1 << 25)) {
1834 gpio = inl(TRID_REG(card, ALI_GPIO));
1835 if (!timer_pending(&card->timer))
1836 ali_queue_task(card, gpio & 0x07);
1837 }
1838 event = inl(TRID_REG(card, T4D_MISCINT));
1839 outl(event | (ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
1840 TRID_REG(card, T4D_MISCINT));
1841 spin_unlock(&card->lock);
1842 return IRQ_HANDLED;
1843 }
1844
1845 /* manually clear interrupt status, bad hardware design, blame T^2 */
1846 outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
1847 TRID_REG(card, T4D_MISCINT));
1848 spin_unlock(&card->lock);
1849 return IRQ_HANDLED;
1850 }
1851
1852 /* in this loop, dmabuf.count signifies the amount of data that is waiting */
1853 /* to be copied to the user's buffer. it is filled by the dma machine and */
1854 /* drained by this loop. */
1855 static ssize_t
1856 trident_read(struct file *file, char __user *buffer, size_t count, loff_t * ppos)
1857 {
1858 struct trident_state *state = (struct trident_state *)file->private_data;
1859 struct dmabuf *dmabuf = &state->dmabuf;
1860 ssize_t ret = 0;
1861 unsigned long flags;
1862 unsigned swptr;
1863 int cnt;
1864
1865 pr_debug("trident: trident_read called, count = %zd\n", count);
1866
1867 VALIDATE_STATE(state);
1868
1869 if (dmabuf->mapped)
1870 return -ENXIO;
1871 if (!access_ok(VERIFY_WRITE, buffer, count))
1872 return -EFAULT;
1873
1874 mutex_lock(&state->sem);
1875 if (!dmabuf->ready && (ret = prog_dmabuf_record(state)))
1876 goto out;
1877
1878 while (count > 0) {
1879 spin_lock_irqsave(&state->card->lock, flags);
1880 if (dmabuf->count > (signed) dmabuf->dmasize) {
1881 /* buffer overrun, we are recovering from */
1882 /* sleep_on_timeout, resync hwptr and swptr, */
1883 /* make process flush the buffer */
1884 dmabuf->count = dmabuf->dmasize;
1885 dmabuf->swptr = dmabuf->hwptr;
1886 }
1887 swptr = dmabuf->swptr;
1888 cnt = dmabuf->dmasize - swptr;
1889 if (dmabuf->count < cnt)
1890 cnt = dmabuf->count;
1891 spin_unlock_irqrestore(&state->card->lock, flags);
1892
1893 if (cnt > count)
1894 cnt = count;
1895 if (cnt <= 0) {
1896 unsigned long tmo;
1897 /* buffer is empty, start the dma machine and */
1898 /* wait for data to be recorded */
1899 start_adc(state);
1900 if (file->f_flags & O_NONBLOCK) {
1901 if (!ret)
1902 ret = -EAGAIN;
1903 goto out;
1904 }
1905
1906 mutex_unlock(&state->sem);
1907 /* No matter how much space left in the buffer, */
1908 /* we have to wait until CSO == ESO/2 or CSO == ESO */
1909 /* when address engine interrupts */
1910 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1911 tmo >>= sample_shift[dmabuf->fmt];
1912 /* There are two situations when sleep_on_timeout returns, one is when
1913 the interrupt is serviced correctly and the process is waked up by
1914 ISR ON TIME. Another is when timeout is expired, which means that
1915 either interrupt is NOT serviced correctly (pending interrupt) or it
1916 is TOO LATE for the process to be scheduled to run (scheduler latency)
1917 which results in a (potential) buffer overrun. And worse, there is
1918 NOTHING we can do to prevent it. */
1919 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1920 pr_debug(KERN_ERR "trident: recording schedule timeout, "
1921 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1922 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1923 dmabuf->hwptr, dmabuf->swptr);
1924
1925 /* a buffer overrun, we delay the recovery until next time the
1926 while loop begin and we REALLY have space to record */
1927 }
1928 if (signal_pending(current)) {
1929 if (!ret)
1930 ret = -ERESTARTSYS;
1931 goto out;
1932 }
1933 mutex_lock(&state->sem);
1934 if (dmabuf->mapped) {
1935 if (!ret)
1936 ret = -ENXIO;
1937 goto out;
1938 }
1939 continue;
1940 }
1941
1942 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1943 if (!ret)
1944 ret = -EFAULT;
1945 goto out;
1946 }
1947
1948 swptr = (swptr + cnt) % dmabuf->dmasize;
1949
1950 spin_lock_irqsave(&state->card->lock, flags);
1951 dmabuf->swptr = swptr;
1952 dmabuf->count -= cnt;
1953 spin_unlock_irqrestore(&state->card->lock, flags);
1954
1955 count -= cnt;
1956 buffer += cnt;
1957 ret += cnt;
1958 start_adc(state);
1959 }
1960 out:
1961 mutex_unlock(&state->sem);
1962 return ret;
1963 }
1964
1965 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1966 the soundcard. it is drained by the dma machine and filled by this loop. */
1967
1968 static ssize_t
1969 trident_write(struct file *file, const char __user *buffer, size_t count, loff_t * ppos)
1970 {
1971 struct trident_state *state = (struct trident_state *)file->private_data;
1972 struct dmabuf *dmabuf = &state->dmabuf;
1973 ssize_t ret;
1974 unsigned long flags;
1975 unsigned swptr;
1976 int cnt;
1977 unsigned int state_cnt;
1978 unsigned int copy_count;
1979 int lret; /* for lock_set_fmt */
1980
1981 pr_debug("trident: trident_write called, count = %zd\n", count);
1982
1983 VALIDATE_STATE(state);
1984
1985 /*
1986 * Guard against an mmap or ioctl while writing
1987 */
1988
1989 mutex_lock(&state->sem);
1990
1991 if (dmabuf->mapped) {
1992 ret = -ENXIO;
1993 goto out;
1994 }
1995 if (!dmabuf->ready && (ret = prog_dmabuf_playback(state)))
1996 goto out;
1997
1998 if (!access_ok(VERIFY_READ, buffer, count)) {
1999 ret = -EFAULT;
2000 goto out;
2001 }
2002
2003 ret = 0;
2004
2005 while (count > 0) {
2006 spin_lock_irqsave(&state->card->lock, flags);
2007 if (dmabuf->count < 0) {
2008 /* buffer underrun, we are recovering from */
2009 /* sleep_on_timeout, resync hwptr and swptr */
2010 dmabuf->count = 0;
2011 dmabuf->swptr = dmabuf->hwptr;
2012 }
2013 swptr = dmabuf->swptr;
2014 cnt = dmabuf->dmasize - swptr;
2015 if (dmabuf->count + cnt > dmabuf->dmasize)
2016 cnt = dmabuf->dmasize - dmabuf->count;
2017 spin_unlock_irqrestore(&state->card->lock, flags);
2018
2019 if (cnt > count)
2020 cnt = count;
2021 if (cnt <= 0) {
2022 unsigned long tmo;
2023 /* buffer is full, start the dma machine and */
2024 /* wait for data to be played */
2025 start_dac(state);
2026 if (file->f_flags & O_NONBLOCK) {
2027 if (!ret)
2028 ret = -EAGAIN;
2029 goto out;
2030 }
2031 /* No matter how much data left in the buffer, */
2032 /* we have to wait until CSO == ESO/2 or CSO == ESO */
2033 /* when address engine interrupts */
2034 lock_set_fmt(state);
2035 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
2036 tmo >>= sample_shift[dmabuf->fmt];
2037 unlock_set_fmt(state);
2038 mutex_unlock(&state->sem);
2039
2040 /* There are two situations when sleep_on_timeout */
2041 /* returns, one is when the interrupt is serviced */
2042 /* correctly and the process is waked up by ISR */
2043 /* ON TIME. Another is when timeout is expired, which */
2044 /* means that either interrupt is NOT serviced */
2045 /* correctly (pending interrupt) or it is TOO LATE */
2046 /* for the process to be scheduled to run */
2047 /* (scheduler latency) which results in a (potential) */
2048 /* buffer underrun. And worse, there is NOTHING we */
2049 /* can do to prevent it. */
2050 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
2051 pr_debug(KERN_ERR "trident: playback schedule "
2052 "timeout, dmasz %u fragsz %u count %i "
2053 "hwptr %u swptr %u\n", dmabuf->dmasize,
2054 dmabuf->fragsize, dmabuf->count,
2055 dmabuf->hwptr, dmabuf->swptr);
2056
2057 /* a buffer underrun, we delay the recovery */
2058 /* until next time the while loop begin and */
2059 /* we REALLY have data to play */
2060 }
2061 if (signal_pending(current)) {
2062 if (!ret)
2063 ret = -ERESTARTSYS;
2064 goto out_nolock;
2065 }
2066 mutex_lock(&state->sem);
2067 if (dmabuf->mapped) {
2068 if (!ret)
2069 ret = -ENXIO;
2070 goto out;
2071 }
2072 continue;
2073 }
2074 if ((lret = lock_set_fmt(state)) < 0) {
2075 ret = lret;
2076 goto out;
2077 }
2078
2079 if (state->chans_num == 6) {
2080 copy_count = 0;
2081 state_cnt = 0;
2082 if (ali_write_5_1(state, buffer, cnt, &copy_count,
2083 &state_cnt) == -EFAULT) {
2084 if (state_cnt) {
2085 swptr = (swptr + state_cnt) % dmabuf->dmasize;
2086 spin_lock_irqsave(&state->card->lock, flags);
2087 dmabuf->swptr = swptr;
2088 dmabuf->count += state_cnt;
2089 dmabuf->endcleared = 0;
2090 spin_unlock_irqrestore(&state->card->lock, flags);
2091 }
2092 ret += copy_count;
2093 if (!ret)
2094 ret = -EFAULT;
2095 unlock_set_fmt(state);
2096 goto out;
2097 }
2098 } else {
2099 if (copy_from_user(dmabuf->rawbuf + swptr,
2100 buffer, cnt)) {
2101 if (!ret)
2102 ret = -EFAULT;
2103 unlock_set_fmt(state);
2104 goto out;
2105 }
2106 state_cnt = cnt;
2107 }
2108 unlock_set_fmt(state);
2109
2110 swptr = (swptr + state_cnt) % dmabuf->dmasize;
2111
2112 spin_lock_irqsave(&state->card->lock, flags);
2113 dmabuf->swptr = swptr;
2114 dmabuf->count += state_cnt;
2115 dmabuf->endcleared = 0;
2116 spin_unlock_irqrestore(&state->card->lock, flags);
2117
2118 count -= cnt;
2119 buffer += cnt;
2120 ret += cnt;
2121 start_dac(state);
2122 }
2123 out:
2124 mutex_unlock(&state->sem);
2125 out_nolock:
2126 return ret;
2127 }
2128
2129 /* No kernel lock - we have our own spinlock */
2130 static unsigned int
2131 trident_poll(struct file *file, struct poll_table_struct *wait)
2132 {
2133 struct trident_state *state = (struct trident_state *)file->private_data;
2134 struct dmabuf *dmabuf = &state->dmabuf;
2135 unsigned long flags;
2136 unsigned int mask = 0;
2137
2138 VALIDATE_STATE(state);
2139
2140 /*
2141 * Guard against a parallel poll and write causing multiple
2142 * prog_dmabuf events
2143 */
2144
2145 mutex_lock(&state->sem);
2146
2147 if (file->f_mode & FMODE_WRITE) {
2148 if (!dmabuf->ready && prog_dmabuf_playback(state)) {
2149 mutex_unlock(&state->sem);
2150 return 0;
2151 }
2152 poll_wait(file, &dmabuf->wait, wait);
2153 }
2154 if (file->f_mode & FMODE_READ) {
2155 if (!dmabuf->ready && prog_dmabuf_record(state)) {
2156 mutex_unlock(&state->sem);
2157 return 0;
2158 }
2159 poll_wait(file, &dmabuf->wait, wait);
2160 }
2161
2162 mutex_unlock(&state->sem);
2163
2164 spin_lock_irqsave(&state->card->lock, flags);
2165 trident_update_ptr(state);
2166 if (file->f_mode & FMODE_READ) {
2167 if (dmabuf->count >= (signed) dmabuf->fragsize)
2168 mask |= POLLIN | POLLRDNORM;
2169 }
2170 if (file->f_mode & FMODE_WRITE) {
2171 if (dmabuf->mapped) {
2172 if (dmabuf->count >= (signed) dmabuf->fragsize)
2173 mask |= POLLOUT | POLLWRNORM;
2174 } else {
2175 if ((signed) dmabuf->dmasize >= dmabuf->count +
2176 (signed) dmabuf->fragsize)
2177 mask |= POLLOUT | POLLWRNORM;
2178 }
2179 }
2180 spin_unlock_irqrestore(&state->card->lock, flags);
2181
2182 return mask;
2183 }
2184
2185 static int
2186 trident_mmap(struct file *file, struct vm_area_struct *vma)
2187 {
2188 struct trident_state *state = (struct trident_state *)file->private_data;
2189 struct dmabuf *dmabuf = &state->dmabuf;
2190 int ret = -EINVAL;
2191 unsigned long size;
2192
2193 VALIDATE_STATE(state);
2194
2195 /*
2196 * Lock against poll read write or mmap creating buffers. Also lock
2197 * a read or write against an mmap.
2198 */
2199
2200 mutex_lock(&state->sem);
2201
2202 if (vma->vm_flags & VM_WRITE) {
2203 if ((ret = prog_dmabuf_playback(state)) != 0)
2204 goto out;
2205 } else if (vma->vm_flags & VM_READ) {
2206 if ((ret = prog_dmabuf_record(state)) != 0)
2207 goto out;
2208 } else
2209 goto out;
2210
2211 ret = -EINVAL;
2212 if (vma->vm_pgoff != 0)
2213 goto out;
2214 size = vma->vm_end - vma->vm_start;
2215 if (size > (PAGE_SIZE << dmabuf->buforder))
2216 goto out;
2217 ret = -EAGAIN;
2218 if (remap_pfn_range(vma, vma->vm_start,
2219 virt_to_phys(dmabuf->rawbuf) >> PAGE_SHIFT,
2220 size, vma->vm_page_prot))
2221 goto out;
2222 dmabuf->mapped = 1;
2223 ret = 0;
2224 out:
2225 mutex_unlock(&state->sem);
2226 return ret;
2227 }
2228
2229 static int
2230 trident_ioctl(struct inode *inode, struct file *file,
2231 unsigned int cmd, unsigned long arg)
2232 {
2233 struct trident_state *state = (struct trident_state *)file->private_data;
2234 struct dmabuf *dmabuf = &state->dmabuf;
2235 unsigned long flags;
2236 audio_buf_info abinfo;
2237 count_info cinfo;
2238 int val, mapped, ret = 0;
2239 struct trident_card *card = state->card;
2240 void __user *argp = (void __user *)arg;
2241 int __user *p = argp;
2242
2243 VALIDATE_STATE(state);
2244
2245
2246 mapped = ((file->f_mode & (FMODE_WRITE | FMODE_READ)) && dmabuf->mapped);
2247
2248 pr_debug("trident: trident_ioctl, command = %2d, arg = 0x%08x\n",
2249 _IOC_NR(cmd), arg ? *p : 0);
2250
2251 switch (cmd) {
2252 case OSS_GETVERSION:
2253 ret = put_user(SOUND_VERSION, p);
2254 break;
2255
2256 case SNDCTL_DSP_RESET:
2257 /* FIXME: spin_lock ? */
2258 if (file->f_mode & FMODE_WRITE) {
2259 stop_dac(state);
2260 synchronize_irq(card->irq);
2261 dmabuf->ready = 0;
2262 dmabuf->swptr = dmabuf->hwptr = 0;
2263 dmabuf->count = dmabuf->total_bytes = 0;
2264 }
2265 if (file->f_mode & FMODE_READ) {
2266 stop_adc(state);
2267 synchronize_irq(card->irq);
2268 dmabuf->ready = 0;
2269 dmabuf->swptr = dmabuf->hwptr = 0;
2270 dmabuf->count = dmabuf->total_bytes = 0;
2271 }
2272 break;
2273
2274 case SNDCTL_DSP_SYNC:
2275 if (file->f_mode & FMODE_WRITE)
2276 ret = drain_dac(state, file->f_flags & O_NONBLOCK);
2277 break;
2278
2279 case SNDCTL_DSP_SPEED: /* set smaple rate */
2280 if (get_user(val, p)) {
2281 ret = -EFAULT;
2282 break;
2283 }
2284 if (val >= 0) {
2285 if (file->f_mode & FMODE_WRITE) {
2286 stop_dac(state);
2287 dmabuf->ready = 0;
2288 spin_lock_irqsave(&state->card->lock, flags);
2289 trident_set_dac_rate(state, val);
2290 spin_unlock_irqrestore(&state->card->lock, flags);
2291 }
2292 if (file->f_mode & FMODE_READ) {
2293 stop_adc(state);
2294 dmabuf->ready = 0;
2295 spin_lock_irqsave(&state->card->lock, flags);
2296 trident_set_adc_rate(state, val);
2297 spin_unlock_irqrestore(&state->card->lock, flags);
2298 }
2299 }
2300 ret = put_user(dmabuf->rate, p);
2301 break;
2302
2303 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
2304 if (get_user(val, p)) {
2305 ret = -EFAULT;
2306 break;
2307 }
2308 if ((ret = lock_set_fmt(state)) < 0)
2309 return ret;
2310
2311 if (file->f_mode & FMODE_WRITE) {
2312 stop_dac(state);
2313 dmabuf->ready = 0;
2314 if (val)
2315 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2316 else
2317 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2318 }
2319 if (file->f_mode & FMODE_READ) {
2320 stop_adc(state);
2321 dmabuf->ready = 0;
2322 if (val)
2323 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2324 else
2325 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2326 }
2327 unlock_set_fmt(state);
2328 break;
2329
2330 case SNDCTL_DSP_GETBLKSIZE:
2331 if (file->f_mode & FMODE_WRITE) {
2332 if ((val = prog_dmabuf_playback(state)))
2333 ret = val;
2334 else
2335 ret = put_user(dmabuf->fragsize, p);
2336 break;
2337 }
2338 if (file->f_mode & FMODE_READ) {
2339 if ((val = prog_dmabuf_record(state)))
2340 ret = val;
2341 else
2342 ret = put_user(dmabuf->fragsize, p);
2343 break;
2344 }
2345 /* neither READ nor WRITE? is this even possible? */
2346 ret = -EINVAL;
2347 break;
2348
2349
2350 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format */
2351 ret = put_user(AFMT_S16_LE | AFMT_U16_LE | AFMT_S8 |
2352 AFMT_U8, p);
2353 break;
2354
2355 case SNDCTL_DSP_SETFMT: /* Select sample format */
2356 if (get_user(val, p)) {
2357 ret = -EFAULT;
2358 break;
2359 }
2360 if ((ret = lock_set_fmt(state)) < 0)
2361 return ret;
2362
2363 if (val != AFMT_QUERY) {
2364 if (file->f_mode & FMODE_WRITE) {
2365 stop_dac(state);
2366 dmabuf->ready = 0;
2367 if (val == AFMT_S16_LE)
2368 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2369 else
2370 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
2371 }
2372 if (file->f_mode & FMODE_READ) {
2373 stop_adc(state);
2374 dmabuf->ready = 0;
2375 if (val == AFMT_S16_LE)
2376 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2377 else
2378 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
2379 }
2380 }
2381 unlock_set_fmt(state);
2382 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? AFMT_S16_LE :
2383 AFMT_U8, p);
2384 break;
2385
2386 case SNDCTL_DSP_CHANNELS:
2387 if (get_user(val, p)) {
2388 ret = -EFAULT;
2389 break;
2390 }
2391 if (val != 0) {
2392 if ((ret = lock_set_fmt(state)) < 0)
2393 return ret;
2394
2395 if (file->f_mode & FMODE_WRITE) {
2396 stop_dac(state);
2397 dmabuf->ready = 0;
2398
2399 //prevent from memory leak
2400 if ((state->chans_num > 2) && (state->chans_num != val)) {
2401 ali_free_other_states_resources(state);
2402 state->chans_num = 1;
2403 }
2404
2405 if (val >= 2) {
2406
2407 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2408 if ((val == 6) && (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)) {
2409 if (card->rec_channel_use_count > 0) {
2410 printk(KERN_ERR "trident: Record is "
2411 "working on the card!\n");
2412 ret = -EBUSY;
2413 unlock_set_fmt(state);
2414 break;
2415 }
2416
2417 ret = ali_setup_multi_channels(state->card, 6);
2418 if (ret < 0) {
2419 unlock_set_fmt(state);
2420 break;
2421 }
2422 mutex_lock(&state->card->open_mutex);
2423 ret = ali_allocate_other_states_resources(state, 6);
2424 if (ret < 0) {
2425 mutex_unlock(&state->card->open_mutex);
2426 unlock_set_fmt(state);
2427 break;
2428 }
2429 state->card->multi_channel_use_count++;
2430 mutex_unlock(&state->card->open_mutex);
2431 } else
2432 val = 2; /*yield to 2-channels */
2433 } else
2434 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2435 state->chans_num = val;
2436 }
2437 if (file->f_mode & FMODE_READ) {
2438 stop_adc(state);
2439 dmabuf->ready = 0;
2440 if (val >= 2) {
2441 if (!((file->f_mode & FMODE_WRITE) &&
2442 (val == 6)))
2443 val = 2;
2444 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2445 } else
2446 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2447 state->chans_num = val;
2448 }
2449 unlock_set_fmt(state);
2450 }
2451 ret = put_user(val, p);
2452 break;
2453
2454 case SNDCTL_DSP_POST:
2455 /* Cause the working fragment to be output */
2456 break;
2457
2458 case SNDCTL_DSP_SUBDIVIDE:
2459 if (dmabuf->subdivision) {
2460 ret = -EINVAL;
2461 break;
2462 }
2463 if (get_user(val, p)) {
2464 ret = -EFAULT;
2465 break;
2466 }
2467 if (val != 1 && val != 2 && val != 4) {
2468 ret = -EINVAL;
2469 break;
2470 }
2471 dmabuf->subdivision = val;
2472 break;
2473
2474 case SNDCTL_DSP_SETFRAGMENT:
2475 if (get_user(val, p)) {
2476 ret = -EFAULT;
2477 break;
2478 }
2479
2480 dmabuf->ossfragshift = val & 0xffff;
2481 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2482 if (dmabuf->ossfragshift < 4)
2483 dmabuf->ossfragshift = 4;
2484 if (dmabuf->ossfragshift > 15)
2485 dmabuf->ossfragshift = 15;
2486 if (dmabuf->ossmaxfrags < 4)
2487 dmabuf->ossmaxfrags = 4;
2488
2489 break;
2490
2491 case SNDCTL_DSP_GETOSPACE:
2492 if (!(file->f_mode & FMODE_WRITE)) {
2493 ret = -EINVAL;
2494 break;
2495 }
2496 if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) != 0) {
2497 ret = val;
2498 break;
2499 }
2500 spin_lock_irqsave(&state->card->lock, flags);
2501 trident_update_ptr(state);
2502 abinfo.fragsize = dmabuf->fragsize;
2503 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
2504 abinfo.fragstotal = dmabuf->numfrag;
2505 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2506 spin_unlock_irqrestore(&state->card->lock, flags);
2507 ret = copy_to_user(argp, &abinfo, sizeof (abinfo)) ?
2508 -EFAULT : 0;
2509 break;
2510
2511 case SNDCTL_DSP_GETISPACE:
2512 if (!(file->f_mode & FMODE_READ)) {
2513 ret = -EINVAL;
2514 break;
2515 }
2516 if (!dmabuf->ready && (val = prog_dmabuf_record(state)) != 0) {
2517 ret = val;
2518 break;
2519 }
2520 spin_lock_irqsave(&state->card->lock, flags);
2521 trident_update_ptr(state);
2522 abinfo.fragsize = dmabuf->fragsize;
2523 abinfo.bytes = dmabuf->count;
2524 abinfo.fragstotal = dmabuf->numfrag;
2525 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2526 spin_unlock_irqrestore(&state->card->lock, flags);
2527 ret = copy_to_user(argp, &abinfo, sizeof (abinfo)) ?
2528 -EFAULT : 0;
2529 break;
2530
2531 case SNDCTL_DSP_NONBLOCK:
2532 file->f_flags |= O_NONBLOCK;
2533 break;
2534
2535 case SNDCTL_DSP_GETCAPS:
2536 ret = put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER |
2537 DSP_CAP_MMAP | DSP_CAP_BIND, p);
2538 break;
2539
2540 case SNDCTL_DSP_GETTRIGGER:
2541 val = 0;
2542 if ((file->f_mode & FMODE_READ) && dmabuf->enable)
2543 val |= PCM_ENABLE_INPUT;
2544 if ((file->f_mode & FMODE_WRITE) && dmabuf->enable)
2545 val |= PCM_ENABLE_OUTPUT;
2546 ret = put_user(val, p);
2547 break;
2548
2549 case SNDCTL_DSP_SETTRIGGER:
2550 if (get_user(val, p)) {
2551 ret = -EFAULT;
2552 break;
2553 }
2554 if (file->f_mode & FMODE_READ) {
2555 if (val & PCM_ENABLE_INPUT) {
2556 if (!dmabuf->ready &&
2557 (ret = prog_dmabuf_record(state)))
2558 break;
2559 start_adc(state);
2560 } else
2561 stop_adc(state);
2562 }
2563 if (file->f_mode & FMODE_WRITE) {
2564 if (val & PCM_ENABLE_OUTPUT) {
2565 if (!dmabuf->ready &&
2566 (ret = prog_dmabuf_playback(state)))
2567 break;
2568 start_dac(state);
2569 } else
2570 stop_dac(state);
2571 }
2572 break;
2573
2574 case SNDCTL_DSP_GETIPTR:
2575 if (!(file->f_mode & FMODE_READ)) {
2576 ret = -EINVAL;
2577 break;
2578 }
2579 if (!dmabuf->ready && (val = prog_dmabuf_record(state))
2580 != 0) {
2581 ret = val;
2582 break;
2583 }
2584 spin_lock_irqsave(&state->card->lock, flags);
2585 trident_update_ptr(state);
2586 cinfo.bytes = dmabuf->total_bytes;
2587 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2588 cinfo.ptr = dmabuf->hwptr;
2589 if (dmabuf->mapped)
2590 dmabuf->count &= dmabuf->fragsize - 1;
2591 spin_unlock_irqrestore(&state->card->lock, flags);
2592 ret = copy_to_user(argp, &cinfo, sizeof (cinfo)) ?
2593 -EFAULT : 0;
2594 break;
2595
2596 case SNDCTL_DSP_GETOPTR:
2597 if (!(file->f_mode & FMODE_WRITE)) {
2598 ret = -EINVAL;
2599 break;
2600 }
2601 if (!dmabuf->ready && (val = prog_dmabuf_playback(state))
2602 != 0) {
2603 ret = val;
2604 break;
2605 }
2606
2607 spin_lock_irqsave(&state->card->lock, flags);
2608 trident_update_ptr(state);
2609 cinfo.bytes = dmabuf->total_bytes;
2610 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2611 cinfo.ptr = dmabuf->hwptr;
2612 if (dmabuf->mapped)
2613 dmabuf->count &= dmabuf->fragsize - 1;
2614 spin_unlock_irqrestore(&state->card->lock, flags);
2615 ret = copy_to_user(argp, &cinfo, sizeof (cinfo)) ?
2616 -EFAULT : 0;
2617 break;
2618
2619 case SNDCTL_DSP_SETDUPLEX:
2620 ret = -EINVAL;
2621 break;
2622
2623 case SNDCTL_DSP_GETODELAY:
2624 if (!(file->f_mode & FMODE_WRITE)) {
2625 ret = -EINVAL;
2626 break;
2627 }
2628 if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) != 0) {
2629 ret = val;
2630 break;
2631 }
2632 spin_lock_irqsave(&state->card->lock, flags);
2633 trident_update_ptr(state);
2634 val = dmabuf->count;
2635 spin_unlock_irqrestore(&state->card->lock, flags);
2636 ret = put_user(val, p);
2637 break;
2638
2639 case SOUND_PCM_READ_RATE:
2640 ret = put_user(dmabuf->rate, p);
2641 break;
2642
2643 case SOUND_PCM_READ_CHANNELS:
2644 ret = put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
2645 p);
2646 break;
2647
2648 case SOUND_PCM_READ_BITS:
2649 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? AFMT_S16_LE :
2650 AFMT_U8, p);
2651 break;
2652
2653 case SNDCTL_DSP_GETCHANNELMASK:
2654 ret = put_user(DSP_BIND_FRONT | DSP_BIND_SURR |
2655 DSP_BIND_CENTER_LFE, p);
2656 break;
2657
2658 case SNDCTL_DSP_BIND_CHANNEL:
2659 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
2660 ret = -EINVAL;
2661 break;
2662 }
2663
2664 if (get_user(val, p)) {
2665 ret = -EFAULT;
2666 break;
2667 }
2668 if (val == DSP_BIND_QUERY) {
2669 val = dmabuf->channel->attribute | 0x3c00;
2670 val = attr2mask[val >> 8];
2671 } else {
2672 dmabuf->ready = 0;
2673 if (file->f_mode & FMODE_READ)
2674 dmabuf->channel->attribute = (CHANNEL_REC |
2675 SRC_ENABLE);
2676 if (file->f_mode & FMODE_WRITE)
2677 dmabuf->channel->attribute = (CHANNEL_SPC_PB |
2678 SRC_ENABLE);
2679 dmabuf->channel->attribute |= mask2attr[ffs(val)];
2680 }
2681 ret = put_user(val, p);
2682 break;
2683
2684 case SNDCTL_DSP_MAPINBUF:
2685 case SNDCTL_DSP_MAPOUTBUF:
2686 case SNDCTL_DSP_SETSYNCRO:
2687 case SOUND_PCM_WRITE_FILTER:
2688 case SOUND_PCM_READ_FILTER:
2689 default:
2690 ret = -EINVAL;
2691 break;
2692
2693 }
2694 return ret;
2695 }
2696
2697 static int
2698 trident_open(struct inode *inode, struct file *file)
2699 {
2700 int i = 0;
2701 int minor = iminor(inode);
2702 struct trident_card *card = devs;
2703 struct trident_state *state = NULL;
2704 struct dmabuf *dmabuf = NULL;
2705
2706 /* Added by Matt Wu 01-05-2001 */
2707 /* TODO: there's some redundacy here wrt the check below */
2708 /* for multi_use_count > 0. Should we return -EBUSY or find */
2709 /* a different card? for now, don't break current behaviour */
2710 /* -- mulix */
2711 if (file->f_mode & FMODE_READ) {
2712 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2713 if (card->multi_channel_use_count > 0)
2714 return -EBUSY;
2715 }
2716 }
2717
2718 /* find an available virtual channel (instance of /dev/dsp) */
2719 while (card != NULL) {
2720 mutex_lock(&card->open_mutex);
2721 if (file->f_mode & FMODE_READ) {
2722 /* Skip opens on cards that are in 6 channel mode */
2723 if (card->multi_channel_use_count > 0) {
2724 mutex_unlock(&card->open_mutex);
2725 card = card->next;
2726 continue;
2727 }
2728 }
2729 for (i = 0; i < NR_HW_CH; i++) {
2730 if (card->states[i] == NULL) {
2731 state = card->states[i] = kzalloc(sizeof(*state), GFP_KERNEL);
2732 if (state == NULL) {
2733 mutex_unlock(&card->open_mutex);
2734 return -ENOMEM;
2735 }
2736 mutex_init(&state->sem);
2737 dmabuf = &state->dmabuf;
2738 goto found_virt;
2739 }
2740 }
2741 mutex_unlock(&card->open_mutex);
2742 card = card->next;
2743 }
2744 /* no more virtual channel avaiable */
2745 if (!state) {
2746 return -ENODEV;
2747 }
2748 found_virt:
2749 /* found a free virtual channel, allocate hardware channels */
2750 if (file->f_mode & FMODE_READ)
2751 dmabuf->channel = card->alloc_rec_pcm_channel(card);
2752 else
2753 dmabuf->channel = card->alloc_pcm_channel(card);
2754
2755 if (dmabuf->channel == NULL) {
2756 kfree(card->states[i]);
2757 card->states[i] = NULL;
2758 return -ENODEV;
2759 }
2760
2761 /* initialize the virtual channel */
2762 state->virt = i;
2763 state->card = card;
2764 state->magic = TRIDENT_STATE_MAGIC;
2765 init_waitqueue_head(&dmabuf->wait);
2766 file->private_data = state;
2767
2768 /* set default sample format. According to OSS Programmer's */
2769 /* Guide /dev/dsp should be default to unsigned 8-bits, mono, */
2770 /* with sample rate 8kHz and /dev/dspW will accept 16-bits sample */
2771 if (file->f_mode & FMODE_WRITE) {
2772 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
2773 if ((minor & 0x0f) == SND_DEV_DSP16)
2774 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2775 dmabuf->ossfragshift = 0;
2776 dmabuf->ossmaxfrags = 0;
2777 dmabuf->subdivision = 0;
2778 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
2779 /* set default channel attribute to normal playback */
2780 dmabuf->channel->attribute = CHANNEL_PB;
2781 }
2782 trident_set_dac_rate(state, 8000);
2783 }
2784
2785 if (file->f_mode & FMODE_READ) {
2786 /* FIXME: Trident 4d can only record in signed 16-bits stereo, */
2787 /* 48kHz sample, to be dealed with in trident_set_adc_rate() ?? */
2788 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
2789 if ((minor & 0x0f) == SND_DEV_DSP16)
2790 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2791 dmabuf->ossfragshift = 0;
2792 dmabuf->ossmaxfrags = 0;
2793 dmabuf->subdivision = 0;
2794 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
2795 /* set default channel attribute to 0x8a80, record from
2796 PCM L/R FIFO and mono = (left + right + 1)/2 */
2797 dmabuf->channel->attribute = (CHANNEL_REC | PCM_LR |
2798 MONO_MIX);
2799 }
2800 trident_set_adc_rate(state, 8000);
2801
2802 /* Added by Matt Wu 01-05-2001 */
2803 if (card->pci_id == PCI_DEVICE_ID_ALI_5451)
2804 card->rec_channel_use_count++;
2805 }
2806
2807 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2808 mutex_unlock(&card->open_mutex);
2809
2810 pr_debug("trident: open virtual channel %d, hard channel %d\n",
2811 state->virt, dmabuf->channel->num);
2812
2813 return nonseekable_open(inode, file);
2814 }
2815
2816 static int
2817 trident_release(struct inode *inode, struct file *file)
2818 {
2819 struct trident_state *state = (struct trident_state *)file->private_data;
2820 struct trident_card *card;
2821 struct dmabuf *dmabuf;
2822
2823 VALIDATE_STATE(state);
2824
2825 card = state->card;
2826 dmabuf = &state->dmabuf;
2827
2828 if (file->f_mode & FMODE_WRITE) {
2829 trident_clear_tail(state);
2830 drain_dac(state, file->f_flags & O_NONBLOCK);
2831 }
2832
2833 pr_debug("trident: closing virtual channel %d, hard channel %d\n",
2834 state->virt, dmabuf->channel->num);
2835
2836 /* stop DMA state machine and free DMA buffers/channels */
2837 mutex_lock(&card->open_mutex);
2838
2839 if (file->f_mode & FMODE_WRITE) {
2840 stop_dac(state);
2841 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
2842 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2843
2844 /* Added by Matt Wu */
2845 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2846 if (state->chans_num > 2) {
2847 if (card->multi_channel_use_count-- < 0)
2848 card->multi_channel_use_count = 0;
2849 if (card->multi_channel_use_count == 0)
2850 ali_close_multi_channels();
2851 ali_free_other_states_resources(state);
2852 }
2853 }
2854 }
2855 if (file->f_mode & FMODE_READ) {
2856 stop_adc(state);
2857 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
2858 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2859
2860 /* Added by Matt Wu */
2861 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2862 if (card->rec_channel_use_count-- < 0)
2863 card->rec_channel_use_count = 0;
2864 }
2865 }
2866
2867 card->states[state->virt] = NULL;
2868 kfree(state);
2869
2870 /* we're covered by the open_mutex */
2871 mutex_unlock(&card->open_mutex);
2872
2873 return 0;
2874 }
2875
2876 static /*const */ struct file_operations trident_audio_fops = {
2877 .owner = THIS_MODULE,
2878 .llseek = no_llseek,
2879 .read = trident_read,
2880 .write = trident_write,
2881 .poll = trident_poll,
2882 .ioctl = trident_ioctl,
2883 .mmap = trident_mmap,
2884 .open = trident_open,
2885 .release = trident_release,
2886 };
2887
2888 /* trident specific AC97 functions */
2889 /* Write AC97 codec registers */
2890 static void
2891 trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
2892 {
2893 struct trident_card *card = (struct trident_card *)codec->private_data;
2894 unsigned int address, mask, busy;
2895 unsigned short count = 0xffff;
2896 unsigned long flags;
2897 u32 data;
2898
2899 data = ((u32) val) << 16;
2900
2901 switch (card->pci_id) {
2902 default:
2903 case PCI_DEVICE_ID_SI_7018:
2904 address = SI_AC97_WRITE;
2905 mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY;
2906 if (codec->id)
2907 mask |= SI_AC97_SECONDARY;
2908 busy = SI_AC97_BUSY_WRITE;
2909 break;
2910 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2911 address = DX_ACR0_AC97_W;
2912 mask = busy = DX_AC97_BUSY_WRITE;
2913 break;
2914 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2915 address = NX_ACR1_AC97_W;
2916 mask = NX_AC97_BUSY_WRITE;
2917 if (codec->id)
2918 mask |= NX_AC97_WRITE_SECONDARY;
2919 busy = NX_AC97_BUSY_WRITE;
2920 break;
2921 case PCI_DEVICE_ID_INTERG_5050:
2922 address = SI_AC97_WRITE;
2923 mask = busy = SI_AC97_BUSY_WRITE;
2924 if (codec->id)
2925 mask |= SI_AC97_SECONDARY;
2926 break;
2927 }
2928
2929 spin_lock_irqsave(&card->lock, flags);
2930 do {
2931 if ((inw(TRID_REG(card, address)) & busy) == 0)
2932 break;
2933 } while (count--);
2934
2935 data |= (mask | (reg & AC97_REG_ADDR));
2936
2937 if (count == 0) {
2938 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n");
2939 spin_unlock_irqrestore(&card->lock, flags);
2940 return;
2941 }
2942
2943 outl(data, TRID_REG(card, address));
2944 spin_unlock_irqrestore(&card->lock, flags);
2945 }
2946
2947 /* Read AC97 codec registers */
2948 static u16
2949 trident_ac97_get(struct ac97_codec *codec, u8 reg)
2950 {
2951 struct trident_card *card = (struct trident_card *)codec->private_data;
2952 unsigned int address, mask, busy;
2953 unsigned short count = 0xffff;
2954 unsigned long flags;
2955 u32 data;
2956
2957 switch (card->pci_id) {
2958 default:
2959 case PCI_DEVICE_ID_SI_7018:
2960 address = SI_AC97_READ;
2961 mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY;
2962 if (codec->id)
2963 mask |= SI_AC97_SECONDARY;
2964 busy = SI_AC97_BUSY_READ;
2965 break;
2966 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2967 address = DX_ACR1_AC97_R;
2968 mask = busy = DX_AC97_BUSY_READ;
2969 break;
2970 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2971 if (codec->id)
2972 address = NX_ACR3_AC97_R_SECONDARY;
2973 else
2974 address = NX_ACR2_AC97_R_PRIMARY;
2975 mask = NX_AC97_BUSY_READ;
2976 busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA;
2977 break;
2978 case PCI_DEVICE_ID_INTERG_5050:
2979 address = SI_AC97_READ;
2980 mask = busy = SI_AC97_BUSY_READ;
2981 if (codec->id)
2982 mask |= SI_AC97_SECONDARY;
2983 break;
2984 }
2985
2986 data = (mask | (reg & AC97_REG_ADDR));
2987
2988 spin_lock_irqsave(&card->lock, flags);
2989 outl(data, TRID_REG(card, address));
2990 do {
2991 data = inl(TRID_REG(card, address));
2992 if ((data & busy) == 0)
2993 break;
2994 } while (count--);
2995 spin_unlock_irqrestore(&card->lock, flags);
2996
2997 if (count == 0) {
2998 printk(KERN_ERR "trident: AC97 CODEC read timed out.\n");
2999 data = 0;
3000 }
3001 return ((u16) (data >> 16));
3002 }
3003
3004 /* rewrite ac97 read and write mixer register by hulei for ALI*/
3005 static int
3006 acquirecodecaccess(struct trident_card *card)
3007 {
3008 u16 wsemamask = 0x6000; /* bit 14..13 */
3009 u16 wsemabits;
3010 u16 wcontrol;
3011 int block = 0;
3012 int ncount = 25;
3013 while (1) {
3014 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3015 wsemabits = wcontrol & wsemamask;
3016
3017 if (wsemabits == 0x4000)
3018 return 1; /* 0x4000 is audio ,then success */
3019 if (ncount-- < 0)
3020 break;
3021 if (wsemabits == 0) {
3022 unlock:
3023 outl(((u32) (wcontrol & 0x1eff) | 0x00004000),
3024 TRID_REG(card, ALI_AC97_WRITE));
3025 continue;
3026 }
3027 udelay(20);
3028 }
3029 if (!block) {
3030 pr_debug("accesscodecsemaphore: try unlock\n");
3031 block = 1;
3032 goto unlock;
3033 }
3034 return 0;
3035 }
3036
3037 static void
3038 releasecodecaccess(struct trident_card *card)
3039 {
3040 unsigned long wcontrol;
3041 wcontrol = inl(TRID_REG(card, ALI_AC97_WRITE));
3042 outl((wcontrol & 0xffff1eff), TRID_REG(card, ALI_AC97_WRITE));
3043 }
3044
3045 static int
3046 waitforstimertick(struct trident_card *card)
3047 {
3048 unsigned long chk1, chk2;
3049 unsigned int wcount = 0xffff;
3050 chk1 = inl(TRID_REG(card, ALI_STIMER));
3051
3052 while (1) {
3053 chk2 = inl(TRID_REG(card, ALI_STIMER));
3054 if ((wcount > 0) && chk1 != chk2)
3055 return 1;
3056 if (wcount <= 0)
3057 break;
3058 udelay(50);
3059 }
3060 return 0;
3061 }
3062
3063 /* Read AC97 codec registers for ALi*/
3064 static u16
3065 ali_ac97_get(struct trident_card *card, int secondary, u8 reg)
3066 {
3067 unsigned int address, mask;
3068 unsigned int ncount;
3069 unsigned long aud_reg;
3070 u32 data;
3071 u16 wcontrol;
3072 unsigned long flags;
3073
3074 if (!card)
3075 BUG();
3076
3077 address = ALI_AC97_READ;
3078 if (card->revision == ALI_5451_V02) {
3079 address = ALI_AC97_WRITE;
3080 }
3081 mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY;
3082 if (secondary)
3083 mask |= ALI_AC97_SECONDARY;
3084
3085 spin_lock_irqsave(&card->lock, flags);
3086
3087 if (!acquirecodecaccess(card))
3088 printk(KERN_ERR "access codec fail\n");
3089
3090 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3091 wcontrol &= 0xfe00;
3092 wcontrol |= (0x8000 | reg);
3093 outw(wcontrol, TRID_REG(card, ALI_AC97_WRITE));
3094
3095 data = (mask | (reg & AC97_REG_ADDR));
3096
3097 if (!waitforstimertick(card)) {
3098 printk(KERN_ERR "ali_ac97_read: BIT_CLOCK is dead\n");
3099 goto releasecodec;
3100 }
3101
3102 udelay(20);
3103
3104 ncount = 10;
3105
3106 while (1) {
3107 if ((inw(TRID_REG(card, ALI_AC97_WRITE)) & ALI_AC97_BUSY_READ)
3108 != 0)
3109 break;
3110 if (ncount <= 0)
3111 break;
3112 if (ncount-- == 1) {
3113 pr_debug("ali_ac97_read :try clear busy flag\n");
3114 aud_reg = inl(TRID_REG(card, ALI_AC97_WRITE));
3115 outl((aud_reg & 0xffff7fff),
3116 TRID_REG(card, ALI_AC97_WRITE));
3117 }
3118 udelay(10);
3119 }
3120
3121 data = inl(TRID_REG(card, address));
3122
3123 spin_unlock_irqrestore(&card->lock, flags);
3124
3125 return ((u16) (data >> 16));
3126
3127 releasecodec:
3128 releasecodecaccess(card);
3129 spin_unlock_irqrestore(&card->lock, flags);
3130 printk(KERN_ERR "ali_ac97_read: AC97 CODEC read timed out.\n");
3131 return 0;
3132 }
3133
3134 /* Write AC97 codec registers for hulei*/
3135 static void
3136 ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val)
3137 {
3138 unsigned int address, mask;
3139 unsigned int ncount;
3140 u32 data;
3141 u16 wcontrol;
3142 unsigned long flags;
3143
3144 data = ((u32) val) << 16;
3145
3146 if (!card)
3147 BUG();
3148
3149 address = ALI_AC97_WRITE;
3150 mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY;
3151 if (secondary)
3152 mask |= ALI_AC97_SECONDARY;
3153 if (card->revision == ALI_5451_V02)
3154 mask |= ALI_AC97_WRITE_MIXER_REGISTER;
3155
3156 spin_lock_irqsave(&card->lock, flags);
3157 if (!acquirecodecaccess(card))
3158 printk(KERN_ERR "ali_ac97_write: access codec fail\n");
3159
3160 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3161 wcontrol &= 0xff00;
3162 wcontrol |= (0x8100 | reg); /* bit 8=1: (ali1535 )reserved/ */
3163 /* ali1535+ write */
3164 outl((data | wcontrol), TRID_REG(card, ALI_AC97_WRITE));
3165
3166 if (!waitforstimertick(card)) {
3167 printk(KERN_ERR "BIT_CLOCK is dead\n");
3168 goto releasecodec;
3169 }
3170
3171 ncount = 10;
3172 while (1) {
3173 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3174 if (!(wcontrol & 0x8000))
3175 break;
3176 if (ncount <= 0)
3177 break;
3178 if (ncount-- == 1) {
3179 pr_debug("ali_ac97_set :try clear busy flag!!\n");
3180 outw(wcontrol & 0x7fff,
3181 TRID_REG(card, ALI_AC97_WRITE));
3182 }
3183 udelay(10);
3184 }
3185
3186 releasecodec:
3187 releasecodecaccess(card);
3188 spin_unlock_irqrestore(&card->lock, flags);
3189 return;
3190 }
3191
3192 static void
3193 ali_enable_special_channel(struct trident_state *stat)
3194 {
3195 struct trident_card *card = stat->card;
3196 unsigned long s_channels;
3197
3198 s_channels = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3199 s_channels |= (1 << stat->dmabuf.channel->num);
3200 outl(s_channels, TRID_REG(card, ALI_GLOBAL_CONTROL));
3201 }
3202
3203 static u16
3204 ali_ac97_read(struct ac97_codec *codec, u8 reg)
3205 {
3206 int id;
3207 u16 data;
3208 struct trident_card *card = NULL;
3209
3210 /* Added by Matt Wu */
3211 if (!codec)
3212 BUG();
3213
3214 card = (struct trident_card *) codec->private_data;
3215
3216 if (!card->mixer_regs_ready)
3217 return ali_ac97_get(card, codec->id, reg);
3218
3219 /*
3220 * FIXME: need to stop this caching some registers
3221 */
3222 if (codec->id)
3223 id = 1;
3224 else
3225 id = 0;
3226
3227 data = card->mixer_regs[reg / 2][id];
3228 return data;
3229 }
3230
3231 static void
3232 ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val)
3233 {
3234 int id;
3235 struct trident_card *card;
3236
3237 /* Added by Matt Wu */
3238 if (!codec)
3239 BUG();
3240
3241 card = (struct trident_card *) codec->private_data;
3242
3243 if (!card->mixer_regs_ready) {
3244 ali_ac97_set(card, codec->id, reg, val);
3245 return;
3246 }
3247
3248 if (codec->id)
3249 id = 1;
3250 else
3251 id = 0;
3252
3253 card->mixer_regs[reg / 2][id] = val;
3254 ali_ac97_set(card, codec->id, reg, val);
3255 }
3256
3257 /*
3258 flag: ALI_SPDIF_OUT_TO_SPDIF_OUT
3259 ALI_PCM_TO_SPDIF_OUT
3260 */
3261
3262 static void
3263 ali_setup_spdif_out(struct trident_card *card, int flag)
3264 {
3265 unsigned long spdif;
3266 unsigned char ch;
3267
3268 char temp;
3269 struct pci_dev *pci_dev = NULL;
3270
3271 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
3272 pci_dev);
3273 if (pci_dev == NULL)
3274 return;
3275 pci_read_config_byte(pci_dev, 0x61, &temp);
3276 temp |= 0x40;
3277 pci_write_config_byte(pci_dev, 0x61, temp);
3278 pci_read_config_byte(pci_dev, 0x7d, &temp);
3279 temp |= 0x01;
3280 pci_write_config_byte(pci_dev, 0x7d, temp);
3281 pci_read_config_byte(pci_dev, 0x7e, &temp);
3282 temp &= (~0x20);
3283 temp |= 0x10;
3284 pci_write_config_byte(pci_dev, 0x7e, temp);
3285
3286 pci_dev_put(pci_dev);
3287
3288 ch = inb(TRID_REG(card, ALI_SCTRL));
3289 outb(ch | ALI_SPDIF_OUT_ENABLE, TRID_REG(card, ALI_SCTRL));
3290 ch = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3291 outb(ch & ALI_SPDIF_OUT_CH_STATUS, TRID_REG(card, ALI_SPDIF_CTRL));
3292
3293 if (flag & ALI_SPDIF_OUT_TO_SPDIF_OUT) {
3294 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
3295 spdif |= ALI_SPDIF_OUT_CH_ENABLE;
3296 spdif &= ALI_SPDIF_OUT_SEL_SPDIF;
3297 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3298 spdif = inw(TRID_REG(card, ALI_SPDIF_CS));
3299 if (flag & ALI_SPDIF_OUT_NON_PCM)
3300 spdif |= 0x0002;
3301 else
3302 spdif &= (~0x0002);
3303 outw(spdif, TRID_REG(card, ALI_SPDIF_CS));
3304 } else {
3305 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
3306 spdif |= ALI_SPDIF_OUT_SEL_PCM;
3307 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3308 }
3309 }
3310
3311 static void
3312 ali_disable_special_channel(struct trident_card *card, int ch)
3313 {
3314 unsigned long sc;
3315
3316 sc = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3317 sc &= ~(1 << ch);
3318 outl(sc, TRID_REG(card, ALI_GLOBAL_CONTROL));
3319 }
3320
3321 static void
3322 ali_disable_spdif_in(struct trident_card *card)
3323 {
3324 unsigned long spdif;
3325
3326 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3327 spdif &= (~ALI_SPDIF_IN_SUPPORT);
3328 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3329
3330 ali_disable_special_channel(card, ALI_SPDIF_IN_CHANNEL);
3331 }
3332
3333 static void
3334 ali_setup_spdif_in(struct trident_card *card)
3335 {
3336 unsigned long spdif;
3337
3338 //Set SPDIF IN Supported
3339 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3340 spdif |= ALI_SPDIF_IN_SUPPORT;
3341 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3342
3343 //Set SPDIF IN Rec
3344 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3345 spdif |= ALI_SPDIF_IN_CH_ENABLE;
3346 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3347
3348 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3349 spdif |= ALI_SPDIF_IN_CH_STATUS;
3350 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
3351 /*
3352 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3353 spdif |= ALI_SPDIF_IN_FUNC_ENABLE;
3354 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
3355 */
3356 }
3357
3358 static void
3359 ali_delay(struct trident_card *card, int interval)
3360 {
3361 unsigned long begintimer, currenttimer;
3362
3363 begintimer = inl(TRID_REG(card, ALI_STIMER));
3364 currenttimer = inl(TRID_REG(card, ALI_STIMER));
3365
3366 while (currenttimer < begintimer + interval)
3367 currenttimer = inl(TRID_REG(card, ALI_STIMER));
3368 }
3369
3370 static void
3371 ali_detect_spdif_rate(struct trident_card *card)
3372 {
3373 u16 wval = 0;
3374 u16 count = 0;
3375 u8 bval = 0, R1 = 0, R2 = 0;
3376
3377 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3378 bval |= 0x02;
3379 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
3380
3381 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
3382 bval |= 0x1F;
3383 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL + 1));
3384
3385 while (((R1 < 0x0B) || (R1 > 0x0E)) && (R1 != 0x12) &&
3386 count <= 50000) {
3387 count++;
3388
3389 ali_delay(card, 6);
3390
3391 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
3392 R1 = bval & 0x1F;
3393 }
3394
3395 if (count > 50000) {
3396 printk(KERN_WARNING "trident: Error in "
3397 "ali_detect_spdif_rate!\n");
3398 return;
3399 }
3400
3401 count = 0;
3402
3403 while (count <= 50000) {
3404 count++;
3405
3406 ali_delay(card, 6);
3407
3408 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1));
3409 R2 = bval & 0x1F;
3410
3411 if (R2 != R1)
3412 R1 = R2;
3413 else
3414 break;
3415 }
3416
3417 if (count > 50000) {
3418 printk(KERN_WARNING "trident: Error in "
3419 "ali_detect_spdif_rate!\n");
3420 return;
3421 }
3422
3423 switch (R2) {
3424 case 0x0b:
3425 case 0x0c:
3426 case 0x0d:
3427 case 0x0e:
3428 wval = inw(TRID_REG(card, ALI_SPDIF_CTRL + 2));
3429 wval &= 0xE0F0;
3430 wval |= (u16) 0x09 << 8 | (u16) 0x05;
3431 outw(wval, TRID_REG(card, ALI_SPDIF_CTRL + 2));
3432
3433 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)) & 0xF0;
3434 outb(bval | 0x02, TRID_REG(card, ALI_SPDIF_CS + 3));
3435 break;
3436
3437 case 0x12:
3438 wval = inw(TRID_REG(card, ALI_SPDIF_CTRL + 2));
3439 wval &= 0xE0F0;
3440 wval |= (u16) 0x0E << 8 | (u16) 0x08;
3441 outw(wval, TRID_REG(card, ALI_SPDIF_CTRL + 2));
3442
3443 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)) & 0xF0;
3444 outb(bval | 0x03, TRID_REG(card, ALI_SPDIF_CS + 3));
3445 break;
3446
3447 default:
3448 break;
3449 }
3450
3451 }
3452
3453 static unsigned int
3454 ali_get_spdif_in_rate(struct trident_card *card)
3455 {
3456 u32 dwRate = 0;
3457 u8 bval = 0;
3458
3459 ali_detect_spdif_rate(card);
3460
3461 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3462 bval &= 0x7F;
3463 bval |= 0x40;
3464 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL));
3465
3466 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3));
3467 bval &= 0x0F;
3468
3469 switch (bval) {
3470 case 0:
3471 dwRate = 44100;
3472 break;
3473 case 1:
3474 dwRate = 48000;
3475 break;
3476 case 2:
3477 dwRate = 32000;
3478 break;
3479 default:
3480 // Error occurs
3481 break;
3482 }
3483
3484 return dwRate;
3485
3486 }
3487
3488 static int
3489 ali_close_multi_channels(void)
3490 {
3491 char temp = 0;
3492 struct pci_dev *pci_dev = NULL;
3493
3494 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
3495 pci_dev);
3496 if (pci_dev == NULL)
3497 return -1;
3498
3499 pci_read_config_byte(pci_dev, 0x59, &temp);
3500 temp &= ~0x80;
3501 pci_write_config_byte(pci_dev, 0x59, temp);
3502
3503 pci_dev_put(pci_dev);
3504
3505 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
3506 NULL);
3507 if (pci_dev == NULL)
3508 return -1;
3509
3510 pci_read_config_byte(pci_dev, 0xB8, &temp);
3511 temp &= ~0x20;
3512 pci_write_config_byte(pci_dev, 0xB8, temp);
3513
3514 pci_dev_put(pci_dev);
3515
3516 return 0;
3517 }
3518
3519 static int
3520 ali_setup_multi_channels(struct trident_card *card, int chan_nums)
3521 {
3522 unsigned long dwValue;
3523 char temp = 0;
3524 struct pci_dev *pci_dev = NULL;
3525
3526 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
3527 pci_dev);
3528 if (pci_dev == NULL)
3529 return -1;
3530 pci_read_config_byte(pci_dev, 0x59, &temp);
3531 temp |= 0x80;
3532 pci_write_config_byte(pci_dev, 0x59, temp);
3533
3534 pci_dev_put(pci_dev);
3535
3536 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
3537 NULL);
3538 if (pci_dev == NULL)
3539 return -1;
3540 pci_read_config_byte(pci_dev, (int) 0xB8, &temp);
3541 temp |= 0x20;
3542 pci_write_config_byte(pci_dev, (int) 0xB8, (u8) temp);
3543
3544 pci_dev_put(pci_dev);
3545
3546 if (chan_nums == 6) {
3547 dwValue = inl(TRID_REG(card, ALI_SCTRL)) | 0x000f0000;
3548 outl(dwValue, TRID_REG(card, ALI_SCTRL));
3549 mdelay(4);
3550 dwValue = inl(TRID_REG(card, ALI_SCTRL));
3551 if (dwValue & 0x2000000) {
3552 ali_ac97_write(card->ac97_codec[0], 0x02, 8080);
3553 ali_ac97_write(card->ac97_codec[0], 0x36, 0);
3554 ali_ac97_write(card->ac97_codec[0], 0x38, 0);
3555 /*
3556 * On a board with a single codec you won't get the
3557 * surround. On other boards configure it.
3558 */
3559 if (card->ac97_codec[1] != NULL) {
3560 ali_ac97_write(card->ac97_codec[1], 0x36, 0);
3561 ali_ac97_write(card->ac97_codec[1], 0x38, 0);
3562 ali_ac97_write(card->ac97_codec[1], 0x02, 0x0606);
3563 ali_ac97_write(card->ac97_codec[1], 0x18, 0x0303);
3564 ali_ac97_write(card->ac97_codec[1], 0x74, 0x3);
3565 }
3566 return 1;
3567 }
3568 }
3569 return -EINVAL;
3570 }
3571
3572 static void
3573 ali_free_pcm_channel(struct trident_card *card, unsigned int channel)
3574 {
3575 int bank;
3576
3577 if (channel > 31)
3578 return;
3579
3580 bank = channel >> 5;
3581 channel = channel & 0x1f;
3582
3583 card->banks[bank].bitmap &= ~(1 << (channel));
3584 }
3585
3586 static int
3587 ali_allocate_other_states_resources(struct trident_state *state, int chan_nums)
3588 {
3589 struct trident_card *card = state->card;
3590 struct trident_state *s;
3591 int i, state_count = 0;
3592 struct trident_pcm_bank *bank;
3593 struct trident_channel *channel;
3594 unsigned long num;
3595
3596 bank = &card->banks[BANK_A];
3597
3598 if (chan_nums != 6)
3599 return 0;
3600
3601 for (i = 0; (i < ALI_CHANNELS) && (state_count != 4); i++) {
3602 if (card->states[i])
3603 continue;
3604
3605 num = ali_multi_channels_5_1[state_count];
3606 if (!(bank->bitmap & (1 << num))) {
3607 bank->bitmap |= 1 << num;
3608 channel = &bank->channels[num];
3609 channel->num = num;
3610 } else {
3611 state_count--;
3612 for (; state_count >= 0; state_count--) {
3613 kfree(state->other_states[state_count]);
3614 num = ali_multi_channels_5_1[state_count];
3615 ali_free_pcm_channel(card, num);
3616 }
3617 return -EBUSY;
3618 }
3619 s = card->states[i] = kzalloc(sizeof(*state), GFP_KERNEL);
3620 if (!s) {
3621 num = ali_multi_channels_5_1[state_count];
3622 ali_free_pcm_channel(card, num);
3623 state_count--;
3624 for (; state_count >= 0; state_count--) {
3625 num = ali_multi_channels_5_1[state_count];
3626 ali_free_pcm_channel(card, num);
3627 kfree(state->other_states[state_count]);
3628 }
3629 return -ENOMEM;
3630 }
3631
3632 s->dmabuf.channel = channel;
3633 s->dmabuf.ossfragshift = s->dmabuf.ossmaxfrags =
3634 s->dmabuf.subdivision = 0;
3635 init_waitqueue_head(&s->dmabuf.wait);
3636 s->magic = card->magic;
3637 s->card = card;
3638 s->virt = i;
3639 ali_enable_special_channel(s);
3640 state->other_states[state_count++] = s;
3641 }
3642
3643 if (state_count != 4) {
3644 state_count--;
3645 for (; state_count >= 0; state_count--) {
3646 kfree(state->other_states[state_count]);
3647 num = ali_multi_channels_5_1[state_count];
3648 ali_free_pcm_channel(card, num);
3649 }
3650 return -EBUSY;
3651 }
3652 return 0;
3653 }
3654
3655 #ifdef CONFIG_PM
3656 /* save registers for ALi Power Management */
3657 static struct ali_saved_registers {
3658 unsigned long global_regs[ALI_GLOBAL_REGS];
3659 unsigned long channel_regs[ALI_CHANNELS][ALI_CHANNEL_REGS];
3660 unsigned mixer_regs[ALI_MIXER_REGS];
3661 } ali_registers;
3662
3663 static void
3664 ali_save_regs(struct trident_card *card)
3665 {
3666 unsigned long flags;
3667 int i, j;
3668
3669 spin_lock_irqsave(&card->lock, flags);
3670
3671 ali_registers.global_regs[0x2c] = inl(TRID_REG(card, T4D_MISCINT));
3672 //ali_registers.global_regs[0x20] = inl(TRID_REG(card,T4D_START_A));
3673 ali_registers.global_regs[0x21] = inl(TRID_REG(card, T4D_STOP_A));
3674
3675 //disable all IRQ bits
3676 outl(ALI_DISABLE_ALL_IRQ, TRID_REG(card, T4D_MISCINT));
3677
3678 for (i = 1; i < ALI_MIXER_REGS; i++)
3679 ali_registers.mixer_regs[i] = ali_ac97_read(card->ac97_codec[0],
3680 i * 2);
3681
3682 for (i = 0; i < ALI_GLOBAL_REGS; i++) {
3683 if ((i * 4 == T4D_MISCINT) || (i * 4 == T4D_STOP_A))
3684 continue;
3685 ali_registers.global_regs[i] = inl(TRID_REG(card, i * 4));
3686 }
3687
3688 for (i = 0; i < ALI_CHANNELS; i++) {
3689 outb(i, TRID_REG(card, T4D_LFO_GC_CIR));
3690 for (j = 0; j < ALI_CHANNEL_REGS; j++)
3691 ali_registers.channel_regs[i][j] = inl(TRID_REG(card,
3692 j * 4 + 0xe0));
3693 }
3694
3695 //Stop all HW channel
3696 outl(ALI_STOP_ALL_CHANNELS, TRID_REG(card, T4D_STOP_A));
3697
3698 spin_unlock_irqrestore(&card->lock, flags);
3699 }
3700
3701 static void
3702 ali_restore_regs(struct trident_card *card)
3703 {
3704 unsigned long flags;
3705 int i, j;
3706
3707 spin_lock_irqsave(&card->lock, flags);
3708
3709 for (i = 1; i < ALI_MIXER_REGS; i++)
3710 ali_ac97_write(card->ac97_codec[0], i * 2,
3711 ali_registers.mixer_regs[i]);
3712
3713 for (i = 0; i < ALI_CHANNELS; i++) {
3714 outb(i, TRID_REG(card, T4D_LFO_GC_CIR));
3715 for (j = 0; j < ALI_CHANNEL_REGS; j++)
3716 outl(ali_registers.channel_regs[i][j],
3717 TRID_REG(card, j * 4 + 0xe0));
3718 }
3719
3720 for (i = 0; i < ALI_GLOBAL_REGS; i++) {
3721 if ((i * 4 == T4D_MISCINT) || (i * 4 == T4D_STOP_A) ||
3722 (i * 4 == T4D_START_A))
3723 continue;
3724 outl(ali_registers.global_regs[i], TRID_REG(card, i * 4));
3725 }
3726
3727 //start HW channel
3728 outl(ali_registers.global_regs[0x20], TRID_REG(card, T4D_START_A));
3729 //restore IRQ enable bits
3730 outl(ali_registers.global_regs[0x2c], TRID_REG(card, T4D_MISCINT));
3731
3732 spin_unlock_irqrestore(&card->lock, flags);
3733 }
3734
3735 static int
3736 trident_suspend(struct pci_dev *dev, pm_message_t unused)
3737 {
3738 struct trident_card *card = pci_get_drvdata(dev);
3739
3740 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3741 ali_save_regs(card);
3742 }
3743 return 0;
3744 }
3745
3746 static int
3747 trident_resume(struct pci_dev *dev)
3748 {
3749 struct trident_card *card = pci_get_drvdata(dev);
3750
3751 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3752 ali_restore_regs(card);
3753 }
3754 return 0;
3755 }
3756 #endif
3757
3758 static struct trident_channel *
3759 ali_alloc_pcm_channel(struct trident_card *card)
3760 {
3761 struct trident_pcm_bank *bank;
3762 int idx;
3763
3764 bank = &card->banks[BANK_A];
3765
3766 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) &
3767 (ALI_SPDIF_OUT_CH_ENABLE)) {
3768 idx = ALI_SPDIF_OUT_CHANNEL;
3769 if (!(bank->bitmap & (1 << idx))) {
3770 struct trident_channel *channel = &bank->channels[idx];
3771 bank->bitmap |= 1 << idx;
3772 channel->num = idx;
3773 return channel;
3774 }
3775 }
3776
3777 for (idx = ALI_PCM_OUT_CHANNEL_FIRST; idx <= ALI_PCM_OUT_CHANNEL_LAST;
3778 idx++) {
3779 if (!(bank->bitmap & (1 << idx))) {
3780 struct trident_channel *channel = &bank->channels[idx];
3781 bank->bitmap |= 1 << idx;
3782 channel->num = idx;
3783 return channel;
3784 }
3785 }
3786
3787 /* no more free channels avaliable */
3788 #if 0
3789 printk(KERN_ERR "ali: no more channels available on Bank A.\n");
3790 #endif /* 0 */
3791 return NULL;
3792 }
3793
3794 static struct trident_channel *
3795 ali_alloc_rec_pcm_channel(struct trident_card *card)
3796 {
3797 struct trident_pcm_bank *bank;
3798 int idx;
3799
3800 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_IN_SUPPORT)
3801 idx = ALI_SPDIF_IN_CHANNEL;
3802 else
3803 idx = ALI_PCM_IN_CHANNEL;
3804
3805 bank = &card->banks[BANK_A];
3806
3807 if (!(bank->bitmap & (1 << idx))) {
3808 struct trident_channel *channel = &bank->channels[idx];
3809 bank->bitmap |= 1 << idx;
3810 channel->num = idx;
3811 return channel;
3812 }
3813
3814 /* no free recordable channels avaliable */
3815 #if 0
3816 printk(KERN_ERR "ali: no recordable channels available on Bank A.\n");
3817 #endif /* 0 */
3818 return NULL;
3819 }
3820
3821 static void
3822 ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate)
3823 {
3824 unsigned char ch_st_sel;
3825 unsigned short status_rate;
3826
3827 switch (rate) {
3828 case 44100:
3829 status_rate = 0;
3830 break;
3831 case 32000:
3832 status_rate = 0x300;
3833 break;
3834 case 48000:
3835 default:
3836 status_rate = 0x200;
3837 break;
3838 }
3839
3840 /* select spdif_out */
3841 ch_st_sel = inb(TRID_REG(card, ALI_SPDIF_CTRL)) & ALI_SPDIF_OUT_CH_STATUS;
3842
3843 ch_st_sel |= 0x80; /* select right */
3844 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
3845 outb(status_rate | 0x20, TRID_REG(card, ALI_SPDIF_CS + 2));
3846
3847 ch_st_sel &= (~0x80); /* select left */
3848 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
3849 outw(status_rate | 0x10, TRID_REG(card, ALI_SPDIF_CS + 2));
3850 }
3851
3852 static void
3853 ali_address_interrupt(struct trident_card *card)
3854 {
3855 int i, channel;
3856 struct trident_state *state;
3857 u32 mask, channel_mask;
3858
3859 mask = trident_get_interrupt_mask(card, 0);
3860 for (i = 0; i < NR_HW_CH; i++) {
3861 if ((state = card->states[i]) == NULL)
3862 continue;
3863 channel = state->dmabuf.channel->num;
3864 if ((channel_mask = 1 << channel) & mask) {
3865 mask &= ~channel_mask;
3866 trident_ack_channel_interrupt(card, channel);
3867 udelay(100);
3868 state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE;
3869 trident_update_ptr(state);
3870 }
3871 }
3872 if (mask) {
3873 for (i = 0; i < NR_HW_CH; i++) {
3874 if (mask & (1 << i)) {
3875 printk("ali: spurious channel irq %d.\n", i);
3876 trident_ack_channel_interrupt(card, i);
3877 trident_stop_voice(card, i);
3878 trident_disable_voice_irq(card, i);
3879 }
3880 }
3881 }
3882 }
3883
3884 /* Updating the values of counters of other_states' DMAs without lock
3885 protection is no harm because all DMAs of multi-channels and interrupt
3886 depend on a master state's DMA, and changing the counters of the master
3887 state DMA is protected by a spinlock.
3888 */
3889 static int
3890 ali_write_5_1(struct trident_state *state, const char __user *buf,
3891 int cnt_for_multi_channel, unsigned int *copy_count,
3892 unsigned int *state_cnt)
3893 {
3894
3895 struct dmabuf *dmabuf = &state->dmabuf;
3896 struct dmabuf *dmabuf_temp;
3897 const char __user *buffer = buf;
3898 unsigned swptr, other_dma_nums, sample_s;
3899 unsigned int i, loop;
3900
3901 other_dma_nums = 4;
3902 sample_s = sample_size[dmabuf->fmt] >> 1;
3903 swptr = dmabuf->swptr;
3904
3905 if ((i = state->multi_channels_adjust_count) > 0) {
3906 if (i == 1) {
3907 if (copy_from_user(dmabuf->rawbuf + swptr,
3908 buffer, sample_s))
3909 return -EFAULT;
3910 seek_offset(swptr, buffer, cnt_for_multi_channel,
3911 sample_s, *copy_count);
3912 i--;
3913 (*state_cnt) += sample_s;
3914 state->multi_channels_adjust_count++;
3915 } else
3916 i = i - (state->chans_num - other_dma_nums);
3917 for (; (i < other_dma_nums) && (cnt_for_multi_channel > 0); i++) {
3918 dmabuf_temp = &state->other_states[i]->dmabuf;
3919 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3920 buffer, sample_s))
3921 return -EFAULT;
3922 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3923 sample_s, *copy_count);
3924 }
3925 if (cnt_for_multi_channel == 0)
3926 state->multi_channels_adjust_count += i;
3927 }
3928 if (cnt_for_multi_channel > 0) {
3929 loop = cnt_for_multi_channel / (state->chans_num * sample_s);
3930 for (i = 0; i < loop; i++) {
3931 if (copy_from_user(dmabuf->rawbuf + swptr, buffer,
3932 sample_s * 2))
3933 return -EFAULT;
3934 seek_offset(swptr, buffer, cnt_for_multi_channel,
3935 sample_s * 2, *copy_count);
3936 (*state_cnt) += (sample_s * 2);
3937
3938 dmabuf_temp = &state->other_states[0]->dmabuf;
3939 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3940 buffer, sample_s))
3941 return -EFAULT;
3942 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3943 sample_s, *copy_count);
3944
3945 dmabuf_temp = &state->other_states[1]->dmabuf;
3946 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3947 buffer, sample_s))
3948 return -EFAULT;
3949 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3950 sample_s, *copy_count);
3951
3952 dmabuf_temp = &state->other_states[2]->dmabuf;
3953 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3954 buffer, sample_s))
3955 return -EFAULT;
3956 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3957 sample_s, *copy_count);
3958
3959 dmabuf_temp = &state->other_states[3]->dmabuf;
3960 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr,
3961 buffer, sample_s))
3962 return -EFAULT;
3963 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel,
3964 sample_s, *copy_count);
3965 }
3966
3967 if (cnt_for_multi_channel > 0) {
3968 state->multi_channels_adjust_count = cnt_for_multi_channel / sample_s;
3969
3970 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
3971 return -EFAULT;
3972 seek_offset(swptr, buffer, cnt_for_multi_channel,
3973 sample_s, *copy_count);
3974 (*state_cnt) += sample_s;
3975
3976 if (cnt_for_multi_channel > 0) {
3977 if (copy_from_user(dmabuf->rawbuf + swptr,
3978 buffer, sample_s))
3979 return -EFAULT;
3980 seek_offset(swptr, buffer, cnt_for_multi_channel,
3981 sample_s, *copy_count);
3982 (*state_cnt) += sample_s;
3983
3984 if (cnt_for_multi_channel > 0) {
3985 int diff = state->chans_num - other_dma_nums;
3986 loop = state->multi_channels_adjust_count - diff;
3987 for (i = 0; i < loop; i++) {
3988 dmabuf_temp = &state->other_states[i]->dmabuf;
3989 if (copy_from_user(dmabuf_temp->rawbuf +
3990 dmabuf_temp->swptr,
3991 buffer, sample_s))
3992 return -EFAULT;
3993 seek_offset(dmabuf_temp->swptr, buffer,
3994 cnt_for_multi_channel,
3995 sample_s, *copy_count);
3996 }
3997 }
3998 }
3999 } else
4000 state->multi_channels_adjust_count = 0;
4001 }
4002 for (i = 0; i < other_dma_nums; i++) {
4003 dmabuf_temp = &state->other_states[i]->dmabuf;
4004 dmabuf_temp->swptr = dmabuf_temp->swptr % dmabuf_temp->dmasize;
4005 }
4006 return *state_cnt;
4007 }
4008
4009 static void
4010 ali_free_other_states_resources(struct trident_state *state)
4011 {
4012 int i;
4013 struct trident_card *card = state->card;
4014 struct trident_state *s;
4015 unsigned other_states_count;
4016
4017 other_states_count = state->chans_num - 2; /* except PCM L/R channels */
4018 for (i = 0; i < other_states_count; i++) {
4019 s = state->other_states[i];
4020 dealloc_dmabuf(&s->dmabuf, card->pci_dev);
4021 ali_disable_special_channel(s->card, s->dmabuf.channel->num);
4022 state->card->free_pcm_channel(s->card, s->dmabuf.channel->num);
4023 card->states[s->virt] = NULL;
4024 kfree(s);
4025 }
4026 }
4027
4028 static struct proc_dir_entry *res;
4029
4030 static int
4031 ali_write_proc(struct file *file, const char __user *buffer, unsigned long count, void *data)
4032 {
4033 struct trident_card *card = (struct trident_card *) data;
4034 unsigned long flags;
4035 char c;
4036
4037 if (count < 0)
4038 return -EINVAL;
4039 if (count == 0)
4040 return 0;
4041 if (get_user(c, buffer))
4042 return -EFAULT;
4043
4044 spin_lock_irqsave(&card->lock, flags);
4045 switch (c) {
4046 case '0':
4047 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4048 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
4049 break;
4050 case '1':
4051 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT |
4052 ALI_SPDIF_OUT_PCM);
4053 break;
4054 case '2':
4055 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT |
4056 ALI_SPDIF_OUT_NON_PCM);
4057 break;
4058 case '3':
4059 ali_disable_spdif_in(card); //default
4060 break;
4061 case '4':
4062 ali_setup_spdif_in(card);
4063 break;
4064 }
4065 spin_unlock_irqrestore(&card->lock, flags);
4066
4067 return count;
4068 }
4069
4070 /* OSS /dev/mixer file operation methods */
4071 static int
4072 trident_open_mixdev(struct inode *inode, struct file *file)
4073 {
4074 int i = 0;
4075 int minor = iminor(inode);
4076 struct trident_card *card = devs;
4077
4078 for (card = devs; card != NULL; card = card->next)
4079 for (i = 0; i < NR_AC97; i++)
4080 if (card->ac97_codec[i] != NULL &&
4081 card->ac97_codec[i]->dev_mixer == minor)
4082 goto match;
4083
4084 if (!card) {
4085 return -ENODEV;
4086 }
4087 match:
4088 file->private_data = card->ac97_codec[i];
4089
4090 return nonseekable_open(inode, file);
4091 }
4092
4093 static int
4094 trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
4095 unsigned long arg)
4096 {
4097 struct ac97_codec *codec = (struct ac97_codec *) file->private_data;
4098
4099 return codec->mixer_ioctl(codec, cmd, arg);
4100 }
4101
4102 static /*const */ struct file_operations trident_mixer_fops = {
4103 .owner = THIS_MODULE,
4104 .llseek = no_llseek,
4105 .ioctl = trident_ioctl_mixdev,
4106 .open = trident_open_mixdev,
4107 };
4108
4109 static int
4110 ali_reset_5451(struct trident_card *card)
4111 {
4112 struct pci_dev *pci_dev = NULL;
4113 unsigned int dwVal;
4114 unsigned short wCount, wReg;
4115
4116 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
4117 pci_dev);
4118 if (pci_dev == NULL)
4119 return -1;
4120
4121 pci_read_config_dword(pci_dev, 0x7c, &dwVal);
4122 pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000);
4123 udelay(5000);
4124 pci_read_config_dword(pci_dev, 0x7c, &dwVal);
4125 pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff);
4126 udelay(5000);
4127 pci_dev_put(pci_dev);
4128
4129 pci_dev = card->pci_dev;
4130 if (pci_dev == NULL)
4131 return -1;
4132
4133 pci_read_config_dword(pci_dev, 0x44, &dwVal);
4134 pci_write_config_dword(pci_dev, 0x44, dwVal | 0x000c0000);
4135 udelay(500);
4136 pci_read_config_dword(pci_dev, 0x44, &dwVal);
4137 pci_write_config_dword(pci_dev, 0x44, dwVal & 0xfffbffff);
4138 udelay(5000);
4139
4140 /* TODO: recognize if we have a PM capable codec and only do this */
4141 /* if the codec is PM capable */
4142 wCount = 2000;
4143 while (wCount--) {
4144 wReg = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
4145 if ((wReg & 0x000f) == 0x000f)
4146 return 0;
4147 udelay(5000);
4148 }
4149 /* This is non fatal if you have a non PM capable codec.. */
4150 return 0;
4151 }
4152
4153 /* AC97 codec initialisation. */
4154 static int __devinit
4155 trident_ac97_init(struct trident_card *card)
4156 {
4157 int num_ac97 = 0;
4158 unsigned long ready_2nd = 0;
4159 struct ac97_codec *codec;
4160 int i = 0;
4161
4162 /* initialize controller side of AC link, and find out if secondary codes
4163 really exist */
4164 switch (card->pci_id) {
4165 case PCI_DEVICE_ID_ALI_5451:
4166 if (ali_reset_5451(card)) {
4167 printk(KERN_ERR "trident_ac97_init: error "
4168 "resetting 5451.\n");
4169 return -1;
4170 }
4171 outl(0x80000001, TRID_REG(card, ALI_GLOBAL_CONTROL));
4172 outl(0x00000000, TRID_REG(card, T4D_AINTEN_A));
4173 outl(0xffffffff, TRID_REG(card, T4D_AINT_A));
4174 outl(0x00000000, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
4175 outb(0x10, TRID_REG(card, ALI_MPUR2));
4176 ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
4177 ready_2nd &= 0x3fff;
4178 outl(ready_2nd | PCMOUT | 0x8000, TRID_REG(card, ALI_SCTRL));
4179 ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
4180 ready_2nd &= SI_AC97_SECONDARY_READY;
4181 if (card->revision < ALI_5451_V02)
4182 ready_2nd = 0;
4183 break;
4184 case PCI_DEVICE_ID_SI_7018:
4185 /* disable AC97 GPIO interrupt */
4186 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
4187 /* when power up the AC link is in cold reset mode so stop it */
4188 outl(PCMOUT | SURROUT | CENTEROUT | LFEOUT | SECONDARY_ID,
4189 TRID_REG(card, SI_SERIAL_INTF_CTRL));
4190 /* it take a long time to recover from a cold reset */
4191 /* (especially when you have more than one codec) */
4192 udelay(2000);
4193 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
4194 ready_2nd &= SI_AC97_SECONDARY_READY;
4195 break;
4196 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
4197 /* playback on */
4198 outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
4199 break;
4200 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
4201 /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */
4202 outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
4203 ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT));
4204 ready_2nd &= NX_AC97_SECONDARY_READY;
4205 break;
4206 case PCI_DEVICE_ID_INTERG_5050:
4207 /* disable AC97 GPIO interrupt */
4208 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
4209 /* when power up, the AC link is in cold reset mode, so stop it */
4210 outl(PCMOUT | SURROUT | CENTEROUT | LFEOUT,
4211 TRID_REG(card, SI_SERIAL_INTF_CTRL));
4212 /* it take a long time to recover from a cold reset (especially */
4213 /* when you have more than one codec) */
4214 udelay(2000);
4215 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
4216 ready_2nd &= SI_AC97_SECONDARY_READY;
4217 break;
4218 }
4219
4220 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
4221 if ((codec = ac97_alloc_codec()) == NULL)
4222 return -ENOMEM;
4223
4224 /* initialize some basic codec information, other fields */
4225 /* will be filled in ac97_probe_codec */
4226 codec->private_data = card;
4227 codec->id = num_ac97;
4228
4229 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4230 codec->codec_read = ali_ac97_read;
4231 codec->codec_write = ali_ac97_write;
4232 } else {
4233 codec->codec_read = trident_ac97_get;
4234 codec->codec_write = trident_ac97_set;
4235 }
4236
4237 if (ac97_probe_codec(codec) == 0)
4238 break;
4239
4240 codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1);
4241 if (codec->dev_mixer < 0) {
4242 printk(KERN_ERR "trident: couldn't register mixer!\n");
4243 ac97_release_codec(codec);
4244 break;
4245 }
4246
4247 card->ac97_codec[num_ac97] = codec;
4248
4249 /* if there is no secondary codec at all, don't probe any more */
4250 if (!ready_2nd)
4251 break;
4252 }
4253
4254 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4255 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
4256 if (card->ac97_codec[num_ac97] == NULL)
4257 break;
4258 for (i = 0; i < 64; i++) {
4259 u16 reg = ali_ac97_get(card, num_ac97, i * 2);
4260 card->mixer_regs[i][num_ac97] = reg;
4261 }
4262 }
4263 }
4264 return num_ac97 + 1;
4265 }
4266
4267 #ifdef SUPPORT_JOYSTICK
4268 /* Gameport functions for the cards ADC gameport */
4269
4270 static unsigned char trident_game_read(struct gameport *gameport)
4271 {
4272 struct trident_card *card = gameport->port_data;
4273
4274 return inb(TRID_REG(card, T4D_GAME_LEG));
4275 }
4276
4277 static void trident_game_trigger(struct gameport *gameport)
4278 {
4279 struct trident_card *card = gameport->port_data;
4280
4281 outb(0xff, TRID_REG(card, T4D_GAME_LEG));
4282 }
4283
4284 static int trident_game_cooked_read(struct gameport *gameport,
4285 int *axes, int *buttons)
4286 {
4287 struct trident_card *card = gameport->port_data;
4288 int i;
4289
4290 *buttons = (~inb(TRID_REG(card, T4D_GAME_LEG)) >> 4) & 0xf;
4291
4292 for (i = 0; i < 4; i++) {
4293 axes[i] = inw(TRID_REG(card, T4D_GAME_AXD) + i * sizeof (u16));
4294 if (axes[i] == 0xffff)
4295 axes[i] = -1;
4296 }
4297
4298 return 0;
4299 }
4300
4301 static int trident_game_open(struct gameport *gameport, int mode)
4302 {
4303 struct trident_card *card = gameport->port_data;
4304
4305 switch (mode) {
4306 case GAMEPORT_MODE_COOKED:
4307 outb(0x80, TRID_REG(card, T4D_GAME_CR));
4308 msleep(20);
4309 return 0;
4310 case GAMEPORT_MODE_RAW:
4311 outb(0x00, TRID_REG(card, T4D_GAME_CR));
4312 return 0;
4313 default:
4314 return -1;
4315 }
4316
4317 return 0;
4318 }
4319
4320 static int __devinit trident_register_gameport(struct trident_card *card)
4321 {
4322 struct gameport *gp;
4323
4324 card->gameport = gp = gameport_allocate_port();
4325 if (!gp) {
4326 printk(KERN_ERR "trident: can not allocate memory for gameport\n");
4327 return -ENOMEM;
4328 }
4329
4330 gameport_set_name(gp, "Trident 4DWave");
4331 gameport_set_phys(gp, "pci%s/gameport0", pci_name(card->pci_dev));
4332 gp->read = trident_game_read;
4333 gp->trigger = trident_game_trigger;
4334 gp->cooked_read = trident_game_cooked_read;
4335 gp->open = trident_game_open;
4336 gp->fuzz = 64;
4337 gp->port_data = card;
4338
4339 gameport_register_port(gp);
4340
4341 return 0;
4342 }
4343
4344 static inline void trident_unregister_gameport(struct trident_card *card)
4345 {
4346 if (card->gameport)
4347 gameport_unregister_port(card->gameport);
4348 }
4349
4350 #else
4351 static inline int trident_register_gameport(struct trident_card *card) { return -ENOSYS; }
4352 static inline void trident_unregister_gameport(struct trident_card *card) { }
4353 #endif /* SUPPORT_JOYSTICK */
4354
4355 /* install the driver, we do not allocate hardware channel nor DMA buffer */
4356 /* now, they are defered until "ACCESS" time (in prog_dmabuf called by */
4357 /* open/read/write/ioctl/mmap) */
4358 static int __devinit
4359 trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
4360 {
4361 unsigned long iobase;
4362 struct trident_card *card;
4363 u8 bits;
4364 u8 revision;
4365 int i = 0;
4366 u16 temp;
4367 struct pci_dev *pci_dev_m1533 = NULL;
4368 int rc = -ENODEV;
4369 u64 dma_mask;
4370
4371 if (pci_enable_device(pci_dev))
4372 goto out;
4373
4374 if (pci_dev->device == PCI_DEVICE_ID_ALI_5451)
4375 dma_mask = ALI_DMA_MASK;
4376 else
4377 dma_mask = TRIDENT_DMA_MASK;
4378 if (pci_set_dma_mask(pci_dev, dma_mask)) {
4379 printk(KERN_ERR "trident: architecture does not support"
4380 " %s PCI busmaster DMA\n",
4381 pci_dev->device == PCI_DEVICE_ID_ALI_5451 ?
4382 "32-bit" : "30-bit");
4383 goto out;
4384 }
4385 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
4386
4387 if (pci_id->device == PCI_DEVICE_ID_INTERG_5050)
4388 iobase = pci_resource_start(pci_dev, 1);
4389 else
4390 iobase = pci_resource_start(pci_dev, 0);
4391
4392 if (!request_region(iobase, 256, card_names[pci_id->driver_data])) {
4393 printk(KERN_ERR "trident: can't allocate I/O space at "
4394 "0x%4.4lx\n", iobase);
4395 goto out;
4396 }
4397
4398 rc = -ENOMEM;
4399 if ((card = kzalloc(sizeof(*card), GFP_KERNEL)) == NULL) {
4400 printk(KERN_ERR "trident: out of memory\n");
4401 goto out_release_region;
4402 }
4403
4404 init_timer(&card->timer);
4405 card->iobase = iobase;
4406 card->pci_dev = pci_dev_get(pci_dev);
4407 card->pci_id = pci_id->device;
4408 card->revision = revision;
4409 card->irq = pci_dev->irq;
4410 card->next = devs;
4411 card->magic = TRIDENT_CARD_MAGIC;
4412 card->banks[BANK_A].addresses = &bank_a_addrs;
4413 card->banks[BANK_A].bitmap = 0UL;
4414 card->banks[BANK_B].addresses = &bank_b_addrs;
4415 card->banks[BANK_B].bitmap = 0UL;
4416
4417 mutex_init(&card->open_mutex);
4418 spin_lock_init(&card->lock);
4419 init_timer(&card->timer);
4420
4421 devs = card;
4422
4423 pci_set_master(pci_dev);
4424
4425 printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n",
4426 card_names[pci_id->driver_data], card->iobase, card->irq);
4427
4428 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4429 /* ALi channel Management */
4430 card->alloc_pcm_channel = ali_alloc_pcm_channel;
4431 card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel;
4432 card->free_pcm_channel = ali_free_pcm_channel;
4433
4434 card->address_interrupt = ali_address_interrupt;
4435
4436 /* Added by Matt Wu 01-05-2001 for spdif in */
4437 card->multi_channel_use_count = 0;
4438 card->rec_channel_use_count = 0;
4439
4440 /* ALi SPDIF OUT function */
4441 if (card->revision == ALI_5451_V02) {
4442 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4443 res = create_proc_entry("ALi5451", 0, NULL);
4444 if (res) {
4445 res->write_proc = ali_write_proc;
4446 res->data = card;
4447 }
4448 }
4449
4450 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
4451 card->hwvolctl = 0;
4452 pci_dev_m1533 = pci_find_device(PCI_VENDOR_ID_AL,
4453 PCI_DEVICE_ID_AL_M1533,
4454 pci_dev_m1533);
4455 rc = -ENODEV;
4456 if (pci_dev_m1533 == NULL)
4457 goto out_proc_fs;
4458 pci_read_config_byte(pci_dev_m1533, 0x63, &bits);
4459 if (bits & (1 << 5))
4460 card->hwvolctl = 1;
4461 if (card->hwvolctl) {
4462 /* Clear m1533 pci cfg 78h bit 30 to zero, which makes
4463 GPIO11/12/13 work as ACGP_UP/DOWN/MUTE. */
4464 pci_read_config_byte(pci_dev_m1533, 0x7b, &bits);
4465 bits &= 0xbf; /*clear bit 6 */
4466 pci_write_config_byte(pci_dev_m1533, 0x7b, bits);
4467 }
4468 } else if (card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
4469 card->alloc_pcm_channel = cyber_alloc_pcm_channel;
4470 card->alloc_rec_pcm_channel = cyber_alloc_pcm_channel;
4471 card->free_pcm_channel = cyber_free_pcm_channel;
4472 card->address_interrupt = cyber_address_interrupt;
4473 cyber_init_ritual(card);
4474 } else {
4475 card->alloc_pcm_channel = trident_alloc_pcm_channel;
4476 card->alloc_rec_pcm_channel = trident_alloc_pcm_channel;
4477 card->free_pcm_channel = trident_free_pcm_channel;
4478 card->address_interrupt = trident_address_interrupt;
4479 }
4480
4481 /* claim our irq */
4482 rc = -ENODEV;
4483 if (request_irq(card->irq, &trident_interrupt, IRQF_SHARED,
4484 card_names[pci_id->driver_data], card)) {
4485 printk(KERN_ERR "trident: unable to allocate irq %d\n",
4486 card->irq);
4487 goto out_proc_fs;
4488 }
4489 /* register /dev/dsp */
4490 if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) {
4491 printk(KERN_ERR "trident: couldn't register DSP device!\n");
4492 goto out_free_irq;
4493 }
4494 card->mixer_regs_ready = 0;
4495 /* initialize AC97 codec and register /dev/mixer */
4496 if (trident_ac97_init(card) <= 0) {
4497 /* unregister audio devices */
4498 for (i = 0; i < NR_AC97; i++) {
4499 if (card->ac97_codec[i] != NULL) {
4500 struct ac97_codec* codec = card->ac97_codec[i];
4501 unregister_sound_mixer(codec->dev_mixer);
4502 ac97_release_codec(codec);
4503 }
4504 }
4505 goto out_unregister_sound_dsp;
4506 }
4507 card->mixer_regs_ready = 1;
4508 outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
4509
4510 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4511 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
4512 if (card->hwvolctl) {
4513 /* Enable GPIO IRQ (MISCINT bit 18h) */
4514 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
4515 temp |= 0x0004;
4516 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
4517
4518 /* Enable H/W Volume Control GLOVAL CONTROL bit 0 */
4519 temp = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
4520 temp |= 0x0001;
4521 outw(temp, TRID_REG(card, ALI_GLOBAL_CONTROL));
4522
4523 }
4524 if (card->revision == ALI_5451_V02)
4525 ali_close_multi_channels();
4526 /* edited by HMSEO for GT sound */
4527 #if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC)
4528 {
4529 u16 ac97_data;
4530 extern struct hwrpb_struct *hwrpb;
4531
4532 if ((hwrpb->sys_type) == 201) {
4533 printk(KERN_INFO "trident: Running on Alpha system "
4534 "type Nautilus\n");
4535 ac97_data = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
4536 ali_ac97_set(card, 0, AC97_POWER_CONTROL,
4537 ac97_data | ALI_EAPD_POWER_DOWN);
4538 }
4539 }
4540 #endif /* CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC */
4541 /* edited by HMSEO for GT sound */
4542 }
4543 rc = 0;
4544 pci_set_drvdata(pci_dev, card);
4545
4546 /* Enable Address Engine Interrupts */
4547 trident_enable_loop_interrupts(card);
4548
4549 /* Register gameport */
4550 trident_register_gameport(card);
4551
4552 out:
4553 return rc;
4554
4555 out_unregister_sound_dsp:
4556 unregister_sound_dsp(card->dev_audio);
4557 out_free_irq:
4558 free_irq(card->irq, card);
4559 out_proc_fs:
4560 pci_dev_put(card->pci_dev);
4561 if (res) {
4562 remove_proc_entry("ALi5451", NULL);
4563 res = NULL;
4564 }
4565 kfree(card);
4566 devs = NULL;
4567 out_release_region:
4568 release_region(iobase, 256);
4569 return rc;
4570 }
4571
4572 static void __devexit
4573 trident_remove(struct pci_dev *pci_dev)
4574 {
4575 int i;
4576 struct trident_card *card = pci_get_drvdata(pci_dev);
4577
4578 /*
4579 * Kill running timers before unload. We can't have them
4580 * going off after rmmod!
4581 */
4582 if (card->hwvolctl)
4583 del_timer_sync(&card->timer);
4584
4585 /* ALi S/PDIF and Power Management */
4586 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4587 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4588 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
4589 ali_disable_spdif_in(card);
4590 remove_proc_entry("ALi5451", NULL);
4591 }
4592
4593 /* Unregister gameport */
4594 trident_unregister_gameport(card);
4595
4596 /* Kill interrupts, and SP/DIF */
4597 trident_disable_loop_interrupts(card);
4598
4599 /* free hardware resources */
4600 free_irq(card->irq, card);
4601 release_region(card->iobase, 256);
4602
4603 /* unregister audio devices */
4604 for (i = 0; i < NR_AC97; i++)
4605 if (card->ac97_codec[i] != NULL) {
4606 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
4607 ac97_release_codec(card->ac97_codec[i]);
4608 }
4609 unregister_sound_dsp(card->dev_audio);
4610
4611 pci_set_drvdata(pci_dev, NULL);
4612 pci_dev_put(card->pci_dev);
4613 kfree(card);
4614 }
4615
4616 MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee, Muli Ben-Yehuda");
4617 MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 and Tvia/IGST CyberPro5050 PCI "
4618 "Audio Driver");
4619 MODULE_LICENSE("GPL");
4620
4621 #define TRIDENT_MODULE_NAME "trident"
4622
4623 static struct pci_driver trident_pci_driver = {
4624 .name = TRIDENT_MODULE_NAME,
4625 .id_table = trident_pci_tbl,
4626 .probe = trident_probe,
4627 .remove = __devexit_p(trident_remove),
4628 #ifdef CONFIG_PM
4629 .suspend = trident_suspend,
4630 .resume = trident_resume
4631 #endif
4632 };
4633
4634 static int __init
4635 trident_init_module(void)
4636 {
4637 printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451,Tvia CyberPro "
4638 "5050 PCI Audio, version " DRIVER_VERSION ", " __TIME__ " "
4639 __DATE__ "\n");
4640
4641 return pci_register_driver(&trident_pci_driver);
4642 }
4643
4644 static void __exit
4645 trident_cleanup_module(void)
4646 {
4647 pci_unregister_driver(&trident_pci_driver);
4648 }
4649
4650 module_init(trident_init_module);
4651 module_exit(trident_cleanup_module);
Log-structured file system for Linux