include/asm-parisc/pdc.h

   1 #ifndef _PARISC_PDC_H
   2 #define _PARISC_PDC_H
   3
   4 /*
   5  *      PDC return values ...
   6  *      All PDC calls return a subset of these errors.
   7  */
   8
   9 #define PDC_WARN                  3     /* Call completed with a warning */
  10 #define PDC_REQ_ERR_1             2     /* See above                     */
  11 #define PDC_REQ_ERR_0             1     /* Call would generate a requestor error */
  12 #define PDC_OK                    0     /* Call completed successfully  */
  13 #define PDC_BAD_PROC             -1     /* Called non-existent procedure*/
  14 #define PDC_BAD_OPTION           -2     /* Called with non-existent option */
  15 #define PDC_ERROR                -3     /* Call could not complete without an error */
  16 #define PDC_NE_MOD               -5     /* Module not found             */
  17 #define PDC_NE_CELL_MOD          -7     /* Cell module not found        */
  18 #define PDC_INVALID_ARG         -10     /* Called with an invalid argument */
  19 #define PDC_BUS_POW_WARN        -12     /* Call could not complete in allowed power budget */
  20 #define PDC_NOT_NARROW          -17     /* Narrow mode not supported    */
  21
  22 /*
  23  *      PDC entry points...
  24  */
  25
  26 #define PDC_POW_FAIL    1               /* perform a power-fail         */
  27 #define PDC_POW_FAIL_PREPARE    0       /* prepare for powerfail        */
  28
  29 #define PDC_CHASSIS     2               /* PDC-chassis functions        */
  30 #define PDC_CHASSIS_DISP        0       /* update chassis display       */
  31 #define PDC_CHASSIS_WARN        1       /* return chassis warnings      */
  32 #define PDC_CHASSIS_DISPWARN    2       /* update&return chassis status */
  33 #define PDC_RETURN_CHASSIS_INFO 128     /* HVERSION dependent: return chassis LED/LCD info  */
  34
  35 #define PDC_PIM         3               /* Get PIM data                 */
  36 #define PDC_PIM_HPMC            0       /* Transfer HPMC data           */
  37 #define PDC_PIM_RETURN_SIZE     1       /* Get Max buffer needed for PIM*/
  38 #define PDC_PIM_LPMC            2       /* Transfer HPMC data           */
  39 #define PDC_PIM_SOFT_BOOT       3       /* Transfer Soft Boot data      */
  40 #define PDC_PIM_TOC             4       /* Transfer TOC data            */
  41
  42 #define PDC_MODEL       4               /* PDC model information call   */
  43 #define PDC_MODEL_INFO          0       /* returns information          */
  44 #define PDC_MODEL_BOOTID        1       /* set the BOOT_ID              */
  45 #define PDC_MODEL_VERSIONS      2       /* returns cpu-internal versions*/
  46 #define PDC_MODEL_SYSMODEL      3       /* return system model info     */
  47 #define PDC_MODEL_ENSPEC        4       /* enable specific option       */
  48 #define PDC_MODEL_DISPEC        5       /* disable specific option      */
  49 #define PDC_MODEL_CPU_ID        6       /* returns cpu-id (only newer machines!) */
  50 #define PDC_MODEL_CAPABILITIES  7       /* returns OS32/OS64-flags      */
  51 /* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */
  52 #define  PDC_MODEL_IOPDIR_FDC           (1 << 2)
  53 #define  PDC_MODEL_NVA_MASK             (3 << 4)
  54 #define  PDC_MODEL_NVA_SUPPORTED        (0 << 4)
  55 #define  PDC_MODEL_NVA_SLOW             (1 << 4)
  56 #define  PDC_MODEL_NVA_UNSUPPORTED      (3 << 4)
  57 #define PDC_MODEL_GET_BOOT__OP  8       /* returns boot test options    */
  58 #define PDC_MODEL_SET_BOOT__OP  9       /* set boot test options        */
  59
  60 #define PA89_INSTRUCTION_SET    0x4     /* capatibilies returned        */
  61 #define PA90_INSTRUCTION_SET    0x8
  62
  63 #define PDC_CACHE       5               /* return/set cache (& TLB) info*/
  64 #define PDC_CACHE_INFO          0       /* returns information          */
  65 #define PDC_CACHE_SET_COH       1       /* set coherence state          */
  66 #define PDC_CACHE_RET_SPID      2       /* returns space-ID bits        */
  67
  68 #define PDC_HPA         6               /* return HPA of processor      */
  69 #define PDC_HPA_PROCESSOR       0
  70 #define PDC_HPA_MODULES         1
  71
  72 #define PDC_COPROC      7               /* Co-Processor (usually FP unit(s)) */
  73 #define PDC_COPROC_CFG          0       /* Co-Processor Cfg (FP unit(s) enabled?) */
  74
  75 #define PDC_IODC        8               /* talk to IODC                 */
  76 #define PDC_IODC_READ           0       /* read IODC entry point        */
  77 /*      PDC_IODC_RI_                     * INDEX parameter of PDC_IODC_READ */
  78 #define PDC_IODC_RI_DATA_BYTES  0       /* IODC Data Bytes              */
  79 /*                              1, 2       obsolete - HVERSION dependent*/
  80 #define PDC_IODC_RI_INIT        3       /* Initialize module            */
  81 #define PDC_IODC_RI_IO          4       /* Module input/output          */
  82 #define PDC_IODC_RI_SPA         5       /* Module input/output          */
  83 #define PDC_IODC_RI_CONFIG      6       /* Module input/output          */
  84 /*                              7         obsolete - HVERSION dependent */
  85 #define PDC_IODC_RI_TEST        8       /* Module input/output          */
  86 #define PDC_IODC_RI_TLB         9       /* Module input/output          */
  87 #define PDC_IODC_NINIT          2       /* non-destructive init         */
  88 #define PDC_IODC_DINIT          3       /* destructive init             */
  89 #define PDC_IODC_MEMERR         4       /* check for memory errors      */
  90 #define PDC_IODC_INDEX_DATA     0       /* get first 16 bytes from mod IODC */
  91 #define PDC_IODC_BUS_ERROR      -4      /* bus error return value       */
  92 #define PDC_IODC_INVALID_INDEX  -5      /* invalid index return value   */
  93 #define PDC_IODC_COUNT          -6      /* count is too small           */
  94
  95 #define PDC_TOD         9               /* time-of-day clock (TOD)      */
  96 #define PDC_TOD_READ            0       /* read TOD                     */
  97 #define PDC_TOD_WRITE           1       /* write TOD                    */
  98
  99
 100 #define PDC_STABLE      10              /* stable storage (sprockets)   */
 101 #define PDC_STABLE_READ         0
 102 #define PDC_STABLE_WRITE        1
 103 #define PDC_STABLE_RETURN_SIZE  2
 104 #define PDC_STABLE_VERIFY_CONTENTS 3
 105 #define PDC_STABLE_INITIALIZE   4
 106
 107 #define PDC_NVOLATILE   11              /* often not implemented        */
 108
 109 #define PDC_ADD_VALID   12              /* Memory validation PDC call   */
 110 #define PDC_ADD_VALID_VERIFY    0       /* Make PDC_ADD_VALID verify region */
 111
 112 #define PDC_INSTR       15              /* get instr to invoke PDCE_CHECK() */
 113
 114 #define PDC_PROC        16              /* (sprockets)                  */
 115
 116 #define PDC_CONFIG      16              /* (sprockets)                  */
 117 #define PDC_CONFIG_DECONFIG     0
 118 #define PDC_CONFIG_DRECONFIG    1
 119 #define PDC_CONFIG_DRETURN_CONFIG 2
 120
 121 #define PDC_BLOCK_TLB   18              /* manage hardware block-TLB    */
 122 #define PDC_BTLB_INFO           0       /* returns parameter            */
 123 #define PDC_BTLB_INSERT         1       /* insert BTLB entry            */
 124 #define PDC_BTLB_PURGE          2       /* purge BTLB entries           */
 125 #define PDC_BTLB_PURGE_ALL      3       /* purge all BTLB entries       */
 126
 127 #define PDC_TLB         19              /* manage hardware TLB miss handling */
 128 #define PDC_TLB_INFO            0       /* returns parameter            */
 129 #define PDC_TLB_SETUP           1       /* set up miss handling         */
 130
 131 #define PDC_MEM         20              /* Manage memory                */
 132 #define PDC_MEM_MEMINFO         0
 133 #define PDC_MEM_ADD_PAGE        1
 134 #define PDC_MEM_CLEAR_PDT       2
 135 #define PDC_MEM_READ_PDT        3
 136 #define PDC_MEM_RESET_CLEAR     4
 137 #define PDC_MEM_GOODMEM         5
 138 #define PDC_MEM_TABLE           128     /* Non contig mem map (sprockets) */
 139 #define PDC_MEM_RETURN_ADDRESS_TABLE    PDC_MEM_TABLE
 140 #define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE   131
 141 #define PDC_MEM_GET_MEMORY_SYSTEM_TABLES        132
 142 #define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
 143
 144 #define PDC_MEM_RET_SBE_REPLACED        5       /* PDC_MEM return values */
 145 #define PDC_MEM_RET_DUPLICATE_ENTRY     4
 146 #define PDC_MEM_RET_BUF_SIZE_SMALL      1
 147 #define PDC_MEM_RET_PDT_FULL            -11
 148 #define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
 149
 150 #define PDC_PSW         21              /* Get/Set default System Mask  */
 151 #define PDC_PSW_MASK            0       /* Return mask                  */
 152 #define PDC_PSW_GET_DEFAULTS    1       /* Return defaults              */
 153 #define PDC_PSW_SET_DEFAULTS    2       /* Set default                  */
 154 #define PDC_PSW_ENDIAN_BIT      1       /* set for big endian           */
 155 #define PDC_PSW_WIDE_BIT        2       /* set for wide mode            */
 156
 157 #define PDC_SYSTEM_MAP  22              /* find system modules          */
 158 #define PDC_FIND_MODULE         0
 159 #define PDC_FIND_ADDRESS        1
 160 #define PDC_TRANSLATE_PATH      2
 161
 162 #define PDC_SOFT_POWER  23              /* soft power switch            */
 163 #define PDC_SOFT_POWER_INFO     0       /* return info about the soft power switch */
 164 #define PDC_SOFT_POWER_ENABLE   1       /* enable/disable soft power switch */
 165
 166
 167 /* HVERSION dependent */
 168
 169 /* The PDC_MEM_MAP calls */
 170 #define PDC_MEM_MAP     128             /* on s700: return page info    */
 171 #define PDC_MEM_MAP_HPA         0       /* returns hpa of a module      */
 172
 173 #define PDC_EEPROM      129             /* EEPROM access                */
 174 #define PDC_EEPROM_READ_WORD    0
 175 #define PDC_EEPROM_WRITE_WORD   1
 176 #define PDC_EEPROM_READ_BYTE    2
 177 #define PDC_EEPROM_WRITE_BYTE   3
 178 #define PDC_EEPROM_EEPROM_PASSWORD -1000
 179
 180 #define PDC_NVM         130             /* NVM (non-volatile memory) access */
 181 #define PDC_NVM_READ_WORD       0
 182 #define PDC_NVM_WRITE_WORD      1
 183 #define PDC_NVM_READ_BYTE       2
 184 #define PDC_NVM_WRITE_BYTE      3
 185
 186 #define PDC_SEED_ERROR  132             /* (sprockets)                  */
 187
 188 #define PDC_IO          135             /* log error info, reset IO system */
 189 #define PDC_IO_READ_AND_CLEAR_ERRORS    0
 190 #define PDC_IO_RESET                    1
 191 #define PDC_IO_RESET_DEVICES            2
 192 /* sets bits 6&7 (little endian) of the HcControl Register */
 193 #define PDC_IO_USB_SUSPEND      0xC000000000000000
 194 #define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5      /* return value */
 195 #define PDC_IO_NO_SUSPEND               -6      /* return value */
 196
 197 #define PDC_BROADCAST_RESET 136         /* reset all processors         */
 198 #define PDC_DO_RESET            0       /* option: perform a broadcast reset */
 199 #define PDC_DO_FIRM_TEST_RESET  1       /* Do broadcast reset with bitmap */
 200 #define PDC_BR_RECONFIGURATION  2       /* reset w/reconfiguration      */
 201 #define PDC_FIRM_TEST_MAGIC     0xab9ec36fUL    /* for this reboot only */
 202
 203 #define PDC_LAN_STATION_ID 138          /* Hversion dependent mechanism for */
 204 #define PDC_LAN_STATION_ID_READ 0       /* getting the lan station address  */
 205
 206 #define PDC_LAN_STATION_ID_SIZE 6
 207
 208 #define PDC_CHECK_RANGES 139            /* (sprockets)                  */
 209
 210 #define PDC_NV_SECTIONS 141             /* (sprockets)                  */
 211
 212 #define PDC_PERFORMANCE 142             /* performance monitoring       */
 213
 214 #define PDC_SYSTEM_INFO 143             /* system information           */
 215 #define PDC_SYSINFO_RETURN_INFO_SIZE    0
 216 #define PDC_SYSINFO_RRETURN_SYS_INFO    1
 217 #define PDC_SYSINFO_RRETURN_ERRORS      2
 218 #define PDC_SYSINFO_RRETURN_WARNINGS    3
 219 #define PDC_SYSINFO_RETURN_REVISIONS    4
 220 #define PDC_SYSINFO_RRETURN_DIAGNOSE    5
 221 #define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
 222
 223 #define PDC_RDR         144             /* (sprockets)                  */
 224 #define PDC_RDR_READ_BUFFER     0
 225 #define PDC_RDR_READ_SINGLE     1
 226 #define PDC_RDR_WRITE_SINGLE    2
 227
 228 #define PDC_INTRIGUE    145             /* (sprockets)                  */
 229 #define PDC_INTRIGUE_WRITE_BUFFER        0
 230 #define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
 231 #define PDC_INTRIGUE_START_CPU_COUNTERS  2
 232 #define PDC_INTRIGUE_STOP_CPU_COUNTERS   3
 233
 234 #define PDC_STI         146             /* STI access                   */
 235 /* same as PDC_PCI_XXX values (see below) */
 236
 237 /* Legacy PDC definitions for same stuff */
 238 #define PDC_PCI_INDEX   147
 239 #define PDC_PCI_INTERFACE_INFO          0
 240 #define PDC_PCI_SLOT_INFO               1
 241 #define PDC_PCI_INFLIGHT_BYTES          2
 242 #define PDC_PCI_READ_CONFIG             3
 243 #define PDC_PCI_WRITE_CONFIG            4
 244 #define PDC_PCI_READ_PCI_IO             5
 245 #define PDC_PCI_WRITE_PCI_IO            6
 246 #define PDC_PCI_READ_CONFIG_DELAY       7
 247 #define PDC_PCI_UPDATE_CONFIG_DELAY     8
 248 #define PDC_PCI_PCI_PATH_TO_PCI_HPA     9
 249 #define PDC_PCI_PCI_HPA_TO_PCI_PATH     10
 250 #define PDC_PCI_PCI_PATH_TO_PCI_BUS     11
 251 #define PDC_PCI_PCI_RESERVED            12
 252 #define PDC_PCI_PCI_INT_ROUTE_SIZE      13
 253 #define PDC_PCI_GET_INT_TBL_SIZE        PDC_PCI_PCI_INT_ROUTE_SIZE
 254 #define PDC_PCI_PCI_INT_ROUTE           14
 255 #define PDC_PCI_GET_INT_TBL             PDC_PCI_PCI_INT_ROUTE
 256 #define PDC_PCI_READ_MON_TYPE           15
 257 #define PDC_PCI_WRITE_MON_TYPE          16
 258
 259
 260 /* Get SCSI Interface Card info:  SDTR, SCSI ID, mode (SE vs LVD) */
 261 #define PDC_INITIATOR   163
 262 #define PDC_GET_INITIATOR       0
 263 #define PDC_SET_INITIATOR       1
 264 #define PDC_DELETE_INITIATOR    2
 265 #define PDC_RETURN_TABLE_SIZE   3
 266 #define PDC_RETURN_TABLE        4
 267
 268 #define PDC_LINK        165             /* (sprockets)                  */
 269 #define PDC_LINK_PCI_ENTRY_POINTS       0  /* list (Arg1) = 0 */
 270 #define PDC_LINK_USB_ENTRY_POINTS       1  /* list (Arg1) = 1 */
 271
 272 /* cl_class
 273  * page 3-33 of IO-Firmware ARS
 274  * IODC ENTRY_INIT(Search first) RET[1]
 275  */
 276 #define CL_NULL         0       /* invalid */
 277 #define CL_RANDOM       1       /* random access (as disk) */
 278 #define CL_SEQU         2       /* sequential access (as tape) */
 279 #define CL_DUPLEX       7       /* full-duplex point-to-point (RS-232, Net) */
 280 #define CL_KEYBD        8       /* half-duplex console (HIL Keyboard) */
 281 #define CL_DISPL        9       /* half-duplex console (display) */
 282 #define CL_FC           10      /* FiberChannel access media */
 283
 284 /* IODC ENTRY_INIT() */
 285 #define ENTRY_INIT_SRCH_FRST    2
 286 #define ENTRY_INIT_SRCH_NEXT    3
 287 #define ENTRY_INIT_MOD_DEV      4
 288 #define ENTRY_INIT_DEV          5
 289 #define ENTRY_INIT_MOD          6
 290 #define ENTRY_INIT_MSG          9
 291
 292 /* IODC ENTRY_IO() */
 293 #define ENTRY_IO_BOOTIN         0
 294 #define ENTRY_IO_BOOTOUT        1
 295 #define ENTRY_IO_CIN            2
 296 #define ENTRY_IO_COUT           3
 297 #define ENTRY_IO_CLOSE          4
 298 #define ENTRY_IO_GETMSG         9
 299 #define ENTRY_IO_BBLOCK_IN      16
 300 #define ENTRY_IO_BBLOCK_OUT     17
 301
 302 /* IODC ENTRY_SPA() */
 303
 304 /* IODC ENTRY_CONFIG() */
 305
 306 /* IODC ENTRY_TEST() */
 307
 308 /* IODC ENTRY_TLB() */
 309
 310 /* constants for OS (NVM...) */
 311 #define OS_ID_NONE              0       /* Undefined OS ID      */
 312 #define OS_ID_HPUX              1       /* HP-UX OS             */
 313 #define OS_ID_MPEXL             2       /* MPE XL OS            */
 314 #define OS_ID_OSF               3       /* OSF OS               */
 315 #define OS_ID_HPRT              4       /* HP-RT OS             */
 316 #define OS_ID_NOVEL             5       /* NOVELL OS            */
 317 #define OS_ID_LINUX             6       /* Linux                */
 318
 319
 320 /* constants for PDC_CHASSIS */
 321 #define OSTAT_OFF               0
 322 #define OSTAT_FLT               1
 323 #define OSTAT_TEST              2
 324 #define OSTAT_INIT              3
 325 #define OSTAT_SHUT              4
 326 #define OSTAT_WARN              5
 327 #define OSTAT_RUN               6
 328 #define OSTAT_ON                7
 329
 330 /* Page Zero constant offsets used by the HPMC handler */
 331 #define BOOT_CONSOLE_HPA_OFFSET  0x3c0
 332 #define BOOT_CONSOLE_SPA_OFFSET  0x3c4
 333 #define BOOT_CONSOLE_PATH_OFFSET 0x3a8
 334
 335 #if !defined(__ASSEMBLY__)
 336 #ifdef __KERNEL__
 337
 338 #include <linux/types.h>
 339
 340 extern int pdc_type;
 341
 342 /* Values for pdc_type */
 343 #define PDC_TYPE_ILLEGAL        -1
 344 #define PDC_TYPE_PAT             0 /* 64-bit PAT-PDC */
 345 #define PDC_TYPE_SYSTEM_MAP      1 /* 32-bit, but supports PDC_SYSTEM_MAP */
 346 #define PDC_TYPE_SNAKE           2 /* Doesn't support SYSTEM_MAP */
 347
 348 struct pdc_chassis_info {       /* for PDC_CHASSIS_INFO */
 349         unsigned long actcnt;   /* actual number of bytes returned */
 350         unsigned long maxcnt;   /* maximum number of bytes that could be returned */
 351 };
 352
 353 struct pdc_coproc_cfg {         /* for PDC_COPROC_CFG */
 354         unsigned long ccr_functional;
 355         unsigned long ccr_present;
 356         unsigned long revision;
 357         unsigned long model;
 358 };
 359
 360 struct pdc_model {              /* for PDC_MODEL */
 361         unsigned long hversion;
 362         unsigned long sversion;
 363         unsigned long hw_id;
 364         unsigned long boot_id;
 365         unsigned long sw_id;
 366         unsigned long sw_cap;
 367         unsigned long arch_rev;
 368         unsigned long pot_key;
 369         unsigned long curr_key;
 370 };
 371
 372 struct pdc_cache_cf {           /* for PDC_CACHE  (I/D-caches) */
 373     unsigned long
 374 #ifdef CONFIG_64BIT
 375                 cc_padW:32,
 376 #endif
 377                 cc_alias: 4,    /* alias boundaries for virtual addresses   */
 378                 cc_block: 4,    /* to determine most efficient stride */
 379                 cc_line : 3,    /* maximum amount written back as a result of store (multiple of 16 bytes) */
 380                 cc_shift: 2,    /* how much to shift cc_block left */
 381                 cc_wt   : 1,    /* 0 = WT-Dcache, 1 = WB-Dcache */
 382                 cc_sh   : 2,    /* 0 = separate I/D-cache, else shared I/D-cache */
 383                 cc_cst  : 3,    /* 0 = incoherent D-cache, 1=coherent D-cache */
 384                 cc_pad1 : 10,   /* reserved */
 385                 cc_hv   : 3;    /* hversion dependent */
 386 };
 387
 388 struct pdc_tlb_cf {             /* for PDC_CACHE (I/D-TLB's) */
 389     unsigned long tc_pad0:12,   /* reserved */
 390 #ifdef CONFIG_64BIT
 391                 tc_padW:32,
 392 #endif
 393                 tc_sh   : 2,    /* 0 = separate I/D-TLB, else shared I/D-TLB */
 394                 tc_hv   : 1,    /* HV */
 395                 tc_page : 1,    /* 0 = 2K page-size-machine, 1 = 4k page size */
 396                 tc_cst  : 3,    /* 0 = incoherent operations, else coherent operations */
 397                 tc_aid  : 5,    /* ITLB: width of access ids of processor (encoded!) */
 398                 tc_pad1 : 8;    /* ITLB: width of space-registers (encoded) */
 399 };
 400
 401 struct pdc_cache_info {         /* main-PDC_CACHE-structure (caches & TLB's) */
 402         /* I-cache */
 403         unsigned long   ic_size;        /* size in bytes */
 404         struct pdc_cache_cf ic_conf;    /* configuration */
 405         unsigned long   ic_base;        /* base-addr */
 406         unsigned long   ic_stride;
 407         unsigned long   ic_count;
 408         unsigned long   ic_loop;
 409         /* D-cache */
 410         unsigned long   dc_size;        /* size in bytes */
 411         struct pdc_cache_cf dc_conf;    /* configuration */
 412         unsigned long   dc_base;        /* base-addr */
 413         unsigned long   dc_stride;
 414         unsigned long   dc_count;
 415         unsigned long   dc_loop;
 416         /* Instruction-TLB */
 417         unsigned long   it_size;        /* number of entries in I-TLB */
 418         struct pdc_tlb_cf it_conf;      /* I-TLB-configuration */
 419         unsigned long   it_sp_base;
 420         unsigned long   it_sp_stride;
 421         unsigned long   it_sp_count;
 422         unsigned long   it_off_base;
 423         unsigned long   it_off_stride;
 424         unsigned long   it_off_count;
 425         unsigned long   it_loop;
 426         /* data-TLB */
 427         unsigned long   dt_size;        /* number of entries in D-TLB */
 428         struct pdc_tlb_cf dt_conf;      /* D-TLB-configuration */
 429         unsigned long   dt_sp_base;
 430         unsigned long   dt_sp_stride;
 431         unsigned long   dt_sp_count;
 432         unsigned long   dt_off_base;
 433         unsigned long   dt_off_stride;
 434         unsigned long   dt_off_count;
 435         unsigned long   dt_loop;
 436 };
 437
 438 #if 0
 439 /* If you start using the next struct, you'll have to adjust it to
 440  * work with 64-bit firmware I think -PB
 441  */
 442 struct pdc_iodc {     /* PDC_IODC */
 443         unsigned char   hversion_model;
 444         unsigned char   hversion;
 445         unsigned char   spa;
 446         unsigned char   type;
 447         unsigned int    sversion_rev:4;
 448         unsigned int    sversion_model:19;
 449         unsigned int    sversion_opt:8;
 450         unsigned char   rev;
 451         unsigned char   dep;
 452         unsigned char   features;
 453         unsigned char   pad1;
 454         unsigned int    checksum:16;
 455         unsigned int    length:16;
 456         unsigned int    pad[15];
 457 } __attribute__((aligned(8))) ;
 458 #endif
 459
 460 #ifndef CONFIG_PA20
 461 /* no BLTBs in pa2.0 processors */
 462 struct pdc_btlb_info_range {
 463         __u8 res00;
 464         __u8 num_i;
 465         __u8 num_d;
 466         __u8 num_comb;
 467 };
 468
 469 struct pdc_btlb_info {  /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
 470         unsigned int min_size;  /* minimum size of BTLB in pages */
 471         unsigned int max_size;  /* maximum size of BTLB in pages */
 472         struct pdc_btlb_info_range fixed_range_info;
 473         struct pdc_btlb_info_range variable_range_info;
 474 };
 475
 476 #endif /* !CONFIG_PA20 */
 477
 478 #ifdef CONFIG_64BIT
 479 struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
 480         unsigned long entries_returned;
 481         unsigned long entries_total;
 482 };
 483
 484 struct pdc_memory_table {       /* PDC_MEM/PDC_MEM_TABLE (arguments) */
 485         unsigned long paddr;
 486         unsigned int  pages;
 487         unsigned int  reserved;
 488 };
 489 #endif /* CONFIG_64BIT */
 490
 491 struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
 492         unsigned long mod_addr;
 493         unsigned long mod_pgs;
 494         unsigned long add_addrs;
 495 };
 496
 497 struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
 498         unsigned long mod_addr;
 499         unsigned long mod_pgs;
 500 };
 501
 502 struct pdc_initiator { /* PDC_INITIATOR */
 503         int host_id;
 504         int factor;
 505         int width;
 506         int mode;
 507 };
 508
 509 struct hardware_path {
 510         char  flags;    /* see bit definitions below */
 511         char  bc[6];    /* Bus Converter routing info to a specific */
 512                         /* I/O adaptor (< 0 means none, > 63 resvd) */
 513         char  mod;      /* fixed field of specified module */
 514 };
 515
 516 /*
 517  * Device path specifications used by PDC.
 518  */
 519 struct pdc_module_path {
 520         struct hardware_path path;
 521         unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
 522 };
 523
 524 #ifndef CONFIG_PA20
 525 /* Only used on some pre-PA2.0 boxes */
 526 struct pdc_memory_map {         /* PDC_MEMORY_MAP */
 527         unsigned long hpa;      /* mod's register set address */
 528         unsigned long more_pgs; /* number of additional I/O pgs */
 529 };
 530 #endif
 531
 532 struct pdc_tod {
 533         unsigned long tod_sec;
 534         unsigned long tod_usec;
 535 };
 536
 537 /* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
 538
 539 struct pdc_hpmc_pim_11 { /* PDC_PIM */
 540         __u32 gr[32];
 541         __u32 cr[32];
 542         __u32 sr[8];
 543         __u32 iasq_back;
 544         __u32 iaoq_back;
 545         __u32 check_type;
 546         __u32 cpu_state;
 547         __u32 rsvd1;
 548         __u32 cache_check;
 549         __u32 tlb_check;
 550         __u32 bus_check;
 551         __u32 assists_check;
 552         __u32 rsvd2;
 553         __u32 assist_state;
 554         __u32 responder_addr;
 555         __u32 requestor_addr;
 556         __u32 path_info;
 557         __u64 fr[32];
 558 };
 559
 560 /*
 561  * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
 562  *
 563  * Note that PDC_PIM doesn't care whether or not wide mode was enabled
 564  * so the results are different on  PA1.1 vs. PA2.0 when in narrow mode.
 565  *
 566  * Note also that there are unarchitected results available, which
 567  * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
 568  * the firmware is probably the best way of printing hversion dependent
 569  * data.
 570  */
 571
 572 struct pdc_hpmc_pim_20 { /* PDC_PIM */
 573         __u64 gr[32];
 574         __u64 cr[32];
 575         __u64 sr[8];
 576         __u64 iasq_back;
 577         __u64 iaoq_back;
 578         __u32 check_type;
 579         __u32 cpu_state;
 580         __u32 cache_check;
 581         __u32 tlb_check;
 582         __u32 bus_check;
 583         __u32 assists_check;
 584         __u32 assist_state;
 585         __u32 path_info;
 586         __u64 responder_addr;
 587         __u64 requestor_addr;
 588         __u64 fr[32];
 589 };
 590
 591 void pdc_console_init(void);    /* in pdc_console.c */
 592 void pdc_console_restart(void);
 593
 594 void setup_pdc(void);           /* in inventory.c */
 595
 596 /* wrapper-functions from pdc.c */
 597
 598 int pdc_add_valid(unsigned long address);
 599 int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
 600 int pdc_chassis_disp(unsigned long disp);
 601 int pdc_chassis_warn(unsigned long *warn);
 602 int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
 603 int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
 604                   void *iodc_data, unsigned int iodc_data_size);
 605 int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
 606                              struct pdc_module_path *mod_path, long mod_index);
 607 int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
 608                               long mod_index, long addr_index);
 609 int pdc_model_info(struct pdc_model *model);
 610 int pdc_model_sysmodel(char *name);
 611 int pdc_model_cpuid(unsigned long *cpu_id);
 612 int pdc_model_versions(unsigned long *versions, int id);
 613 int pdc_model_capabilities(unsigned long *capabilities);
 614 int pdc_cache_info(struct pdc_cache_info *cache);
 615 int pdc_spaceid_bits(unsigned long *space_bits);
 616 #ifndef CONFIG_PA20
 617 int pdc_btlb_info(struct pdc_btlb_info *btlb);
 618 int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
 619 #endif /* !CONFIG_PA20 */
 620 int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
 621
 622 int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
 623 int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
 624 int pdc_stable_get_size(unsigned long *size);
 625 int pdc_stable_verify_contents(void);
 626 int pdc_stable_initialize(void);
 627
 628 int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
 629 int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
 630
 631 int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
 632 int pdc_tod_read(struct pdc_tod *tod);
 633 int pdc_tod_set(unsigned long sec, unsigned long usec);
 634
 635 #ifdef CONFIG_64BIT
 636 int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
 637                 struct pdc_memory_table *tbl, unsigned long entries);
 638 #endif
 639
 640 void set_firmware_width(void);
 641 int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
 642 int pdc_do_reset(void);
 643 int pdc_soft_power_info(unsigned long *power_reg);
 644 int pdc_soft_power_button(int sw_control);
 645 void pdc_io_reset(void);
 646 void pdc_io_reset_devices(void);
 647 int pdc_iodc_getc(void);
 648 int pdc_iodc_print(unsigned char *str, unsigned count);
 649
 650 void pdc_emergency_unlock(void);
 651 int pdc_sti_call(unsigned long func, unsigned long flags,
 652                  unsigned long inptr, unsigned long outputr,
 653                  unsigned long glob_cfg);
 654
 655 static inline char * os_id_to_string(u16 os_id) {
 656         switch(os_id) {
 657         case OS_ID_NONE:        return "No OS";
 658         case OS_ID_HPUX:        return "HP-UX";
 659         case OS_ID_MPEXL:       return "MPE-iX";
 660         case OS_ID_OSF:         return "OSF";
 661         case OS_ID_HPRT:        return "HP-RT";
 662         case OS_ID_NOVEL:       return "Novell Netware";
 663         case OS_ID_LINUX:       return "Linux";
 664         default:        return "Unknown";
 665         }
 666 }
 667
 668 #endif /* __KERNEL__ */
 669
 670 #define PAGE0   ((struct zeropage *)__PAGE_OFFSET)
 671
 672 /* DEFINITION OF THE ZERO-PAGE (PAG0) */
 673 /* based on work by Jason Eckhardt (jason@equator.com) */
 674
 675 /* flags of the device_path */
 676 #define PF_AUTOBOOT     0x80
 677 #define PF_AUTOSEARCH   0x40
 678 #define PF_TIMER        0x0F
 679
 680 struct device_path {            /* page 1-69 */
 681         unsigned char flags;    /* flags see above! */
 682         unsigned char bc[6];    /* bus converter routing info */
 683         unsigned char mod;
 684         unsigned int  layers[6];/* device-specific layer-info */
 685 } __attribute__((aligned(8))) ;
 686
 687 struct pz_device {
 688         struct  device_path dp; /* see above */
 689         /* struct       iomod *hpa; */
 690         unsigned int hpa;       /* HPA base address */
 691         /* char *spa; */
 692         unsigned int spa;       /* SPA base address */
 693         /* int  (*iodc_io)(struct iomod*, ...); */
 694         unsigned int iodc_io;   /* device entry point */
 695         short   pad;            /* reserved */
 696         unsigned short cl_class;/* see below */
 697 } __attribute__((aligned(8))) ;
 698
 699 struct zeropage {
 700         /* [0x000] initialize vectors (VEC) */
 701         unsigned int    vec_special;            /* must be zero */
 702         /* int  (*vec_pow_fail)(void);*/
 703         unsigned int    vec_pow_fail; /* power failure handler */
 704         /* int  (*vec_toc)(void); */
 705         unsigned int    vec_toc;
 706         unsigned int    vec_toclen;
 707         /* int  (*vec_rendz)(void); */
 708         unsigned int vec_rendz;
 709         int     vec_pow_fail_flen;
 710         int     vec_pad[10];
 711
 712         /* [0x040] reserved processor dependent */
 713         int     pad0[112];
 714
 715         /* [0x200] reserved */
 716         int     pad1[84];
 717
 718         /* [0x350] memory configuration (MC) */
 719         int     memc_cont;              /* contiguous mem size (bytes) */
 720         int     memc_phsize;            /* physical memory size */
 721         int     memc_adsize;            /* additional mem size, bytes of SPA space used by PDC */
 722         unsigned int mem_pdc_hi;        /* used for 64-bit */
 723
 724         /* [0x360] various parameters for the boot-CPU */
 725         /* unsigned int *mem_booterr[8]; */
 726         unsigned int mem_booterr[8];    /* ptr to boot errors */
 727         unsigned int mem_free;          /* first location, where OS can be loaded */
 728         /* struct iomod *mem_hpa; */
 729         unsigned int mem_hpa;           /* HPA of the boot-CPU */
 730         /* int (*mem_pdc)(int, ...); */
 731         unsigned int mem_pdc;           /* PDC entry point */
 732         unsigned int mem_10msec;        /* number of clock ticks in 10msec */
 733
 734         /* [0x390] initial memory module (IMM) */
 735         /* struct iomod *imm_hpa; */
 736         unsigned int imm_hpa;           /* HPA of the IMM */
 737         int     imm_soft_boot;          /* 0 = was hard boot, 1 = was soft boot */
 738         unsigned int    imm_spa_size;           /* SPA size of the IMM in bytes */
 739         unsigned int    imm_max_mem;            /* bytes of mem in IMM */
 740
 741         /* [0x3A0] boot console, display device and keyboard */
 742         struct pz_device mem_cons;      /* description of console device */
 743         struct pz_device mem_boot;      /* description of boot device */
 744         struct pz_device mem_kbd;       /* description of keyboard device */
 745
 746         /* [0x430] reserved */
 747         int     pad430[116];
 748
 749         /* [0x600] processor dependent */
 750         __u32   pad600[1];
 751         __u32   proc_sti;               /* pointer to STI ROM */
 752         __u32   pad608[126];
 753 };
 754
 755 #endif /* !defined(__ASSEMBLY__) */
 756
 757 #endif /* _PARISC_PDC_H */