3 config ARCH_SUPPORTS_BIG_ENDIAN
7 menu "Intel IXP4xx Implementation Options"
9 comment "IXP4xx Platforms"
13 prompt "Linksys NSLU2"
16 Say 'Y' here if you want your kernel to support Linksys's
17 NSLU2 NAS device. For more information on this platform,
18 see http://www.nslu2-linux.org
24 Say 'Y' here if you want your kernel to support the Gateworks
25 Avila Network Platform. For more information on this platform,
26 see <file:Documentation/arm/IXP4xx>.
32 Say 'Y' here if you want your kernel to support the Giant
33 Shoulder Inc Loft board (a minor variation on the standard
34 Gateworks Avila Network Platform).
36 config ARCH_ADI_COYOTE
40 Say 'Y' here if you want your kernel to support the ADI
41 Engineering Coyote Gateway Reference Platform. For more
42 information on this platform, see <file:Documentation/arm/IXP4xx>.
44 config MACH_GATEWAY7001
48 Say 'Y' here if you want your kernel to support Gateway's
49 7001 Access Point. For more information on this platform,
50 see http://openwrt.org
53 bool "Netgear WG302 v2 / WAG302 v2"
56 Say 'Y' here if you want your kernel to support Netgear's
57 WG302 v2 or WAG302 v2 Access Points. For more information
58 on this platform, see http://openwrt.org
63 Say 'Y' here if you want your kernel to support Intel's
64 IXDP425 Development Platform (Also known as Richfield).
65 For more information on this platform, see <file:Documentation/arm/IXP4xx>.
70 Say 'Y' here if you want your kernel to support Intel's
71 IXDPG425 Development Platform (Also known as Montajade).
72 For more information on this platform, see <file:Documentation/arm/IXP4xx>.
77 Say 'Y' here if you want your kernel to support Intel's
78 IXDP465 Development Platform (Also known as BMP).
79 For more information on this platform, see <file:Documentation/arm/IXP4xx>.
84 Say 'Y' here if you want your kernel to support Intel's
85 KIXRP435 Reference Platform.
86 For more information on this platform, see <file:Documentation/arm/IXP4xx>.
89 # IXCDP1100 is the exact same HW as IXDP425, but with a different machine
90 # number from the bootloader due to marketing monkeys, so we just enable it
91 # by default if IXDP425 is enabled.
95 depends on ARCH_IXDP425
101 Say 'Y' here if you want your kernel to support the Motorola
102 PrPCM1100 Processor Mezanine Module. For more information on
103 this platform, see <file:Documentation/arm/IXP4xx>.
110 Say 'Y' here if you want your kernel to support Iomega's
111 NAS 100d device. For more information on this platform,
112 see http://www.nslu2-linux.org/wiki/NAS100d/HomePage
116 prompt "D-Link DSM-G600 RevA"
119 Say 'Y' here if you want your kernel to support D-Link's
120 DSM-G600 RevA device. For more information on this platform,
121 see http://www.nslu2-linux.org/wiki/DSMG600/HomePage
125 depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
129 # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
133 depends on MACH_IXDP465
138 depends on MACH_KIXRP435
142 bool "Gemtek WX5715 (Linksys WRV54G)"
143 depends on ARCH_IXP4XX
146 This board is currently inside the Linksys WRV54G Gateways.
151 miniPCI slot 0 does not have a card connector soldered to the board
152 miniPCI slot 1 has an ISL3880 802.11g card (Prism54)
153 npe0 is connected to a Kendin KS8995M Switch (4 ports)
154 npe1 is the "wan" port
155 "Console" UART is available on J11 as console
156 "High Speed" UART is n/c (as far as I can tell)
157 20 Pin ARM/Xscale JTAG interface on J2
159 comment "IXP4xx Options"
166 config IXP4XX_INDIRECT_PCI
167 bool "Use indirect PCI memory access"
170 IXP4xx provides two methods of accessing PCI memory space:
172 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB).
173 To access PCI via this space, we simply ioremap() the BAR
174 into the kernel and we can use the standard read[bwl]/write[bwl]
175 macros. This is the preferred method due to speed but it
176 limits the system to just 64MB of PCI memory. This can be
177 problematic if using video cards and other memory-heavy devices.
179 2) If > 64MB of memory space is required, the IXP4xx can be
180 configured to use indirect registers to access PCI This allows
181 for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
182 The disadvantage of this is that every PCI access requires
183 three local register accesses plus a spinlock, but in some
184 cases the performance hit is acceptable. In addition, you cannot
185 mmap() PCI devices in this case due to the indirect nature
188 By default, the direct method is used. Choose this option if you
189 need to use the indirect method instead. If you don't know
190 what you need, leave this option unselected.