include/asm-xtensa/xtensa/corebits.h

   1 #ifndef XTENSA_COREBITS_H
   2 #define XTENSA_COREBITS_H
   3
   4 /*
   5  * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND
   6  *
   7  * xtensa/corebits.h - Xtensa Special Register field positions and masks.
   8  *
   9  * (In previous releases, these were defined in specreg.h, a generated file.
  10  *  This file is not generated, i.e. it is processor configuration independent.)
  11  */
  12
  13
  14 /*  EXCCAUSE register fields:  */
  15 #define EXCCAUSE_EXCCAUSE_SHIFT 0
  16 #define EXCCAUSE_EXCCAUSE_MASK  0x3F
  17 /*  Exception causes (mostly incomplete!):  */
  18 #define EXCCAUSE_ILLEGAL                0
  19 #define EXCCAUSE_SYSCALL                1
  20 #define EXCCAUSE_IFETCHERROR            2
  21 #define EXCCAUSE_LOADSTOREERROR         3
  22 #define EXCCAUSE_LEVEL1INTERRUPT        4
  23 #define EXCCAUSE_ALLOCA                 5
  24
  25 /*  PS register fields:  */
  26 #define PS_WOE_SHIFT            18
  27 #define PS_WOE_MASK             0x00040000
  28 #define PS_WOE                  PS_WOE_MASK
  29 #define PS_CALLINC_SHIFT        16
  30 #define PS_CALLINC_MASK         0x00030000
  31 #define PS_CALLINC(n)           (((n)&3)<<PS_CALLINC_SHIFT)     /* n = 0..3 */
  32 #define PS_OWB_SHIFT            8
  33 #define PS_OWB_MASK             0x00000F00
  34 #define PS_OWB(n)               (((n)&15)<<PS_OWB_SHIFT)        /* n = 0..15 (or 0..7) */
  35 #define PS_RING_SHIFT           6
  36 #define PS_RING_MASK            0x000000C0
  37 #define PS_RING(n)              (((n)&3)<<PS_RING_SHIFT)        /* n = 0..3 */
  38 #define PS_UM_SHIFT             5
  39 #define PS_UM_MASK              0x00000020
  40 #define PS_UM                   PS_UM_MASK
  41 #define PS_EXCM_SHIFT           4
  42 #define PS_EXCM_MASK            0x00000010
  43 #define PS_EXCM                 PS_EXCM_MASK
  44 #define PS_INTLEVEL_SHIFT       0
  45 #define PS_INTLEVEL_MASK        0x0000000F
  46 #define PS_INTLEVEL(n)          ((n)&PS_INTLEVEL_MASK)          /* n = 0..15 */
  47 /*  Backward compatibility (deprecated):  */
  48 #define PS_PROGSTACK_SHIFT      PS_UM_SHIFT
  49 #define PS_PROGSTACK_MASK       PS_UM_MASK
  50 #define PS_PROG_SHIFT           PS_UM_SHIFT
  51 #define PS_PROG_MASK            PS_UM_MASK
  52 #define PS_PROG                 PS_UM
  53
  54 /*  DBREAKCn register fields:  */
  55 #define DBREAKC_MASK_SHIFT              0
  56 #define DBREAKC_MASK_MASK               0x0000003F
  57 #define DBREAKC_LOADBREAK_SHIFT         30
  58 #define DBREAKC_LOADBREAK_MASK          0x40000000
  59 #define DBREAKC_STOREBREAK_SHIFT        31
  60 #define DBREAKC_STOREBREAK_MASK         0x80000000
  61
  62 /*  DEBUGCAUSE register fields:  */
  63 #define DEBUGCAUSE_DEBUGINT_SHIFT       5
  64 #define DEBUGCAUSE_DEBUGINT_MASK        0x20    /* debug interrupt */
  65 #define DEBUGCAUSE_BREAKN_SHIFT         4
  66 #define DEBUGCAUSE_BREAKN_MASK          0x10    /* BREAK.N instruction */
  67 #define DEBUGCAUSE_BREAK_SHIFT          3
  68 #define DEBUGCAUSE_BREAK_MASK           0x08    /* BREAK instruction */
  69 #define DEBUGCAUSE_DBREAK_SHIFT         2
  70 #define DEBUGCAUSE_DBREAK_MASK          0x04    /* DBREAK match */
  71 #define DEBUGCAUSE_IBREAK_SHIFT         1
  72 #define DEBUGCAUSE_IBREAK_MASK          0x02    /* IBREAK match */
  73 #define DEBUGCAUSE_ICOUNT_SHIFT         0
  74 #define DEBUGCAUSE_ICOUNT_MASK          0x01    /* ICOUNT would increment to zero */
  75
  76 #endif /*XTENSA_COREBITS_H*/
  77