[PATCH] m32r: update include/asm-m32r/semaphore.h
[linux-2.6/kvm.git] / arch / xtensa / kernel / irq.c
blob51f9bed455fab0c0576933a7702efb0d51cb84f4
1 /*
2 * linux/arch/xtensa/kernel/irq.c
4 * Xtensa built-in interrupt controller and some generic functions copied
5 * from i386.
7 * Copyright (C) 2002 - 2005 Tensilica, Inc.
8 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
11 * Chris Zankel <chris@zankel.net>
12 * Kevin Chea
16 #include <linux/module.h>
17 #include <linux/seq_file.h>
18 #include <linux/interrupt.h>
19 #include <linux/irq.h>
20 #include <linux/kernel_stat.h>
22 #include <asm/uaccess.h>
23 #include <asm/platform.h>
25 static void enable_xtensa_irq(unsigned int irq);
26 static void disable_xtensa_irq(unsigned int irq);
27 static void mask_and_ack_xtensa(unsigned int irq);
28 static void end_xtensa_irq(unsigned int irq);
30 static unsigned int cached_irq_mask;
32 atomic_t irq_err_count;
35 * 'what should we do if we get a hw irq event on an illegal vector'.
36 * each architecture has to answer this themselves.
38 void ack_bad_irq(unsigned int irq)
40 printk("unexpected IRQ trap at vector %02x\n", irq);
44 * do_IRQ handles all normal device IRQ's (the special
45 * SMP cross-CPU interrupts have their own specific
46 * handlers).
49 unsigned int do_IRQ(int irq, struct pt_regs *regs)
51 irq_enter();
53 #ifdef CONFIG_DEBUG_STACKOVERFLOW
54 /* Debugging check for stack overflow: is there less than 1KB free? */
56 unsigned long sp;
58 __asm__ __volatile__ ("mov %0, a1\n" : "=a" (sp));
59 sp &= THREAD_SIZE - 1;
61 if (unlikely(sp < (sizeof(thread_info) + 1024)))
62 printk("Stack overflow in do_IRQ: %ld\n",
63 sp - sizeof(struct thread_info));
65 #endif
67 __do_IRQ(irq, regs);
69 irq_exit();
71 return 1;
75 * Generic, controller-independent functions:
78 int show_interrupts(struct seq_file *p, void *v)
80 int i = *(loff_t *) v, j;
81 struct irqaction * action;
82 unsigned long flags;
84 if (i == 0) {
85 seq_printf(p, " ");
86 for_each_online_cpu(j)
87 seq_printf(p, "CPU%d ",j);
88 seq_putc(p, '\n');
91 if (i < NR_IRQS) {
92 spin_lock_irqsave(&irq_desc[i].lock, flags);
93 action = irq_desc[i].action;
94 if (!action)
95 goto skip;
96 seq_printf(p, "%3d: ",i);
97 #ifndef CONFIG_SMP
98 seq_printf(p, "%10u ", kstat_irqs(i));
99 #else
100 for_each_online_cpu(j)
101 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
102 #endif
103 seq_printf(p, " %14s", irq_desc[i].handler->typename);
104 seq_printf(p, " %s", action->name);
106 for (action=action->next; action; action = action->next)
107 seq_printf(p, ", %s", action->name);
109 seq_putc(p, '\n');
110 skip:
111 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
112 } else if (i == NR_IRQS) {
113 seq_printf(p, "NMI: ");
114 for_each_online_cpu(j)
115 seq_printf(p, "%10u ", nmi_count(j));
116 seq_putc(p, '\n');
117 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
119 return 0;
121 /* shutdown is same as "disable" */
122 #define shutdown_xtensa_irq disable_xtensa_irq
124 static unsigned int startup_xtensa_irq(unsigned int irq)
126 enable_xtensa_irq(irq);
127 return 0; /* never anything pending */
130 static struct hw_interrupt_type xtensa_irq_type = {
131 "Xtensa-IRQ",
132 startup_xtensa_irq,
133 shutdown_xtensa_irq,
134 enable_xtensa_irq,
135 disable_xtensa_irq,
136 mask_and_ack_xtensa,
137 end_xtensa_irq
140 static inline void mask_irq(unsigned int irq)
142 cached_irq_mask &= ~(1 << irq);
143 set_sr (cached_irq_mask, INTENABLE);
146 static inline void unmask_irq(unsigned int irq)
148 cached_irq_mask |= 1 << irq;
149 set_sr (cached_irq_mask, INTENABLE);
152 static void disable_xtensa_irq(unsigned int irq)
154 unsigned long flags;
155 local_save_flags(flags);
156 mask_irq(irq);
157 local_irq_restore(flags);
160 static void enable_xtensa_irq(unsigned int irq)
162 unsigned long flags;
163 local_save_flags(flags);
164 unmask_irq(irq);
165 local_irq_restore(flags);
168 static void mask_and_ack_xtensa(unsigned int irq)
170 disable_xtensa_irq(irq);
173 static void end_xtensa_irq(unsigned int irq)
175 enable_xtensa_irq(irq);
179 void __init init_IRQ(void)
181 int i;
183 for (i=0; i < XTENSA_NR_IRQS; i++)
184 irq_desc[i].handler = &xtensa_irq_type;
186 cached_irq_mask = 0;
188 platform_init_irq();