4 * Author: Scott Wood <scottwood@freescale.com>
6 * Copyright 2007 Freescale Semiconductor, Inc.
8 * Some parts derived from commproc.c/cpm2_common.c, which is:
9 * Copyright (c) 1997 Dan error_act (dmalek@jlc.net)
10 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
11 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
12 * 2006 (c) MontaVista Software, Inc.
13 * Vitaly Bordug <vbordug@ru.mvista.com>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of version 2 of the GNU General Public License as
17 * published by the Free Software Foundation.
20 #include <linux/init.h>
21 #include <linux/of_device.h>
22 #include <linux/spinlock.h>
27 #include <asm/system.h>
28 #include <asm/rheap.h>
31 #include <mm/mmu_decl.h>
33 #if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
34 #include <linux/of_gpio.h>
37 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
38 static u32 __iomem
*cpm_udbg_txdesc
=
39 (u32 __iomem __force
*)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR
;
41 static void udbg_putc_cpm(char c
)
43 u8 __iomem
*txbuf
= (u8 __iomem __force
*)in_be32(&cpm_udbg_txdesc
[1]);
48 while (in_be32(&cpm_udbg_txdesc
[0]) & 0x80000000)
52 out_be32(&cpm_udbg_txdesc
[0], 0xa0000001);
55 void __init
udbg_init_cpm(void)
57 if (cpm_udbg_txdesc
) {
59 setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG
);
61 udbg_putc
= udbg_putc_cpm
;
66 static spinlock_t cpm_muram_lock
;
67 static rh_block_t cpm_boot_muram_rh_block
[16];
68 static rh_info_t cpm_muram_info
;
69 static u8 __iomem
*muram_vbase
;
70 static phys_addr_t muram_pbase
;
72 /* Max address size we deal with */
73 #define OF_MAX_ADDR_CELLS 4
75 int cpm_muram_init(void)
77 struct device_node
*np
;
79 u32 zero
[OF_MAX_ADDR_CELLS
] = {};
80 resource_size_t max
= 0;
87 spin_lock_init(&cpm_muram_lock
);
88 /* initialize the info header */
89 rh_init(&cpm_muram_info
, 1,
90 sizeof(cpm_boot_muram_rh_block
) /
91 sizeof(cpm_boot_muram_rh_block
[0]),
92 cpm_boot_muram_rh_block
);
94 np
= of_find_compatible_node(NULL
, NULL
, "fsl,cpm-muram-data");
96 /* try legacy bindings */
97 np
= of_find_node_by_name(NULL
, "data-only");
99 printk(KERN_ERR
"Cannot find CPM muram data node");
105 muram_pbase
= of_translate_address(np
, zero
);
106 if (muram_pbase
== (phys_addr_t
)OF_BAD_ADDR
) {
107 printk(KERN_ERR
"Cannot translate zero through CPM muram node");
112 while (of_address_to_resource(np
, i
++, &r
) == 0) {
116 rh_attach_region(&cpm_muram_info
, r
.start
- muram_pbase
,
117 r
.end
- r
.start
+ 1);
120 muram_vbase
= ioremap(muram_pbase
, max
- muram_pbase
+ 1);
122 printk(KERN_ERR
"Cannot map CPM muram");
132 * cpm_muram_alloc - allocate the requested size worth of multi-user ram
133 * @size: number of bytes to allocate
134 * @align: requested alignment, in bytes
136 * This function returns an offset into the muram area.
137 * Use cpm_dpram_addr() to get the virtual address of the area.
138 * Use cpm_muram_free() to free the allocation.
140 unsigned long cpm_muram_alloc(unsigned long size
, unsigned long align
)
145 spin_lock_irqsave(&cpm_muram_lock
, flags
);
146 cpm_muram_info
.alignment
= align
;
147 start
= rh_alloc(&cpm_muram_info
, size
, "commproc");
148 spin_unlock_irqrestore(&cpm_muram_lock
, flags
);
152 EXPORT_SYMBOL(cpm_muram_alloc
);
155 * cpm_muram_free - free a chunk of multi-user ram
156 * @offset: The beginning of the chunk as returned by cpm_muram_alloc().
158 int cpm_muram_free(unsigned long offset
)
163 spin_lock_irqsave(&cpm_muram_lock
, flags
);
164 ret
= rh_free(&cpm_muram_info
, offset
);
165 spin_unlock_irqrestore(&cpm_muram_lock
, flags
);
169 EXPORT_SYMBOL(cpm_muram_free
);
172 * cpm_muram_alloc_fixed - reserve a specific region of multi-user ram
173 * @offset: the offset into the muram area to reserve
174 * @size: the number of bytes to reserve
176 * This function returns "start" on success, -ENOMEM on failure.
177 * Use cpm_dpram_addr() to get the virtual address of the area.
178 * Use cpm_muram_free() to free the allocation.
180 unsigned long cpm_muram_alloc_fixed(unsigned long offset
, unsigned long size
)
185 spin_lock_irqsave(&cpm_muram_lock
, flags
);
186 cpm_muram_info
.alignment
= 1;
187 start
= rh_alloc_fixed(&cpm_muram_info
, offset
, size
, "commproc");
188 spin_unlock_irqrestore(&cpm_muram_lock
, flags
);
192 EXPORT_SYMBOL(cpm_muram_alloc_fixed
);
195 * cpm_muram_addr - turn a muram offset into a virtual address
196 * @offset: muram offset to convert
198 void __iomem
*cpm_muram_addr(unsigned long offset
)
200 return muram_vbase
+ offset
;
202 EXPORT_SYMBOL(cpm_muram_addr
);
204 unsigned long cpm_muram_offset(void __iomem
*addr
)
206 return addr
- (void __iomem
*)muram_vbase
;
208 EXPORT_SYMBOL(cpm_muram_offset
);
211 * cpm_muram_dma - turn a muram virtual address into a DMA address
212 * @offset: virtual address from cpm_muram_addr() to convert
214 dma_addr_t
cpm_muram_dma(void __iomem
*addr
)
216 return muram_pbase
+ ((u8 __iomem
*)addr
- muram_vbase
);
218 EXPORT_SYMBOL(cpm_muram_dma
);
220 #if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
222 struct cpm2_ioports
{
223 u32 dir
, par
, sor
, odr
, dat
;
227 struct cpm2_gpio32_chip
{
228 struct of_mm_gpio_chip mm_gc
;
231 /* shadowed data register to clear/set bits safely */
235 static inline struct cpm2_gpio32_chip
*
236 to_cpm2_gpio32_chip(struct of_mm_gpio_chip
*mm_gc
)
238 return container_of(mm_gc
, struct cpm2_gpio32_chip
, mm_gc
);
241 static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip
*mm_gc
)
243 struct cpm2_gpio32_chip
*cpm2_gc
= to_cpm2_gpio32_chip(mm_gc
);
244 struct cpm2_ioports __iomem
*iop
= mm_gc
->regs
;
246 cpm2_gc
->cpdata
= in_be32(&iop
->dat
);
249 static int cpm2_gpio32_get(struct gpio_chip
*gc
, unsigned int gpio
)
251 struct of_mm_gpio_chip
*mm_gc
= to_of_mm_gpio_chip(gc
);
252 struct cpm2_ioports __iomem
*iop
= mm_gc
->regs
;
255 pin_mask
= 1 << (31 - gpio
);
257 return !!(in_be32(&iop
->dat
) & pin_mask
);
260 static void __cpm2_gpio32_set(struct of_mm_gpio_chip
*mm_gc
, u32 pin_mask
,
263 struct cpm2_gpio32_chip
*cpm2_gc
= to_cpm2_gpio32_chip(mm_gc
);
264 struct cpm2_ioports __iomem
*iop
= mm_gc
->regs
;
267 cpm2_gc
->cpdata
|= pin_mask
;
269 cpm2_gc
->cpdata
&= ~pin_mask
;
271 out_be32(&iop
->dat
, cpm2_gc
->cpdata
);
274 static void cpm2_gpio32_set(struct gpio_chip
*gc
, unsigned int gpio
, int value
)
276 struct of_mm_gpio_chip
*mm_gc
= to_of_mm_gpio_chip(gc
);
277 struct cpm2_gpio32_chip
*cpm2_gc
= to_cpm2_gpio32_chip(mm_gc
);
279 u32 pin_mask
= 1 << (31 - gpio
);
281 spin_lock_irqsave(&cpm2_gc
->lock
, flags
);
283 __cpm2_gpio32_set(mm_gc
, pin_mask
, value
);
285 spin_unlock_irqrestore(&cpm2_gc
->lock
, flags
);
288 static int cpm2_gpio32_dir_out(struct gpio_chip
*gc
, unsigned int gpio
, int val
)
290 struct of_mm_gpio_chip
*mm_gc
= to_of_mm_gpio_chip(gc
);
291 struct cpm2_gpio32_chip
*cpm2_gc
= to_cpm2_gpio32_chip(mm_gc
);
292 struct cpm2_ioports __iomem
*iop
= mm_gc
->regs
;
294 u32 pin_mask
= 1 << (31 - gpio
);
296 spin_lock_irqsave(&cpm2_gc
->lock
, flags
);
298 setbits32(&iop
->dir
, pin_mask
);
299 __cpm2_gpio32_set(mm_gc
, pin_mask
, val
);
301 spin_unlock_irqrestore(&cpm2_gc
->lock
, flags
);
306 static int cpm2_gpio32_dir_in(struct gpio_chip
*gc
, unsigned int gpio
)
308 struct of_mm_gpio_chip
*mm_gc
= to_of_mm_gpio_chip(gc
);
309 struct cpm2_gpio32_chip
*cpm2_gc
= to_cpm2_gpio32_chip(mm_gc
);
310 struct cpm2_ioports __iomem
*iop
= mm_gc
->regs
;
312 u32 pin_mask
= 1 << (31 - gpio
);
314 spin_lock_irqsave(&cpm2_gc
->lock
, flags
);
316 clrbits32(&iop
->dir
, pin_mask
);
318 spin_unlock_irqrestore(&cpm2_gc
->lock
, flags
);
323 int cpm2_gpiochip_add32(struct device_node
*np
)
325 struct cpm2_gpio32_chip
*cpm2_gc
;
326 struct of_mm_gpio_chip
*mm_gc
;
327 struct of_gpio_chip
*of_gc
;
328 struct gpio_chip
*gc
;
330 cpm2_gc
= kzalloc(sizeof(*cpm2_gc
), GFP_KERNEL
);
334 spin_lock_init(&cpm2_gc
->lock
);
336 mm_gc
= &cpm2_gc
->mm_gc
;
337 of_gc
= &mm_gc
->of_gc
;
340 mm_gc
->save_regs
= cpm2_gpio32_save_regs
;
341 of_gc
->gpio_cells
= 2;
343 gc
->direction_input
= cpm2_gpio32_dir_in
;
344 gc
->direction_output
= cpm2_gpio32_dir_out
;
345 gc
->get
= cpm2_gpio32_get
;
346 gc
->set
= cpm2_gpio32_set
;
348 return of_mm_gpiochip_add(np
, mm_gc
);
350 #endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */