[NET]: make seq_operations const
[linux-2.6/kvm.git] / drivers / ata / pata_radisys.c
blob9a9132c9e3317a034ab0f402cc45ae1f6289ac39
1 /*
2 * pata_radisys.c - Intel PATA/SATA controllers
4 * (C) 2006 Red Hat <alan@redhat.com>
6 * Some parts based on ata_piix.c by Jeff Garzik and others.
8 * A PIIX relative, this device has a single ATA channel and no
9 * slave timings, SITRE or PPE. In that sense it is a close relative
10 * of the original PIIX. It does however support UDMA 33/66 per channel
11 * although no other modes/timings. Also lacking is 32bit I/O on the ATA
12 * port.
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/init.h>
19 #include <linux/blkdev.h>
20 #include <linux/delay.h>
21 #include <linux/device.h>
22 #include <scsi/scsi_host.h>
23 #include <linux/libata.h>
24 #include <linux/ata.h>
26 #define DRV_NAME "pata_radisys"
27 #define DRV_VERSION "0.4.1"
29 /**
30 * radisys_probe_init - probe begin
31 * @ap: ATA port
33 * Set up cable type and use generic probe init
36 static int radisys_pre_reset(struct ata_port *ap)
38 ap->cbl = ATA_CBL_PATA80;
39 return ata_std_prereset(ap);
43 /**
44 * radisys_pata_error_handler - Probe specified port on PATA host controller
45 * @ap: Port to probe
46 * @classes:
48 * LOCKING:
49 * None (inherited from caller).
52 static void radisys_pata_error_handler(struct ata_port *ap)
54 ata_bmdma_drive_eh(ap, radisys_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
57 /**
58 * radisys_set_piomode - Initialize host controller PATA PIO timings
59 * @ap: Port whose timings we are configuring
60 * @adev: um
62 * Set PIO mode for device, in host controller PCI config space.
64 * LOCKING:
65 * None (inherited from caller).
68 static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
70 unsigned int pio = adev->pio_mode - XFER_PIO_0;
71 struct pci_dev *dev = to_pci_dev(ap->host->dev);
72 u16 idetm_data;
73 int control = 0;
76 * See Intel Document 298600-004 for the timing programing rules
77 * for PIIX/ICH. Note that the early PIIX does not have the slave
78 * timing port at 0x44. The Radisys is a relative of the PIIX
79 * but not the same so be careful.
82 static const /* ISP RTC */
83 u8 timings[][2] = { { 0, 0 }, /* Check me */
84 { 0, 0 },
85 { 1, 1 },
86 { 2, 2 },
87 { 3, 3 }, };
89 if (pio > 0)
90 control |= 1; /* TIME1 enable */
91 if (ata_pio_need_iordy(adev))
92 control |= 2; /* IE IORDY */
94 pci_read_config_word(dev, 0x40, &idetm_data);
96 /* Enable IE and TIME as appropriate. Clear the other
97 drive timing bits */
98 idetm_data &= 0xCCCC;
99 idetm_data |= (control << (4 * adev->devno));
100 idetm_data |= (timings[pio][0] << 12) |
101 (timings[pio][1] << 8);
102 pci_write_config_word(dev, 0x40, idetm_data);
104 /* Track which port is configured */
105 ap->private_data = adev;
109 * radisys_set_dmamode - Initialize host controller PATA DMA timings
110 * @ap: Port whose timings we are configuring
111 * @adev: Device to program
112 * @isich: True if the device is an ICH and has IOCFG registers
114 * Set MWDMA mode for device, in host controller PCI config space.
116 * LOCKING:
117 * None (inherited from caller).
120 static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
122 struct pci_dev *dev = to_pci_dev(ap->host->dev);
123 u16 idetm_data;
124 u8 udma_enable;
126 static const /* ISP RTC */
127 u8 timings[][2] = { { 0, 0 },
128 { 0, 0 },
129 { 1, 1 },
130 { 2, 2 },
131 { 3, 3 }, };
134 * MWDMA is driven by the PIO timings. We must also enable
135 * IORDY unconditionally.
138 pci_read_config_word(dev, 0x40, &idetm_data);
139 pci_read_config_byte(dev, 0x48, &udma_enable);
141 if (adev->dma_mode < XFER_UDMA_0) {
142 unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
143 const unsigned int needed_pio[3] = {
144 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
146 int pio = needed_pio[mwdma] - XFER_PIO_0;
147 int control = 3; /* IORDY|TIME0 */
149 /* If the drive MWDMA is faster than it can do PIO then
150 we must force PIO0 for PIO cycles. */
152 if (adev->pio_mode < needed_pio[mwdma])
153 control = 1;
155 /* Mask out the relevant control and timing bits we will load. Also
156 clear the other drive TIME register as a precaution */
158 idetm_data &= 0xCCCC;
159 idetm_data |= control << (4 * adev->devno);
160 idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
162 udma_enable &= ~(1 << adev->devno);
163 } else {
164 u8 udma_mode;
166 /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
168 pci_read_config_byte(dev, 0x4A, &udma_mode);
170 if (adev->xfer_mode == XFER_UDMA_2)
171 udma_mode &= ~ (1 << adev->devno);
172 else /* UDMA 4 */
173 udma_mode |= (1 << adev->devno);
175 pci_write_config_byte(dev, 0x4A, udma_mode);
177 udma_enable |= (1 << adev->devno);
179 pci_write_config_word(dev, 0x40, idetm_data);
180 pci_write_config_byte(dev, 0x48, udma_enable);
182 /* Track which port is configured */
183 ap->private_data = adev;
187 * radisys_qc_issue_prot - command issue
188 * @qc: command pending
190 * Called when the libata layer is about to issue a command. We wrap
191 * this interface so that we can load the correct ATA timings if
192 * neccessary. Our logic also clears TIME0/TIME1 for the other device so
193 * that, even if we get this wrong, cycles to the other device will
194 * be made PIO0.
197 static unsigned int radisys_qc_issue_prot(struct ata_queued_cmd *qc)
199 struct ata_port *ap = qc->ap;
200 struct ata_device *adev = qc->dev;
202 if (adev != ap->private_data) {
203 /* UDMA timing is not shared */
204 if (adev->dma_mode < XFER_UDMA_0) {
205 if (adev->dma_mode)
206 radisys_set_dmamode(ap, adev);
207 else if (adev->pio_mode)
208 radisys_set_piomode(ap, adev);
211 return ata_qc_issue_prot(qc);
215 static struct scsi_host_template radisys_sht = {
216 .module = THIS_MODULE,
217 .name = DRV_NAME,
218 .ioctl = ata_scsi_ioctl,
219 .queuecommand = ata_scsi_queuecmd,
220 .can_queue = ATA_DEF_QUEUE,
221 .this_id = ATA_SHT_THIS_ID,
222 .sg_tablesize = LIBATA_MAX_PRD,
223 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
224 .emulated = ATA_SHT_EMULATED,
225 .use_clustering = ATA_SHT_USE_CLUSTERING,
226 .proc_name = DRV_NAME,
227 .dma_boundary = ATA_DMA_BOUNDARY,
228 .slave_configure = ata_scsi_slave_config,
229 .slave_destroy = ata_scsi_slave_destroy,
230 .bios_param = ata_std_bios_param,
231 #ifdef CONFIG_PM
232 .resume = ata_scsi_device_resume,
233 .suspend = ata_scsi_device_suspend,
234 #endif
237 static const struct ata_port_operations radisys_pata_ops = {
238 .port_disable = ata_port_disable,
239 .set_piomode = radisys_set_piomode,
240 .set_dmamode = radisys_set_dmamode,
241 .mode_filter = ata_pci_default_filter,
243 .tf_load = ata_tf_load,
244 .tf_read = ata_tf_read,
245 .check_status = ata_check_status,
246 .exec_command = ata_exec_command,
247 .dev_select = ata_std_dev_select,
249 .freeze = ata_bmdma_freeze,
250 .thaw = ata_bmdma_thaw,
251 .error_handler = radisys_pata_error_handler,
252 .post_internal_cmd = ata_bmdma_post_internal_cmd,
254 .bmdma_setup = ata_bmdma_setup,
255 .bmdma_start = ata_bmdma_start,
256 .bmdma_stop = ata_bmdma_stop,
257 .bmdma_status = ata_bmdma_status,
258 .qc_prep = ata_qc_prep,
259 .qc_issue = radisys_qc_issue_prot,
260 .data_xfer = ata_data_xfer,
262 .irq_handler = ata_interrupt,
263 .irq_clear = ata_bmdma_irq_clear,
264 .irq_on = ata_irq_on,
265 .irq_ack = ata_irq_ack,
267 .port_start = ata_port_start,
272 * radisys_init_one - Register PIIX ATA PCI device with kernel services
273 * @pdev: PCI device to register
274 * @ent: Entry in radisys_pci_tbl matching with @pdev
276 * Called from kernel PCI layer. We probe for combined mode (sigh),
277 * and then hand over control to libata, for it to do the rest.
279 * LOCKING:
280 * Inherited from PCI layer (may sleep).
282 * RETURNS:
283 * Zero on success, or -ERRNO value.
286 static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
288 static int printed_version;
289 static struct ata_port_info info = {
290 .sht = &radisys_sht,
291 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
292 .pio_mask = 0x1f, /* pio0-4 */
293 .mwdma_mask = 0x07, /* mwdma1-2 */
294 .udma_mask = 0x14, /* UDMA33/66 only */
295 .port_ops = &radisys_pata_ops,
297 static struct ata_port_info *port_info[2] = { &info, &info };
299 if (!printed_version++)
300 dev_printk(KERN_DEBUG, &pdev->dev,
301 "version " DRV_VERSION "\n");
303 return ata_pci_init_one(pdev, port_info, 2);
306 static const struct pci_device_id radisys_pci_tbl[] = {
307 { PCI_VDEVICE(RADISYS, 0x8201), },
309 { } /* terminate list */
312 static struct pci_driver radisys_pci_driver = {
313 .name = DRV_NAME,
314 .id_table = radisys_pci_tbl,
315 .probe = radisys_init_one,
316 .remove = ata_pci_remove_one,
317 #ifdef CONFIG_PM
318 .suspend = ata_pci_device_suspend,
319 .resume = ata_pci_device_resume,
320 #endif
323 static int __init radisys_init(void)
325 return pci_register_driver(&radisys_pci_driver);
328 static void __exit radisys_exit(void)
330 pci_unregister_driver(&radisys_pci_driver);
333 module_init(radisys_init);
334 module_exit(radisys_exit);
336 MODULE_AUTHOR("Alan Cox");
337 MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
338 MODULE_LICENSE("GPL");
339 MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
340 MODULE_VERSION(DRV_VERSION);