include/asm-sh/processor.h

   1 /*
   2  * include/asm-sh/processor.h
   3  *
   4  * Copyright (C) 1999, 2000  Niibe Yutaka
   5  * Copyright (C) 2002, 2003  Paul Mundt
   6  */
   7
   8 #ifndef __ASM_SH_PROCESSOR_H
   9 #define __ASM_SH_PROCESSOR_H
  10 #ifdef __KERNEL__
  11
  12 #include <linux/compiler.h>
  13 #include <asm/page.h>
  14 #include <asm/types.h>
  15 #include <asm/cache.h>
  16 #include <asm/ptrace.h>
  17
  18 /*
  19  * Default implementation of macro that returns current
  20  * instruction pointer ("program counter").
  21  */
  22 #define current_text_addr() ({ void *pc; __asm__("mova  1f, %0\n1:":"=z" (pc)); pc; })
  23
  24 /* Core Processor Version Register */
  25 #define CCN_PVR         0xff000030
  26 #define CCN_CVR         0xff000040
  27 #define CCN_PRR         0xff000044
  28
  29 /*
  30  *  CPU type and hardware bug flags. Kept separately for each CPU.
  31  *
  32  *  Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
  33  *  in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
  34  *  for parsing the subtype in get_cpu_subtype().
  35  */
  36 enum cpu_type {
  37         /* SH-2 types */
  38         CPU_SH7604,
  39
  40         /* SH-3 types */
  41         CPU_SH7705, CPU_SH7707,  CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
  42         CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300,
  43
  44         /* SH-4 types */
  45         CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
  46         CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
  47         CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781,
  48
  49         /* Unknown subtype */
  50         CPU_SH_NONE
  51 };
  52
  53 struct sh_cpuinfo {
  54         enum cpu_type type;
  55         unsigned long loops_per_jiffy;
  56
  57         struct cache_info icache;
  58         struct cache_info dcache;
  59
  60         unsigned long flags;
  61 };
  62
  63 extern struct sh_cpuinfo boot_cpu_data;
  64
  65 #ifdef CONFIG_SMP
  66 extern struct sh_cpuinfo cpu_data[];
  67 #define current_cpu_data cpu_data[smp_processor_id()]
  68 #else
  69 #define cpu_data (&boot_cpu_data)
  70 #define current_cpu_data boot_cpu_data
  71 #endif
  72
  73 /*
  74  * User space process size: 2GB.
  75  *
  76  * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
  77  */
  78 #define TASK_SIZE       0x7c000000UL
  79
  80 /* This decides where the kernel will search for a free chunk of vm
  81  * space during mmap's.
  82  */
  83 #define TASK_UNMAPPED_BASE      (TASK_SIZE / 3)
  84
  85 /*
  86  * Bit of SR register
  87  *
  88  * FD-bit:
  89  *     When it's set, it means the processor doesn't have right to use FPU,
  90  *     and it results exception when the floating operation is executed.
  91  *
  92  * IMASK-bit:
  93  *     Interrupt level mask
  94  */
  95 #define SR_FD           0x00008000
  96 #define SR_DSP          0x00001000
  97 #define SR_IMASK        0x000000f0
  98
  99 /*
 100  * FPU structure and data
 101  */
 102
 103 struct sh_fpu_hard_struct {
 104         unsigned long fp_regs[16];
 105         unsigned long xfp_regs[16];
 106         unsigned long fpscr;
 107         unsigned long fpul;
 108
 109         long status; /* software status information */
 110 };
 111
 112 /* Dummy fpu emulator  */
 113 struct sh_fpu_soft_struct {
 114         unsigned long fp_regs[16];
 115         unsigned long xfp_regs[16];
 116         unsigned long fpscr;
 117         unsigned long fpul;
 118
 119         unsigned char lookahead;
 120         unsigned long entry_pc;
 121 };
 122
 123 union sh_fpu_union {
 124         struct sh_fpu_hard_struct hard;
 125         struct sh_fpu_soft_struct soft;
 126 };
 127
 128 /*
 129  * Processor flags
 130  */
 131
 132 #define CPU_HAS_FPU             0x0001  /* Hardware FPU support */
 133 #define CPU_HAS_P2_FLUSH_BUG    0x0002  /* Need to flush the cache in P2 area */
 134 #define CPU_HAS_MMU_PAGE_ASSOC  0x0004  /* SH3: TLB way selection bit support */
 135 #define CPU_HAS_DSP             0x0008  /* SH-DSP: DSP support */
 136 #define CPU_HAS_PERF_COUNTER    0x0010  /* Hardware performance counters */
 137 #define CPU_HAS_PTEA            0x0020  /* PTEA register */
 138
 139 struct thread_struct {
 140         unsigned long sp;
 141         unsigned long pc;
 142
 143         unsigned long trap_no, error_code;
 144         unsigned long address;
 145         /* Hardware debugging registers may come here */
 146         unsigned long ubc_pc;
 147
 148         /* floating point info */
 149         union sh_fpu_union fpu;
 150 };
 151
 152 /* Count of active tasks with UBC settings */
 153 extern int ubc_usercnt;
 154
 155 #define INIT_THREAD  {                                          \
 156         sizeof(init_stack) + (long) &init_stack, /* sp */       \
 157         0,                                       /* pc */       \
 158         0, 0,                                                   \
 159         0,                                                      \
 160         0,                                                      \
 161         {{{0,}},}                               /* fpu state */ \
 162 }
 163
 164 /*
 165  * Do necessary setup to start up a newly executed thread.
 166  */
 167 #define start_thread(regs, new_pc, new_sp)       \
 168         set_fs(USER_DS);                         \
 169         regs->pr = 0;                            \
 170         regs->sr = SR_FD;       /* User mode. */ \
 171         regs->pc = new_pc;                       \
 172         regs->regs[15] = new_sp
 173
 174 /* Forward declaration, a strange C thing */
 175 struct task_struct;
 176 struct mm_struct;
 177
 178 /* Free all resources held by a thread. */
 179 extern void release_thread(struct task_struct *);
 180
 181 /* Prepare to copy thread state - unlazy all lazy status */
 182 #define prepare_to_copy(tsk)    do { } while (0)
 183
 184 /*
 185  * create a kernel thread without removing it from tasklists
 186  */
 187 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 188
 189 /* Copy and release all segment info associated with a VM */
 190 #define copy_segments(p, mm)    do { } while(0)
 191 #define release_segments(mm)    do { } while(0)
 192
 193 /*
 194  * FPU lazy state save handling.
 195  */
 196
 197 static __inline__ void disable_fpu(void)
 198 {
 199         unsigned long __dummy;
 200
 201         /* Set FD flag in SR */
 202         __asm__ __volatile__("stc       sr, %0\n\t"
 203                              "or        %1, %0\n\t"
 204                              "ldc       %0, sr"
 205                              : "=&r" (__dummy)
 206                              : "r" (SR_FD));
 207 }
 208
 209 static __inline__ void enable_fpu(void)
 210 {
 211         unsigned long __dummy;
 212
 213         /* Clear out FD flag in SR */
 214         __asm__ __volatile__("stc       sr, %0\n\t"
 215                              "and       %1, %0\n\t"
 216                              "ldc       %0, sr"
 217                              : "=&r" (__dummy)
 218                              : "r" (~SR_FD));
 219 }
 220
 221 static __inline__ void release_fpu(struct pt_regs *regs)
 222 {
 223         regs->sr |= SR_FD;
 224 }
 225
 226 static __inline__ void grab_fpu(struct pt_regs *regs)
 227 {
 228         regs->sr &= ~SR_FD;
 229 }
 230
 231 #ifdef CONFIG_CPU_SH4
 232 extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
 233 #else
 234 #define save_fpu(tsk)   do { } while (0)
 235 #endif
 236
 237 #define unlazy_fpu(tsk, regs) do {                      \
 238         if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) {   \
 239                 save_fpu(tsk, regs);                    \
 240         }                                               \
 241 } while (0)
 242
 243 #define clear_fpu(tsk, regs) do {                               \
 244         if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) {           \
 245                 clear_tsk_thread_flag(tsk, TIF_USEDFPU);        \
 246                 release_fpu(regs);                              \
 247         }                                                       \
 248 } while (0)
 249
 250 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
 251 #define FPSCR_INIT  0x00080000
 252
 253 #define FPSCR_CAUSE_MASK        0x0001f000      /* Cause bits */
 254 #define FPSCR_FLAG_MASK         0x0000007c      /* Flag bits */
 255
 256 /*
 257  * Return saved PC of a blocked thread.
 258  */
 259 #define thread_saved_pc(tsk)    (tsk->thread.pc)
 260
 261 extern unsigned long get_wchan(struct task_struct *p);
 262
 263 #define KSTK_EIP(tsk)  ((tsk)->thread.pc)
 264 #define KSTK_ESP(tsk)  ((tsk)->thread.sp)
 265
 266 #define cpu_sleep()     __asm__ __volatile__ ("sleep" : : : "memory")
 267 #define cpu_relax()     barrier()
 268
 269 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
 270     defined(CONFIG_CPU_SH4)
 271 #define PREFETCH_STRIDE         L1_CACHE_BYTES
 272 #define ARCH_HAS_PREFETCH
 273 #define ARCH_HAS_PREFETCHW
 274 static inline void prefetch(void *x)
 275 {
 276         __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
 277 }
 278
 279 #define prefetchw(x)    prefetch(x)
 280 #endif
 281
 282 #endif /* __KERNEL__ */
 283 #endif /* __ASM_SH_PROCESSOR_H */