2 * Copyright (C) 2003 - 2006 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
30 #ifndef _NETXEN_NIC_H_
31 #define _NETXEN_NIC_H_
33 #include <linux/module.h>
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/compiler.h>
37 #include <linux/slab.h>
38 #include <linux/delay.h>
39 #include <linux/init.h>
40 #include <linux/ioport.h>
41 #include <linux/pci.h>
42 #include <linux/netdevice.h>
43 #include <linux/etherdevice.h>
46 #include <linux/tcp.h>
47 #include <linux/skbuff.h>
48 #include <linux/version.h>
50 #include <linux/ethtool.h>
51 #include <linux/mii.h>
52 #include <linux/interrupt.h>
53 #include <linux/timer.h>
56 #include <linux/mman.h>
58 #include <asm/system.h>
60 #include <asm/byteorder.h>
61 #include <asm/uaccess.h>
62 #include <asm/pgtable.h>
64 #include "netxen_nic_hw.h"
66 #define _NETXEN_NIC_LINUX_MAJOR 3
67 #define _NETXEN_NIC_LINUX_MINOR 3
68 #define _NETXEN_NIC_LINUX_SUBVERSION 3
69 #define NETXEN_NIC_LINUX_VERSIONID "3.3.3"
71 #define NUM_FLASH_SECTORS (64)
72 #define FLASH_SECTOR_SIZE (64 * 1024)
73 #define FLASH_TOTAL_SIZE (NUM_FLASH_SECTORS * FLASH_SECTOR_SIZE)
75 #define PHAN_VENDOR_ID 0x4040
77 #define RCV_DESC_RINGSIZE \
78 (sizeof(struct rcv_desc) * adapter->max_rx_desc_count)
79 #define STATUS_DESC_RINGSIZE \
80 (sizeof(struct status_desc)* adapter->max_rx_desc_count)
81 #define LRO_DESC_RINGSIZE \
82 (sizeof(rcvDesc_t) * adapter->max_lro_rx_desc_count)
84 (sizeof(struct netxen_cmd_buffer) * adapter->max_tx_desc_count)
85 #define RCV_BUFFSIZE \
86 (sizeof(struct netxen_rx_buffer) * rcv_desc->max_rx_desc_count)
87 #define find_diff_among(a,b,range) ((a)<=(b)?((b)-(a)):((b)+(range)-(a)))
89 #define NETXEN_NETDEV_STATUS 0x1
90 #define NETXEN_RCV_PRODUCER_OFFSET 0
91 #define NETXEN_RCV_PEG_DB_ID 2
92 #define NETXEN_HOST_DUMMY_DMA_SIZE 1024
93 #define FLASH_SUCCESS 0
95 #define ADDR_IN_WINDOW1(off) \
96 ((off > NETXEN_CRB_PCIX_HOST2) && (off < NETXEN_CRB_MAX)) ? 1 : 0
98 * In netxen_nic_down(), we must wait for any pending callback requests into
99 * netxen_watchdog_task() to complete; eg otherwise the watchdog_timer could be
100 * reenabled right after it is deleted in netxen_nic_down(). FLUSH_SCHEDULED_WORK()
101 * does this synchronization.
103 * Normally, schedule_work()/flush_scheduled_work() could have worked, but
104 * netxen_nic_close() is invoked with kernel rtnl lock held. netif_carrier_off()
105 * call in netxen_nic_close() triggers a schedule_work(&linkwatch_work), and a
106 * subsequent call to flush_scheduled_work() in netxen_nic_down() would cause
107 * linkwatch_event() to be executed which also attempts to acquire the rtnl
108 * lock thus causing a deadlock.
111 #define SCHEDULE_WORK(tp) queue_work(netxen_workq, tp)
112 #define FLUSH_SCHEDULED_WORK() flush_workqueue(netxen_workq)
113 extern struct workqueue_struct
*netxen_workq
;
116 * normalize a 64MB crb address to 32MB PCI window
117 * To use NETXEN_CRB_NORMALIZE, window _must_ be set to 1
119 #define NETXEN_CRB_NORMAL(reg) \
120 ((reg) - NETXEN_CRB_PCIX_HOST2 + NETXEN_CRB_PCIX_HOST)
122 #define NETXEN_CRB_NORMALIZE(adapter, reg) \
123 pci_base_offset(adapter, NETXEN_CRB_NORMAL(reg))
125 #define DB_NORMALIZE(adapter, off) \
126 (adapter->ahw.db_base + (off))
128 #define NX_P2_C0 0x24
129 #define NX_P2_C1 0x25
131 #define FIRST_PAGE_GROUP_START 0
132 #define FIRST_PAGE_GROUP_END 0x100000
134 #define SECOND_PAGE_GROUP_START 0x4000000
135 #define SECOND_PAGE_GROUP_END 0x66BC000
137 #define THIRD_PAGE_GROUP_START 0x70E4000
138 #define THIRD_PAGE_GROUP_END 0x8000000
140 #define FIRST_PAGE_GROUP_SIZE FIRST_PAGE_GROUP_END - FIRST_PAGE_GROUP_START
141 #define SECOND_PAGE_GROUP_SIZE SECOND_PAGE_GROUP_END - SECOND_PAGE_GROUP_START
142 #define THIRD_PAGE_GROUP_SIZE THIRD_PAGE_GROUP_END - THIRD_PAGE_GROUP_START
144 #define MAX_RX_BUFFER_LENGTH 1760
145 #define MAX_RX_JUMBO_BUFFER_LENGTH 8062
146 #define MAX_RX_LRO_BUFFER_LENGTH ((48*1024)-512)
147 #define RX_DMA_MAP_LEN (MAX_RX_BUFFER_LENGTH - 2)
148 #define RX_JUMBO_DMA_MAP_LEN \
149 (MAX_RX_JUMBO_BUFFER_LENGTH - 2)
150 #define RX_LRO_DMA_MAP_LEN (MAX_RX_LRO_BUFFER_LENGTH - 2)
151 #define NETXEN_ROM_ROUNDUP 0x80000000ULL
154 * Maximum number of ring contexts
156 #define MAX_RING_CTX 1
158 /* Opcodes to be used with the commands */
161 /* The following opcodes are for IP checksum */
170 /* The following opcodes are for internal consumption. */
171 #define NETXEN_CONTROL_OP 0x10
172 #define PEGNET_REQUEST 0x11
174 #define MAX_NUM_CARDS 4
176 #define MAX_BUFFERS_PER_CMD 32
179 * Following are the states of the Phantom. Phantom will set them and
180 * Host will read to check if the fields are correct.
182 #define PHAN_INITIALIZE_START 0xff00
183 #define PHAN_INITIALIZE_FAILED 0xffff
184 #define PHAN_INITIALIZE_COMPLETE 0xff01
186 /* Host writes the following to notify that it has done the init-handshake */
187 #define PHAN_INITIALIZE_ACK 0xf00f
189 #define NUM_RCV_DESC_RINGS 3 /* No of Rcv Descriptor contexts */
191 /* descriptor types */
192 #define RCV_DESC_NORMAL 0x01
193 #define RCV_DESC_JUMBO 0x02
194 #define RCV_DESC_LRO 0x04
195 #define RCV_DESC_NORMAL_CTXID 0
196 #define RCV_DESC_JUMBO_CTXID 1
197 #define RCV_DESC_LRO_CTXID 2
199 #define RCV_DESC_TYPE(ID) \
200 ((ID == RCV_DESC_JUMBO_CTXID) \
202 : ((ID == RCV_DESC_LRO_CTXID) \
206 #define MAX_CMD_DESCRIPTORS 1024
207 #define MAX_RCV_DESCRIPTORS 16384
208 #define MAX_JUMBO_RCV_DESCRIPTORS 1024
209 #define MAX_LRO_RCV_DESCRIPTORS 64
210 #define MAX_RCVSTATUS_DESCRIPTORS MAX_RCV_DESCRIPTORS
211 #define MAX_JUMBO_RCV_DESC MAX_JUMBO_RCV_DESCRIPTORS
212 #define MAX_RCV_DESC MAX_RCV_DESCRIPTORS
213 #define MAX_RCVSTATUS_DESC MAX_RCV_DESCRIPTORS
214 #define MAX_EPG_DESCRIPTORS (MAX_CMD_DESCRIPTORS * 8)
215 #define NUM_RCV_DESC (MAX_RCV_DESC + MAX_JUMBO_RCV_DESCRIPTORS + \
216 MAX_LRO_RCV_DESCRIPTORS)
217 #define MIN_TX_COUNT 4096
218 #define MIN_RX_COUNT 4096
219 #define NETXEN_CTX_SIGNATURE 0xdee0
220 #define NETXEN_RCV_PRODUCER(ringid) (ringid)
221 #define MAX_FRAME_SIZE 0x10000 /* 64K MAX size for LSO */
223 #define PHAN_PEG_RCV_INITIALIZED 0xff01
224 #define PHAN_PEG_RCV_START_INITIALIZE 0xff00
226 #define get_next_index(index, length) \
227 (((index) + 1) & ((length) - 1))
229 #define get_index_range(index,length,count) \
230 (((index) + (count)) & ((length) - 1))
232 #define MPORT_SINGLE_FUNCTION_MODE 0x1111
234 extern unsigned long long netxen_dma_mask
;
235 extern unsigned long last_schedule_time
;
238 * NetXen host-peg signal message structure
240 * Bit 0-1 : peg_id => 0x2 for tx and 01 for rx
241 * Bit 2 : priv_id => must be 1
242 * Bit 3-17 : count => for doorbell
243 * Bit 18-27 : ctx_id => Context id
247 typedef u32 netxen_ctx_msg
;
249 #define netxen_set_msg_peg_id(config_word, val) \
250 ((config_word) &= ~3, (config_word) |= val & 3)
251 #define netxen_set_msg_privid(config_word) \
252 ((config_word) |= 1 << 2)
253 #define netxen_set_msg_count(config_word, val) \
254 ((config_word) &= ~(0x7fff<<3), (config_word) |= (val & 0x7fff) << 3)
255 #define netxen_set_msg_ctxid(config_word, val) \
256 ((config_word) &= ~(0x3ff<<18), (config_word) |= (val & 0x3ff) << 18)
257 #define netxen_set_msg_opcode(config_word, val) \
258 ((config_word) &= ~(0xf<<28), (config_word) |= (val & 0xf) << 28)
260 struct netxen_rcv_context
{
261 __le64 rcv_ring_addr
;
262 __le32 rcv_ring_size
;
266 struct netxen_ring_ctx
{
268 /* one command ring */
269 __le64 cmd_consumer_offset
;
270 __le64 cmd_ring_addr
;
271 __le32 cmd_ring_size
;
274 /* three receive rings */
275 struct netxen_rcv_context rcv_ctx
[3];
277 /* one status ring */
278 __le64 sts_ring_addr
;
279 __le32 sts_ring_size
;
282 } __attribute__ ((aligned(64)));
285 * Following data structures describe the descriptors that will be used.
286 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
287 * we are doing LSO (above the 1500 size packet) only.
291 * The size of reference handle been changed to 16 bits to pass the MSS fields
295 #define FLAGS_CHECKSUM_ENABLED 0x01
296 #define FLAGS_LSO_ENABLED 0x02
297 #define FLAGS_IPSEC_SA_ADD 0x04
298 #define FLAGS_IPSEC_SA_DELETE 0x08
299 #define FLAGS_VLAN_TAGGED 0x10
301 #define netxen_set_cmd_desc_port(cmd_desc, var) \
302 ((cmd_desc)->port_ctxid |= ((var) & 0x0F))
304 #define netxen_set_cmd_desc_flags(cmd_desc, val) \
305 ((cmd_desc)->flags_opcode &= ~cpu_to_le16(0x7f), \
306 (cmd_desc)->flags_opcode |= cpu_to_le16((val) & 0x7f))
307 #define netxen_set_cmd_desc_opcode(cmd_desc, val) \
308 ((cmd_desc)->flags_opcode &= ~cpu_to_le16(0x3f<<7), \
309 (cmd_desc)->flags_opcode |= cpu_to_le16(((val & 0x3f)<<7)))
311 #define netxen_set_cmd_desc_num_of_buff(cmd_desc, val) \
312 ((cmd_desc)->num_of_buffers_total_length &= ~cpu_to_le32(0xff), \
313 (cmd_desc)->num_of_buffers_total_length |= cpu_to_le32((val) & 0xff))
314 #define netxen_set_cmd_desc_totallength(cmd_desc, val) \
315 ((cmd_desc)->num_of_buffers_total_length &= ~cpu_to_le32(0xffffff00), \
316 (cmd_desc)->num_of_buffers_total_length |= cpu_to_le32(val << 8))
318 #define netxen_get_cmd_desc_opcode(cmd_desc) \
319 ((le16_to_cpu((cmd_desc)->flags_opcode) >> 7) & 0x003F)
320 #define netxen_get_cmd_desc_totallength(cmd_desc) \
321 (le32_to_cpu((cmd_desc)->num_of_buffers_total_length) >> 8)
323 struct cmd_desc_type0
{
324 u8 tcp_hdr_offset
; /* For LSO only */
325 u8 ip_hdr_offset
; /* For LSO only */
326 /* Bit pattern: 0-6 flags, 7-12 opcode, 13-15 unused */
328 /* Bit pattern: 0-7 total number of segments,
329 8-31 Total size of the packet */
330 __le32 num_of_buffers_total_length
;
333 __le32 addr_low_part2
;
334 __le32 addr_high_part2
;
339 __le16 reference_handle
; /* changed to u16 to add mss */
340 __le16 mss
; /* passed by NDIS_PACKET for LSO */
341 /* Bit pattern 0-3 port, 0-3 ctx id */
343 u8 total_hdr_length
; /* LSO only : MAC+IP+TCP Hdr size */
344 __le16 conn_id
; /* IPSec offoad only */
348 __le32 addr_low_part3
;
349 __le32 addr_high_part3
;
355 __le32 addr_low_part1
;
356 __le32 addr_high_part1
;
361 __le16 buffer1_length
;
362 __le16 buffer2_length
;
363 __le16 buffer3_length
;
364 __le16 buffer4_length
;
368 __le32 addr_low_part4
;
369 __le32 addr_high_part4
;
376 } __attribute__ ((aligned(64)));
378 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
380 __le16 reference_handle
;
382 __le32 buffer_length
; /* allocated buffer length (usually 2K) */
386 /* opcode field in status_desc */
387 #define RCV_NIC_PKT (0xA)
388 #define STATUS_NIC_PKT ((RCV_NIC_PKT) << 12)
390 /* for status field in status_desc */
391 #define STATUS_NEED_CKSUM (1)
392 #define STATUS_CKSUM_OK (2)
394 /* owner bits of status_desc */
395 #define STATUS_OWNER_HOST (0x1)
396 #define STATUS_OWNER_PHANTOM (0x2)
398 #define NETXEN_PROT_IP (1)
399 #define NETXEN_PROT_UNKNOWN (0)
401 /* Note: sizeof(status_desc) should always be a mutliple of 2 */
403 #define netxen_get_sts_desc_lro_cnt(status_desc) \
404 ((status_desc)->lro & 0x7F)
405 #define netxen_get_sts_desc_lro_last_frag(status_desc) \
406 (((status_desc)->lro & 0x80) >> 7)
408 #define netxen_get_sts_port(status_desc) \
409 (le64_to_cpu((status_desc)->status_desc_data) & 0x0F)
410 #define netxen_get_sts_status(status_desc) \
411 ((le64_to_cpu((status_desc)->status_desc_data) >> 4) & 0x0F)
412 #define netxen_get_sts_type(status_desc) \
413 ((le64_to_cpu((status_desc)->status_desc_data) >> 8) & 0x0F)
414 #define netxen_get_sts_totallength(status_desc) \
415 ((le64_to_cpu((status_desc)->status_desc_data) >> 12) & 0xFFFF)
416 #define netxen_get_sts_refhandle(status_desc) \
417 ((le64_to_cpu((status_desc)->status_desc_data) >> 28) & 0xFFFF)
418 #define netxen_get_sts_prot(status_desc) \
419 ((le64_to_cpu((status_desc)->status_desc_data) >> 44) & 0x0F)
420 #define netxen_get_sts_owner(status_desc) \
421 ((le64_to_cpu((status_desc)->status_desc_data) >> 56) & 0x03)
422 #define netxen_get_sts_opcode(status_desc) \
423 ((le64_to_cpu((status_desc)->status_desc_data) >> 58) & 0x03F)
425 #define netxen_clear_sts_owner(status_desc) \
426 ((status_desc)->status_desc_data &= \
427 ~cpu_to_le64(((unsigned long long)3) << 56 ))
428 #define netxen_set_sts_owner(status_desc, val) \
429 ((status_desc)->status_desc_data |= \
430 cpu_to_le64(((unsigned long long)((val) & 0x3)) << 56 ))
433 /* Bit pattern: 0-3 port, 4-7 status, 8-11 type, 12-27 total_length
434 28-43 reference_handle, 44-47 protocol, 48-52 unused
435 53-55 desc_cnt, 56-57 owner, 58-63 opcode
437 __le64 status_desc_data
;
442 /* Bit pattern: 0-6 lro_count indicates frag sequence,
443 7 last_frag indicates last frag */
445 } __attribute__ ((aligned(8)));
448 NETXEN_RCV_PEG_0
= 0,
451 /* The version of the main data structure */
452 #define NETXEN_BDINFO_VERSION 1
454 /* Magic number to let user know flash is programmed */
455 #define NETXEN_BDINFO_MAGIC 0x12345678
457 /* Max number of Gig ports on a Phantom board */
458 #define NETXEN_MAX_PORTS 4
461 NETXEN_BRDTYPE_P1_BD
= 0x0000,
462 NETXEN_BRDTYPE_P1_SB
= 0x0001,
463 NETXEN_BRDTYPE_P1_SMAX
= 0x0002,
464 NETXEN_BRDTYPE_P1_SOCK
= 0x0003,
466 NETXEN_BRDTYPE_P2_SOCK_31
= 0x0008,
467 NETXEN_BRDTYPE_P2_SOCK_35
= 0x0009,
468 NETXEN_BRDTYPE_P2_SB35_4G
= 0x000a,
469 NETXEN_BRDTYPE_P2_SB31_10G
= 0x000b,
470 NETXEN_BRDTYPE_P2_SB31_2G
= 0x000c,
472 NETXEN_BRDTYPE_P2_SB31_10G_IMEZ
= 0x000d,
473 NETXEN_BRDTYPE_P2_SB31_10G_HMEZ
= 0x000e,
474 NETXEN_BRDTYPE_P2_SB31_10G_CX4
= 0x000f
478 NETXEN_BRDMFG_INVENTEC
= 1
482 MEM_ORG_128Mbx4
= 0x0, /* DDR1 only */
483 MEM_ORG_128Mbx8
= 0x1, /* DDR1 only */
484 MEM_ORG_128Mbx16
= 0x2, /* DDR1 only */
485 MEM_ORG_256Mbx4
= 0x3,
486 MEM_ORG_256Mbx8
= 0x4,
487 MEM_ORG_256Mbx16
= 0x5,
488 MEM_ORG_512Mbx4
= 0x6,
489 MEM_ORG_512Mbx8
= 0x7,
490 MEM_ORG_512Mbx16
= 0x8,
493 MEM_ORG_1Gbx16
= 0xb,
496 MEM_ORG_2Gbx16
= 0xe,
497 MEM_ORG_128Mbx32
= 0x10002, /* GDDR only */
498 MEM_ORG_256Mbx32
= 0x10005 /* GDDR only */
499 } netxen_mn_mem_org_t
;
502 MEM_ORG_512Kx36
= 0x0,
505 } netxen_sn_mem_org_t
;
510 MEM_DEPTH_16MB
= 0x3,
511 MEM_DEPTH_32MB
= 0x4,
512 MEM_DEPTH_64MB
= 0x5,
513 MEM_DEPTH_128MB
= 0x6,
514 MEM_DEPTH_256MB
= 0x7,
515 MEM_DEPTH_512MB
= 0x8,
520 MEM_DEPTH_16GB
= 0xd,
522 } netxen_mem_depth_t
;
524 struct netxen_board_info
{
536 u32 port_mask
; /* available niu ports */
537 u32 peg_mask
; /* available pegs */
538 u32 icache_ok
; /* can we run with icache? */
539 u32 dcache_ok
; /* can we run with dcache? */
547 /* MN-related config */
548 u32 mn_sync_mode
; /* enable/ sync shift cclk/ sync shift mclk */
549 u32 mn_sync_shift_cclk
;
550 u32 mn_sync_shift_mclk
;
552 u32 mn_crystal_freq
; /* in MHz */
553 u32 mn_speed
; /* in MHz */
556 u32 mn_ranks_0
; /* ranks per slot */
557 u32 mn_ranks_1
; /* ranks per slot */
568 u32 mn_mode_reg
; /* MIU DDR Mode Register */
569 u32 mn_ext_mode_reg
; /* MIU DDR Extended Mode Register */
570 u32 mn_timing_0
; /* MIU Memory Control Timing Rgister */
571 u32 mn_timing_1
; /* MIU Extended Memory Ctrl Timing Register */
572 u32 mn_timing_2
; /* MIU Extended Memory Ctrl Timing2 Register */
574 /* SN-related config */
575 u32 sn_sync_mode
; /* enable/ sync shift cclk / sync shift mclk */
576 u32 sn_pt_mode
; /* pass through mode */
591 u32 magic
; /* indicates flash has been initialized */
598 #define FLASH_NUM_PORTS (4)
600 struct netxen_flash_mac_addr
{
604 struct netxen_user_old_info
{
616 /* primary image status */
618 u32 secondary_present
;
620 /* MAC address , 4 ports */
621 struct netxen_flash_mac_addr mac_addr
[FLASH_NUM_PORTS
];
623 #define FLASH_NUM_MAC_PER_PORT 32
624 struct netxen_user_info
{
625 u8 flash_md5
[16 * 64];
632 /* primary image status */
634 u32 secondary_present
;
636 /* MAC address , 4 ports, 32 address per port */
637 u64 mac_addr
[FLASH_NUM_PORTS
* FLASH_NUM_MAC_PER_PORT
];
641 /* Any user defined data */
645 * Flash Layout - new format.
647 struct netxen_new_user_info
{
648 u8 flash_md5
[16 * 64];
655 /* primary image status */
657 u32 secondary_present
;
659 /* MAC address , 4 ports, 32 address per port */
660 u64 mac_addr
[FLASH_NUM_PORTS
* FLASH_NUM_MAC_PER_PORT
];
664 /* Any user defined data */
667 #define SECONDARY_IMAGE_PRESENT 0xb3b4b5b6
668 #define SECONDARY_IMAGE_ABSENT 0xffffffff
669 #define PRIMARY_IMAGE_GOOD 0x5a5a5a5a
670 #define PRIMARY_IMAGE_BAD 0xffffffff
672 /* Flash memory map */
674 CRBINIT_START
= 0, /* Crbinit section */
675 BRDCFG_START
= 0x4000, /* board config */
676 INITCODE_START
= 0x6000, /* pegtune code */
677 BOOTLD_START
= 0x10000, /* bootld */
678 IMAGE_START
= 0x43000, /* compressed image */
679 SECONDARY_START
= 0x200000, /* backup images */
680 PXE_START
= 0x3E0000, /* user defined region */
681 USER_START
= 0x3E8000, /* User defined region for new boards */
682 FIXED_START
= 0x3F0000 /* backup of crbinit */
683 } netxen_flash_map_t
;
685 #define USER_START_OLD PXE_START /* for backward compatibility */
687 #define FLASH_START (CRBINIT_START)
688 #define INIT_SECTOR (0)
689 #define PRIMARY_START (BOOTLD_START)
690 #define FLASH_CRBINIT_SIZE (0x4000)
691 #define FLASH_BRDCFG_SIZE (sizeof(struct netxen_board_info))
692 #define FLASH_USER_SIZE (sizeof(struct netxen_user_info)/sizeof(u32))
693 #define FLASH_SECONDARY_SIZE (USER_START-SECONDARY_START)
694 #define NUM_PRIMARY_SECTORS (0x20)
695 #define NUM_CONFIG_SECTORS (1)
696 #define PFX "NetXen: "
697 extern char netxen_nic_driver_name
[];
699 /* Note: Make sure to not call this before adapter->port is valid */
700 #if !defined(NETXEN_DEBUG)
701 #define DPRINTK(klevel, fmt, args...) do { \
704 #define DPRINTK(klevel, fmt, args...) do { \
705 printk(KERN_##klevel PFX "%s: %s: " fmt, __FUNCTION__,\
706 (adapter != NULL && \
707 adapter->port[0] != NULL && \
708 adapter->port[0]->netdev != NULL) ? \
709 adapter->port[0]->netdev->name : NULL, \
713 /* Number of status descriptors to handle per interrupt */
714 #define MAX_STATUS_HANDLE (128)
717 * netxen_skb_frag{} is to contain mapping info for each SG list. This
718 * has to be freed when DMA is complete. This is part of netxen_tx_buffer{}.
720 struct netxen_skb_frag
{
725 /* Following defines are for the state of the buffers */
726 #define NETXEN_BUFFER_FREE 0
727 #define NETXEN_BUFFER_BUSY 1
730 * There will be one netxen_buffer per skb packet. These will be
731 * used to save the dma info for pci_unmap_page()
733 struct netxen_cmd_buffer
{
735 struct netxen_skb_frag frag_array
[MAX_BUFFERS_PER_CMD
+ 1];
741 unsigned long time_stamp
;
745 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
746 struct netxen_rx_buffer
{
751 u32 lro_expected_frags
;
752 u32 lro_current_frags
;
757 #define NETXEN_NIC_GBE 0x01
758 #define NETXEN_NIC_XGBE 0x02
761 * One hardware_context{} per adapter
762 * contains interrupt info as well shared hardware info.
764 struct netxen_hardware_context
{
765 struct pci_dev
*pdev
;
766 void __iomem
*pci_base0
;
767 void __iomem
*pci_base1
;
768 void __iomem
*pci_base2
;
769 void __iomem
*db_base
;
770 unsigned long db_len
;
775 struct netxen_board_info boardcfg
;
778 /* Address of cmd ring in Phantom */
779 struct cmd_desc_type0
*cmd_desc_head
;
780 struct pci_dev
*cmd_desc_pdev
;
781 dma_addr_t cmd_desc_phys_addr
;
782 struct netxen_adapter
*adapter
;
785 #define RCV_RING_LRO RCV_DESC_LRO
787 #define MINIMUM_ETHERNET_FRAME_SIZE 64 /* With FCS */
788 #define ETHERNET_FCS_SIZE 4
790 struct netxen_adapter_stats
{
805 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
806 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
808 struct netxen_rcv_desc_ctx
{
811 u32 rcv_pending
; /* Num of bufs posted in phantom */
812 u32 rcv_free
; /* Num of bufs in free list */
813 dma_addr_t phys_addr
;
814 struct pci_dev
*phys_pdev
;
815 struct rcv_desc
*desc_head
; /* address of rx ring in Phantom */
816 u32 max_rx_desc_count
;
819 struct netxen_rx_buffer
*rx_buf_arr
; /* rx buffers for receive */
824 * Receive context. There is one such structure per instance of the
825 * receive processing. Any state information that is relevant to
826 * the receive, and is must be in this structure. The global data may be
829 struct netxen_recv_context
{
830 struct netxen_rcv_desc_ctx rcv_desc
[NUM_RCV_DESC_RINGS
];
831 u32 status_rx_producer
;
832 u32 status_rx_consumer
;
833 dma_addr_t rcv_status_desc_phys_addr
;
834 struct pci_dev
*rcv_status_desc_pdev
;
835 struct status_desc
*rcv_status_desc_head
;
838 #define NETXEN_NIC_MSI_ENABLED 0x02
839 #define NETXEN_DMA_MASK 0xfffffffe
840 #define NETXEN_DB_MAPSIZE_BYTES 0x1000
842 struct netxen_dummy_dma
{
844 dma_addr_t phys_addr
;
847 struct netxen_adapter
{
848 struct netxen_hardware_context ahw
;
849 int port_count
; /* Number of configured ports */
850 int active_ports
; /* Number of open ports */
851 struct netxen_port
*port
[NETXEN_MAX_PORTS
]; /* ptr to each port */
854 struct work_struct watchdog_task
;
855 struct timer_list watchdog_timer
;
862 u32 last_cmd_consumer
;
863 u32 max_tx_desc_count
;
864 u32 max_rx_desc_count
;
865 u32 max_jumbo_rx_desc_count
;
866 u32 max_lro_rx_desc_count
;
867 /* Num of instances active on cmd buffer ring */
868 u32 proc_cmd_buf_counter
;
870 u32 num_threads
, total_threads
; /*Use to keep track of xmit threads */
877 struct netxen_adapter_stats stats
;
879 struct netxen_cmd_buffer
*cmd_buf_arr
; /* Command buffers for xmit */
882 * Receive instances. These can be either one per port,
883 * or one per peg, etc.
885 struct netxen_recv_context recv_ctx
[MAX_RCV_CTX
];
888 struct netxen_dummy_dma dummy_dma
;
890 /* Context interface shared between card and host */
891 struct netxen_ring_ctx
*ctx_desc
;
892 struct pci_dev
*ctx_desc_pdev
;
893 dma_addr_t ctx_desc_phys_addr
;
894 int (*enable_phy_interrupts
) (struct netxen_adapter
*, int);
895 int (*disable_phy_interrupts
) (struct netxen_adapter
*, int);
896 void (*handle_phy_intr
) (struct netxen_adapter
*);
897 int (*macaddr_set
) (struct netxen_port
*, netxen_ethernet_macaddr_t
);
898 int (*set_mtu
) (struct netxen_port
*, int);
899 int (*set_promisc
) (struct netxen_adapter
*, int,
900 netxen_niu_prom_mode_t
);
901 int (*unset_promisc
) (struct netxen_adapter
*, int,
902 netxen_niu_prom_mode_t
);
903 int (*phy_read
) (struct netxen_adapter
*, long phy
, long reg
, u32
*);
904 int (*phy_write
) (struct netxen_adapter
*, long phy
, long reg
, u32 val
);
905 int (*init_port
) (struct netxen_adapter
*, int);
906 void (*init_niu
) (struct netxen_adapter
*);
907 int (*stop_port
) (struct netxen_adapter
*, int);
908 }; /* netxen_adapter structure */
910 /* Max number of xmit producer threads that can run simultaneously */
911 #define MAX_XMIT_PRODUCERS 16
913 struct netxen_port_stats
{
937 struct netxen_adapter
*adapter
;
939 u16 portnum
; /* GBE port number */
946 struct net_device
*netdev
;
947 struct pci_dev
*pdev
;
948 struct net_device_stats net_stats
;
949 struct netxen_port_stats stats
;
950 struct work_struct tx_timeout_task
;
953 #define PCI_OFFSET_FIRST_RANGE(adapter, off) \
954 ((adapter)->ahw.pci_base0 + (off))
955 #define PCI_OFFSET_SECOND_RANGE(adapter, off) \
956 ((adapter)->ahw.pci_base1 + (off) - SECOND_PAGE_GROUP_START)
957 #define PCI_OFFSET_THIRD_RANGE(adapter, off) \
958 ((adapter)->ahw.pci_base2 + (off) - THIRD_PAGE_GROUP_START)
960 static inline void __iomem
*pci_base_offset(struct netxen_adapter
*adapter
,
963 if ((off
< FIRST_PAGE_GROUP_END
) && (off
>= FIRST_PAGE_GROUP_START
)) {
964 return (adapter
->ahw
.pci_base0
+ off
);
965 } else if ((off
< SECOND_PAGE_GROUP_END
) &&
966 (off
>= SECOND_PAGE_GROUP_START
)) {
967 return (adapter
->ahw
.pci_base1
+ off
- SECOND_PAGE_GROUP_START
);
968 } else if ((off
< THIRD_PAGE_GROUP_END
) &&
969 (off
>= THIRD_PAGE_GROUP_START
)) {
970 return (adapter
->ahw
.pci_base2
+ off
- THIRD_PAGE_GROUP_START
);
975 static inline void __iomem
*pci_base(struct netxen_adapter
*adapter
,
978 if ((off
< FIRST_PAGE_GROUP_END
) && (off
>= FIRST_PAGE_GROUP_START
)) {
979 return adapter
->ahw
.pci_base0
;
980 } else if ((off
< SECOND_PAGE_GROUP_END
) &&
981 (off
>= SECOND_PAGE_GROUP_START
)) {
982 return adapter
->ahw
.pci_base1
;
983 } else if ((off
< THIRD_PAGE_GROUP_END
) &&
984 (off
>= THIRD_PAGE_GROUP_START
)) {
985 return adapter
->ahw
.pci_base2
;
990 int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter
*adapter
,
992 int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter
*adapter
,
994 int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter
*adapter
,
996 int netxen_niu_gbe_disable_phy_interrupts(struct netxen_adapter
*adapter
,
998 int netxen_niu_xgbe_clear_phy_interrupts(struct netxen_adapter
*adapter
,
1000 int netxen_niu_gbe_clear_phy_interrupts(struct netxen_adapter
*adapter
,
1002 void netxen_nic_xgbe_handle_phy_intr(struct netxen_adapter
*adapter
);
1003 void netxen_nic_gbe_handle_phy_intr(struct netxen_adapter
*adapter
);
1004 void netxen_niu_gbe_set_mii_mode(struct netxen_adapter
*adapter
, int port
,
1006 void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter
*adapter
, int port
,
1008 int netxen_niu_gbe_phy_read(struct netxen_adapter
*adapter
, long phy
, long reg
,
1010 int netxen_niu_gbe_phy_write(struct netxen_adapter
*adapter
, long phy
,
1011 long reg
, __u32 val
);
1013 /* Functions available from netxen_nic_hw.c */
1014 int netxen_nic_set_mtu_xgb(struct netxen_port
*port
, int new_mtu
);
1015 int netxen_nic_set_mtu_gb(struct netxen_port
*port
, int new_mtu
);
1016 void netxen_nic_init_niu_gb(struct netxen_adapter
*adapter
);
1017 void netxen_nic_pci_change_crbwindow(struct netxen_adapter
*adapter
, u32 wndw
);
1018 void netxen_nic_reg_write(struct netxen_adapter
*adapter
, u64 off
, u32 val
);
1019 int netxen_nic_reg_read(struct netxen_adapter
*adapter
, u64 off
);
1020 void netxen_nic_write_w0(struct netxen_adapter
*adapter
, u32 index
, u32 value
);
1021 void netxen_nic_read_w0(struct netxen_adapter
*adapter
, u32 index
, u32
* value
);
1023 int netxen_nic_get_board_info(struct netxen_adapter
*adapter
);
1024 int netxen_nic_hw_read_wx(struct netxen_adapter
*adapter
, u64 off
, void *data
,
1026 int netxen_nic_hw_write_wx(struct netxen_adapter
*adapter
, u64 off
, void *data
,
1028 void netxen_crb_writelit_adapter(struct netxen_adapter
*adapter
,
1029 unsigned long off
, int data
);
1031 /* Functions from netxen_nic_init.c */
1032 void netxen_free_adapter_offload(struct netxen_adapter
*adapter
);
1033 int netxen_initialize_adapter_offload(struct netxen_adapter
*adapter
);
1034 void netxen_phantom_init(struct netxen_adapter
*adapter
, int pegtune_val
);
1035 void netxen_load_firmware(struct netxen_adapter
*adapter
);
1036 int netxen_pinit_from_rom(struct netxen_adapter
*adapter
, int verbose
);
1037 int netxen_rom_fast_read(struct netxen_adapter
*adapter
, int addr
, int *valp
);
1038 int netxen_rom_fast_read_words(struct netxen_adapter
*adapter
, int addr
,
1039 u8
*bytes
, size_t size
);
1040 int netxen_rom_fast_write_words(struct netxen_adapter
*adapter
, int addr
,
1041 u8
*bytes
, size_t size
);
1042 int netxen_flash_unlock(struct netxen_adapter
*adapter
);
1043 int netxen_backup_crbinit(struct netxen_adapter
*adapter
);
1044 int netxen_flash_erase_secondary(struct netxen_adapter
*adapter
);
1045 int netxen_flash_erase_primary(struct netxen_adapter
*adapter
);
1046 void netxen_halt_pegs(struct netxen_adapter
*adapter
);
1048 int netxen_rom_fast_write(struct netxen_adapter
*adapter
, int addr
, int data
);
1049 int netxen_rom_se(struct netxen_adapter
*adapter
, int addr
);
1050 int netxen_do_rom_se(struct netxen_adapter
*adapter
, int addr
);
1052 /* Functions from netxen_nic_isr.c */
1053 void netxen_nic_isr_other(struct netxen_adapter
*adapter
);
1054 void netxen_indicate_link_status(struct netxen_adapter
*adapter
, u32 port
,
1056 void netxen_handle_port_int(struct netxen_adapter
*adapter
, u32 port
,
1058 void netxen_nic_stop_all_ports(struct netxen_adapter
*adapter
);
1059 void netxen_initialize_adapter_sw(struct netxen_adapter
*adapter
);
1060 void netxen_initialize_adapter_hw(struct netxen_adapter
*adapter
);
1061 void *netxen_alloc(struct pci_dev
*pdev
, size_t sz
, dma_addr_t
* ptr
,
1062 struct pci_dev
**used_dev
);
1063 void netxen_initialize_adapter_ops(struct netxen_adapter
*adapter
);
1064 int netxen_init_firmware(struct netxen_adapter
*adapter
);
1065 void netxen_free_hw_resources(struct netxen_adapter
*adapter
);
1066 void netxen_tso_check(struct netxen_adapter
*adapter
,
1067 struct cmd_desc_type0
*desc
, struct sk_buff
*skb
);
1068 int netxen_nic_hw_resources(struct netxen_adapter
*adapter
);
1069 void netxen_nic_clear_stats(struct netxen_adapter
*adapter
);
1070 int netxen_nic_rx_has_work(struct netxen_adapter
*adapter
);
1071 int netxen_nic_tx_has_work(struct netxen_adapter
*adapter
);
1072 void netxen_watchdog_task(struct work_struct
*work
);
1073 void netxen_post_rx_buffers(struct netxen_adapter
*adapter
, u32 ctx
,
1075 void netxen_post_rx_buffers_nodb(struct netxen_adapter
*adapter
, u32 ctx
,
1077 int netxen_process_cmd_ring(unsigned long data
);
1078 u32
netxen_process_rcv_ring(struct netxen_adapter
*adapter
, int ctx
, int max
);
1079 void netxen_nic_set_multi(struct net_device
*netdev
);
1080 int netxen_nic_change_mtu(struct net_device
*netdev
, int new_mtu
);
1081 int netxen_nic_set_mac(struct net_device
*netdev
, void *p
);
1082 struct net_device_stats
*netxen_nic_get_stats(struct net_device
*netdev
);
1084 static inline void netxen_nic_disable_int(struct netxen_adapter
*adapter
)
1087 * ISR_INT_MASK: Can be read from window 0 or 1.
1089 writel(0x7ff, PCI_OFFSET_SECOND_RANGE(adapter
, ISR_INT_MASK
));
1093 static inline void netxen_nic_enable_int(struct netxen_adapter
*adapter
)
1097 switch (adapter
->ahw
.board_type
) {
1098 case NETXEN_NIC_GBE
:
1101 case NETXEN_NIC_XGBE
:
1109 writel(mask
, PCI_OFFSET_SECOND_RANGE(adapter
, ISR_INT_MASK
));
1111 if (!(adapter
->flags
& NETXEN_NIC_MSI_ENABLED
)) {
1113 writel(mask
, PCI_OFFSET_SECOND_RANGE(adapter
,
1114 ISR_INT_TARGET_MASK
));
1119 * NetXen Board information
1122 #define NETXEN_MAX_SHORT_NAME 16
1123 struct netxen_brdinfo
{
1124 netxen_brdtype_t brdtype
; /* type of board */
1125 long ports
; /* max no of physical ports */
1126 char short_name
[NETXEN_MAX_SHORT_NAME
];
1129 static const struct netxen_brdinfo netxen_boards
[] = {
1130 {NETXEN_BRDTYPE_P2_SB31_10G_CX4
, 1, "XGb CX4"},
1131 {NETXEN_BRDTYPE_P2_SB31_10G_HMEZ
, 1, "XGb HMEZ"},
1132 {NETXEN_BRDTYPE_P2_SB31_10G_IMEZ
, 2, "XGb IMEZ"},
1133 {NETXEN_BRDTYPE_P2_SB31_10G
, 1, "XGb XFP"},
1134 {NETXEN_BRDTYPE_P2_SB35_4G
, 4, "Quad Gb"},
1135 {NETXEN_BRDTYPE_P2_SB31_2G
, 2, "Dual Gb"},
1138 #define NUM_SUPPORTED_BOARDS (sizeof(netxen_boards)/sizeof(struct netxen_brdinfo))
1140 static inline void get_brd_port_by_type(u32 type
, int *ports
)
1143 for (i
= 0; i
< NUM_SUPPORTED_BOARDS
; ++i
) {
1144 if (netxen_boards
[i
].brdtype
== type
) {
1145 *ports
= netxen_boards
[i
].ports
;
1154 static inline void get_brd_name_by_type(u32 type
, char *name
)
1157 for (i
= 0; i
< NUM_SUPPORTED_BOARDS
; ++i
) {
1158 if (netxen_boards
[i
].brdtype
== type
) {
1159 strcpy(name
, netxen_boards
[i
].short_name
);
1169 int netxen_is_flash_supported(struct netxen_adapter
*adapter
);
1170 int netxen_get_flash_mac_addr(struct netxen_adapter
*adapter
, u64 mac
[]);
1171 extern void netxen_change_ringparam(struct netxen_adapter
*adapter
);
1172 extern int netxen_rom_fast_read(struct netxen_adapter
*adapter
, int addr
,
1175 extern struct ethtool_ops netxen_nic_ethtool_ops
;
1177 #endif /* __NETXEN_NIC_H_ */